Spliced display screen and electronic equipment

Abstract

The invention discloses a spliced display screen and electronic equipment, the spliced display screen comprises a plurality of display panels and a data processing module, the data processing module controls the transmission of a plurality of display data and the refreshing of the display data in the corresponding display panels according to the comparison result of the previous frame data and the current frame data, so that the display effect of the spliced display screen is improved. The display panel performs display according to the received display data, so that the refresh frequencies of different display panels in the same screen can be independently adjusted according to the comparison result, and the power consumption caused by refresh is saved under the condition that the display data of the display panel is not refreshed; and under the condition that the display data is not transmitted, the power consumption caused by data transmission is also saved, and the requirement on the data transmission rate is reduced.

Description

Technical Field

[0001] The present application relates to the field of display technology, and particularly to a tiled display screen and an electronic device. Background Art

[0002] A tiled display screen is a display system with a higher resolution composed of multiple display panels, and these display panels usually display at the same refresh rate.

[0003] However, in the case of displaying dynamic videos, it cannot meet the need for different display panels on the same screen to display at corresponding refresh rates. Summary of the Invention

[0004] The present application provides a tiled display screen and an electronic device to alleviate the technical problem that the refresh rates of different display panels on the same screen cannot be adjusted separately.

[0005] In a first aspect, the present application provides a tiled display screen, which includes a plurality of display panels and a data processing module. Each display panel displays according to the received display data; the data processing module is connected to the plurality of display panels, and is configured to split the current frame data into multiple portions of display data according to the number of display panels, and control the transmission of the multiple portions of display data and the refresh of the display data in the corresponding display panels according to the comparison result between the previous frame data and the current frame data; wherein, the comparison result is the judgment result of whether the whole portion of display data in the previous frame data is the same as the whole portion of display data in the current frame data, or the comparison result is the judgment result of whether the whole frame data of the previous frame data is the same as the whole frame data of the current frame data.

[0006] In a second aspect, the present application provides an electronic device, which includes the above-mentioned tiled display screen.

[0007] The tiled display screen and the electronic device provided by the present application, through the data processing module controlling the transmission of multiple portions of display data and the refresh of the display data in the corresponding display panels according to the comparison result between the previous frame data and the current frame data, and the display panel displays according to the received display data, can not only make the refresh rates of different display panels on the same screen be adjusted separately according to the comparison result, but also save the power consumption caused by refresh when the display panel does not refresh the display data, and save the power consumption caused by data transmission when there is no transmission of display data, and reduce the requirement for the data transmission rate. Brief Description of the Drawings

[0008] The following will make the technical solutions and other beneficial effects of the present application obvious by describing the specific embodiments of the present application in detail with reference to the drawings.

[0009] Figure 1Schematic diagram of the driving architecture of the tiled display screen in the related art.

[0010] Figure 2 Schematic diagram of the structure of the tiled display screen in the related art.

[0011] Figure 3 Schematic diagram of the driving of the tiled display screen in the related art.

[0012] Figure 4 The first schematic diagram of the driving architecture of the tiled display screen provided by the embodiment of the present application.

[0013] Figure 5 The second schematic diagram of the driving architecture of the tiled display screen provided by the embodiment of the present application.

[0014] Figure 6 Schematic diagram of the distribution of the refresh rate of the tiled display screen provided by the embodiment of the present application.

[0015] Figure 7 The first schematic diagram of the driving of the tiled display screen provided by the embodiment of the present application.

[0016] Figure 8 The second schematic diagram of the driving of the tiled display screen provided by the embodiment of the present application.

[0017] Figure 9 Schematic diagram of the structure of the electronic device provided by the embodiment of the present application.

[0018] Explanation of reference numerals:

[0019] 10 - Display panel; S1 - First display panel; S2 - Second display panel; SN - Nth display panel;

[0020] 20 - Data processing module; 21 - System - on - chip; 22 - Timing controller; 221 - First timing controller;

[0021] 222 - Second timing controller; 223 - Third timing controller; 22M - Mth timing controller;

[0022] DL1 - First data line; DL2 - Second data line; DLN - Nth data line;

[0023] GOA_syc_EM - Enable signal;

[0024] 100 - Tiled display screen;

[0025] 200 - Electronic device. Detailed implementation manners

[0026] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0027] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more, unless otherwise specifically defined.

[0028] Please refer to Figures 1 to 3 , Figure 1 which is a schematic diagram of the driving architecture of a tiled display screen in the related art. In a tiled display screen, each timing controller 22 is respectively connected to a plurality of display panels 10 through data lines to transmit corresponding display data. For example, the timing controller 22 is connected to the first display panel S1 through the first data line DL1, the timing controller 22 is connected to the second display panel S2 through the second data line DL2, and so on. The timing controller 22 is connected to the Nth display panel SN through the Nth data line DLN. The timing controller 22 also controls whether each display panel 10 refreshes the display data through an enable signal GOA_syc_EM.

[0029] Figure 2 which is a schematic diagram of the structure of a tiled display screen in the related art. The tiled display screen exemplarily includes 56 display panels 10 distributed in an eight-row and seven-column array. Since these display panels 10 adopt the Figure 3 shown driving method, and each display panel 10 connected to the same timing controller 22 is controlled by an enable signal GOA_syc_EM, the Figure 2 refresh frequencies f of each display panel 10 in are the same.

[0030] Figure 3 Taking the shown driving method with eight timing controllers 22 and each timing controller 22 connected to six display panels 10 as an example, the description is as follows:

[0031] For each frame in frames 1 to k, the system-on-a-chip 21 (SOC) splits a frame of 4K120Hz display data into 8 equal parts. Among them, 4K refers to the exemplary resolution of the tiled display screen, and 120Hz refers to the exemplary refresh frequency of the tiled display screen.

[0032] Each timing controller 22 (TCON) receives 1 / 8 of a frame of display data and splits the received 1 / 8 of the frame of display data into six pieces of display data of 480×360×120Hz according to the layout of the display panel 10 connected to the timing controller 22. Among them, 480×360 refers to the resolution of each display panel 10.

[0033] Six single screens (display panels 10) connected to the TCON receive display data with a data volume of 480×360×120Hz.

[0034] These display panels 10 start to display, so as to realize the full screen with a resolution of (480×8)×(360×6) being lit at a refresh rate of 120Hz.

[0035] The tiled display screen is a display system with a higher resolution composed of multiple display panels 10.

[0036] However, these display panels 10 display at the same refresh rate. In the case of displaying dynamic video, it cannot meet the need for different display panels 10 in the same screen to display at corresponding refresh rates.

[0037] Based on this, please refer to Figures 4 to 8 , this embodiment provides a tiled display screen 100, which includes multiple display panels 10 and a data processing module 20. Each display panel 10 displays according to the received display data; the data processing module 20 is connected to the multiple display panels 10, and the data processing module 20 is configured to split each frame of data into multiple pieces of display data according to the number of display panels 10, and control the transmission of the multiple pieces of display data and the refresh of the display data in the corresponding display panels 10 according to the comparison result between the previous frame of data and the current frame of data.

[0038] It can be understood that for the tiled display screen 100 provided in this application, by controlling the transmission of multiple pieces of display data and the refresh of the display data in the corresponding display panels 10 according to the comparison result between the previous frame of data and the current frame of data by the data processing module 20, and the display panels 10 display according to the received display data, not only can the refresh rates of different display panels 10 in the same screen be adjusted separately according to the comparison result, but also the power consumption caused by refreshing is saved when the display panels 10 do not refresh the display data, and the power consumption caused by data transmission is saved when there is no transmission of display data, and the requirement for the data transmission rate is reduced.

[0039] It should be noted that the data transfer amount is equal to the product of the data transfer rate and the data transfer time. Since some display data is not transferred, the data transfer amount is reduced. With the data transfer time remaining unchanged, the data transfer rate is also reduced, thereby lowering the requirement for the data transfer rate.

[0040] Among them, the comparison result is the judgment result of whether the whole display data in the previous frame of data is the same as the whole display data in the current frame of data. Herein, the whole display data is the complete display data corresponding to a display panel in one frame. Exemplarily, for the same display panel 10, it is judged whether the display data input to the display panel 10 in the previous frame is the same as the display data input to the display panel 10 in the current frame. If the comparison result indicates that the display data input to the display panel 10 in the previous frame is the same as the display data input to the display panel 10 in the current frame, then the display data input to the display panel 10 in the current frame is not transferred, and the display panel 10 is controlled not to refresh the display data; if the comparison result indicates that the display data input to the display panel 10 in the previous frame is different from the display data input to the display panel 10 in the current frame, then the display data input to the display panel 10 in the current frame is transferred, and the display panel 10 is controlled not to refresh the display data.

[0041] In some embodiments, the comparison result is the judgment result of whether the entire frame of data in the previous frame of data is the same as the entire frame of data in the current frame of data, that is, the comparison result is to judge whether the entire frame of data is the same, such as whether the previous frame of data is the same as the current frame of data. If the comparison result indicates that the previous frame of data is the same as the current frame of data, then the current frame of data is not transferred, and all display panels 10 are controlled not to refresh the display data. If the comparison result indicates that the previous frame of data is different from the current frame of data, then it is further judged whether the display data in the previous frame input to the same display panel 10 is the same as the display data in the current frame.

[0042] Among them, to judge whether the display data in adjacent frames is the same, it can be compared by pixel-level display data or by region-level display data. For example, comparison is made in units of region-level display data such as an 8×8 pixel array.

[0043] In some of these embodiments, when the comparison result is that the display data in the previous frame of data transferred to the same display panel 10 is the same as the display data in the current frame of data, the data processing module 20 is configured to stop transferring the display data in the current frame of data to the display panel 10, and control the gate driving circuit in the display panel 10 to stop refreshing the display data in the previous frame of data.

[0044] It should be noted that when the display data in the previous frame of data transmitted to the same display panel 10 is the same as the display data in the current frame of data, it indicates that the picture displayed on the display panel 10 in the previous frame and the current frame is the same, that is, static. In this case, the data processing module 20 stops transmitting the display data in the current frame of data to the display panel 10, saving the power consumption caused by data transmission and reducing the requirement for the data transmission rate. The data processing module 20 controls the gate driving circuit in the display panel 10 to stop refreshing the display data, not only adjusting the refresh frequency of the display panel 10, but also saving the power consumption caused by refreshing.

[0045] In some embodiments, when the comparison result is that the display data in the previous frame of data transmitted to the same display panel 10 is different from the display data in the current frame of data, the data processing module 20 is configured to transmit the display data in the current frame of data to the display panel 10 and control the gate driving circuit in the display panel 10 to refresh the display data in the previous frame of data.

[0046] It should be noted that when the display data in the previous frame of data transmitted to the same display panel 10 is different from the display data in the current frame of data, it indicates that the picture displayed on the display panel 10 in the previous frame and the current frame is different, that is, dynamic. In this case, the present embodiment normally processes the display data, which can ensure a normal display effect.

[0047] In some embodiments, the data processing module 20 includes a system-on-chip 21 and M timing controllers 22. The system-on-chip 21 is configured to split each frame of data into M pieces of intermediate data; each timing controller 22 is respectively connected to the system-on-chip 21 and N display panels 10. Each timing controller 22 is configured to split one piece of intermediate data into N pieces of display data and control the transmission of multiple pieces of display data and the refresh of the display data in the corresponding display panel 10 according to the comparison result between the previous frame of data and the current frame of data; wherein, the product of M and N is an integer greater than or equal to 2.

[0048] It should be noted that as Figure 4 shown, the M timing controllers 22 are, for example, the first timing controller 221, the second timing controller 222, the third timing controller 223... and the Mth timing controller 22M. The N display panels 10 connected to each timing controller 22 are, for example, the first display panel S1... the Nth display panel SN.

[0049] Compared with Figure 1 Figure 5Each timing controller 22 in [[ ]] sends an enable signal GOA_syc_EM to each of the N display panels 10 connected to the timing controller 22, so as to separately control whether the gate driving circuit in each display panel 10 refreshes the display data. For example, when the enable signal GOA_syc_EM is at a high level, the gate driving circuit receiving the enable signal GOA_syc_EM refreshes the display data; or, when the enable signal GOA_syc_EM is at a low level, the gate driving circuit receiving the enable signal GOA_syc_EM stops refreshing the display data.

[0050] Among them, stopping refreshing the display data means that under the control of the enable signal GOA_syc_EM, the gate driving circuit controls the transistor in the corresponding sub-pixel to be in the off state, so that new display data cannot be written into the sub-pixel, and the display data in the sub-pixel is maintained as the display data of the previous frame. Refreshing the display data means that under the control of the enable signal GOA_syc_EM, the gate driving circuit controls the transistor in the corresponding sub-pixel to be in the on state, so that new display data can be written into the sub-pixel, and the display data in the sub-pixel is refreshed as the display data of this frame. The gate driving circuit can control the partial refresh of the display data. For example, taking the display panel 10 as the basic unit of partial refresh, it can control some display panels 10 to refresh their respective display data, or control some display panels 10 to stop refreshing their respective display data.

[0051] This can achieve separate adjustment of the refresh frequency of any display panel 10 in the tiled display screen 100, so as to achieve Figure 6 the distribution of the refresh frequencies of these display panels 10. Among them, Figure 6 each square in [[ ]] represents a display panel 10, and f1, f2, f3, and f4 respectively represent different refresh frequencies.

[0052] In some embodiments, when the comparison result is that the display data in the previous frame data transmitted to the same display panel 10 is the same as the display data in this frame data, the timing controller 22 is configured to stop transmitting the display data in this frame data to the display panel 10, and control the gate driving circuit in the display panel 10 to stop refreshing the display data in the previous frame data.

[0053] It should be noted that when the display data in the previous frame data transmitted to the same display panel 10 is the same as the display data in the current frame data, it indicates that the images displayed on the display panel 10 in the previous frame and the current frame are the same, that is, static. In this case, the timing controller 22 stops transmitting the display data in the current frame data to the display panel 10, saving the power consumption caused by the data transmission between the timing controller 22 and the display panel 10, and reducing the requirement for the data transmission rate between the timing controller 22 and the display panel 10. The timing controller 22 controls the gate driving circuit in the display panel 10 to stop refreshing the display data through the enable signal GOA_syc_EM, which not only adjusts the refresh frequency of the display panel 10, but also saves the power consumption caused by the refresh.

[0054] In some of these embodiments, when the comparison result is that the display data in the previous frame data transmitted to the same display panel 10 is different from the display data in the current frame data, the timing controller 22 transmits the display data in the current frame data to the display panel 10 and controls the gate driving circuit in the display panel 10 to refresh the display data in the previous frame data.

[0055] It should be noted that when the display data in the previous frame data transmitted to the same display panel 10 is different from the display data in the current frame data, it indicates that the images displayed on the display panel 10 in the previous frame and the current frame are different, that is, dynamic. In this case, the present embodiment normally processes the display data, which can ensure a normal display effect.

[0056] In some of these embodiments, the data processing module 20 includes a system-on-chip 21 and M timing controllers 22. The system-on-chip 21 is configured to split each frame of data into M pieces of intermediate data and control the transmission of each piece of intermediate data according to the comparison result between the previous frame data and the current frame data. Each timing controller 22 is respectively connected to the system-on-chip 21 and N display panels 10. The timing controller 22 that receives the intermediate data is configured to split the intermediate data into N pieces of display data and control the corresponding display panel 10 to refresh the corresponding display data. The timing controller 22 that does not receive the intermediate data is configured to stop transmitting the display data to the corresponding display panel 10 and control the gate driving circuit in the corresponding display panel 10 to stop refreshing the display data. Wherein, the product of M and N is an integer greater than or equal to 2.

[0057] It should be noted that in this embodiment, the system-on-chip 21 is used to compare the results of the previous frame data and the current frame data. For a static display screen, it is possible to save data transmission power consumption between the system-on-chip 21 and the display panel 10 and reduce the requirements for the data transmission rate. Compared with saving data transmission power consumption and reducing the requirements for the data transmission rate between the timing controller 22 and the display panel 10, more data transmission power consumption can be saved, and the requirements for the data transmission rate on a longer transmission path can be reduced.

[0058] In some embodiments, to adapt to the mainstream splicing scale, M can be, but is not limited to, an integer less than or equal to 16, and N can be, but is not limited to, an integer less than or equal to 64.

[0059] In some of these embodiments, when the comparison result is that the intermediate data in the previous frame data transmitted to the same timing controller 22 is the same as the intermediate data in the current frame data, the system-on-chip 21 is configured to stop transmitting the intermediate data in the current frame data to the timing controller 22.

[0060] It should be noted that the situation where the intermediate data in the previous frame data transmitted to the same timing controller 22 is the same as the intermediate data in the current frame data indicates that the display screen of the display panel 10 connected to the timing controller 22 is the same, that is, static, in the previous frame and the current frame. In this embodiment, by the system-on-chip 21 stopping transmitting the intermediate data in the current frame data to the timing controller 22, the power consumption caused by data transmission between the system-on-chip 21 and the display panel 10 is saved, and the requirements for the data transmission rate between the system-on-chip 21 and the display panel 10 are reduced. In this case, the timing controller 22 controls the gate drive circuit in the display panel 10 to stop refreshing the display data through the enable signal GOA_syc_EM, which not only adjusts the refresh frequency of the display panel 10 but also saves the power consumption caused by refreshing.

[0061] In some of these embodiments, when the comparison result is that the intermediate data in the previous frame data transmitted to the same timing controller 22 is different from the intermediate data in the current frame data, the system-on-chip 21 is configured to transmit the intermediate data in the current frame data to the corresponding timing controller 22.

[0062] It should be noted that the situation where the intermediate data in the previous frame data transmitted to the same timing controller 22 is different from the intermediate data in the current frame data indicates that the display screen of the display panel 10 connected to the timing controller 22 is different, that is, dynamic, in the previous frame and the current frame. In this case, the tiled display screen 100 can normally process the display data to ensure a normal display effect.

[0063] Figure 7This is the first driving schematic diagram of the tiled display screen 100 provided by the embodiments of the present application. Taking M = 8, N = 6, and the resolution of each display panel 10 being 480×360 as an example, the resolution of the tiled display screen 100 is 4K, that is, 3840×2160. The specific driving process is described as follows:

[0064] In frame 1 of four consecutive frames, the system-on-chip 21 (SOC) splits one frame of 4K 120Hz display data into 8 equal parts.

[0065] Each timing controller 22 (TCON) receives 1 / 8 of the 8 equal parts of data, and splits the received display data into 6 parts of 480×360×120Hz display data according to the arrangement of each display panel 10.

[0066] The 6 single screens (display panels 10) connected to each timing controller 22 (TCON) receive data and no data transmission according to the determination (comparison result) of the TCON.

[0067] Start displaying to achieve full-screen lighting at a resolution of (480×8)×(360×6).

[0068] In this way, in frame 1, each display panel 10 has refreshed the display data. At this time, the refresh frequency of each display panel 10 is 120Hz.

[0069] In frame 2 of four consecutive frames, the system-on-chip 21 (SOC) splits one frame of 4K 120Hz display data into 8 equal parts.

[0070] Each timing controller 22 (TCON) receives 1 / 8 of the 8 equal parts of data, and splits the received display data into 6 parts of 480×360×120Hz display data according to the arrangement of each display panel 10. If the comparison result with the frame 1 (display) data indicates that there is no difference in the (display) data, the corresponding (display) data is not transmitted, and the corresponding single-screen GOA (gate driving circuit) is not triggered to drive; for the area with differences, normal data transmission occurs.

[0071] The 6 single screens (display panels 10) connected to each timing controller 22 (TCON) receive data and no data transmission according to the determination (comparison result) of the TCON.

[0072] Start displaying to achieve full-screen lighting at a resolution of (480×8)×(360×6).

[0073] In this way, in frame 2, the display panels 10 represented by the dark-filled squares have all refreshed the display data, while the display panels 10 represented by the light-filled squares have not refreshed the display data.

[0074] In frame 3 of four consecutive frames, the system-on-chip 21 (SOC) splits one frame of display data at 4K 120Hz into 8 equal parts.

[0075] Each timing controller 22 (TCON) receives 1 / 8 of the 8 equal parts of data and splits the received display data into 6 parts of display data at 480×360×120Hz according to the layout of each display panel 10. If the comparison result with the frame 1 (display) data indicates that: the (display) data is identical, the corresponding (display) data is not transmitted, and the corresponding single-screen GOA (gate driver circuit) is not triggered to drive; for the area with differences, normal data transmission occurs.

[0076] Six single screens (display panels 10) connected to each timing controller 22 (TCON) receive data and no data transmission according to the determination (comparison result) of the TCON.

[0077] Display starts, achieving full-screen lighting at a resolution of (480×8)×(360×6).

[0078] In this way, in frame 3, the display panels 10 represented by the dark-filled squares have all refreshed their display data, while the display panels 10 represented by the light-filled squares have not refreshed their display data.

[0079] In frame 4 of four consecutive frames, the system-on-chip 21 (SOC) splits one frame of display data at 4K 120Hz into 8 equal parts.

[0080] Each timing controller 22 (TCON) receives 1 / 8 of the 8 equal parts of data and splits the received display data into 6 parts of display data at 480×360×120Hz according to the layout of each display panel 10. If the comparison result with the frame 1 (display) data indicates that: the (display) data is identical, the corresponding (display) data is not transmitted, and the corresponding single-screen GOA (gate driver circuit) is not triggered to drive; for the area with differences, normal data transmission occurs.

[0081] Six single screens (display panels 10) connected to each timing controller 22 (TCON) receive data and no data transmission according to the determination (comparison result) of the TCON.

[0082] Display starts, achieving full-screen lighting at a resolution of (480×8)×(360×6).

[0083] In this way, in frame 4, the refresh frequencies of different display panels 10 are exemplarily 40Hz, 60Hz, and 120Hz.

[0084] Figure 8This is the second driving schematic diagram of the tiled display screen 100 provided by the embodiments of the present application. Taking M = 8, N = 6, and the resolution of each display panel 10 being 480×360 as an example, the resolution of the tiled display screen 100 is 4K, that is, 3840×2160. The specific driving process is described as follows:

[0085] In the first frame of consecutive k frames, the system-on-chip 21 (SOC) splits a frame of 4K 120Hz display data into 8 equal parts.

[0086] Each timing controller 22 (TCON) receives 1 / 8 of the 8 equal parts of data and splits the received display data into 6 parts of 480×360×120Hz display data according to the arrangement of each display panel 10.

[0087] The 6 single screens (display panels 10) connected to each timing controller 22 (TCON) receive display data with a data volume of 480×360×120Hz.

[0088] Display starts, and the full screen with a resolution of (480×8)×(360×6) is lit at a refresh rate of 120Hz.

[0089] In this way, in the first frame, the display data of each display panel 10 is refreshed. At this time, the refresh rate of each display panel 10 is 120Hz.

[0090] In each of the consecutive frames 2 to k, the system-on-chip 21 (SOC) makes a comparison and repetition determination on a frame of 4K 120Hz display data.

[0091] The data that needs to be refreshed (≤1 / 8) is transmitted to each timing controller 22 (TCON).

[0092] The timing controller 22 (TCON) receives the data and performs normal data transmission for each screen mapping and transmission area.

[0093] The 6 single screens (display panels 10) connected to each timing controller 22 (TCON) receive data or an empty frame with no data transmission according to the data sent by the TCON.

[0094] Display starts, and the full screen with a resolution of (480×8)×(360×6) is lit.

[0095] In this way, not only can the refresh rate of different display panels 10 in the same screen be adjusted separately according to the comparison result, but also the power consumption caused by refreshing is saved when the display panel 10 does not refresh the display data, and the power consumption caused by data transmission is saved when there is no display data transmission, and the requirement for the data transmission rate is reduced.

[0096] In some of these embodiments, the present embodiment provides an electronic device 200, such as Figure 9 shown. The electronic device 200 includes the above-mentioned tiled display screen 100.

[0097] It can be understood that since the electronic device 200 provided in the present application includes the above-mentioned tiled display screen 100, it can also control the transmission of multiple display data and the refresh of the display data in the corresponding display panel 10 according to the comparison result of the previous frame data and the current frame data through the data processing module 20. The display panel 10 displays according to the received display data. This can not only make the refresh frequencies of different display panels 10 in the same screen be adjusted separately according to the comparison result, but also save the power consumption caused by refresh when the display panel 10 does not refresh the display data, and save the power consumption caused by data transmission when there is no transmission of display data, and reduce the requirement for the data transmission rate.

[0098] In the above embodiments, the descriptions of the respective embodiments have their own emphases. For parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0099] The above has introduced in detail the tiled display screen 100 and the electronic device 200 provided in the embodiments of the present application. Specific examples are used herein to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the technical solution and its core idea of the present application; those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A spliced display screen, characterized in that, The spliced display screen includes: A plurality of display panels, each of which displays according to the received display data; A data processing module, which is connected to the plurality of display panels. The data processing module is configured to split the current frame of data into multiple pieces of display data according to the number of the display panels, and control the transmission of the multiple pieces of display data and the refresh of the display data in the corresponding display panels according to the comparison result between the previous frame of data and the current frame of data; Wherein, the comparison result is a judgment result on whether the whole piece of display data in the previous frame of data is the same as the whole piece of display data in the current frame of data, or the comparison result is a judgment result on whether the whole frame of data of the previous frame of data is the same as the whole frame of data of the current frame of data.

2. The spliced display screen according to claim 1, wherein, When the comparison result is that the display data in the previous frame of data transmitted to the same display panel is the same as the display data in the current frame of data, the data processing module is configured to stop transmitting the display data in the current frame of data to the display panel, and control the gate driving circuit in the display panel to stop refreshing the display data in the previous frame of data.

3. The spliced display screen according to claim 1, wherein When the comparison result is that the display data in the previous frame of data transmitted to the same display panel is different from the display data in the current frame of data, the data processing module is configured to transmit the display data in the current frame of data to the display panel, and control the gate driving circuit in the display panel to refresh the display data in the previous frame of data.

4. The spliced display screen according to claim 1, characterized in that, The data processing module includes: A system-on-chip, which is configured to split each frame of data into M pieces of intermediate data; M timing controllers, each of which is respectively connected to the system-on-chip and N display panels. Each timing controller is configured to split one piece of intermediate data into N pieces of display data, and control the transmission of the multiple pieces of display data and the refresh of the display data in the corresponding display panels according to the comparison result between the previous frame of data and the current frame of data; Wherein, the product of M and N is an integer greater than or equal to 2.

5. The spliced display screen according to claim 4, characterized in that, When the comparison result is that the display data in the previous frame of data transmitted to the same display panel is the same as the display data in the current frame of data, the timing controller is configured to stop transmitting the display data in the current frame of data to the display panel, and control the gate driving circuit in the display panel to stop refreshing the display data in the previous frame of data.

6. The spliced display screen according to claim 4, wherein, When the comparison result is that the display data in the previous frame of data transmitted to the same display panel is different from the display data in the current frame of data, the timing controller is configured to transmit the display data in the current frame of data to the display panel, and control the gate driving circuit in the display panel to refresh the display data in the previous frame of data.

7. The spliced display screen according to claim 1, characterized in that, The data processing module includes: A system-on-chip, which is configured to split each frame of data into M pieces of intermediate data, and control the transmission of each piece of the intermediate data according to the comparison result between the previous frame of data and the current frame of data; M timing controllers, each of the timing controllers is respectively connected to the system-on-chip and N display panels. The timing controller that receives the intermediate data is configured to split the intermediate data into N pieces of display data, and control the corresponding display panel to refresh the corresponding display data. The timing controller that does not receive the intermediate data is configured to stop transmitting the display data to the corresponding display panel, and control the gate driving circuit in the corresponding display panel to stop refreshing the display data; wherein, the product of M and N is an integer greater than or equal to 2.

8. The spliced display screen according to claim 7, characterized in that, In the case where the comparison result is that the intermediate data in the previous frame of data transmitted to the same timing controller is the same as the intermediate data in the current frame of data, the system-on-chip is configured to stop transmitting the intermediate data in the current frame of data to the timing controller.

9. The spliced display screen according to claim 7, characterized in that, In the case where the comparison result is that the intermediate data in the previous frame of data transmitted to the same timing controller is different from the intermediate data in the current frame of data, the system-on-chip is configured to transmit the intermediate data in the current frame of data to the corresponding timing controller.

10. An electronic device, characterized in that, The electronic device includes the tiled display screen according to any one of claims 1-9.

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