Level conversion device, display panel and display device
By adding a new signal processing module to the level conversion device, different voltage signals are output according to the display area, the problem of mischarging the gate line under the charge sharing function is solved, and the reliability of screen display is improved while saving power consumption.
Patent Information
- Application Number
- CN202510525911.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-24
- Publication Date
- 2025-07-04
AI Technical Summary
In the design of a laptop computer, after the charge sharing function is turned on, the clock signal slowly drops to the gate low voltage in the invalid area, resulting in the risk of mischarging the gate lines and affecting the screen display quality.
A level conversion device is designed, including a level conversion module and a signal processing module. Through the signal processing module, it is determined that the display area is valid or invalid, and outputs gate high voltage or gate low voltage signals respectively to reduce the risk of gate line mischarging.
After the charge sharing function is turned on, the level conversion device can output a gate low voltage signal in the invalid area, reduce the risk of gate line mischarging, and improve the reliability and stability of the screen display.
Smart Images
Figure CN120260467A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technologies, and in particular, to a level conversion device, a display panel, and a display device. Background Art
[0002] In the design of notebook (NB) models, power consumption can be saved by enabling the charge sharing function. For example, taking 4 groups of clock (CLK) signals in the gate driver in array timing (GIAtiming) as an example, after enabling the charge sharing function, CLK1 and CLK3 with complementary phases, and CLK2 and CLK4 will perform charge sharing.
[0003] However, after enabling the charge sharing function, when entering the blank area, the level of the clock signal will slowly decrease to the gate low voltage (VGL), which may cause the level of the clock signal not to switch to VGL before the arrival of the start vertical signal (STV) 1 in the next frame, and further may cause the risk of mischarging of the gate line. Summary of the Invention
[0004] The present application provides a level conversion device, a display panel, and a display device. In the technical solution provided by the present application, the level conversion device can directly output a signal with a level of VGL to the gate driver in array (GIA) in the screen when entering the blank area, so as to reduce the risk of mischarging of the gate line.
[0005] In a first aspect, the present application provides a level conversion device. The level conversion device supports the charge sharing function. The level conversion device includes a level conversion module and a signal processing module; the signal processing module is configured to: input an electrical signal through a first terminal and a second terminal, and output a first signal to the GIA in the screen through a third terminal under the control of the electrical signal input through the first terminal; the second terminal of the signal processing module is connected to the output terminal of the level conversion module; wherein, when the electrical signal input through the first terminal of the signal processing module indicates that the display area of the screen is an effective area, the first signal is the electrical signal input through the second terminal of the signal processing module; when the electrical signal input through the first terminal of the signal processing module indicates that the display area of the screen is a blank area, the level of the first signal is the gate low voltage.
[0006] In combination with the first aspect, in a possible implementation, the signal processing module includes a control circuit, a first switching circuit, and a second switching circuit; the control circuit is configured to: input an electrical signal through a first terminal, and output a control signal through a second terminal under the control of the electrical signal input through the first terminal; the first switching circuit is configured to: input an electrical signal through a first terminal and a second terminal, and output the electrical signal input through the second terminal to the GIA through a third terminal under the control of the electrical signal input through the first terminal; the second switching circuit is configured to: input an electrical signal through a first terminal and a second terminal, and output the electrical signal input through the second terminal to the GIA through a third terminal under the control of the electrical signal input through the first terminal; the second terminal of the control circuit is connected to the first terminal of the first switching circuit and the first terminal of the second switching circuit, the second terminal of the first switching circuit is connected to the output terminal of the level conversion module, and the level of the electrical signal input to the second terminal of the second switching circuit is a gate low voltage; wherein, when the electrical signal input to the first terminal of the control circuit indicates that the display area of the screen is a valid area, the control signal is a first level signal for turning on the first switching circuit; when the electrical signal input to the first terminal of the control circuit indicates that the display area of the screen is an invalid area, the control signal is a second level signal for turning on the second switching circuit.
[0007] In combination with the first aspect, in a possible implementation, the control circuit includes a voltage comparator; the voltage comparator is configured to: input a reference voltage through a positive input terminal, input an electrical signal through a negative input terminal, output the first level signal through an output terminal when the voltage of the electrical signal input to the negative input terminal is less than the reference voltage, output the second level signal through the output terminal when the voltage of the electrical signal input to the negative input terminal is greater than the reference voltage, and the voltage of the electrical signal input to the negative input terminal is related to the display area of the screen; the output terminal of the voltage comparator is connected to the first terminal of the first switching circuit and the first terminal of the second switching circuit.
[0008] In combination with the first aspect, in a possible implementation, the control circuit further includes a voltage dividing circuit, and the voltage dividing circuit is configured to: output the reference voltage to the positive input terminal of the voltage comparator; the voltage dividing circuit includes a first resistor circuit and a second resistor circuit, the first terminal of the first resistor circuit is configured to input a voltage signal of a third level, the second terminal of the first resistor circuit is connected to the positive input terminal of the voltage comparator and the first terminal of the second resistor circuit, and the second terminal of the second resistor circuit is grounded.
[0009] In combination with the first aspect, in a possible implementation, the first level and the third level are gate high voltages, and the second level is a gate low voltage.
[0010] In combination with the first aspect, in a possible implementation manner, the first switching circuit is an NMOS, and the second switching circuit is a PMOS.
[0011] In combination with the first aspect, in a possible implementation manner, the signal processing module further includes a third resistor circuit. The first end of the third resistor circuit is connected to the third end of the first switching circuit and the third end of the second switching circuit, and the second end of the third resistor circuit is grounded.
[0012] In a second aspect, the present application provides a display panel, and the display panel includes the level conversion device as described in the first aspect or any one of the implementation manners thereof.
[0013] In combination with the second aspect, in a possible implementation manner, the display panel further includes a timing control device and a screen. The screen includes a GIA. The timing control device is configured to: output a first electrical signal to the level conversion module in the level conversion device through a first end, and output a second electrical signal to the signal processing module in the level conversion device through a second end. The first end of the timing control device is connected to the input end of the level conversion module, the second end of the timing control device is connected to the first end of the signal processing module, and the third end of the signal processing module is connected to the GIA. Wherein, when the second electrical signal indicates that the display area of the screen is an effective area, the first signal output by the signal processing module to the GIA is the signal obtained by the level conversion module after level-converting the first electrical signal. When the second electrical signal indicates that the display area of the screen is an invalid area, the level of the first signal is the gate low voltage.
[0014] In a third aspect, the present application provides a display device, and the display device includes the level conversion device as described in the first aspect or any one of the implementation manners thereof, or includes the display panel as described in the second aspect or any one of the implementation manners thereof.
[0015] In the technical solution provided by the present application, by adding a signal processing module to the level conversion device, the level conversion device can output a GIA signal to the GIA in the effective area after enabling the charge sharing function, so that the GIA outputs a scanning signal to the gate of the thin-film transistor (TFT) to realize the normal display of the screen, and outputs a signal with a level of VGL to the GIA in the invalid area, thereby reducing the risk of mischarging of the gate line. Description of the Drawings
[0016] Figure 1 It is a schematic illustration of an effective area and an invalid area;
[0017] Figure 2Schematic illustration of a clock signal after enabling the charge sharing function;
[0018] Figures 3 to 7 Schematic circuit diagram of the level conversion device provided by the present application;
[0019] Figure 8 Schematic circuit diagram of a display panel provided by the present application. Detailed implementation manners
[0020] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0021] To facilitate the understanding of the technical solutions provided by the present application, the following explains relevant concepts.
[0022] 1. Integrated gate driver circuit (gate driver in array, GIA)
[0023] GIA can be understood as a gate driver circuit integrated on a thin - film transistor (TFT) screen.
[0024] GIA can output scan signals to the gates of TFTs according to the GIA signals output by a timing controller (TCON) in a certain timing to turn on or off the gates of TFTs row by row, thereby realizing the progressive scanning of the screen.
[0025] Among them, the GIA signals can include a start vertical signal (STV) and a clock (CLK) signal. STV is used to indicate the start or stop of the scanning operation of GIA. For example, STV can include STV1 and STV2, where STV1 is used to indicate the start of the scanning operation of GIA, and STV2 is used to indicate the stop of the scanning operation of GIA.
[0026] Among them, considering that the voltages of the STV and clock signals output by the TCON are different from the operating voltage of the GIA, a level conversion device can convert the levels of the STV and clock signals into target levels and then output them to the GIA. The target levels can include a gate high voltage (VGH) and a gate low voltage (VGL).
[0027] 2. Blank area and active area
[0028] The valid region can be understood as the time period during which the screen displays valid pixel data or a valid picture.
[0029] The invalid region can be understood as the time period during which the screen does not display valid pixel data or a valid picture, such as the time period from the completion of the display of one frame of an image to the start of the display of the next frame of the image.
[0030] Figure 1 It is a schematic illustration of a valid region and an invalid region. Figure 1 The shown STV2 is the control signal of the Nth frame of the image, STV1 is the control signal of the (N + 1)th frame of the image, and N is a positive integer. STV1 is used to indicate the start of the scanning operation of the image, and STV2 is used to indicate the stop of the scanning operation of the image.
[0031] 3. Charge sharing function
[0032] The charge sharing function is an energy-saving design in notebook (NB) models.
[0033] Taking four groups of clock signals CLK1, CLK2, CLK3, and CLK4 in GIA timing control (GIA timing) as an example, combined with Figure 2 the charge sharing function will be described.
[0034] Figure 2 It is a schematic illustration of the clock signals after the charge sharing function is enabled. As Figure 2 shown, CLK1 and CLK3 are complementary in phase, and CLK2 and CLK4 are complementary in phase. At t1, CLK1 needs to discharge from the gate high voltage (VGH) to the gate low voltage (VGL), and CLK3 needs to charge from VGL to VGH. At t2, CLK2 needs to charge from VGH to VGL, and CLK4 needs to discharge from VGL to VGH.
[0035] After the charge sharing function is enabled, CLK1 and CLK3 will perform charge sharing so that CLK1 and CLK3 first switch to an equilibrium value, such as 1 / 2 * (VGH + VGL), and then discharge to VGL and charge to VGH respectively. Correspondingly, after CLK2 and CLK4 perform charge sharing, they first switch to the equilibrium value, such as 1 / 2 * (VGH + VGL), and then charge to VGH and discharge to VGL respectively. It should be understood that after the charge sharing function is enabled, charge sharing is first performed between the clock signals, and then the charge and discharge operations are executed, which can reduce the amplitude of subsequent charge and discharge, thereby saving power.
[0036] However, when entering the invalid region after enabling the charge sharing function, the level conversion device cannot directly switch the level of the clock signal to VGL. At this time, the clock signal will slowly discharge to VGL, as Figure 2 shown. The discharge time of the clock signal is relatively long, which may cause the level of the clock signal not to be switched to VGL before the arrival of STV1 in the next frame of image, resulting in the risk of mischarging of the gate line. It should be noted that if the clock signal is not fully discharged to VGL when STV1 of the next frame of image arrives, it may cause the gate line to conduct in advance due to the residual voltage, resulting in abnormal pixel charging and further abnormal screen display, such as display afterimage or uneven brightness.
[0037] In view of this, the present application provides a level conversion device, a display panel, and a display device. The present application provides a new design of a level conversion device that supports the charge sharing function, so that after enabling the charge sharing function, the level conversion device can directly output a signal with a level of VGL to GIA, thereby reducing the risk of mischarging of the gate line.
[0038] The following Figures 3 to 8 is used to illustrate the technical solutions provided by the present application.
[0039] Figure 3 is a schematic circuit diagram of a level conversion device provided by the present application. Figure 3 The shown level conversion device 300 includes a level conversion module 310 and a signal processing module 320.
[0040] Among them, the level conversion module 310 includes an input end and an output end. The level conversion module 310 is configured to: input an electrical signal through the input end, convert the received electrical signal into a signal with a target level, and output the signal with the target level through the output end. Optionally, the electrical signal input to the input end of the level conversion module 310 may be a GIA signal output by TCON.
[0041] The signal processing module 320 includes a first end, a second end, and a third end. The signal processing module 320 is configured to: input an electrical signal through the first end and the second end, and output a first signal to GIA in the screen through the third end under the control of the electrical signal input to the first end. The second end of the signal processing module 320 is connected to the output end of the level conversion module 310.
[0042] Wherein, when the electrical signal input at the first end of the signal processing module 320 indicates that the display area of the screen is a valid area, the first signal is the electrical signal input at the second end of the signal processing module 320; when the electrical signal input at the first end of the signal processing module 320 indicates that the display area of the screen is an invalid area, the level of the first signal is VGL. Wherein, the signal with the level of VGL can be pre-stored in the signal processing module 320, and the signal processing module 320 can realize the call of this signal.
[0043] In this technical solution, by adding a signal processing module to the level conversion device, the signal processing module determines whether the display area of the screen is a valid area or an invalid area according to the electrical signal input at the first end. If the display area of the screen is a valid area, it outputs the signal from the level conversion module 310 to the GIA, so that the GIA outputs a scanning signal to the gate of the TFT; if the display area of the screen is an invalid area, it outputs a signal with the level of VGL to the GIA to reduce the risk of mischarging of the gate line. In this technical solution, the level conversion device can output different signals to the GIA based on the judgment result of the screen display area to improve the reliability of the screen display.
[0044] In a possible implementation, the signal processing module 320 may include a control circuit 321, a first switch circuit 322, and a second switch circuit 323, as Figure 4 shown.
[0045] See Figure 4 , the control circuit 321 includes a first end and a second end, and the control circuit 321 is configured to: input an electrical signal through the first end, and output a control signal through the second end under the control of the electrical signal input at the first end.
[0046] The first switch circuit 322 includes a first end, a second end, and a third end, and the first switch circuit 322 is configured to: input an electrical signal through the first end and the second end, and output the electrical signal input at the second end to the GIA through the third end under the control of the electrical signal input at the first end.
[0047] The second switch circuit 323 includes a first end, a second end, and a third end, and the second switch circuit 323 is configured to: input an electrical signal through the first end and the second end, and output the electrical signal input at the second end to the GIA through the third end under the control of the electrical signal input at the first end.
[0048] As Figure 4 shown, the second end of the control circuit 321 is connected to the first ends of the first switch circuit 322 and the second switch circuit 323, the second end of the first switch circuit 322 is connected to the output end of the level conversion module 310, and the level of the electrical signal input at the second end of the second switch circuit 323 is VGL.
[0049] Among them, when the electrical signal input at the first end of the control circuit 321 indicates that the display area of the screen is a valid area, the control signal output at the second end of the control circuit 321 is a first-level signal, and the first-level signal is used to turn on the first switch circuit 322; when the electrical signal input at the first end of the control circuit 321 indicates that the display area of the screen is an invalid area, the control signal output at the second end of the control circuit 321 is a second-level signal, and the second-level signal is used to turn on the second switch circuit 323.
[0050] It should be understood that the first end of the control circuit 321 is the first end of the signal processing module 320, the second end of the first switch circuit 322 is the second end of the signal processing module 320, and the third ends of the first switch circuit 322 and the second switch circuit 323 are the third end of the signal processing module 320.
[0051] Among them, the control circuit 321 determines whether the display area of the screen is a valid area or an invalid area through the electrical signal input at the first end. If the display area of the screen is a valid area, the control circuit 321 outputs a first-level signal to turn on the first switch circuit 322, so that the first switch circuit 322 outputs the signal from the level conversion module 310, so that GIA outputs a scanning signal to the gate of the TFT; if the display area of the screen is an invalid area, the control circuit 321 outputs a second-level signal to turn on the second switch circuit 323, so that the second switch circuit 323 outputs a signal with a level of VGL to reduce the risk of mischarging of the gate line.
[0052] In a possible implementation manner, the control circuit 321 includes a voltage comparator, such as Figure 5 OP1 in
[0053] See Figure 5 , the voltage comparator includes a positive input terminal, a negative input terminal and an output terminal. The voltage comparator is used to: input a reference voltage through the positive input terminal, input an electrical signal through the negative input terminal, and output a first-level signal through the output terminal when the voltage of the electrical signal input at the negative input terminal is less than the reference voltage, and output a second-level signal through the output terminal when the voltage of the electrical signal input at the negative input terminal is greater than the reference voltage. Among them, the reference voltage can be set according to actual needs and is not limited here. It should be understood that the negative input terminal of the voltage comparator is the first end of the signal processing module 320.
[0054] In a possible implementation manner, the first level can be VGH, and the second level can be VGL.
[0055] Among them, the output terminal of the voltage comparator is connected to the first end of the first switch circuit 322 and the first end of the second switch circuit 323.
[0056] In this implementation manner, the voltage of the electrical signal input to the inverting input terminal of the voltage comparator is related to the display area of the screen, or in other words, the voltage of the electrical signal input to the inverting input terminal can be used to indicate whether the display area of the screen is a valid area or an invalid area. Among them, the indication rule can be set according to actual requirements, and this application does not limit it. For example, when the display area of the screen is a valid area, the voltage of the electrical signal input to the inverting input terminal is less than the reference voltage; when the display area of the screen is an invalid area, the voltage of the electrical signal input to the inverting input terminal is greater than the reference voltage. Another example is that when the display area of the screen is a valid area, the voltage of the electrical signal input to the inverting input terminal is greater than the reference voltage; when the display area of the screen is an invalid area, the voltage of the electrical signal input to the inverting input terminal is less than the reference voltage.
[0057] In this implementation manner, according to the different display areas of the screen, signals with different levels are input to the inverting input terminal of the voltage comparator, so that the voltage comparator outputs a first-level signal or a second-level signal, thereby turning on the first switch circuit or the second switch circuit, and further enabling the level conversion device to output different signals to the GIA to meet the display requirements of the screen.
[0058] It should be noted that Figure 5 Only an optional connection manner is shown. In some implementation manners, the voltage comparator can be used to: input a reference voltage through the inverting input terminal, input an electrical signal through the non-inverting input terminal, output a first-level signal through the output terminal when the voltage of the electrical signal input to the non-inverting input terminal is greater than the reference voltage, and output a second-level signal through the output terminal when the voltage of the electrical signal input to the non-inverting input terminal is less than the reference voltage.
[0059] In a possible implementation manner, the control circuit 321 further includes a voltage dividing circuit. As Figure 6 shown, the voltage dividing circuit includes a first resistor circuit (such as Figure 6 R1 in Figure 6 ) and a second resistor circuit (such as Figure 6 R2 in
[0060] ). The first end of the first resistor circuit is used to input a voltage signal of a third level. The second end of the first resistor circuit is connected to the non-inverting input terminal of the voltage comparator and the first end of the second resistor circuit. The second end of the second resistor circuit is grounded. It should be noted that the first resistor circuit may include one or more resistors, and the second resistor circuit may include one or more resistors. Figure 6 R1 and R2 in
[0060] are only examples and are not used as limitations.
[0060] The voltage dividing circuit is used to: output a reference voltage to the non-inverting input terminal of the voltage comparator.
[0061] In a possible implementation, the third level can be VGH. Compared with directly outputting a reference voltage to the positive input terminal of the voltage comparator, obtaining the reference voltage by dividing the existing VGH through a voltage dividing circuit eliminates the need to introduce an additional reference voltage, thereby reducing the implementation complexity and cost of the circuit.
[0062] In a possible implementation, the first switching circuit can be an N-channel metal-oxide-semiconductor field-effect transistor (NMOS), and the second switching circuit can be a P-channel metal-oxide-semiconductor field-effect transistor (PMOS). It should be understood that the first terminal of the first switching circuit is the gate of the NMOS, the second terminal is the drain of the NMOS, and the third terminal is the source of the NMOS. The first terminal of the second switching circuit is the gate of the PMOS, the second terminal is the drain of the PMOS, and the third terminal is the source of the PMOS.
[0063] In a possible implementation, the signal processing module 320 further includes a third resistor circuit, such as Figure 7 R3 in Figure 7 . The first terminal of the third resistor circuit is connected to the sources of the NMOS and the PMOS, and the second terminal of the third resistor circuit is grounded. It should be noted that the third resistor circuit can include one or more resistors,
[0064] R3 in
[0065] is only an example and not a limitation.
[0066] Figure 8 This is a schematic circuit diagram of a display panel provided by the present application. Figure 8 The shown display panel 800 includes a level conversion device 300.
[0067] In a possible implementation, the display panel 800 may further include a timing control device 810 and a screen 820, and the screen 820 includes GIA. The timing control device 810 can be a TCON.
[0068] As Figure 8 shown, the timing control device 810 includes a first terminal and a second terminal. The first terminal of the timing control device 810 is connected to the input terminal of the level conversion module 310, the second terminal of the timing control device 810 is connected to the first terminal of the signal processing module 320, and the third terminal of the signal processing module 320 is connected to GIA in the screen 820. Figure 8The first end of the signal processing module 320 can be understood as the inverting input terminal of the voltage comparator, and the third end of the signal processing module 320 can be understood as the source of the NMOS or the source of the PMOS.
[0069] The timing control device 810 is configured to: output a first electrical signal to the level conversion module 310 through the first end, and output a second electrical signal to the signal processing module 320 through the second end. The first electrical signal and the second electrical signal can be sent simultaneously. Among them, the first electrical signal includes a clock signal and STV. The level of the second electrical signal has two states, high and low, and can be switched according to different display areas of the screen.
[0070] Taking the case where the second electrical signal is at a low level (such as 0 volts (V)) when the display area of the screen is the valid area, and the second electrical signal is at a high level (such as 2.6V) when the display area of the screen is the invalid area as an example, Figure 8 the working principle of the shown display panel will be described.
[0071] The inverting input terminal of the comparator in the signal processing module 320 is used to receive the second electrical signal, and the non-inverting input terminal is used to receive the reference voltage (such as 1V) obtained by dividing the voltage of VGH by the voltage dividing circuit.
[0072] Among them, when the display area of the screen is the valid area, the voltage of the second electrical signal is less than the reference voltage, and the voltage comparator outputs a first level through the output terminal, such as VGH. At this time, the gate voltages of the NMOS and the PMOS are VGH, the NMOS is turned on, the PMOS is turned off, and the NMOS outputs the signal input from the drain. That is to say, at this time, the level conversion device 300 outputs the signal obtained by level-converting the first electrical signal by the level conversion module 310 to the GIA, so that the GIA outputs a scanning signal to the gate of the TFT; when the display area of the screen is the invalid area, the voltage of the second electrical signal is greater than the reference voltage, and the voltage comparator outputs a second level through the output terminal, such as VGL. At this time, the gate voltages of the NMOS and the PMOS are VGL, the NMOS is turned off, the PMOS is turned on, and the PMOS outputs the signal input from the drain. That is to say, at this time, the level conversion device 300 outputs a signal with a level of VGL to the GIA to reduce the risk of mischarging of the gate line.
[0073] Figure 8 The working principle of the shown display panel is as shown in the following table.
[0074]
[0075] In the technical solution provided by this application, after the charge sharing function is enabled, the level conversion device can output a signal with a level of VGL to the GIA in the invalid area and also output a signal with a level of VGL to the GIA in the valid area, thereby reducing the risk of accidental charging of the gate line on the basis of power consumption savings.
[0076] This application also provides a display device, which includes the level conversion device as shown in the foregoing embodiment, or includes the display panel as shown in the foregoing embodiment.
[0077] In the description of the present invention, it should be noted that the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.
[0078] In the description of the present invention, it should be noted that unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations. In addition, the technical features involved in different embodiments of the present invention described above can be combined with each other as long as they do not conflict with each other.
[0079] It should be emphasized that the above are only the preferred embodiments of the present invention and do not constitute any form of limitation to the present invention. Any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention still fall within the scope of the technical solution of the present invention.
Claims
1. A level conversion device, the level conversion device supports a charge sharing function, characterized in that, The level conversion device includes a level conversion module and a signal processing module; The signal processing module is configured to: input an electrical signal through a first terminal and a second terminal, and output a first signal to an integrated gate driver circuit GIA in the screen through a third terminal under the control of the electrical signal input through the first terminal; The second terminal of the signal processing module is connected to the output terminal of the level conversion module; Wherein, when the electrical signal input through the first terminal of the signal processing module indicates that the display area of the screen is a valid area, the first signal is the electrical signal input through the second terminal of the signal processing module; When the electrical signal input through the first terminal of the signal processing module indicates that the display area of the screen is an invalid area, the level of the first signal is a gate low voltage.
2. The level conversion device according to claim 1, wherein The signal processing module includes a control circuit, a first switch circuit, and a second switch circuit; The control circuit is configured to: input an electrical signal through a first terminal, and output a control signal through a second terminal under the control of the electrical signal input through the first terminal; The first switch circuit is configured to: input an electrical signal through a first terminal and a second terminal, and output the electrical signal input through the second terminal to the GIA through a third terminal under the control of the electrical signal input through the first terminal; The second switch circuit is configured to: input an electrical signal through a first terminal and a second terminal, and output the electrical signal input through the second terminal to the GIA through a third terminal under the control of the electrical signal input through the first terminal; The second terminal of the control circuit is connected to the first terminal of the first switch circuit and the first terminal of the second switch circuit. The second terminal of the first switch circuit is connected to the output terminal of the level conversion module. The level of the electrical signal input to the second terminal of the second switch circuit is a gate low voltage; Wherein, when the electrical signal input through the first terminal of the control circuit indicates that the display area of the screen is a valid area, the control signal is a first level signal for turning on the first switch circuit; When the electrical signal input through the first terminal of the control circuit indicates that the display area of the screen is an invalid area, the control signal is a second level signal for turning on the second switch circuit.
3. The level conversion device according to claim 2, wherein The control circuit includes a voltage comparator; The voltage comparator is configured to: input a reference voltage through a positive input terminal, input an electrical signal through a negative input terminal, output the first level signal through an output terminal when the voltage of the electrical signal input through the negative input terminal is less than the reference voltage, and output the second level signal through the output terminal when the voltage of the electrical signal input through the negative input terminal is greater than the reference voltage. The voltage of the electrical signal input through the negative input terminal is related to the display area of the screen; The output terminal of the voltage comparator is connected to the first terminal of the first switch circuit and the first terminal of the second switch circuit.
4. The level conversion device according to claim 3, characterized in that, The control circuit further includes a voltage dividing circuit, and the voltage dividing circuit is configured to: output the reference voltage to the positive input terminal of the voltage comparator; The voltage dividing circuit includes a first resistor circuit and a second resistor circuit. The first end of the first resistor circuit is used to input a voltage signal of a third level. The second end of the first resistor circuit is connected to the positive input terminal of the voltage comparator and the first end of the second resistor circuit, and the second end of the second resistor circuit is grounded.
5. The level conversion device according to claim 4, characterized in that, The first level and the third level are high gate voltages, and the second level is a low gate voltage.
6. The level conversion device according to any one of claims 2 to 5, characterized in that The first switch circuit is an NMOS, and the second switch circuit is a PMOS.
7. The level conversion device according to claim 6, characterized in that, The signal processing module further includes a third resistor circuit. The first end of the third resistor circuit is connected to the third end of the first switch circuit and the third end of the second switch circuit, and the second end of the third resistor circuit is grounded.
8. A display panel, characterized in that, It includes the level conversion device according to any one of claims 1 to 7.
9. The display panel according to claim 8, wherein, The display panel further includes a timing control device and a screen, and the screen includes an integrated gate driver circuit GIA; The timing control device is configured to: output a first electrical signal to the level conversion module in the level conversion device through the first end, and output a second electrical signal to the signal processing module in the level conversion device through the second end; The first end of the timing control device is connected to the input terminal of the level conversion module, the second end of the timing control device is connected to the first end of the signal processing module, and the third end of the signal processing module is connected to the GIA; Wherein, when the second electrical signal indicates that the display area of the screen is an effective area, the first signal output by the signal processing module to the GIA is the signal obtained by the level conversion module after performing level conversion on the first electrical signal; When the second electrical signal indicates that the display area of the screen is an invalid area, the level of the first signal is a low gate voltage.
10. A display device, characterized in that, It includes the level conversion device according to any one of claims 1 to 7, or includes the display panel according to claim 8 or 9.