Display device

Abstract

A display device comprises a display panel, a signal processor and an image processor. The display panel comprises a driving circuit and a plurality of pixel circuits. The driving circuit is configured to provide a plurality of driving voltages to the plurality of pixel circuits. The signal processor is coupled to the display panel and used for receiving the first image signal. The image processor is coupled to the signal processor and is used for receiving a first image signal from the signal processor and outputting a plurality of first voltage data according to the first image signal. The signal processor is used for receiving the plurality of first voltage data from the image processor, and the signal processor is used for converting the plurality of first voltage data into a first driving signal. The first driving signal is used for enabling the driving circuit to provide the plurality of driving voltages to the plurality of pixel circuits. Therefore, the operation load of the signal processor can be reduced.

Description

Technical Field

[0001] The present disclosure relates to an image display technology, and particularly to a display device. Background Art

[0002] In the current market of various consumer electronic products, "reflective display devices" are widely used to make display screens, such as electronic paper display devices. The reflective display device mainly uses incident light to irradiate the display medium layer to achieve the purpose of display, so power can be saved. However, with the improvement of imaging technology, the functions of reflective display devices have become more and more diverse. For example, the improvement of color or resolution, or the combination of touch functions, etc. In the case of function improvement, the computing load of the processor in the electronic paper also becomes larger, resulting in a slower image output speed and affecting the display quality. Therefore, how to ensure the display quality of the reflective display device has become a major research topic at present. Summary of the Invention

[0003] The present disclosure relates to a display device, including a display panel, a signal processor, and an image processor. The display panel includes a driving circuit and a plurality of pixel circuits. The driving circuit is used to provide a plurality of driving voltages to the plurality of pixel circuits. The signal processor is coupled to the display panel and is used to receive a first image signal. The image processor is coupled to the signal processor and is used to receive the first image signal from the signal processor and output a plurality of first voltage data according to the first image signal. The signal processor is used to receive the plurality of first voltage data from the image processor, and the signal processor is used to convert the plurality of first voltage data into a first driving signal. The first driving signal is used to cause the driving circuit to provide the plurality of driving voltages to the plurality of pixel circuits.

[0004] In one embodiment, the image processor includes a data look-up table and is used to find the plurality of first voltage data from the data look-up table according to the first image signal. The plurality of first voltage data correspond to the plurality of driving voltages required by the plurality of pixel circuits during a first update period.

[0005] In one embodiment, the signal processor is used to convert the plurality of first voltage data into a first driving signal according to the update signal of the plurality of pixel circuits. The update signal is the scanning order for the driving circuit to turn on a plurality of scan lines in the display panel.

[0006] In one embodiment, a first video signal corresponds to a first update period and has a second update period before the first update period. The image processor includes a first buffer circuit and a second buffer circuit. The first buffer circuit is used to store the first video signal. The second buffer circuit is used to store a second video signal during the second update period. The image processor is used to compare the differences between the first video signal and the second video signal to generate a comparison result. The image processor is used to find the plurality of first voltage data from a data look-up table according to the comparison result.

[0007] In one embodiment, after the image processor transmits the plurality of first voltage data to the signal processor, the image processor stores the first video signal in the second buffer circuit and deletes the first video signal in the first buffer circuit.

[0008] In one embodiment, the signal processor includes a buffer memory which is used to store a plurality of voltage data corresponding to a plurality of update periods, and the plurality of voltage data includes the plurality of first voltage data corresponding to the first update period. The signal processor is used to sequentially convert the plurality of voltage data into a plurality of driving signals during the plurality of update periods.

[0009] In one embodiment, the signal processor and the image processor are coupled through a physical transmission interface, and the image processor is packaged as a system-on-chip.

[0010] In one embodiment, the plurality of first voltage data are a plurality of voltage encodings, and the driving circuit is used to identify the plurality of voltage encodings to provide the plurality of driving voltages to the plurality of pixel circuits.

[0011] The present disclosure also relates to a display device, including an electrophoretic display panel, a signal processing chip, and an image processing chip. The electrophoretic display panel includes a driving circuit and a plurality of pixel circuits. The driving circuit is used to provide a plurality of driving voltages to the plurality of pixel circuits. The signal processing chip is coupled to the electrophoretic display panel and is used to receive a first video signal. The image processing chip is coupled to the signal processing chip through a physical transmission interface. The image processing chip is used to receive the first video signal from the signal processing chip and generate a plurality of first voltage data according to the first video signal. The signal processing chip is used to receive the plurality of first voltage data from the image processor, and the signal processing chip is used to convert the plurality of first voltage data into a first driving signal according to an update signal of the plurality of pixel circuits. The first driving signal is used to cause the driving circuit to provide the plurality of driving voltages to the plurality of pixel circuits.

[0012] In one embodiment, the image processing chip stores a data look-up table to find the plurality of first voltage data from the data look-up table according to the first video signal.

[0013] In one embodiment, a first video signal corresponds to a first update period and has a second update period before the first update period. The image processing chip includes a first buffer circuit and a second buffer circuit. The first buffer circuit is used to store the first video signal. The second buffer circuit is used to store a second video signal during the second update period. The image processing chip is used to compare the differences between the first video signal and the second video signal to generate a comparison result. The image processing chip is used to find the plurality of first voltage data from a data look-up table according to the comparison result, and the plurality of first voltage data correspond to the plurality of driving voltages required by the plurality of pixel circuits during the first update period.

[0014] In one embodiment, after the image processing chip transmits the plurality of first voltage data to the signal processing chip, the image processing chip stores the first video signal in the second buffer circuit and deletes the first video signal in the first buffer circuit.

[0015] In one embodiment, the signal processing chip includes a scratchpad memory. The scratchpad memory is used to store a plurality of voltage data corresponding to a plurality of update periods, and the plurality of voltage data includes the first voltage data. The signal processing chip is used to sequentially convert the plurality of voltage data into a plurality of driving signals during the plurality of update periods.

[0016] Accordingly, by using the image processor to convert the video signal into voltage data, the computing load of the signal processor can be reduced. At the same time, the internal configuration of the image device can be more flexible to be implemented in various different types or functions of display panels. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Schematic diagram of a display device according to some embodiments of the present disclosure;

[0018] Figure 2 Schematic diagram of a display device according to some embodiments of the present disclosure.

[0019]

SYMBOL DESCRIPTION

[0020] 100: Display device

[0021] 110: Display panel

[0022] 111: Driving circuit

[0023] 120: Signal processor

[0024] 121: Signal processing circuit

[0025] 122: Scratchpad memory

[0026] 130: Image processor

[0027] 131: Image processing circuit

[0028] 132: Storage circuit

[0029] 132A: First temporary storage circuit

[0030] 132B: Second temporary storage circuit

[0031] PX: Pixel circuit

[0032] TB: Data lookup table

[0033] L1: Data line

[0034] L2: Scan line

[0035] Sg: Image signal

[0036] Sv: Voltage data

[0037] Sd: Drive signal Detailed implementation manners

[0038] The following will disclose multiple implementation manners of the present invention with the accompanying drawings. For the sake of clear illustration, many practical details will be described together in the following narrative. However, it should be understood that these practical details are not used to limit the present invention. That is to say, in some implementation manners of the present invention, these practical details are not necessary. In addition, for the purpose of simplifying the accompanying drawings, some conventional structures and elements will be shown in a simple schematic manner in the accompanying drawings.

[0039] In this article, when an element is referred to as "connected" or "coupled", it may mean "electrically connected" or "electrically coupled". "Connected" or "coupled" can also be used to indicate the mutual cooperation operation or interaction between two or more elements. In addition, although terms such as "first", "second",... are used in this article to describe different elements, these terms are only used to distinguish elements or operations described with the same technical terms. Unless clearly specified in the context, these terms do not specifically refer to or imply an order or sequence, nor are they used to limit the present invention.

[0040] Figure 1 Shown is a schematic diagram of a display device 100 according to some embodiments of the present disclosure. The display device 100 includes a display panel 110, a signal processor 120, and an image processor 130. The display device 100 is used to drive a plurality of pixel circuits according to the image signal Sg to present an image screen corresponding to the image signal.

[0041] In one embodiment, the image signal can be sent from a device host (not shown in the figure, such as a computer, a mobile phone, or a network server, etc.) to the display device 100. In another embodiment, the image signal Sg can also be generated by the display device 100 (for example: reading an internal file to generate an image signal).

[0042] The display panel 110 includes a driving circuit 111 and a plurality of pixel circuits PX. The driving circuit 111 is used to provide a driving voltage to the pixel circuit PX to control the brightness, gray scale, or color presented by the pixel circuit PX.

[0043] In one embodiment, the display panel 110 is a reflective display, such as an electrophoretic display (electronic paper), but the present disclosure is not limited thereto and can also be applied to other types of displays. The display panel 110 includes a transistor array layer and an electronic ink layer. The transistor array layer (e.g., a thin film transistor array, TFT array) can form an electric field according to a control voltage to adjust the positions of a plurality of electrophoretic particles in the electronic ink layer, thereby presenting different gray scales or different colors. The "electronic ink layer" includes a variety of electrophoretic particles (e.g., black, white), which are respectively encapsulated in a plurality of microcapsules or microcups to form pixel units.

[0044] The signal processor 120 is coupled to the display panel 110 and is used to receive an image signal. For the convenience of description, the "image signal" described in the following paragraphs is the image data received by the display device 100 during each update period. For example: the "first image signal" corresponds to the first update period (e.g., the first frame) and is used to record a plurality of pixel values that the pixel circuit PX needs to display / update during the first update period. The "second image signal" corresponds to the second update period (e.g., the second frame) and is used to record a plurality of pixel values that the pixel circuit PX needs to display / update during the second update period.

[0045] The image processor 130 is coupled to the signal processor 120, is used to receive the image signal Sg from the signal processor 120, and outputs a plurality of voltage data Sv according to the received image signal Sg. The image processor 130 is used to transfer voltage encoding (voltage data Sv) to the signal processor 120. The "voltage data" corresponds to the driving voltage required by the pixel circuit PX. For example, the image processor 130 finds a plurality of first voltage data according to the first image signal. These first voltage data can be the driving voltages required by a plurality of pixel circuits PX during the first update period, or these first voltage data can be voltage encodings corresponding to the driving voltages (e.g., 8-bit or 16-bit encodings composed of binary digits), and the driving circuit 111 can recognize the plurality of voltage encodings to provide the correct driving voltage to each pixel circuit PX.

[0046] Specifically, the image processor 130 stores a data look-up table TB, and the data look-up table TB records the voltage data required when the pixel circuit PX presents different pixel values. The image processor 130 is used to find the required voltage data Sv from the data look-up table TB.

[0047] In one embodiment, after receiving the voltage encoding, the signal processor 120 converts the voltage encoding into a driving signal Sd according to the update signal of the pixel circuit PX. The aforementioned "driving signal Sd" is used to enable the driving circuit 111 to provide a driving voltage to the pixel circuit PX. The aforementioned "update signal" records the scanning sequence for the driving circuit 111 to turn on the scanning lines in the display panel 110. As Figure 1 shown, the display panel 110 transfers the driving voltage to the corresponding pixel circuit PX through a plurality of data lines L1 and scanning lines L2. This scanning sequence can be pre-recorded in the signal processor 120.

[0048] In one embodiment, the signal processor 120 and the image processor 130 are coupled through a physical transmission interface, such as: a two-way transmission interface such as USB (Universal Serial Bus) or PCI-E (Peripheral Component Interconnect Express). The image processor 130 can be used as an external processor to assist and share the processing tasks of the signal processor 120, so as to reduce the computing load of the signal processor 120.

[0049] In one embodiment, the signal processor 120 and the image processor 130 can be respectively packaged as a system-on-a-chip (SoC), and the display device 100 is an embedded system. In other words, the signal processor 120 and the image processor 130 can be respectively independent processing chips (such as: a signal processing chip, an image processing chip), and are also packaged in the display device 100. The signal processor 120 can be disposed on the display panel 110, and the image processor 130 can be disposed at the system end and is not located on the display panel 110.

[0050] The present disclosure utilizes two different processors to respectively execute the functions of "generating voltage data Sv" and "generating a driving signal Sd". Therefore, the computing load of the signal processor 120 can be reduced accordingly. In addition, in one embodiment, the image processor 130 is disposed in the display device 100 in the form of a system-on-a-chip. Therefore, the image processor 130 can be conveniently applied to different types or functions of display devices 100.

[0051] Compared with the approach of "upgrading the hardware to enable a single processor to drive the display panel", the development cost required for the external image processor 130 of the present disclosure is lower. On the other hand, compared with the approach of "designing specific software to improve the display panel driving speed", the external image processor 130 of the present disclosure does not require a large amount of development time, and there is no need to change the original internal system operation mode of the signal processor 120. Therefore, the display device 100 of the present disclosure will achieve the effects of dispersing the computing amount, taking into account the hardware cost, not requiring development time, and being conveniently applicable to different types of display panels.

[0052] Figure 2 The detailed component diagram according to some embodiments of the present disclosure is shown. The signal processor 120 includes a signal processing circuit 121 for transmitting the received image signal Sg to the image processor 130.

[0053] In one embodiment, the image processor 130 includes an image processing circuit 131 and a storage circuit 132. The image processing circuit 131 is coupled to the signal processor 120 through a physical transmission interface to receive the image signal Sg. The storage circuit 132 is coupled to the image processing circuit 131 for storing the data look-up table TB. The image processing circuit 131 is configured to find the corresponding voltage data Sv from the data look-up table TB according to the image signal Sg. As described above, the voltage data Sv may be the driving voltage required by the pixel circuit PX or a voltage code.

[0054] In addition, the storage circuit 132 may further include a first buffer circuit 132A and a second buffer circuit 132B. The first buffer circuit 132A and the second buffer circuit 132B are used to store the image signals Sg during different update periods respectively. The image processing circuit 131 is configured to compare the "current image signal" with the "image signal of the previous period" to generate a comparison result, and then find the corresponding voltage data Sv from the data look-up table TB according to the comparison result.

[0055] Taking the "current image signal" as the first image signal in the first update period and the "image signal of the previous period" as the second image signal in the second update period as an example, the image processor 130 first receives the second image signal and processes it, and then receives the first image signal. The image processing circuit 131 will generate the driving voltage or voltage code required to be provided to the pixel circuit PX at present (i.e., the first update period) according to the difference between the first image signal and the second image signal.

[0056] Continuing from the above, after the image processing circuit 131 transmits the generated voltage data Sv to the signal processor 120, the image processing circuit 131 will clear the second image signal in the second temporary storage circuit 132B and change the first image signal to be stored in the second temporary storage circuit 132B. Then, the image processing circuit 131 deletes the first image signal in the first temporary storage circuit 132A. At this time, the image processing circuit 131 will receive the next image signal for subsequent processing.

[0057] The present disclosure uses the image processor 130 to convert the image signal Sg into voltage data Sv to reduce the computing load of the signal processor 120. In addition, in some embodiments, the signal processor 120 can transmit the image signal to the image processor 130 in advance for multiple update periods, so that the image processor 130 can process the image signal Sg during the update period into voltage data Sv in advance. Specifically, in one embodiment, the signal processor 120 includes a temporary memory 122 to store a plurality of voltage data Sv corresponding to multiple update periods provided by the image processor 130. After receiving the voltage data Sv transmitted by the image processor 130, the signal processor 120 does not need to immediately generate a driving signal Sd to the display panel 110 according to the voltage data Sv. Instead, the signal processor 120 is used to sequentially convert the "voltage data corresponding to the current update period" into a driving signal Sd during each update period and output the driving signal Sd to the display panel 110.

[0058] For example, assuming that each update period of the display panel 110 is "F1, F2, F3, F4, F5...", during the update period "F1", the signal processor 120 will provide the image signals corresponding to the update periods "F2 to F5" to the image processor 130 in advance, so that the image processor 130 can generate the voltage data corresponding to the image signals during each of the update periods "F2 to F5" in advance. After the signal processor 120 receives the voltage data corresponding to the image signals during each of the update periods "F2 to F5", during the update period "F2", it will convert the voltage data corresponding to the update period "F2" into a driving signal and transmit this driving signal to the display panel 110. Similarly, during the update period "F3", the signal processor 120 converts the voltage data corresponding to the update period "F3" into a driving signal and transmits this driving signal to the display panel 110.

[0059] The various elements, method steps, or technical features in the foregoing embodiments can be combined with each other, without being limited by the order of the text description or the order of the figures presented in the present disclosure.

[0060] Although the present disclosure has been disclosed as above in embodiments, it is not intended to limit the present disclosure. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be determined by the appended claims.

Claims

1. A display device, characterized in that, Comprising: A display panel, comprising a driving circuit and a plurality of pixel circuits, wherein the driving circuit is configured to provide a plurality of driving voltages to the plurality of pixel circuits; A signal processor, coupled to the display panel, for receiving a first image signal; And An image processor, coupled to the signal processor, wherein the image processor is configured to receive the first image signal from the signal processor and output a plurality of first voltage data according to the first image signal; Wherein the signal processor is configured to receive the plurality of first voltage data from the image processor, and the signal processor converts the plurality of first voltage data into a first driving signal, and the first driving signal is used to cause the driving circuit to provide the plurality of driving voltages to the plurality of pixel circuits.

2. The display device according to claim 1, characterized in that, The image processor includes a data lookup table, and is configured to find the plurality of first voltage data from the data lookup table according to the first image signal, and the plurality of first voltage data correspond to the plurality of driving voltages required by the plurality of pixel circuits during a first update period.

3. The display device according to claim 1, characterized in that, The signal processor is configured to convert the plurality of first voltage data into the first driving signal according to an update signal of the plurality of pixel circuits, wherein the update signal is a scanning sequence for the driving circuit to turn on a plurality of scanning lines in the display panel.

4. The display device according to claim 2, wherein The first image signal corresponds to the first update period, and there is a second update period before the first update period. The image processor includes: A first buffer circuit, configured to store the first image signal; and A second buffer circuit, configured to store a second image signal during the second update period, wherein the image processor is configured to compare the difference between the first image signal and the second image signal to generate a comparison result; Wherein the image processor is configured to find the plurality of first voltage data from the data lookup table according to the comparison result.

5. The display device according to claim 4, characterized in that After the image processor transmits the plurality of first voltage data to the signal processor, the image processor stores the first image signal in the second buffer circuit and deletes the first image signal in the first buffer circuit.

6. The display device according to claim 2, characterized in that The signal processor includes a buffer memory, and the buffer memory is configured to store a plurality of voltage data corresponding to a plurality of update periods, and the plurality of voltage data includes the plurality of first voltage data corresponding to the first update period; And Wherein the signal processor is configured to sequentially convert the plurality of voltage data into a plurality of driving signals during the plurality of update periods.

7. The display device according to claim 1, wherein The signal processor and the image processor are coupled through a physical transmission interface, and the image processor is encapsulated as a system-on-chip.

8. The display device according to claim 1, wherein The plurality of first voltage data are a plurality of voltage codes, and the driving circuit is configured to identify the plurality of voltage codes to provide the plurality of driving voltages to the plurality of pixel circuits.

9. A display device, characterized in that, Comprising: An electrophoretic display panel, comprising a driving circuit and a plurality of pixel circuits, wherein the driving circuit is configured to provide a plurality of driving voltages to the plurality of pixel circuits; A signal processing chip, coupled to the electrophoretic display panel, and configured to receive a first image signal; And An image processing chip is coupled to the signal processing chip through a physical transmission interface. The image processing chip is configured to receive the first image signal from the signal processing chip and generate a plurality of first voltage data according to the first image signal. The signal processing chip is configured to receive the plurality of first voltage data from the image processing chip. The signal processing chip is further configured to convert the plurality of first voltage data into a first driving signal according to an update signal of the plurality of pixel circuits. The first driving signal is used to cause the driving circuit to provide the plurality of driving voltages to the plurality of pixel circuits.

10. The display device according to claim 9, characterized in that, The image processing chip stores a data look-up table to find the plurality of first voltage data from the data look-up table according to the first image signal.

11. The display device according to claim 10, characterized in that, The first image signal corresponds to a first update period and there is a second update period before the first update period. The image processing chip includes: A first buffer circuit for storing the first image signal; and A second buffer circuit for storing a second image signal of the second update period. The image processing chip is configured to compare the difference between the first image signal and the second image signal to generate a comparison result. The image processing chip is configured to find the plurality of first voltage data from the data look-up table according to the comparison result. The plurality of first voltage data correspond to the plurality of driving voltages required by the plurality of pixel circuits during the first update period.

12. The display device according to claim 11, wherein After the image processing chip transmits the plurality of first voltage data to the signal processing chip, the image processing chip stores the first image signal in the second buffer circuit and deletes the first image signal in the first buffer circuit.

13. The display device according to claim 9, characterized in that, The signal processing chip includes a buffer memory for storing a plurality of voltage data corresponding to a plurality of update periods. The plurality of voltage data includes the first voltage data. The signal processing chip is configured to sequentially convert the plurality of voltage data into a plurality of driving signals during the plurality of update periods.

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