Method for removing residual mask
The polymer layer on the surface of semiconductor devices is processed through inert plasma and fluorination processes. Combined with the ashing process and cleaning steps, the problem of difficult removal of polymer layer is solved, and the alignment of the etching structure size and accuracy are improved.
Patent Information
- Application Number
- CN202510420111.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-03
- Publication Date
- 2025-07-04
Smart Images
Figure CN120261269A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and more particularly to a method for removing a residual mask. Background Art
[0002] In dry etching, a patterned photoresist layer is used as a mask to perform plasma etching on a semiconductor device to form trenches in the semiconductor device.
[0003] Since plasma needs to be used to bombard the mask during dry etching or ion implantation, a polymer layer is formed on the surface of the semiconductor device after a large amount of plasma bombardment for a long time, and adheres to the surface of the semiconductor device. This polymer layer affects the alignment and accuracy of the etched structure size during subsequent processes. Summary of the Invention
[0004] A series of simplified concepts are introduced in the Summary of the Invention section, which will be further described in detail in the Detailed Description section. The Summary of the Invention section of this application does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the protection scope of the claimed technical solution.
[0005] In view of the existing problems, this application provides a method for removing a residual mask, including:
[0006] Providing a semiconductor device formed with a residual mask; wherein, the residual mask includes a polymer layer and a photoresist layer located under the polymer layer;
[0007] Bombarding the polymer layer with inert plasma;
[0008] Causing the photoresist layer to expand through a fluorination process;
[0009] Removing the bombarded polymer layer and the expanded photoresist layer through an ashing process and cleaning.
[0010] In some embodiments of this application, the residual mask is heated during the ashing process.
[0011] In some embodiments of this application, causing the photoresist layer to expand through a fluorination process includes:
[0012] Injecting fluorine gas into the reaction chamber to react the fluorine gas with the photoresist layer so that the photoresist layer expands.
[0013] In some embodiments of the present application, the residual mask is formed after a dry etching process or an ion implantation process using a photoresist mask.
[0014] In some embodiments of the present application, the semiconductor device includes a substrate, and an etching pattern is formed in the substrate after the dry etching process;
[0015] Wherein, a dielectric layer is formed on the substrate, and the etching pattern includes trenches formed in the substrate and the dielectric layer.
[0016] In some embodiments of the present application, the step of forming trenches in the substrate and the dielectric layer includes:
[0017] Providing a substrate;
[0018] Depositing and forming a dielectric layer on the substrate;
[0019] Forming the photoresist mask on the dielectric layer, and performing etching based on the photoresist mask to form trenches in the substrate and the dielectric layer.
[0020] In some embodiments of the present application, based on the photoresist mask, trenches are formed in the dielectric layer and the substrate by dry etching or a combination of wet etching and dry etching.
[0021] In some embodiments of the present application, forming trenches in the substrate and the dielectric layer by a combination of wet etching and dry etching based on the photoresist mask includes:
[0022] Etching the dielectric layer by the wet etching based on the photoresist mask;
[0023] Etching the substrate by the dry etching based on the photoresist mask to form trenches in the dielectric layer and the substrate.
[0024] In some embodiments of the present application, the dry etching includes reactive ion etching or inductively coupled plasma etching.
[0025] In some embodiments of the present application, the depth of the trenches is 0.1 um to 30 um.
[0026] According to the method for removing a residual mask in an embodiment of the present application, bombarding a polymer layer with inert plasma and causing the photoresist layer to expand through a fluorination process can cause the polymer layer with a hard shell structure to crack, significantly reducing the structural strength of the polymer layer, thereby completely removing the residual mask on the surface of the semiconductor device, and improving the alignment and accuracy of the etched structure size during subsequent measurement processes. Description of the Drawings
[0027] The following drawings of the present application are hereby incorporated as part of the present application for understanding the present application. The embodiments of the present application and their descriptions are shown in the drawings to explain the principles of the present application.
[0028] Figures 1A to 1D A cross-sectional schematic diagram of the structure obtained by successively implementing the method for removing a residual mask in the related art is shown.
[0029] Figure 2 A flowchart of the method for removing a residual mask according to a specific embodiment of the present invention is shown.
[0030] Figures 3A to 3F A cross-sectional schematic diagram of the structure obtained by successively implementing the method for removing a residual mask according to a specific embodiment of the present invention is shown. Specific Embodiment
[0031] In the following description, numerous specific details are given to provide a more thorough understanding of the present application. However, it will be apparent to one of ordinary skill in the art that the present application may be practiced without one or more of these details. In other instances, well-known features of the art are not described to avoid obscuring the present application.
[0032] It should be understood that the present application can be implemented in different forms and should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided to make the disclosure thorough and complete, and to fully convey the scope of the present application to those skilled in the art. In the drawings, the dimensions and relative dimensions of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.
[0033] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below may be denoted as a second element, component, region, layer or section without departing from the teachings of the present application.
[0034] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. may be used herein for convenience of description to describe the relationship of one element or feature shown in the figures with other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatial relationship terms are also intended to include different orientations of the device in use and operation. For example, if the device in the attached drawings is flipped, then an element or feature described as "under other elements" or "beneath them" or "under it" will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.
[0035] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present application. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, identify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.
[0036] Taking dry etching as an example, in the related art, as Figure 1A shown, the provided semiconductor device includes a substrate 101, a dielectric layer 102 is formed on the surface of the substrate 101, and a photoresist layer 103 is formed on the surface of the dielectric layer 102. Then as Figure 1B shown, the photoresist layer 103 is patterned to form a patterned photoresist mask 104 on the surface of the dielectric layer 102. After that as Figure 1C shown, the semiconductor device is dry-etched to form a trench 105 in the semiconductor device. Then the photoresist mask 104 on the surface of the dielectric layer 102 is removed by an ashing process (Asher process, using highly reactive monoatomic oxygen in oxygen plasma to react with the hydrocarbon oxygen polymer compound in the photoresist to generate volatile reactants to achieve the purpose of removing the photoresist), and after the ashing is completed, the residual ashing products and other impurities are removed by cleaning.
[0037] In the above process, plasma bombardment is required during dry etching on the photoresist mask 104, resulting in the formation of a polymer layer 1041 on the surface of the photoresist mask 104 on the surface of the semiconductor device after a large amount of plasma bombardment for a long time. As Figure 1DAs shown, the polymer layer 1041 is similar to a hard shell structure and cannot be completely removed during the ashing process, resulting in the inability to remove the polymer layer 1041 on the dielectric layer 102 (including the remaining photoresist layer 1042 on the dielectric layer 102) through the ashing process and cleaning. The polymer layer 1041 (and the photoresist 1042 under the polymer layer 1041) remaining on the surface of the dielectric layer 102 affects the alignment and accuracy of the etched structure size during subsequent processes in measurement.
[0038] Similarly, a polymer layer is also easily formed on the surface of the mask during the ion implantation process, resulting in incomplete removal during the ashing process.
[0039] Therefore, in view of the existence of the foregoing technical problems, the present invention proposes a method for removing a residual mask, as Figure 2 shown, the method for removing a residual mask includes:
[0040] Step S1, providing a semiconductor device having a residual mask formed thereon; wherein, the semiconductor device includes a substrate, and an etching pattern is formed in the substrate; the residual mask includes a polymer layer and a photoresist layer located under the polymer layer;
[0041] Step S2, bombarding the polymer layer with inert plasma;
[0042] Step S3, swelling the photoresist layer through a fluorination process;
[0043] Step S4, removing the bombarded polymer layer and the swollen photoresist layer through an ashing process and cleaning.
[0044] The method for removing a residual mask of the present application bombards the polymer layer with inert plasma and swells the photoresist layer through a fluorination process, which can cause the polymer layer with a hard shell structure to crack, significantly reduce the structural strength of the polymer layer, thereby completely removing the residual mask on the surface of the semiconductor device, and improving the alignment and accuracy of the etched structure size during subsequent processes in measurement.
[0045] To thoroughly understand the present application, detailed steps and structures will be presented in the following description to illustrate the technical solution proposed by the present application. The preferred embodiments of the present application are described in detail below. However, in addition to these detailed descriptions, the present application may also have other implementation manners.
[0046] Next, with reference to Figures 3A to 3F a detailed description will be made of the method for removing a residual mask of the present invention, wherein, Figures 3A to 3F shows a cross-sectional schematic diagram of a semiconductor device obtained by sequentially implementing the method for removing a residual mask according to a specific embodiment of the present invention.
[0047] Exemplarily, the method for removing a residual mask according to the present invention includes the following steps:
[0048] First, perform Step 1, as Figure 3C shown, provide a semiconductor device formed with a residual mask; wherein, the residual mask includes a polymer layer 3042 and a photoresist layer 3041 located below the polymer layer.
[0049] In some embodiments, the residual mask may be formed after a dry etching process or an ion implantation process of a photoresist mask. During the dry etching process or the ion implantation process, after the photoresist mask on the semiconductor device is bombarded by a large amount of plasma for a long time, a polymer layer 3041 adhered to the surface of the semiconductor device is formed on the surface of the photoresist mask. The polymer layer 3041 is a compound formed by thousands of atoms covalently bonded to each other with a particularly large relative molecular mass and having a repeating structural unit, and can also be called a polymer compound, which refers to those compounds with a relative molecular mass of more than ten thousand formed mainly by covalent bonding of numerous atoms or atomic groups. This polymer layer 3041 is similar to a hard shell structure, and there is a part of the photoresist mask that has not formed the polymer layer 3041 below the hard shell structure, and this part of the photoresist mask serves as the photoresist layer 3042.
[0050] Taking the formation of a residual mask on a semiconductor device after a dry etching process as an example, as Figure 3C shown, the semiconductor device may include a substrate 301, and an etching pattern is formed in the substrate 301 after the dry etching process; wherein, a dielectric layer 302 is formed on the substrate 301, and the etching pattern includes a trench 305 formed in the substrate 301 and the dielectric layer 302. The residual mask is located on the surface of the dielectric layer 302.
[0051] In some embodiments, as Figures 3A to 3C shown, the formation of the trench 305 in the substrate 301 and the dielectric layer 302 may include the following steps S111 to S113:
[0052] Step S111, provide a substrate 301.
[0053] Among them, the provided substrate 301 can be any suitable semiconductor substrate 301, such as a bulk silicon substrate 301, which can also be at least one of the materials mentioned below: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, or other III / V compound semiconductors, and also includes multilayer structures composed of these semiconductors, etc., or is silicon on insulator (SOI), silicon-on-insulator stacked silicon (SSOI), silicon-germanium-on-insulator stacked silicon (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI), or can also be double-sided polished wafers (DSP), and can also be a ceramic substrate 301 such as alumina, a quartz or glass substrate 301, etc.
[0054] Step S112, deposit a dielectric layer 302 on the substrate 301.
[0055] Specifically, a dielectric material can be deposited on the substrate 301 to form a dielectric layer 302 on the substrate 301. The deposited dielectric material can be an oxide, a nitride, etc., and is not limited thereto.
[0056] Step S113, form a photoresist mask 304 on the dielectric layer 302, and perform etching based on the photoresist mask 304 to form trenches 305 in the substrate 301 and the dielectric layer 302.
[0057] Specifically, a photoresist mask layer 303 can be formed on the dielectric layer 302, and through processes such as exposure and development, the photoresist mask layer 303 is patterned to form a photoresist mask 304 that defines the pattern of the trenches 305 to be formed.
[0058] After that, based on the photoresist mask 304, trenches 305 can be formed in the dielectric layer 302 and the substrate 301 by dry etching or a combination of wet etching and dry etching.
[0059] Among them, wet etching is a chemical reaction between a wet etching solution and a semiconductor device immersed in the wet etching solution to generate a soluble product, thereby removing the area to be etched.
[0060] Dry etching can be divided into physical dry etching, chemical etching, and chemical-physical dry etching. Physical dry etching is to physically abrade a semiconductor device by accelerating particles, chemical etching is a chemical reaction between a gas and a semiconductor device, and chemical-physical dry etching is a physical etching process with chemical properties.
[0061] Taking the formation of trench 305 in dielectric layer 302 and substrate 301 by dry etching based on photoresist mask 304 as an example, the plasma can pass through the trench 305 image on photoresist mask 304 to bombard dielectric layer 302 and substrate 301 in turn, so as to remove dielectric layer 302 in the trench 305 pattern area and part of the thickness of substrate 301, thus forming trench 305 in dielectric layer 302 and substrate 301. Taking the formation of trench 305 in substrate 301 and dielectric layer 302 by a combination of wet etching and dry etching based on photoresist mask 304 as an example, first, based on photoresist mask 304, dielectric layer 302 can be etched by wet etching. Specifically, the semiconductor device can be immersed in the wet etching solution to remove dielectric layer 302 in the trench 305 pattern area through the wet etching solution; then, based on photoresist mask 304, substrate 301 can be etched by dry etching, thus forming trench 305 in dielectric layer 302 and substrate 301.
[0062] Among them, the depth of trench 305 formed in substrate 301 and dielectric layer 302 can be 0.1um to 30um.
[0063] It should be noted that in the process of forming trench 305 in dielectric layer 302 and substrate 301 by dry etching or a combination of wet etching and dry etching, after the photoresist mask 304 on dielectric layer 302 is bombarded by a large amount of plasma for a long time, a polymer layer 3041 similar to a hard shell structure is formed on the surface of photoresist mask 304. There is a part of the photoresist mask that has not formed polymer layer 3041 under polymer layer 3041, and this part of the photoresist mask serves as photoresist layer 3042.
[0064] In some embodiments, dry etching may include reactive ion etching (Reactive Ion Etching, abbreviated as RIE). Reactive ion etching uses chemically reactive gases to generate chemically active groups and ions. The high-energy ions accelerated by the electric field bombard the material to be etched, damaging the surface, improving the surface activity of the material to be etched, and accelerating the reaction rate with the active etching reaction groups, thus obtaining a higher etching rate. The mutual promotion of such chemical and physical reactions makes reactive ion etching have good profile control ability (anisotropy), a higher selectivity ratio, and an acceptable etching rate.
[0065] In some embodiments, dry etching may include inductively coupled plasma etching (Inductively Coupled Plasma Etching, abbreviated as ICP Etching). Inductively coupled plasma etching uses the high-energy ion beam generated by inductively coupled plasma to achieve the etching of materials.
[0066] Alternatively, the dry etching may also include any other suitable type of plasma etching, which is not limited herein.
[0067] Next, step two is performed. As Figure 3D shown, an inert plasma is used to bombard the polymer layer 3041.
[0068] Among them, the inert plasma can be generated by the ionization of inert gases such as argon and helium. These inert gases remain chemically inert in the plasma state, do not participate in chemical reactions, and only remove materials through physical bombardment.
[0069] In this embodiment, by bombarding the polymer layer 3041 with an inert plasma, the inert plasma can collide and break the covalent bonds (such as C-C and C-H bonds) in the polymer compound, resulting in the breakage of the molecular chain, causing the molecules in the polymer compound to dissociate into volatile fragments and peel off. Thus, the hard shell structure of the polymer layer 3041 can be initially damaged, and the structural strength of the polymer layer 3041 is decreased, which is beneficial to the subsequent removal of the polymer layer 3041. This bombardment process does not require chemical reactions and only realizes the dissociation of the polymer layer 3041 through ion momentum transfer and local high temperature to accelerate bond breakage.
[0070] Next, step three is performed. As Figure 3E shown, the photoresist layer 3042 is swollen by a fluorination process.
[0071] In some embodiments, fluorine gas can be injected into the reaction chamber to react with the photoresist layer 3042 to cause the photoresist layer 3042 to swell. Exemplarily, as Figure 3E shown, after the above step two, the semiconductor device is placed in a fluorine gas atmosphere, so that the fluorine gas reacts with the photoresist layer 3042 to form C-F covalent bonds in the photoresist layer 3042 to replace the C-H covalent bonds. Since the bond length of the C-F covalent bond is 1.35 Å and the bond length of the C-H covalent bond is 1.09 Å, after the fluorine gas reacts with the photoresist layer 3042, the photoresist layer 3042 will swell. In the case where the photoresist layer 3042 swells, the polymer layer 3041 above it will crack, making the polymer layer 3041 with a hard shell structure become loose, and the strength of the polymer layer 3041 is significantly decreased, which is beneficial to the subsequent removal of the polymer layer 3041.
[0072] Next, step four is performed. As Figure 3F shown, the bombarded polymer layer 3041 and the swollen photoresist layer 3042 are removed by ashing and cleaning.
[0073] During the ashing process, process gases (such as oxygen) can be excited under the action of radio frequency (RF) energy to form a plasma state. The plasma contains a large number of high-energy particles such as active ions and free radicals. These high-energy particles react chemically with the polymer layer 3041 after bombarding the surface of the semiconductor device and the expanded photoresist layer 3042, decomposing them into small-molecule gaseous products, and then these gaseous products are discharged from the device through the pumping system, thereby achieving the purpose of removing the residual mask. Since the polymer layer 3041 with a hard shell structure is cracked due to the bombardment of the polymer layer 3041 by inert plasma and the expansion of the photoresist layer 3042 through the fluorination process in steps two and three, the structural strength of the polymer layer 3041 is significantly reduced. Therefore, through the ashing process, all the residual masks on the surface of the semiconductor device can be formed into ashing products to be removed.
[0074] After the ashing process, the residual ashing products and other impurities can be further removed by cleaning to completely remove the residual mask on the surface of the semiconductor device, obtaining a clean and clear etching pattern, and improving the alignment and accuracy of the etching structure size during measurement in subsequent processes.
[0075] In some embodiments, the residual mask can also be heated during the ashing process. On the one hand, the photoresist layer 3042 further expands through heating, and the further expanded photoresist layer 3042 causes the polymer layer 3041 to crack further; on the other hand, high temperature can promote the breakage of covalent bonds in the polymer layer 3041, forming a more porous cracked hard shell layer. This can further reduce the structural strength of the polymer layer 3041, so that the residual mask on the semiconductor device can be more effectively removed during the ashing process.
[0076] So far, the process steps of the method for removing the residual mask according to the embodiments of the present invention have been completed. It can be understood that the method for removing the residual mask according to the embodiments of the present invention not only includes the above steps, but may also include other necessary steps before, during, or after the above steps, and all of them are included in the scope of the method according to the embodiments of the present invention.
[0077] In summary, for the method for removing the residual mask according to the embodiments of the present application, by bombarding the polymer layer with inert plasma and expanding the photoresist layer through the fluorination process, the polymer layer with a hard shell structure can be cracked, significantly reducing the structural strength of the polymer layer, thereby completely removing the residual mask on the surface of the semiconductor device and improving the alignment and accuracy of the etching structure size during measurement in subsequent processes.
[0078] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present application thereto. Those of ordinary skill in the art can make various changes and modifications therein without departing from the scope and spirit of the present application. All such changes and modifications are intended to be included within the scope of the present application as claimed in the appended claims.
[0079] Similarly, it should be understood that, in order to streamline the present application and assist in understanding one or more of the various aspects of the application, in the description of the exemplary embodiments of the present application, the various features of the present application are sometimes grouped together into a single embodiment, figure, or description thereof. However, the methods of the present application should not be construed as reflecting an intention that the claimed present application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, the point of the application is that the corresponding technical problem can be solved with fewer features than all the features of a single disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into the detailed description, where each claim itself serves as a separate embodiment of the present application.
[0080] In addition, those skilled in the art will appreciate that although some embodiments described herein include certain features included in other embodiments but not others, combinations of features of different embodiments are meant to be within the scope of the present application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.
[0081] It should be noted that the above embodiments illustrate rather than limit the present application, and those skilled in the art can design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The use of the words first, second, and third, etc. does not denote any order. These words can be interpreted as names.
Claims
1. A method for removing a residual mask, characterized in that, The method includes: Providing a semiconductor device formed with a residual mask; wherein, the residual mask includes a polymer layer and a photoresist layer located under the polymer layer; Bombarding the polymer layer with inert plasma; Expanding the photoresist layer through a fluorination process; Removing the bombarded polymer layer and the expanded photoresist layer through an ashing process and cleaning.
2. The method for removing the residual mask according to claim 1, characterized in that, Heating the residual mask during the execution of the ashing process.
3. The method for removing a residual mask according to claim 1, wherein Expanding the photoresist layer through a fluorination process, including: Injecting fluorine gas into the reaction chamber to react the fluorine gas with the photoresist layer so that the photoresist layer expands.
4. The method for removing a residual mask according to claim 1, characterized in that, The residual mask is formed after a dry etching process or an ion implantation process of a photoresist mask.
5. The method for removing a residual mask according to claim 4, wherein, The semiconductor device includes a substrate, and an etching pattern is formed in the substrate after the dry etching process; Wherein, a dielectric layer is formed on the substrate, and the etching pattern includes trenches formed in the substrate and the dielectric layer.
6. The method for removing a residual mask according to claim 5, wherein, The step of forming trenches in the substrate and the dielectric layer includes: Providing a substrate; Depositing and forming a dielectric layer on the substrate; Forming the photoresist mask on the dielectric layer and performing etching based on the photoresist mask to form trenches in the substrate and the dielectric layer.
7. The method for removing a residual mask according to claim 6, wherein, Based on the photoresist mask, forming trenches in the dielectric layer and the substrate through a combination of dry etching or wet etching and dry etching.
8. The method for removing the residual mask according to claim 7, wherein, Forming trenches in the substrate and the dielectric layer through a combination of wet etching and dry etching based on the photoresist mask, including: Etching the dielectric layer through the wet etching based on the photoresist mask; Etching the substrate through the dry etching based on the photoresist mask to form trenches in the dielectric layer and the substrate.
9. The method for removing the residual mask according to claim 7 or 8, characterized in that, The dry etching includes reactive ion etching or inductively coupled plasma etching.
10. The method for removing a residual mask according to claim 1, characterized in that, The depth of the trench is 0.1um to 30um.