Method for applying strain to semiconductor material and product

Abstract

The invention provides a method for applying strain to a semiconductor material and a product. The method mainly comprises the following steps: S1, obtaining a semiconductor material donor and a negative thermal expansion substrate; s2, bonding the semiconductor material donor to the negative thermal expansion substrate at a first temperature; and S3, stripping the first semiconductor layer on the semiconductor material donor from the semiconductor material donor at a third temperature. According to the method for applying the strain to the semiconductor material, the optical and electrical properties of the semiconductor material can be adjusted, and the application range of the semiconductor material is widened.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor materials and device processes. Specifically, it relates to a method for applying strain to a semiconductor material and related semiconductor products. Background Art

[0002] Applying strain to a semiconductor material can change the unit cell parameters of its lattice, and thus can regulate the optical and electrical properties of the semiconductor. Some studies have shown that applying about 0.4% tensile strain to Si can increase the electron mobility of Si by 50%. In addition, for quasi-direct bandgap Ge, it has currently been regarded as a material that is standard and compatible with CMOS processes. It has a high absorption coefficient in the communication band and can be used to prepare detectors for use in this band. However, the detection efficiency of bulk Ge rapidly decreases after about 1540 nm in the C band. By applying tensile strain, the detection efficiency of Ge in the C band and L band can be improved. Obtaining a wafer-level tensile-strained Ge substrate can be used to fabricate Ge-based detectors with high detection efficiency in the L band and even the U band at low cost using CMOS processes. In addition, theoretical work has shown that by applying 2% tensile strain, Ge can be transformed from an indirect bandgap to a direct bandgap. Therefore, Ge is regarded as an ideal material for CMOS-compatible on-chip lasers, modulators, and detectors. The realization of a Ge substrate with a large tensile strain may even enable the realization of an all-IV group integrated optical system compatible with CMOS processes. Summary of the Invention

[0003] The main objective of the present invention is to provide a method for applying strain to a semiconductor material, and at the same time provide a semiconductor product with large strain based on this method.

[0004] The first aspect of the present invention provides a method for applying strain to a semiconductor material, the method comprising the following steps:

[0005] Step S1, obtaining a semiconductor material donor and a negative thermal expansion substrate;

[0006] Step S2, bonding the semiconductor material donor to the negative thermal expansion substrate at a first temperature;

[0007] Step S3, peeling off a first semiconductor layer on the semiconductor material donor at a third temperature.

[0008] Optionally, as a possible implementation, in the step S1, the negative thermal expansion substrate may be composed of a negative thermal expansion material, or may be made by mixing multiple negative thermal expansion materials, or may be a composite material of negative thermal expansion and other substances.

[0009] Optionally, as a possible implementation, the semiconductor material donor may be an elemental semiconductor, such as Si, Ge; or a semiconductor alloy, such as Si x Ge y , Ge x Sn y , Si x Ge y Sn z ; or a compound semiconductor, such as GaAs, InP.

[0010] Optionally, as a possible implementation, the semiconductor material donor may be a semiconductor wafer or an epitaxial wafer.

[0011] Optionally, as a possible implementation, the semiconductor material donor may be a substrate material, and in some scenarios, it may also be an epitaxial wafer containing a semiconductor device layer.

[0012] Optionally, as a possible implementation, the difference between the third temperature and the first temperature does not exceed 50 °C; preferably, the difference between the two does not exceed 20 °C; more preferably, the third temperature is the same as the first temperature. It should be understood that the selection of the third temperature should be based on the fact that the thermal stress between the semiconductor material donor and the negative thermal expansion substrate during the peeling process is within the range that both materials can withstand.

[0013] Optionally, as a possible implementation, in step S2, the bonding can use any one of the bonding methods such as glass fusion bonding, dielectric layer bonding, surface activation bonding, and anodic bonding.

[0014] Optionally, as a possible implementation, in order to enhance the bonding strength, a bonding enhancement layer may also be provided on the negative thermal expansion substrate, and then the bonding process is carried out.

[0015] Optionally, as a possible implementation, in step S3, peeling the first semiconductor layer on the semiconductor material donor from the semiconductor material at the third temperature may be injecting light ions into the semiconductor material donor, and then, during or after bonding, at the third temperature, causing the injected ions to aggregate to generate bubbles and cure and crosslink, so that the first semiconductor layer on the side of the semiconductor material donor bonded to the negative thermal expansion substrate is peeled off from the semiconductor material donor.

[0016] The light ions are usually H or He; the implantation dose of the ions is between 1×10 16 cm -2 and 2×10 17 cm -2 .

[0017] Optionally, as a possible implementation, in step S3, the peeling of the first semiconductor layer on the semiconductor material donor at the third temperature may be that the semiconductor material donor is an epitaxial wafer, the epitaxial layer of the epitaxial wafer is the first semiconductor layer of the present invention, and after the bonding is completed, at the third temperature, a laser that can be transmitted by the original substrate of the epitaxial wafer and absorbed by the epitaxial layer is used to separate the epitaxial layer from its original substrate.

[0018] Optionally, as a possible implementation, in step S3, the peeling of the first semiconductor layer on the semiconductor material donor at the third temperature, more specifically, may be that the semiconductor material donor is an epitaxial wafer obtained by using the van der Waals epitaxy method, the epitaxial layer of the epitaxial wafer is the first semiconductor layer of the present invention, and after the bonding is completed, at the third temperature, the epitaxial layer is peeled off from its original substrate by mechanical peeling.

[0019] Optionally, as a possible implementation, the method for applying strain to a semiconductor material according to the present invention may further include removing the part of the first semiconductor layer that is not the target semiconductor material layer; the removal of the part of the first semiconductor layer that is not the target semiconductor material layer can be completed by dry etching or wet etching.

[0020] Optionally, as a possible implementation, the method for applying strain to a semiconductor material according to the present invention may further include a repair step for the target semiconductor material layer after the bonding is completed; the repair step can be completed by thermal annealing or laser annealing at a specific temperature.

[0021] The second aspect of the present invention provides a semiconductor product with strain, which includes a negative thermal expansion substrate, a semiconductor material layer, and a bonding layer, and the semiconductor product is prepared by implementing the method for applying strain to a semiconductor material provided in the first aspect.

[0022] Compared with the prior art, the beneficial effects of the present invention are: adjustable strain can be introduced into the semiconductor material, so that the optical and electrical properties of the semiconductor material can be adjusted, and the application range of the semiconductor material can be broadened. Description of the Drawings

[0023] Figure 1 is the schematic diagram of implementing strain on a semiconductor material by the present invention;

[0024] Figure 2 is the process flow chart of the method for applying strain to a semiconductor material according to the present invention;

[0025] Figure 3 is the process schematic diagram of Embodiment 1 of the present invention;

[0026] Figure 4 It is a process schematic diagram of Embodiment 2 of the present invention;

[0027] Figure 5 It is a product structure diagram obtained by implementing the method of the present invention. Detailed implementation manners

[0028] To make the objectives, technical solutions and advantages of the present invention more clear and understandable, the following further describes the present invention in detail with reference to specific embodiments and the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0029] In the present invention, the endpoints and any values within the invented ranges are not limited to the exact ranges or values. These ranges or values should be understood to include values close to these ranges or values. For numerical ranges, between the endpoint values of each range, between the endpoint values of each range and individual point values, and between individual point values, they can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be regarded as specifically invented in the present invention.

[0030] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "including", "comprising", etc. used herein indicate the presence of the described features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.

[0031] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0032] Similarly, in order to streamline the present invention and help understand one or more of the various inventive aspects, in the above description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. The description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0033] The descriptions such as "first", "second", etc. used herein are only for distinguishing the specified features and should not be construed as specific limitations on the specific features.

[0034] Strain can change the unit cell parameters of a crystal. Especially for semiconductors, the application of strain can regulate the optical and electrical properties of semiconductors. For example, since the thermal expansion coefficient of Ge is higher than that of Si, Ge on Si (GOS) obtained by epitaxially growing Ge on Si can obtain a tensile strain of about 0.2% in the epitaxial Ge layer under high-temperature annealing. This tensile strain can improve the absorption efficiency of Ge in the long wavelength band, such as the C band and the L band. Based on the GOS platform, high-performance optoelectronic sensors that can be used in the communication band can be prepared at low cost using standard CMOS processes. In addition, theoretical studies have shown that by applying a 2% tensile strain, Ge can be transformed from an indirect bandgap to a direct bandgap, and Ge is also regarded as an ideal material for CMOS-compatible on-chip lasers, modulators, and detectors. The realization of a wafer-level Ge substrate with a large tensile strain may even enable the realization of an all-group-IV integrated optical system compatible with CMOS processes. In addition, as an important channel material in the semiconductor industry, by applying tensile strain to Si, the carrier mobility of Si can be significantly improved, enhancing the performance of the device. Obtaining semiconductor materials with high wafer-level strain is of great significance to the semiconductor industry.

[0035] In order to obtain semiconductor materials with large strain at the wafer level, a first aspect of the present invention provides a method for applying strain to a semiconductor material. This method realizes a semiconductor product with strain throughout the semiconductor material layer at a second temperature by bonding a semiconductor material donor to a negative thermal expansion substrate at a first temperature. The second temperature is the operating temperature of the device or equipment fabricated based on this semiconductor product, usually room temperature, or a lower temperature. As Figure 1 shown, when the second temperature is lower than the first temperature, when the product temperature decreases from the first temperature to the second temperature, the negative thermal expansion substrate 101 expands in volume, thereby stretching the semiconductor material layer 102, and a tensile strain can be applied to the semiconductor material layer 102. In some cases, the second temperature is higher than the first temperature, that is, the bonding is completed at a lower temperature, and the device or equipment fabricated from the semiconductor product operates at a higher temperature. At this time, a compressive strain can be introduced into the semiconductor material layer. The strain ε introduced by the above method can be evaluated by the following formula:

[0036]

[0037] In the above formula, α semi refers to the thermal expansion coefficient of the semiconductor material, and α NTE is the thermal expansion coefficient of the negative thermal expansion substrate, T bonding is the temperature at which the bonding process is completed, and T applicationThe temperature at which the device or equipment for semiconductor products operates, and δ is the influence of some relaxation mechanisms of strain on strain. When ε is a positive value, it means that a tensile strain is applied to the semiconductor material layer on the negative thermal expansion substrate; when ε is a negative value, it means that a compressive strain is applied to the semiconductor material layer on the negative thermal expansion substrate.

[0038] As Figure 2 shown, the method for applying strain to a semiconductor material according to the present invention includes the following steps:

[0039] Step S1, obtaining a semiconductor material donor and a negative thermal expansion substrate. The negative thermal expansion substrate refers to a substrate material that has the property of shrinking when heated and expanding when cooled in the plane, that is, the negative thermal expansion property; the negative thermal expansion substrate can have uniaxial negative thermal expansion property, that is, it can achieve uniaxial strain on the material bonded thereto, or it can be a substrate with biaxial negative thermal expansion property, that is, it can achieve biaxial strain on the material bonded thereto; the negative thermal expansion substrate can have isotropic negative thermal expansion property or anisotropic negative thermal expansion property. The negative thermal expansion substrate can be composed of a single negative thermal expansion material, or can be made by mixing multiple negative thermal expansion materials, or can be a composite material of negative thermal expansion and other substances, such as adding a strength enhancer to the negative thermal expansion material. The semiconductor material donor can be an elemental semiconductor, such as Si, Ge; it can also be a semiconductor alloy, such as Si x Ge y ,Ge x Sn y ,Si x Ge y Sn z ; it can also be a compound semiconductor, such as GaAs, InP. The semiconductor material donor can be a semiconductor wafer or an epitaxial wafer; in addition, the semiconductor material donor can be a substrate material, and in some scenarios, it can also be an epitaxial wafer with a device structure, etc.

[0040] Step S2, bonding the semiconductor material donor to the negative thermal expansion substrate at a first temperature. The bonding can be any bonding method as long as its bonding strength can ensure that the bonded wafer will not fail at the second temperature, that is, the operating temperature. The bonding can use any one of the bonding methods such as glass fusion bonding, dielectric layer bonding, surface activation bonding, and anodic bonding. In order to enhance the bonding strength, a bonding enhancement layer can also be provided on the negative thermal expansion substrate, and then the bonding process is carried out.

[0041] Step S3, at the third temperature, the first semiconductor layer on the semiconductor material donor is peeled off from the semiconductor material donor. The first semiconductor layer includes a semiconductor material layer that needs to be strained. When the material is thinned to the micron scale or even thinner, its ability to withstand strain becomes stronger. It can be considered to peel off the first semiconductor layer from the semiconductor material donor near the first temperature, so as to improve the strain-bearing ability of this layer of material. At the same time, when the temperature changes greatly, huge thermal stresses are introduced into the negative thermal expansion substrate and the semiconductor material donor due to thermal mismatch, which may cause bonding failure or bonding chip fracture. The difference between the third temperature and the first temperature does not exceed 50 °C; preferably, the difference between the two does not exceed 20 °C; more preferably, the third temperature is the same as the first temperature. It should be understood that the selection of the third temperature should be based on the fact that the thermal stresses between the semiconductor material donor and the negative thermal expansion substrate during the peeling process are within the range that both materials can withstand.

[0042] In an embodiment of the present invention, the peeling of the first semiconductor layer on the semiconductor material donor at the third temperature can be that, before the bonding process, light ions are implanted into the semiconductor material donor, and then during or after the bonding, at the third temperature, the implanted ions aggregate to generate bubbles and cure and crosslink, so that the first semiconductor layer on the side of the semiconductor material donor bonded to the negative thermal expansion substrate is peeled off from the semiconductor material donor. The light ions are usually H or He. H or He is implanted into a certain depth of the semiconductor material donor by ion implantation. The certain depth means that the implanted H or He ions aggregate to generate bubbles and cure and crosslink at the third temperature, causing the first semiconductor layer to be peeled off from the semiconductor material donor. The implantation dose of the ions is between 1×10 16 cm -2 and 2×10 17 cm -2 .

[0043] In an embodiment of the present invention, the peeling of the first semiconductor layer on the semiconductor material donor at the third temperature can be that the semiconductor material donor is an epitaxial wafer, and the epitaxial layer of the epitaxial wafer is the first semiconductor layer of the present invention. After the bonding is completed, at the third temperature, a laser that can be transmitted by the original substrate of the epitaxial wafer and absorbed by the epitaxial layer is used to separate the epitaxial layer from its original substrate.

[0044] In one embodiment of the present invention, the first semiconductor layer on the semiconductor material donor is peeled off from the semiconductor material donor at a third temperature. More specifically, the semiconductor material donor may be an epitaxial wafer obtained by using the van der Waals epitaxy method, and the epitaxial layer of the epitaxial wafer is the first semiconductor layer of the present invention. After the bonding is completed, the epitaxial layer is peeled off from its original substrate by mechanical peeling at the third temperature.

[0045] In addition, the method of the present invention may further include removing the portion of the first semiconductor layer that is not the target semiconductor material layer after the bonding is completed; the removing of the portion of the first semiconductor layer that is not the target semiconductor material layer can be completed by dry etching or wet etching.

[0046] In addition, the method of the present invention may further include a repair step for the target semiconductor material layer after the bonding is completed; the repair step can be completed by thermal annealing or laser annealing at a specific temperature. Performing laser annealing at a specific temperature is to ensure that the laser annealing step does not relax the strain introduced to the target semiconductor material layer by the method of the present invention.

[0047] To better illustrate the method of applying strain to a semiconductor material according to the present invention, the following will be introduced in combination with specific embodiments. The following embodiments are only for facilitating the understanding of the method of applying strain to a semiconductor material according to the present invention, and should not be construed as the method of applying strain to a semiconductor material according to the present invention being only applicable to the following embodiments.

[0048] Example 1

[0049] Ge has good absorption performance for electromagnetic waves in the communication band and is an important platform for manufacturing detectors in the communication band. Applying tensile strain to Ge can improve its detection performance in the C band and longer bands. Example 1 of the present invention discloses a method for obtaining wafer-level Ge with tensile strain, as Figure 3 shown.

[0050] First, obtain a negative thermal expansion substrate 301 and a Ge wafer 302. In this embodiment, the negative thermal expansion substrate 301 is made of Zr2WP2O 12 prepared by first obtaining Zr2WP2O 12 powder, and then sintering the powder into a substrate at 600 °C and 100 MPa by means of spark plasma sintering, and then polishing the substrate by mechanical polishing for bonding use.

[0051] Perform H ion implantation on one side of the Ge wafer 302. The H ion implantation energy is 150 KeV, and the implantation dose is 6×10 16 cm -2, after injection, the H ions mainly aggregate at 303 which is about 1 μm deep from the surface of the Ge wafer.

[0052] Deposit 200 nm of gold on the surface of the negative thermal expansion substrate 301, set 200 nm of tin on the surface of the Ge wafer, and then perform eutectic bonding under the conditions of 300 °C and a pressure of 3000 N for 3 hours. At the same time, the H ions injected into the Ge wafer under this condition will form bubbles and ripen and crosslink, causing the Ge layer 305 with a thickness of about 1 μm in contact with the bonding layer 304 on the Ge wafer to peel off from the Ge wafer. After removing the bonding pressure, slowly reduce the product temperature to room temperature to obtain a Ge substrate with tensile strain.

[0053] In addition, in order to repair the damage to the Ge layer 305 caused by ion implantation, the Ge layer 305 can be annealed and repaired using pulsed laser annealing at 300 °C to obtain a tensile strain Ge substrate 306 with high crystal quality.

[0054] Example 2

[0055] Si is an important material in the semiconductor industry. Applying tensile stress to Si can improve the carrier mobility of Si. Example 2 provides a method for applying tensile strain to semiconductor Si, as Figure 4 shown.

[0056] First, obtain a negative thermal expansion substrate 401 and an epitaxial wafer of Si on sapphire (Silicon on Sapphire, SOS) 402. The SOS includes a sapphire substrate 404 and a Si epitaxial layer 403. In this example, the negative thermal expansion substrate 401 is made of Zr2WP2O 12 prepared, and its preparation method is the same as that in Example 1.

[0057] Deposit 200 nm of gold on the surface of the negative thermal expansion substrate 401, set 200 nm of tin on the surface of the SOS, and then perform eutectic bonding under the conditions of 300 °C and a pressure of 3000 N for 2 hours to form a bonding layer 405. After the bonding is completed, keep the bonded wafer at 300 °C, and then use the Laser Lift-off process to peel off and remove the sapphire substrate. Then slowly reduce the product temperature to room temperature to obtain a Si substrate 406 with tensile strain.

[0058] It should be noted again that the semiconductor material donor is not limited to the forms disclosed in Examples 1 and 2, and can also be an epitaxial wafer with a device structure, etc. In addition, the negative thermal expansion substrate is not limited to the substrate made of Zr2WP2O 12 prepared, and can also be made of other negative thermal expansion materials, or made of a composite of a negative thermal expansion material and other materials.

[0059] The second aspect of the present invention provides a semiconductor product with strain, such as Figure 5 shown, which includes a negative thermal expansion substrate 501, a semiconductor material layer 502, and a bonding layer 503. The semiconductor product is obtained by implementing the method for applying strain to the semiconductor material provided in the first aspect.

[0060] The specific embodiments described above further elaborate on the purpose, technical solutions, and beneficial effects of the present invention. It should be understood that the above are only specific embodiments of the present invention and are not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for applying strain to a semiconductor material, the method comprising the following steps: Step S1, obtaining a semiconductor material donor and a negative thermal expansion substrate; Step S2, bonding the semiconductor material donor to the negative thermal expansion substrate at a first temperature; Step S3, peeling a first semiconductor layer on the semiconductor material donor from the semiconductor material donor at a third temperature.

2. The method for applying strain to a semiconductor material according to claim 1, characterized in that The negative thermal expansion substrate may be composed of a negative thermal expansion material, or may be prepared by mixing multiple negative thermal expansion materials, or may be a composite material of negative thermal expansion and other substances.

3. The method for applying strain to a semiconductor material according to claim 1, wherein, The semiconductor material donor may be a semiconductor wafer or an epitaxial wafer.

4. The method for applying strain to a semiconductor material according to claim 1, wherein, The difference between the third temperature and the first temperature does not exceed 50 °C; preferably, the difference between the two does not exceed 20 °C; more preferably, the third temperature is the same as the first temperature; the selection of the third temperature should be based on the fact that the thermal stress between the semiconductor material donor and the negative thermal expansion substrate during the peeling process is within the range that both materials can withstand.

5. The method of applying strain to a semiconductor material according to claim 1, wherein, The bonding may use any one of glass fusion bonding, dielectric layer bonding, surface activation bonding, and anodic bonding.

6. The method of applying strain to a semiconductor material according to claim 1, wherein In order to enhance the bonding strength, a bonding enhancement layer may be provided on the negative thermal expansion substrate, and then the bonding process is carried out.

7. The method for applying strain to a semiconductor material according to claim 1, wherein, The peeling of the first semiconductor layer on the semiconductor material donor from the semiconductor material at the third temperature may be that light ions are implanted into the semiconductor material donor, and then during or after bonding, at the third temperature, the implanted ions are aggregated to generate bubbles and cured and crosslinked, so that the first semiconductor layer on the side of the semiconductor material donor bonded to the negative thermal expansion substrate is peeled off from the semiconductor material donor.

8. The method for applying strain to a semiconductor material according to claim 1, wherein The peeling of the first semiconductor layer on the semiconductor material donor from the semiconductor material donor at the third temperature may be that the semiconductor material donor is an epitaxial wafer, the epitaxial layer of the epitaxial wafer is the first semiconductor layer of the present invention, and after bonding is completed, at the third temperature, a laser that can be transmitted by the original substrate of the epitaxial wafer and absorbed by the epitaxial layer is used to separate the epitaxial layer from its original substrate.

9. The method for applying strain to a semiconductor material according to claim 1, wherein More particularly, the peeling of the first semiconductor layer on the semiconductor material donor from the semiconductor material donor at the third temperature may be that the semiconductor material donor is an epitaxial wafer obtained by the van der Waals epitaxy method, the epitaxial layer of the epitaxial wafer is the first semiconductor layer of the present invention, and after bonding is completed, at the third temperature, the epitaxial layer is peeled off from its original substrate by mechanical peeling.

10. A semiconductor product with strain, which includes a negative thermal expansion substrate, a semiconductor material layer, and a bonding layer, and the semiconductor product is prepared by implementing the method according to any one of claims 1-9.

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