Ideal diode circuit and vehicle

Abstract

The invention discloses an ideal diode circuit and a vehicle. The ideal diode circuit comprises a transistor; the first input end of the driving module is connected with the first end of the transistor, the second input end of the driving module is connected with the second end of the transistor through a reference voltage source, and the output end of the driving module is connected with the control end of the transistor; the two input ends of the boosting module are connected with the first end and the second end of the transistor respectively, and the output end of the boosting module is connected with the power supply end of the driving module; the boosting module is used for performing multi-stage boosting on voltage at two ends of the transistor to obtain driving voltage of the driving module; the input end of the logic control module is connected with the output end of the boosting module, and the output end of the logic control module is connected with the control end of the boosting module. According to the embodiment of the invention, the voltage at the two ends of the transistor can be boosted to provide the driving voltage, and the stable conduction of the transistor is realized.

Description

Technical Field

[0001] This application belongs to the technical field of electronic devices, and particularly relates to an ideal diode circuit and a vehicle. Background Art

[0002] With the continuous development of the new energy vehicle field, the penetration rate of new energy vehicles has been increasing. In the circuit architecture inside a new energy vehicle, in order to suppress the reverse current in the DC loop, a large number of diodes need to be applied in the circuit architecture. There is a certain voltage drop at both ends of a traditional diode when it conducts, resulting in power dissipation, which will not only reduce the energy transmission efficiency but also generate a large amount of heat, causing the temperature of the device to rise. Therefore, an ideal diode is usually used to replace the traditional diode in the current circuit architecture.

[0003] Ideal diodes include two types: grounded type and floating type. The floating type ideal diode does not require a grounding terminal, and its application range is wider than that of the grounded type. The floating type diode usually includes a switching part and a driving part. The switching part is usually composed of a transistor and a diode anti-parallel to the transistor. For example, the transistor and the diode anti-parallel to the transistor can be a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and its body diode. When the floating type diode is powered on, the transistor is not conducting. At this time, the floating type diode conducts through the diode, and the voltage difference between the anode and the cathode of the floating type diode is about the conduction voltage drop of the diode. This voltage difference can supply power to the driving part to realize the driving control of the transistor.

[0004] However, when the floating type diode is operating normally, since the transistor is in the conducting state, the voltage difference between the anode and the cathode of the floating type diode is much smaller than the conduction voltage drop of the diode, usually in the order of dozens of millivolts. At this time, the voltage difference across the floating type diode cannot continue to supply power to the driving part, thus unable to maintain the transistor in a stable conducting state. Summary of the Invention

[0005] The embodiments of this application provide an ideal diode circuit and a vehicle, which can solve the problem that the floating type diode cannot maintain stable conduction when the voltage difference across it is small.

[0006] In a first aspect, the embodiments of this application provide an ideal diode circuit, which includes:

[0007] A transistor;

[0008] A driving module, where the first input terminal of the driving module is connected to the first end of the transistor, the second input terminal of the driving module is connected to the second end of the transistor through a reference voltage source, and the output terminal of the driving module is connected to the control terminal of the transistor; wherein, the reference voltage source is used to maintain a reference voltage between the second input terminal of the driving module and the second end of the transistor.

[0009] A boost module, where the two input terminals of the boost module are respectively connected to the first end and the second end of the transistor, and the output terminal of the boost module is connected to the power supply terminal of the driving module; the boost module is used to perform multi-stage boosting on the voltage across the transistor to obtain the driving voltage of the driving module.

[0010] A logic control module, where the input terminal of the logic control module is connected to the output terminal of the boost module, and the output terminal of the logic control module is connected to the control terminal of the boost module; the logic control module is used to send a start signal to the boost module when the voltage output by the boost module is lower than the first voltage threshold.

[0011] In some embodiments, the boost module includes:

[0012] A first-stage boost unit, where the two input terminals of the first-stage boost unit are respectively connected to the first end and the second end of the transistor, and the first-stage boost unit is used to boost the voltage across the transistor by a first ratio.

[0013] A second-stage boost unit, where the two input terminals of the second-stage boost unit are respectively connected to the output terminal of the first-stage boost unit and the second end of the transistor, and the output terminal of the second-stage boost unit is connected to the power supply terminal of the driving module. The second-stage boost unit is used to boost the output voltage of the first-stage boost unit by a second ratio.

[0014] In some embodiments, the first-stage boost unit includes a plurality of first capacitors, and the second-stage boost unit includes an output capacitor and a plurality of second capacitors; a single boost cycle of the boost module includes a first stage and a second stage.

[0015] In the first stage, the first-stage boost unit connects the two ends of each first capacitor to the two input terminals of the first-stage boost unit respectively, so as to charge each first capacitor through the voltage across the transistor; the second-stage boost unit connects a plurality of second capacitors in series in sequence, and connects the series-connected plurality of second capacitors in parallel with the output capacitor, so as to charge the output capacitor through the series-connected plurality of second capacitors.

[0016] In the second stage, the first-stage boost unit connects a plurality of first capacitors in series in sequence, and connects the series-connected plurality of first capacitors to each second capacitor respectively, so as to charge each second capacitor through the series-connected plurality of first capacitors.

[0017] In some embodiments, the first-stage boost unit includes:

[0018] n1 first capacitors, where n1 is a positive integer greater than or equal to 2;

[0019] 2n1 first switches, the first ends of the n1 first capacitors are respectively connected to the first end of the transistor through the corresponding n1 first switches, and the second ends of the n1 first capacitors are respectively connected to the second end of the transistor through the corresponding n1 first switches;

[0020] (n1 - 1) second switches, and adjacent two first capacitors are connected in series through one second switch;

[0021] In the first stage, the first switches are turned on and the second switches are turned off; in the second stage, the second switches are turned on and the first switches are turned off.

[0022] In some embodiments, the first - stage boosting unit includes:

[0023] (n1 - 1) first capacitors, where n1 is a positive integer greater than or equal to 2;

[0024] 2(n1 - 1) first switches, the first ends of the n1 first capacitors are respectively connected to the first end of the transistor through the corresponding n1 first switches, and the second ends of the n1 first capacitors are respectively connected to the second end of the transistor through the corresponding n1 first switches;

[0025] (n1 - 1) second switches, adjacent two first capacitors are connected in series through one second switch, and the second end of the last first capacitor among the (n1 - 1) first capacitors is connected to the first end of the transistor through one second switch;

[0026] In the first stage, the first switches are turned on and the second switches are turned off; in the second stage, the second switches are turned on and the first switches are turned off.

[0027] In some embodiments, the second - stage boosting unit includes:

[0028] n2 second capacitors, where n2 is a positive integer greater than or equal to 2;

[0029] 2n2 - 1 second switches, the first ends of the n2 second capacitors are respectively connected to the output end of the first - stage boosting unit through the corresponding n2 second switches, among the n2 second capacitors, the second ends of the first (n2 - 1) second capacitors are respectively connected to the second end of the transistor through the corresponding (n2 - 1) second switches, and the second end of the last second capacitor is connected to the second end of the transistor;

[0030] An output capacitor, the first end of the output capacitor is connected to the power - supply end of the driving module, and the second end of the output capacitor is connected to the second end of the transistor;

[0031] n2 first switches, with one first switch connected in series between adjacent second capacitors, and the first end of the first capacitor among the n2 second capacitors is connected to the first end of the output capacitor through a first switch;

[0032] In the first stage, the first switch is turned on and the second switch is turned off; in the second stage, the second switch is turned on and the first switch is turned off.

[0033] In some embodiments, the logic control module includes:

[0034] A threshold comparison unit, which is used to generate a first signal or a second signal according to the driving voltage output by the boost module;

[0035] A logic signal unit, connected to the output end of the threshold comparison unit, and used to send a start signal to the boost module when receiving the first signal; wherein, the start signal includes an alternately output first clock signal and a second clock signal;

[0036] The first clock signal is used to drive the first-stage boost unit to connect the two ends of each first capacitor to the two input ends of the first-stage boost unit respectively, and to drive the second-stage boost unit to connect a plurality of second capacitors in series in sequence, and connect the series-connected plurality of second capacitors in parallel with the output capacitor;

[0037] The second clock signal is used to drive the first-stage boost unit to connect a plurality of first capacitors in series in sequence, and to drive the second-stage boost unit to connect the series-connected plurality of first capacitors to each second capacitor respectively.

[0038] In some embodiments, the threshold comparison unit includes:

[0039] A voltage dividing circuit, the first end of the voltage dividing circuit is connected to the output end of the boost module, and the second end of the voltage dividing circuit is connected to the second end of the transistor;

[0040] A comparator, including a first comparison end, a second comparison end and a comparison output end, the first comparison end is connected to the voltage dividing end of the voltage dividing circuit, the second comparison end is connected to the comparison voltage source, and the comparison output end is connected to the logic signal unit; wherein, the comparison voltage source is used to provide a reference comparison voltage.

[0041] In some embodiments, the comparator is a hysteresis comparator, and the hysteresis comparator includes a first comparison value and a second comparison value; the first comparison value is less than the second comparison value;

[0042] The hysteresis comparator is used to output a first signal when the divided voltage of the voltage dividing circuit is less than the first comparison value; and output a second signal when the divided voltage of the voltage dividing circuit is greater than the second comparison value.

[0043] In some embodiments, the logic signal unit includes a first power supply terminal and a second power supply terminal. The first power supply terminal of the logic signal unit is connected to the output terminal of the boost module, and the second power supply terminal of the logic signal unit is connected to the second terminal of the transistor.

[0044] In a second aspect, an embodiment of the present application further provides a vehicle, which includes the ideal diode circuit as in the first aspect.

[0045] The ideal diode circuit and the vehicle provided by the embodiments of the present application can detect the voltage output by the boost module by setting a drive module, a boost module, and a logic control module. When the boost module is not working, the voltage output by the boost module is the voltage across the transistor. When the voltage across the transistor is lower than the first threshold, the logic control module can send a start signal to the boost module. After the boost module performs multi-stage boosting on the relatively low voltage across the transistor, a drive voltage that can supply power to the drive module is obtained. Under the power supply of the drive voltage, the drive module can output a corresponding control signal to the control terminal of the transistor according to the voltage difference between the two input terminals to maintain the transistor in a stable conduction state. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments of the present application. Obviously, the following described drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0047] Figure 1 is a schematic circuit structure diagram of an ideal diode circuit provided by an embodiment of the present application;

[0048] Figure 2 is a schematic diagram of a partial module structure of an ideal diode circuit provided by an embodiment of the present application;

[0049] Figure 3 is a schematic circuit structure diagram of a first-stage boost unit provided by an embodiment of the present application;

[0050] Figure 4 is a schematic circuit structure diagram of a first-stage boost unit provided by another embodiment of the present application;

[0051] Figure 5 is a schematic circuit structure diagram of a second-stage boost unit provided by an embodiment of the present application;

[0052] Figure 6 is a schematic circuit structure diagram of a logic control module provided by an embodiment of the present application;

[0053] Figure 7It is a signal timing diagram of the second clock signal and the first clock signal provided by an embodiment of the present application;

[0054] Figure 8 It is a schematic diagram of the circuit structure of Related Embodiment 1;

[0055] Figure 9 It is a schematic diagram of the circuit structure of Related Embodiment 2;

[0056] Figure 10 It is a schematic diagram of the simulation experiment results of the output voltage rising rate and the input total energy in each embodiment;

[0057] Figure 11 It is a schematic diagram of the parameter comparison in each embodiment.

[0058] In the drawings:

[0059] M1, transistor; 10, driving module; 20, boosting module; 21, first-stage boosting unit; 22, second-stage boosting unit; 30, logic control module; 31, threshold comparison unit; 311, voltage dividing circuit; Comp, comparator; 32, logic signal unit; 33, clock unit; C1, first capacitor; C2, second capacitor; Cout, output capacitor; S1, first switch; S2, second switch. Detailed Embodiments

[0060] In order to be able to more clearly understand the above-mentioned objects, features and advantages of the present disclosure, the solutions of the present disclosure will be further described below. It should be noted that, without conflict, the embodiments of the present disclosure and the features in the embodiments can be combined with each other.

[0061] In the following description, many specific details are set forth in order to fully understand the present disclosure, but the present disclosure can also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only a part of the embodiments of the present disclosure, rather than all the embodiments.

[0062] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising a..." does not exclude the existence of additional identical elements in the process, method, article or device comprising the element.

[0063] With the continuous development of the new energy vehicle field, the penetration rate of new energy vehicles is increasing. In the circuit architecture inside new energy vehicles, in order to suppress the reverse current in the DC circuit, a large number of diodes need to be applied in the circuit architecture.

[0064] There is a certain voltage drop at both ends of a traditional diode when it is conducting, resulting in power dissipation. This will not only reduce the energy transmission efficiency but also generate a large amount of heat, causing the temperature of the device to rise. Therefore, in the current circuit architecture, an ideal diode is usually used instead of a traditional diode.

[0065] Ideal diodes include two types: grounded type and floating type. The floating type ideal diode does not require a grounding terminal, and its application range is wider than that of the grounded type. However, the current floating type ideal diode has certain defects, which affect its conduction performance. For example, the floating type ideal diode in the related technology cannot maintain stable conduction, that is, the conduction duty cycle cannot reach 100%. This is because during the conduction process, it needs to be turned off regularly for a period of time to start the charge pump for boosting during this period. Taking the MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) used in the ideal diode circuit as an example, when the MOSFET is turned off, it needs to conduct through the body diode of the MOSFET. At this time, the output voltage will have a certain drop, and the output voltage can only recover when the MOSFET conducts again.

[0066] To solve the above technical problems, the embodiments of the present application provide an ideal diode circuit and a vehicle. The ideal diode circuit provided by the embodiments of the present application will be described in detail below with reference to the accompanying drawings through some embodiments and their application scenarios.

[0067] Figure 1 The module structure diagram of the ideal diode circuit provided by an embodiment of the present application is shown. The ideal diode circuit includes a transistor M1, a driving module 10, a boosting module 20, and a logic control module 30.

[0068] The first end of the transistor M1 can be used as the anode of the ideal diode circuit, the second end of the transistor M1 can be used as the cathode of the ideal diode circuit, and the control end of the transistor M1 can receive the control signal output by the driving module 10 and switch between the conducting state and the cut-off state according to the received control signal.

[0069] The driving module 10 includes a first input terminal, a second input terminal, and an output terminal. The first input terminal of the driving module 10 is connected to the first end of the transistor M1. The second input terminal of the driving module 10 can be connected to the second end of the transistor M1 through a reference voltage source Vref. The output terminal of the driving module 10 is connected to the control end of the transistor M1. The voltage at the first end of the transistor M1 can be Va, and the voltage at the second end of the transistor M1 can be Vc. Then, the voltage across the two ends of the transistor M1 can be Vac.

[0070] The above reference voltage source Vref can maintain the voltage difference across its two ends as a stable reference voltage Vref. That is, when the voltage at the second end of the transistor M1 is Vc, the voltage at the second input terminal of the driving module 10 is Vc + Vref. The two ends of the reference voltage source Vref are respectively connected to the second input terminal of the driving module 10 and the second end of the transistor M1. That is, the voltage signal provided by the reference voltage source Vref to the second input terminal of the driving module 10 and the voltage at the second end of the transistor M1 have a voltage difference of Vref.

[0071] The driving module 10 can compare the magnitudes of the voltages at the two input terminals and output a corresponding driving signal according to the comparison result to drive the transistor M1 to conduct or cut off. For example, when the driving module 10 compares and obtains that the voltage at the first input terminal is higher than the voltage at the second input terminal, the driving module 10 can output a conduction signal to increase the conduction amplitude of the transistor M1, and finally make the voltage at the first input terminal consistent with the voltage at the second input terminal, or the transistor M1 reaches the saturation conduction state.

[0072] The voltage at the first input terminal of the driving module 10 is the voltage at the first end of the transistor M1, that is, the anode voltage Va of the ideal diode circuit. The voltage at the second input terminal of the driving module 10 is the sum of the voltage at the second end of the transistor M1 and the reference voltage Vref, that is, the sum of the cathode voltage Vc of the ideal diode circuit and the reference voltage Vref. When the voltage at the first input terminal is consistent with the voltage at the second input terminal, it is equivalent to that the voltage difference Vac between the anode and cathode of the ideal diode circuit is consistent with the reference voltage Vref. At this time, the transistor M1 is in the conduction state.

[0073] The above-mentioned driving module 10 can be an operational amplifier, which can act as an integrating circuit and adjust the magnitude of the output voltage according to the voltage magnitudes at the non-inverting input terminal and the inverting input terminal. Taking the transistor M1 as an N-channel MOSFET as an example, the first input terminal of the driving module 10 is the non-inverting input terminal of the operational amplifier, and the second input terminal of the driving module 10 is the inverting input terminal of the operational amplifier. In the time interval when the voltage at the non-inverting input terminal is greater than the voltage at the inverting input terminal, it indicates that the voltage difference across the transistor M1 is greater than the reference voltage Vref. At this time, the operational amplifier can continuously increase the magnitude of the output voltage to increase the gate voltage received by the transistor M1. When the transistor M1 operates in the constant current region, as the gate voltage increases, the drain voltage will also continuously increase, that is, the voltage at the second terminal of the transistor M1 will continuously rise, thereby reducing the voltage difference between the non-inverting input terminal and the inverting input terminal until the transistor M1 reaches the saturation conduction state or the voltages at the non-inverting input terminal and the inverting input terminal are the same.

[0074] Correspondingly, in the time interval when the voltage at the inverting input terminal is greater than the voltage at the non-inverting input terminal, it indicates that the voltage difference across the transistor M1 is less than the reference voltage Vref. At this time, the operational amplifier can continuously reduce the magnitude of the output voltage to reduce the gate voltage received by the transistor M1. When the transistor M1 operates in the constant current region, as the gate voltage decreases, the drain voltage will also continuously decrease. When the voltage at the second terminal of the transistor M1 continuously decreases, the voltage at the inverting input terminal will also decrease synchronously, thereby reducing the voltage difference between the non-inverting input terminal and the inverting input terminal until the voltages at the non-inverting input terminal and the inverting input terminal are the same.

[0075] The driving module 10 can adjust the voltage output to the gate of the transistor M1 according to the voltages received at the two input terminals respectively, so as to control the voltage at the second terminal of the transistor M1, thereby keeping the voltage difference between the first terminal and the second terminal of the transistor M1 stable.

[0076] The boost module 20 includes two input terminals, which are respectively connected to the first terminal of the transistor M1 and the second terminal of the transistor M1. The output terminal of the boost module 20 is connected to the power supply terminal of the driving module 10. The voltage Vac across the two terminals of the transistor M1 can be used as the input voltage of the boost module 20, and the boost module 20 can perform multi-stage boosting on this input voltage to obtain the driving voltage of the driving module 10.

[0077] When the boost module 20 boosts the input voltage, in order to avoid excessive voltage drop across the transistor M1 during conduction and thus generate large power losses, the reference voltage of the reference voltage source Vref is usually set so that the voltage difference across the two ends of the transistor M1 during conduction remains at the level of dozens of millivolts. However, if the drive module 10 is to provide a gate voltage for the gate of the transistor M1, the required power supply voltage needs to reach several hundred millivolts. Therefore, when the floating diode is not grounded, if the drive module 10 is to be powered, the voltage difference across the two ends of the transistor M1 needs to be boosted. Since the boost ratio required to boost from dozens of millivolts to several hundred millivolts is usually dozens of times, if more than ten times of boost is achieved only through one-stage boost, it has high requirements for the number of devices and the module volume in the boost module 20, which will affect the overall cost and volume of the circuit. Therefore, through the multi-stage boost method, the number of devices and the module volume in the boost module 20 can be reduced.

[0078] The input end of the logic control module 30 can be connected to the output end of the boost module 20, and the output end of the logic control module 30 is connected to the control end of the boost module 20. The logic control module 30 can detect the voltage output by the boost module 20. When the voltage output by the boost module 20 is lower than a preset first threshold, the logic control module 30 can send a start signal to the boost module 20 to enable the boost module 20 to start the boost function and perform multi-stage boost on the voltage across the two ends of the transistor M1 to obtain the drive voltage of the drive module 10. When the drive module 10 receives the drive voltage, it can provide a drive signal for the gate of the transistor M1 to drive the transistor M1 to conduct.

[0079] As an optional implementation manner, taking the transistor M1 as an N-channel MOSFET as an example, the first end, the second end and the control end of the transistor M1 are respectively the source, the drain and the gate of the N-channel MOSFET. Among them, the N-channel MOSFET also includes a body diode, the anode of the body diode is connected to the source, and the cathode is connected to the drain.

[0080] At the moment of power-on, a positive voltage is applied between the anode and the cathode of the ideal diode circuit. At this time, each module has not started to work, the MOSFET is in the cut-off state, and the body diode of the MOSFET conducts. Since the body diode is an ordinary diode, the conduction voltage drop is usually about 0.7V. At this time, the voltage between the first end and the second end of the MOSFET is the conduction voltage drop of the body diode, that is, Vac = Va - Vc = Vsd; where Vsd is the forward conduction voltage of the MOSFET body diode.

[0081] The reference voltage Vref provided by the reference voltage source Vref is usually a relatively small voltage. Taking the reference voltage Vref as 30 mV as an example, since the first input terminal of the driving module 10 is connected to the first terminal of the MOSFET, and the second input terminal of the driving module 10 is connected to the second terminal of the MOSFET through the reference voltage source Vref. When the MOSFET is cutoff, it can be determined that the voltage at the first input terminal of the driving module 10 is Va, and the voltage at the second input terminal of the driving module 10 is Va - Vsd + Vref. At this time, the voltage at the first input terminal of the driving module 10 is higher than that at the second input terminal, and the driving module 10 can continuously increase the voltage output to the gate of the MOSFET. As the gate voltage received by the MOSFET continuously increases, the conduction amplitude of the MOSFET also continuously increases, thereby causing the drain voltage of the MOSFET to gradually rise. Eventually, the voltage Vac across the two ends of the MOSFET is made consistent with Vref, or the MOSFET is in a saturated conduction state.

[0082] When the boost module 20 is not started, it does not boost the voltage across the two ends of the transistor M1. Then the driving voltage output to the driving module 10 at this time is the voltage across the two ends of the transistor M1. That is, Vdr = Vac. At this time, the MOSFET is not conducting, but the first end and the second end of the transistor M1 are connected through the body diode. At this time, the voltage Vac across the two ends of the transistor M1 is the forward conduction voltage drop of the body diode. Since Vac is relatively large at this time and can reach 0.7 V - 1.1 V, even if Vac is not boosted, it can supply power to the driving module 10. At this time, the voltage at the first input terminal of the driving module 10 is higher than that at the second input terminal, and the driving module 10 will increase the voltage output to the gate of the MOSFET, thereby increasing the drain voltage of the MOSFET.

[0083] During the process of the drain voltage of the MOSFET gradually rising, the source-drain voltage difference of the MOSFET gradually decreases, that is, the voltage difference across the two ends of the transistor M1 gradually decreases. At this time, the logic control module 30 can obtain the output voltage of the boost module 20 and compare it with the first threshold. When the voltage difference across the two ends of the transistor M1 continuously decreases until it is lower than the first threshold, the logic control module 30 can determine that the voltage Vac across the two ends of the transistor M1 is lower than the first threshold, indicating that the voltage between the first end and the second end of the MOSFET has decreased from about 0.7 V to a relatively small voltage. At this time, this voltage cannot directly serve as the driving voltage of the driving module 10, and the boost module 20 needs to perform multi-stage boosting on the voltage across the two ends of the transistor M1 before it can output a driving voltage that meets the operation of the driving module 10. That is, when the logic control module 30 determines that the voltage output by the boost module 20 is lower than the first voltage threshold, it can send a start signal to the boost module 20 to enable the boost module 20 to start the multi-stage boosting function.

[0084] The boost module 20 includes multiple boost units, which can perform multi-stage boosting on the voltage across the transistor M1. Taking the two-stage boosting implemented by the boost module 20 as an example, after the voltage across the transistor M1 undergoes the first-stage boosting, the voltage across the transistor M1 can be boosted to an intermediate voltage. After this intermediate voltage undergoes the second-stage boosting, a driving voltage Vdr that meets the operating requirements of the driving module 10 can be finally obtained, and the driving voltage Vdr is output to supply power to the driving module 10, so that the driving module 10 can maintain the MOSFET in the conducting state.

[0085] After the logic control module 30 sends a start signal to the boost module 20, the boost module 20 can perform multi-stage boosting on the voltage across the transistor M1 to obtain the driving voltage Vdr.

[0086] During the process of the driving module 10 gradually driving the MOSFET to conduct, there are two situations. The first situation is that the voltages received by the two input terminals of the driving module 10 are the same. At this time, the voltage difference between the first terminal and the second terminal of the MOSFET is the reference voltage Vref provided by the reference voltage source Vref. Since the reference voltage Vref is lower than the first threshold, at this time, the logic control module 30 will detect that the voltage Vac across the MOSFET is lower than the first threshold and continuously send a start signal to the boost module 20. When the boost module 20 receives the start signal, it can perform multi-stage boosting on the voltage across the transistor M1 to obtain the driving voltage Vdr. Under the power supply of the driving voltage Vdr, the driving module 10 can continue to stably output a control signal to maintain the stable conduction of the MOSFET.

[0087] In the second case, the control voltage provided by the driving module 10 to the gate of the MOSFET causes the MOSFET to enter the saturation conduction state. At this time, the voltage difference between the first end and the second end of the MOSFET is greater than the reference voltage Vref. Since when the voltage Vac across the two ends of the MOSFET is the same as the reference voltage Vref, the driving voltage Vdr that meets the operating requirements of the driving module 10 can be obtained through multiple-stage boosting. When the voltage Vac across the two ends of the MOSFET is greater than the reference voltage Vref, the driving voltage Vdr output to the driving module 10 after multiple-stage boosting will not be lower than the driving voltage Vdr when the voltage Vac across the two ends is the same as the reference voltage Vref, and can meet the operating requirements of the driving module 10. That is, in the two cases where the driving module 10 drives the MOSFET to gradually conduct, whether the voltage difference between the first end and the second end of the MOSFET decreases from about 0.7V to the reference voltage Vref, or the MOSFET enters the saturation conduction state during the process of the voltage difference between the first end and the second end of the MOSFET decreasing, the boosting module 20 can output the driving voltage Vdr to supply power to the driving module 10, so that the driving module 10 can drive the MOSFET to maintain stable conduction, thereby realizing the stable conduction of the ideal diode circuit.

[0088] In this embodiment, by setting the driving module 10, the boosting module 20, and the logic control module 30, the logic control module 30 can detect the voltage output by the boosting module 20. When the boosting module 20 is not working, the voltage output by the boosting module 20 is the voltage Vac across the two ends of the transistor M1. When the voltage Vac across the two ends of the transistor M1 is lower than the first threshold, the logic control module 30 can send a start signal to the boosting module 20, so that after the boosting module 20 performs multiple-stage boosting on the relatively low voltage Vac across the two ends of the transistor M1, the driving voltage Vdr that can supply power to the driving module 10 is obtained. Under the power supply of the driving voltage Vdr, the driving module 10 can output a corresponding control signal to the control end of the transistor M1 according to the voltage difference between the two input ends to maintain the stable conduction of the transistor M1.

[0089] Please refer to Figure 2 , in some embodiments, the above-mentioned boosting module 20 may include a first-stage boosting unit 21 and a second-stage boosting unit 22.

[0090] The two input ends of the first-stage boosting unit 21 are respectively connected to the first end and the second end of the transistor M1. The first-stage boosting unit 21 can boost the voltage Vac across the two ends of the transistor M1 by a first magnification.

[0091] The two input ends of the second - stage boost unit 22 are respectively connected to the output end of the first - stage boost unit 21 and the second end of the transistor M1, and the output end of the second - stage boost unit 22 is connected to the power - supply end of the driving module 10. The second - stage boost unit 22 can boost the output voltage of the first - stage boost unit 21 by a second magnification factor.

[0092] After the first - stage boost unit 21 and the second - stage boost unit 22 perform two - stage boosting in sequence, the voltage Vac across the two ends of the original transistor M1 can be boosted in two stages, and the total boost magnification factor is the product of the first magnification factor and the second magnification factor. Through two - stage boosting, a voltage of dozens of millivolts can be boosted to hundreds of millivolts, so that when the voltage Vac across the two ends of the transistor M1 is relatively small, a driving voltage Vdr that meets the operation requirements of the driving module 10 can be generated.

[0093] In some embodiments, the above - mentioned first - stage boost unit 21 may include a plurality of first capacitors C1, and the second - stage boost unit 22 may include an output capacitor Cout and a plurality of second capacitors C2. A single boost cycle of the boost module 20 may include a first stage and a second stage.

[0094] In the first stage of a single cycle of the boost module 20, the first - stage boost unit 21 can connect the two ends of each first capacitor C1 to the two input ends of the first - stage boost unit 21 respectively, so as to charge each first capacitor C1 through the voltage Vac across the two ends of the transistor M1. After the charging is completed, the voltage across the two ends of each first capacitor C1 is the voltage Vac across the two ends of the transistor M1.

[0095] The second - stage boost unit 22 can connect a plurality of second capacitors C2 in series in sequence, and connect the series - connected plurality of second capacitors C2 in parallel with the output capacitor Cout. At this time, the series - connected plurality of second capacitors C2 can charge the output capacitor Cout. Due to the characteristic that the voltage across the two ends of a capacitor cannot change suddenly, when the voltage across the two ends of each second capacitor C2 is fixed, if a plurality of second capacitors C2 are connected in series, the total voltage of the series - connected plurality of second capacitors C2 is the sum of the voltages across the two ends of each second capacitor C2.

[0096] In the second stage, the first - stage boost unit 21 can connect a plurality of first capacitors C1 in series in sequence. Since the voltage across the two ends of each first capacitor C1 after charging in the first stage is the voltage Vac across the two ends of the transistor M1, when a plurality of first capacitors C1 are connected in series in sequence, the total voltage of the plurality of first capacitors C1 is the product of the number of first capacitors C1 and the voltage Vac across the two ends of the transistor M1.

[0097] Multiple first capacitors C1 after being connected in series can be respectively connected to each second capacitor C2 to charge each second capacitor C2 through the multiple first capacitors C1 after being connected in series. After each second capacitor C2 is charged, the voltage across both ends of each second capacitor C2 is the total voltage of the multiple first capacitors C1, that is, the voltage across both ends of each second capacitor C2 is the product of the number of first capacitors C1 and the voltage Vac across both ends of the transistor M1.

[0098] In the first stage of the next boost cycle, the first-stage boost unit 21 recharges each first capacitor C1 through the voltage Vac across both ends of the transistor M1, and the second-stage boost unit 22 connects the multiple second capacitors C2 in series in sequence. At this time, the total voltage of the multiple second capacitors C2 after being connected in series is the product of the number of second capacitors C2, the number of first capacitors C1, and the voltage Vac across both ends of the transistor M1.

[0099] As an exemplary embodiment, take the number of first capacitors C1 as n1 and the number of second capacitors C2 as n2 for example. When each first capacitor C1 is charged through the voltage Vac across both ends of the transistor M1, the voltage across both ends of each first capacitor C1 is Vac. When the multiple first capacitors C1 are connected in series, the total voltage of the multiple first capacitors C1 is the product of the number of first capacitors C1 and the voltage Vac across both ends of the transistor M1, that is, n1*Vac. When each second capacitor C2 is charged through the multiple first capacitors C1 after being connected in series, the voltage across both ends of each second capacitor C2 is the same as the total voltage of the multiple first capacitors C1, that is, the voltage across both ends of each second capacitor C2 is n1*Vac.

[0100] When the multiple second capacitors C2 are connected in series in sequence to charge the output capacitor Cout, the total voltage of the multiple second capacitors C2 is the product of the number of second capacitors C2 and the voltage across both ends of the second capacitor C2, that is, n2*n1*Vac. Therefore, after two-stage boosting, the boosting ratio of the output voltage of the boost module 20 is the product of the first ratio of the first-stage boost unit 21 and the second ratio of the second-stage boost unit 22.

[0101] Please refer to Figure 3 , in some embodiments, the above first-stage boost unit 21 may include n1 first capacitors C1, 2n1 first switches S1, and (n1 - 1) second switches S2.

[0102] n1 can be a positive integer greater than or equal to 2, that is, the first ratio of the first-stage boost unit 21 is greater than or equal to 2.

[0103] Among n1 first capacitors C1, the first end of each first capacitor C1 is connected to the first end of the transistor M1 through a corresponding first switch S1, and the second end of each first capacitor C1 is connected to the second end of the transistor M1 through a corresponding first switch S1. At this time, each first capacitor C1 corresponds to two first switches S1, so a total of 2n1 first switches S1 are required for n1 first capacitors C1.

[0104] Among n1 first capacitors C1, every two adjacent first capacitors C1 can be connected in series through a second switch S2. Then, a total of (n1 - 1) second switches S2 are required to connect n1 first capacitors C1 in series in sequence.

[0105] In the first stage of a single boost cycle, the first switch S1 is in the conducting state, and the second switch S2 is in the off state. At this time, both ends of each first capacitor C1 are respectively connected to both ends of the transistor M1, and each adjacent first capacitor C1 is disconnected from each other. At this time, the voltage Vac across both ends of the transistor M1 can be used to charge each first capacitor C1 so that the voltage across both ends of each first capacitor C1 reaches the voltage Vac across both ends of the transistor M1.

[0106] In the second stage of a single boost cycle, the second switch S2 is in the conducting state, and the first switch S1 is in the off state. At this time, n1 first capacitors C1 are connected in series in sequence, and each first capacitor C1 is disconnected from both ends of the transistor M1. Due to the characteristic that the voltage across a capacitor cannot change suddenly, the total voltage of the series-connected n1 first capacitors C1 is the sum of the voltages across both ends of the n1 first capacitors C1, that is, n1 * Vac.

[0107] Please refer to Figure 4 , in another implementation, the first-stage boost unit 21 can adopt a device-saving setting method. At this time, the first-stage boost unit 21 can include (n1 - 1) first capacitors C1, 2(n1 - 1) first switches S1, and (n1 - 1) second switches S2.

[0108] n1 can be a positive integer greater than or equal to 2, that is, the first magnification of the first-stage boost unit 21 is greater than or equal to 2.

[0109] When n1 is 2, the first-stage boost unit 21 only includes 1 first capacitor C1, 2 first switches S1, and 1 second switch S2. The first end of this first capacitor C1 is connected to the first end of the transistor M1 through 1 first switch S1, and the second end of this first capacitor C1 is connected to the second end of the transistor M1 through another first switch S1.

[0110] When the first - stage boost unit 21 includes only one first capacitor C1, there are no two adjacent first capacitors C1. At this time, the second terminal of the first capacitor C1 is connected to the first terminal of the transistor M1 through one second switch S2.

[0111] In the first stage of a single boost cycle, the first switch S1 is in the conducting state and the second switch S2 is in the off state. At this time, the voltage Vac across the two terminals of the transistor M1 can be used to charge the only first capacitor C1, so that the voltage across the two terminals of the first capacitor C1 reaches the voltage Vac across the two terminals of the transistor M1.

[0112] In the second stage of a single boost cycle, the second switch S2 is in the conducting state and the first switch S1 is in the off state. At this time, the second switch S2 conducts, connecting the second terminal of the first capacitor C1 to the first terminal of the transistor M1. Since the first switch S1 connected to the second terminal of the first capacitor C1 is in the off state, the voltage at the second terminal of the first capacitor C1 is pulled up from the voltage Vc at the second terminal of the transistor M1 to the voltage Va at the first terminal of the transistor M1, and the amplitude by which the voltage at the second terminal of the first capacitor C1 is pulled up is Vac. Since the voltage across the two terminals of the first capacitor C1 cannot change suddenly, the voltage at the first terminal of the first capacitor C1 is also pulled up by Vac, so that the voltage at the first terminal of the first capacitor C1 is 2 times Vac relative to the reference voltage (i.e., the voltage Vc at the second terminal of the transistor M1). That is to say, by setting one first capacitor C1, 2 - fold voltage boost can be achieved.

[0113] When n1 is a positive integer greater than 2, the first terminals of (n1 - 1) first capacitors C1 are respectively connected to the first terminal of the transistor M1 through the corresponding (n1 - 1) first switches S1, and the second terminals of (n1 - 1) first capacitors C1 are respectively connected to the second terminal of the transistor M1 through the corresponding (n1 - 1) first switches S1.

[0114] Among the (n1 - 1) first capacitors C1, every two adjacent first capacitors C1 can be connected in series through one second switch S2. Then, a total of (n1 - 1 - 1) second switches S2 are required to connect the (n1 - 1) first capacitors C1 in series in sequence. The second terminal of the last first capacitor C1 among the (n1 - 1) first capacitors C1 can be connected to the first terminal of the transistor M1 through one second switch S2.

[0115] In the first stage of a single boost cycle, the first switch S1 is in the conducting state and the second switch S2 is in the off state. At this time, the voltage Vac across the two terminals of the transistor M1 can be used to charge the (n1 - 1) first capacitors C1, so that the voltages across the two terminals of the (n1 - 1) first capacitors C1 reach the voltage Vac across the two terminals of the transistor M1.

[0116] In the second stage of a single boost cycle, the second switch S2 is in the conducting state and the first switch S1 is in the off state. At this time, when the second switch S2 conducts, (n1 - 1) first capacitors C1 are connected in series in sequence. Based on the characteristic that the voltage across the capacitor cannot change suddenly, the voltage difference across the (n1 - 1) first capacitors C1 is (n1 - 1)*Vac. Also, since when the second switch S2 conducts and the first switch S1 is off, the second terminal of the last first capacitor C1 among the (n1 - 1) first capacitors C1 is switched to be connected to the first terminal of the transistor M1, at this time the voltage of the second terminal of the last first capacitor C1 is lifted by Vac, then the voltage of the first terminal of the first first capacitor C1 among the (n1 - 1) first capacitors C1 is lifted by (n1 - 1)*Vac + Vac = n1*Vac. At this time, by setting (n1 - 1) first capacitors C1, n1 - fold voltage boost can be achieved.

[0117] Please refer to Figure 5 , in some embodiments, the above-mentioned second-stage boost unit 22 may include n2 second capacitors C2, 2n2 - 1 second switches S2, an output capacitor Cout, and n2 first switches S1.

[0118] n2 can be a positive integer greater than or equal to 2, that is, the second magnification factor of the second-stage boost unit 22 is greater than or equal to 2.

[0119] Among the n2 second capacitors C2, the first terminal of each second capacitor C2 is connected to the output terminal of the first-stage boost unit 21 through the corresponding second switch S2. For example, in the embodiment where the above-mentioned first-stage boost unit 21 includes multiple first capacitors C1, the output terminal of the first-stage boost unit 21 may be the first terminal of the first first capacitor C1 among the multiple first capacitors C1. Among the n2 second capacitors C2, the second terminals of the first (n2 - 1) second capacitors C2 are respectively connected to the second terminal of the transistor M1 through the corresponding (n2 - 1) second switches S2, and the second terminal of the last second capacitor C2 may be directly connected to the second terminal of the transistor M1.

[0120] The first (n2 - 1) second capacitors C2 correspond to two second switches S2, and the last second capacitor C2 corresponds to one second switch S2, so the n2 second capacitors C2 altogether correspond to 2n2 - 1 second switches S2.

[0121] The first terminal of the output capacitor Cout is connected to the power supply terminal of the drive module 10, and the second terminal of the output capacitor Cout is connected to the second terminal of the transistor M1.

[0122] Among the n2 second capacitors C2, every two adjacent second capacitors C2 are connected in series through a first switch S1. A total of (n2 - 1) first switches S1 are required. Among the n second capacitors C2, the first end of the first first capacitor C1 is connected to the first end of the output capacitor Cout through 1 first switch S1. That is, a total of n2 first switches S1 are required.

[0123] In the first stage of a single boost cycle, the first switch S1 is in the conducting state and the second switch S2 is in the off state. The first switches S1 between the multiple second capacitors C2 are conducting, enabling the multiple second capacitors C2 to be connected in series in sequence, and the series-connected multiple second capacitors C2 can charge the output capacitor Cout, causing the voltage across the two ends of the output capacitor Cout to reach the total voltage of the series-connected multiple second capacitors C2.

[0124] In the second stage of a single boost cycle, the second switch S2 is in the conducting state and the first switch S1 is in the off state. Each second capacitor C2 can be respectively connected to the output terminal of the first-stage boost unit 21, and the first-stage boost unit 21 can charge each second capacitor C2 individually, causing the voltage across the two ends of each second capacitor C2 to reach the total output voltage of the first-stage boost unit 21, that is, n1 * Vac.

[0125] In the first stage of the next boost cycle, when the n2 second capacitors C2 are connected in series, the total voltage after series connection is the sum of the voltages across the two ends of the n2 second capacitors C2, that is, n2 * n1 * Vac. Therefore, the maximum voltage of the output capacitor Cout can reach n2 * n1 times the voltage Vac across the two ends of the transistor M1, thereby realizing two-stage boosting of the voltage Vac across the two ends of the transistor M1.

[0126] Please refer to Figure 6 , in some embodiments, the above-mentioned logic control module 30 may include a threshold comparison unit 31 and a logic signal unit 32.

[0127] The threshold comparison unit 31 can obtain the driving voltage output by the boost module 20 and output a first signal or a second signal according to the driving voltage output by the boost module 20.

[0128] The logic signal unit 32 is connected to the output terminal of the threshold comparison unit 31. When the logic signal unit 32 receives the first signal, it can send a start signal to the boost module 20. This start signal can be a first clock signal and a second clock signal output alternately.

[0129] Figure 7 Shows a signal timing diagram of the first clock signal and the second clock signal, where clk1 is the first clock signal and clk2 is the second clock signal.

[0130] The first clock signal can drive the first switch S1 in the above-mentioned first-stage boost unit 21 and second-stage boost unit 22 to conduct, and the second clock signal can drive the second switch S2 in the first-stage boost unit 21 and second-stage boost unit 22 to conduct.

[0131] When the first clock signal is at an effective level, it can drive the first-stage boost unit 21 to connect both ends of each first capacitor C1 to the two input ends of the first-stage boost unit 21 respectively, and drive the second-stage boost unit 22 to connect a plurality of second capacitors C2 in series in sequence, and connect the series-connected plurality of second capacitors C2 in parallel with the output capacitor Cout.

[0132] When the second clock signal is at an effective level, it can drive the first-stage boost unit 21 to connect a plurality of first capacitors C1 in series in sequence, and drive the second-stage boost unit 22 to connect the series-connected plurality of first capacitors C1 to each second capacitor C2 respectively.

[0133] In some embodiments, the above-mentioned logic signal unit 32 can also send a shutdown signal to the boost module 20 when receiving the second signal. The shutdown signal can drive the first switch S1 and the second switch S2 in the first-stage boost unit 21 and the second-stage boost unit 22 to both disconnect. At this time, when the boost module 20 receives the shutdown signal, it can stop multi-stage boosting and directly output Vac as the output voltage Vout.

[0134] In some embodiments, the above-mentioned logic control module 30 can further include a clock unit 33.

[0135] The clock unit 33 can be connected to the logic signal unit 32 to output a clock signal to the logic signal unit 32.

[0136] The logic signal unit 32 can alternately output the first clock signal or the second clock signal according to the clock signal. That is, when the logic signal unit 32 obtains the rising edge or falling edge of the clock signal unit, it can switch the second clock signal to the first clock signal or switch the first clock signal to the second clock signal.

[0137] Please continue to refer to Figure 6 In some embodiments, the above-mentioned threshold comparison unit 31 can include a voltage division circuit 311 and a comparator Comp.

[0138] The first end of the voltage division circuit 311 is connected to the output end of the boost module 20, and the second end of the voltage division circuit 311 is connected to the second end of the transistor M1. The voltage division circuit 311 can include a pull-up resistor R1 and a pull-down resistor R2, and the pull-up resistor R1 and the pull-down resistor R2 can divide the voltage Vac at both ends of the transistor M1.

[0139] Comparator Comp may include a first comparison terminal, a second comparison terminal, and a comparison output terminal. The first comparison terminal is connected to the voltage division terminal of the voltage division circuit 311, the second comparison terminal is connected to the comparison voltage source, and the comparison output terminal is connected to the logic signal unit 32. Among them, the comparison voltage source can provide a reference comparison voltage.

[0140] The voltage division terminal of the voltage division circuit 311 is the common node of the pull-up resistor R1 and the pull-down resistor R2. The comparator Comp can obtain the voltage after voltage division by the voltage division circuit 311, and compare the voltage division voltage with the reference comparison voltage provided by the comparison voltage source.

[0141] When the voltage division voltage is relatively high, the comparator Comp can output a second signal. After the voltage division voltage drops below the critical value of the comparator Comp, the comparator Comp can flip the second signal to the first signal. After the voltage division voltage rises above the critical value of the comparator Comp, the comparator Comp can flip the first signal to the second signal.

[0142] In some embodiments, the above comparator Comp may be a hysteresis comparator. The hysteresis comparator may include a first comparison value and a second comparison value. Among them, the first comparison value is less than the second comparison value.

[0143] When the comparator Comp has only one comparison value, if the voltage division voltage of the voltage division circuit 311 fluctuates near this comparison value, it will cause the output signal of the comparator Comp to continuously flip, thus affecting the output control of the logic control module 30. Therefore, by selecting the comparator Comp as a hysteresis comparator, a first comparison value and a second comparison value can be obtained. The first comparison value is the lower comparison threshold, and the second comparison value is the higher comparison threshold. When the voltage division voltage output by the voltage division circuit 311 is lower than the first comparison value, the hysteresis comparator flips the second signal to the first signal; when the voltage division voltage output by the voltage division circuit 311 is higher than the second comparison value, the hysteresis comparator flips the first signal to the second signal.

[0144] It can be understood that the above first comparison value can correspond to the first threshold. That is, by setting the pull-up resistor and the pull-down resistor of the voltage division circuit 311, when the output voltage of the voltage division circuit 311 is lower than the first comparison value, it can be determined that the driving voltage Vdr output by the boost module 20 at this time is lower than the first threshold. Similarly, when the output voltage of the voltage division circuit 311 is higher than the second comparison value, it can be determined that the driving voltage Vdr output by the boost module 20 at this time is higher than the second threshold.

[0145] As an alternative embodiment, Figure 7A signal timing diagram of a first clock signal and a second clock signal is shown. A single boost cycle includes an active level of a first clock signal and an active level of a second clock signal. Among them, the active level interval of the first clock signal is the time for the voltage Vac across the transistor M1 to charge each first capacitor C1 and the time for a plurality of second capacitors C2 connected in series in sequence to charge the output capacitor Cout.

[0146] Taking the embodiment in which (n1 - 1) first capacitors C1 are arranged in the first - stage boost unit 21 as an example, in order to enable the voltage across each first capacitor C1 to reach the maximum voltage value within the active level interval of the first clock signal, the effective duration of the first clock signal should be set to be greater than 3 times the time constant when the voltage Vac across the transistor M1 charges each first capacitor C1. Similarly, in order to enable the output capacitor Cout to reach the maximum voltage value, the effective duration of the first clock signal should also be greater than 3 times the time constant when a plurality of second capacitors C2 connected in series in sequence charge the output capacitor Cout. Therefore, the effective duration t1 of the first clock signal should satisfy the following formula:

[0147]

[0148] Among them, r1 is the internal resistance of the first switch S1;

[0149] Similarly, in order to enable the voltage across each second capacitor C2 to reach the maximum voltage value within the active level interval of the second clock signal, the effective duration of the second clock signal should be greater than 3 times the time constant when a plurality of first capacitors C1 connected in series in sequence charge the second capacitor C2, that is, the effective duration t2 of the second clock signal should satisfy the following formula:

[0150]

[0151] Among them, r2 is the internal resistance of the second switch S2;

[0152] As an alternative embodiment, as Figure 5 shown, taking Vc as the reference voltage, among a plurality of first capacitors C1, the first - end voltage of the first first capacitor C1 is VC1E; among a plurality of second capacitors C2, the first - end voltage of the first second capacitor C2 is VC2E.

[0153] In the first boost cycle when the boost module 20 is started, in the first stage, all first switches S1 are turned on and all second switches S2 are turned off, and the first - end voltage of the first first capacitor C1 satisfies:

[0154] V C1E(0.5) = n1V;

[0155] Among them, V is the voltage Vac across the transistor M1;

[0156] The voltage at the first end of the output capacitor Cout satisfies:

[0157]

[0158] In the second stage of the first boost cycle, all the first switches S1 are turned off, and all the second switches S2 are turned on. The voltage at the first end of the first first capacitor C1 satisfies:

[0159]

[0160] The voltage at the first end of the first second capacitor C2 satisfies:

[0161]

[0162] In the first boost cycle, the total input energy satisfies:

[0163]

[0164] In the second boost cycle, in the first stage, there is:

[0165] V C1E(1.5) = n1V;

[0166]

[0167] In the second stage, there is:

[0168]

[0169]

[0170] In the second boost cycle, the total input energy satisfies:

[0171] According to the above corresponding relationship between V Cout(2) and V Cout(1) , let:

[0172]

[0173]

[0174] It can be obtained that:

[0175] V Cout(2) = k1 + k2V Cout(1) ;

[0176] It can be inferred that in the m-th boost cycle, there is:

[0177] VC1E(m-0.5) = n1V;

[0178]

[0179]

[0180]

[0181]

[0182] The output voltage of the m-th boost cycle is:

[0183]

[0184] The total energy input in the first m boost cycles is:

[0185]

[0186] After simplification, it can be obtained:

[0187]

[0188] When m approaches infinity, there is:

[0189]

[0190] That is, the maximum output voltage of the boost module 20 is n1 * n2 * Vac;

[0191] The total input energy is:

[0192]

[0193] As an implementation, the boost multiple of the above boost module 20 after two-stage boosting is n, and the boost multiple n satisfies:

[0194] n = n1n2;

[0195] Wherein, both n1 and n2 are positive integers greater than or equal to 2, then there is:

[0196]

[0197]

[0198] The capacitance values of the first capacitor C1, the second capacitor C2 and the output capacitor Cout satisfy:

[0199] C p = C1 = C2 < C out ;

[0200] That is, the capacitance values of the first capacitor C1 and the second capacitor C2 are equal, and the capacitance value of the output capacitor Cout is greater than that of the first capacitor C1.

[0201] Use the above formula to calculate the rising rate Vrise of the output voltage of the boost module 20, and the steps are as follows:

[0202] Substitute n = n1n2 into the above V Cout(m) to obtain:

[0203]

[0204] Let to obtain:

[0205] V Cout(m) = nV[1-(f(n2)) m-1 , m≥1;

[0206] At this time, the rising rate Vrise of the output voltage is:

[0207]

[0208] Since f'(n2) satisfies:

[0209]

[0210] it can be concluded that:

[0211]

[0212] That is, the rising rate of the output voltage decreases as the number n2 of the second capacitors C2 increases. Therefore, considering the rising rate of the output voltage, when n2 = 2, the rising rate of the output voltage of the boost module 20 is the largest.

[0213] Use the above formula to calculate the total input energy Ein(tot), and after arrangement, it can be obtained:

[0214]

[0215] That is, the total input energy Ein(tot) increases as the number n1 of the first capacitors C1 increases. When the energy of the output capacitor Cout remains unchanged, the smaller the total input energy, the smaller the system loss. Therefore, considering that the system loss should be as small as possible, the number n1 of the first capacitors C1 should be set to the minimum, that is, n1 = 2. The number n2 of the second capacitors C2 should be set to the maximum.

[0216] Based on the above Figure 5 embodiment in which the first-stage boost unit 21 shown includes (n1 - 1) first capacitors C1, the total number of the first switch S1 and the second switch S2 in the boost module 20 is:

[0217] num sw = 3(n1 + n2) - 4;

[0218] Wherein, the total number of the above-mentioned first capacitor C1 and second capacitor C2 (excluding the output capacitor Cout) is:

[0219] num cap = n1 + n2 - 1;

[0220] Based on n = n1n2, if we want to make num sw and num cap minimum, then n1 and n2 should satisfy:

[0221]

[0222] Based on the above analysis, it can be seen that when the boost multiple n is fixed, considering the output voltage rising rate, the number n2 of the second capacitor C2 should be as small as possible; considering the system loss as small as possible, the number n2 of the second capacitor C2 should be as large as possible; and considering the number of switching components and capacitors as small as possible, n1 and n2 should take equal values. That is to say, under different considerations, the number settings of the first capacitor C1 and the second capacitor C2 are contradictory and cannot be taken into account at the same time.

[0223] As an optional implementation manner, taking the optimization of the circuit structure as the main design consideration, the number of switches and capacitors in the circuit should be as small as possible. At this time, n1 in the first-stage boost unit 21 and n2 in the second-stage boost unit 22 take equal values. For example, when the boost multiple n is 16, n1 = n2 = 4 can be taken.

[0224] As an optional implementation manner, reference is made to Figure 8 and Figure 9 the implementation manners in two related technologies respectively. The implementation manners in the two related technologies are both single-stage boost. When the boost multiple is n, Figure 8 n first capacitors C1 are provided in Figure 9 while the last first capacitor C1 is omitted in

[0225] i.e., n - 1 first capacitors C1 are provided, and the second terminal of the (n - 1)th first capacitor C1 is connected to the first terminal of the transistor M1, and the voltage Va at the first terminal of the transistor M1 is used to realize voltage boost. Figure 8 As shown in

[0226]

[0227] The total input energy is:

[0228]

[0229] When m approaches infinity, there is:

[0230]

[0231]

[0232] As Figure 9 shown, the output voltage of the m-th boost cycle is:

[0233]

[0234] The total input energy is:

[0235]

[0236] When m approaches infinity, there is:

[0237]

[0238]

[0239] The circuit structure in the above embodiment is used for simulation experiments, and the experimental verification conditions are satisfied:

[0240] V = 30 mV; n = 16; C1 = 10 nF; C out = 100 nF;

[0241] The results of the simulation experiments are as Figure 10 shown, Figure 10 In it, curves ① to ⑤ are respectively the output voltage rise rate curves corresponding to setting n first capacitors C1 in the related art, setting n - 1 first capacitors C1 in the related art, setting n1 = 8 and n2 = 2 for two-stage boost in the embodiment of the present application, setting n1 = 4 and n2 = 4 for two-stage boost in the embodiment of the present application, and setting n1 = 2 and n2 = 8 for two-stage boost in the embodiment of the present application. Curves ① and ② are single-stage boost, and curves ③ to ⑤ are two-stage boost. By comparing curves ①② with curves ③④⑤, it can be seen that the rise rate of the output voltage is higher during single-stage boost and lower during two-stage boost. By comparing curves ③④⑤ with each other, it can be seen that the larger n1 is, the higher the rise rate of the output voltage is, which is consistent with the above analysis conclusion of the output voltage rise rate.

[0242] Figure 10The curves ⑥ to ⑩ therein are respectively the input total energy curves corresponding to setting n first capacitors C1 in the related art, setting n - 1 first capacitors C1 in the related art, setting n1 = 8 and n2 = 2 for two - stage boost in the embodiment of the present application, setting n1 = 4 and n2 = 4 for two - stage boost in the embodiment of the present application, and setting n1 = 2 and n2 = 8 for two - stage boost in the embodiment of the present application. By comparing curves ①② with curves ③④⑤, it can be seen that the total energy input during the single - stage boost process is relatively high, while the total energy input during the two - stage boost process is relatively low. Two - stage boost can reduce the input total energy and reduce system losses. By comparing curves ③④⑤ with each other, it can be seen that the larger n1 is, the higher the input total energy is. That is, in order to reduce system losses, n1 should be as small as possible and n2 should be as large as possible, which is consistent with the above - mentioned analysis conclusion of system losses.

[0243] Figure 11 It is a comparison schematic diagram of the simulation results under each circuit structure. Compared with the embodiment of single - stage boost, the number of capacitors and switches required in the embodiment of multi - stage boost is significantly reduced. And in the embodiment of multi - stage boost, when n1 and n2 are equal, the number of capacitors and switches required is the lowest, which is consistent with the above - mentioned analysis conclusion of the switch component and the number of capacitors. However, in the comparison of the rising rate of the output voltage, the circuit structure of multi - stage boost is generally slower than that of single - stage boost.

[0244] Figure 11 The input total energy Ein(tot) corresponding to each circuit structure is also shown therein. According to the input total energy of each embodiment, the input total energy of the circuit structure with multi - stage boost set in this embodiment is lower than that of the circuit structure with single - stage boost, thereby being able to reduce system losses.

[0245] The embodiment of the present application also provides a vehicle, which may include the ideal diode circuit in the above - mentioned embodiment.

[0246] The functional blocks shown in the above structural block diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application - specific integrated circuit (ASIC), appropriate firmware, a plug - in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine - readable medium or transmitted via a data signal carried in a carrier wave on a transmission medium or a communication link. "Machine - readable medium" can include any medium capable of storing or transmitting information. Examples of machine - readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD - ROMs, optical discs, hard disks, fiber optic media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, intranet, etc.

[0247] It should be noted that, in this document, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device.

[0248] Specific examples are used in this document to illustrate the principles and implementation manners of the present application. The description of the above examples is only for helping to understand the method and its core idea of the present application. The above are only optional implementation manners of the present application. It should be noted that due to the limited nature of literal expression and objectively infinite specific structures, for those of ordinary skill in the art, without departing from the principles of the present application, several improvements, refinements or changes can be made, or the above technical features can be combined in an appropriate manner; these improvements, refinements, changes or combinations, or directly applying the concept and technical solution of the present application to other occasions without improvement, shall all be regarded as the protection scope of the present application.

Claims

1. An ideal diode circuit, characterized in that, The ideal diode circuit includes: A transistor; A driving module, where a first input terminal of the driving module is connected to a first end of the transistor, a second input terminal of the driving module is connected to a second end of the transistor through a reference voltage source, and an output terminal of the driving module is connected to a control terminal of the transistor; wherein, the reference voltage source is used to maintain a reference voltage between the second input terminal of the driving module and the second end of the transistor; A boost module, two input terminals of the boost module are respectively connected to the first end and the second end of the transistor, and an output terminal of the boost module is connected to a power supply terminal of the driving module; the boost module is used to perform multi-stage boosting on the voltage across the transistor to obtain the driving voltage of the driving module; A logic control module, an input terminal of the logic control module is connected to an output terminal of the boost module, and an output terminal of the logic control module is connected to a control terminal of the boost module; the logic control module is used to send a start signal to the boost module when the voltage output by the boost module is lower than a first voltage threshold.

2. The ideal diode circuit according to claim 1, wherein The boost module includes: A first-stage boost unit, two input terminals of the first-stage boost unit are respectively connected to the first end and the second end of the transistor, and the first-stage boost unit is used to perform boosting on the voltage across the transistor at a first magnification; A second-stage boost unit, two input terminals of the second-stage boost unit are respectively connected to an output terminal of the first-stage boost unit and the second end of the transistor, and an output terminal of the second-stage boost unit is connected to a power supply terminal of the driving module, and the second-stage boost unit is used to perform boosting on the output voltage of the first-stage boost unit at a second magnification.

3. The ideal diode circuit according to claim 2, wherein The first-stage boost unit includes a plurality of first capacitors, and the second-stage boost unit includes an output capacitor and a plurality of second capacitors; a single boost cycle of the boost module includes a first stage and a second stage; In the first stage, the first-stage boost unit connects both ends of each of the first capacitors to the two input terminals of the first-stage boost unit respectively, so as to charge each of the first capacitors through the voltage across the transistor; the second-stage boost unit connects a plurality of the second capacitors in series in sequence, and connects the plurality of serially connected second capacitors in parallel with the output capacitor, so as to charge the output capacitor through the plurality of serially connected second capacitors; In the second stage, the first-stage boost unit connects a plurality of the first capacitors in series in sequence, and connects the plurality of serially connected first capacitors to each of the second capacitors respectively, so as to charge each of the second capacitors through the plurality of serially connected first capacitors.

4. The ideal diode circuit according to claim 3, characterized in that, The first-stage boost unit includes: n1 first capacitors, where n1 is a positive integer greater than or equal to 2; 2n1 first switches, a first end of each of the n1 first capacitors is respectively connected to the first end of the transistor through a corresponding one of the n1 first switches, and a second end of each of the n1 first capacitors is respectively connected to the second end of the transistor through a corresponding one of the n1 first switches; (n1 - 1) second switches, with adjacent two first capacitors connected in series through one of the second switches; In the first stage, the first switches are turned on and the second switches are turned off; in the second stage, the second switches are turned on and the first switches are turned off.

5. The ideal diode circuit according to claim 3, wherein The first - stage boost unit includes: (n1 - 1) first capacitors, where n1 is a positive integer greater than or equal to 2; 2(n1 - 1) first switches, the first ends of the n1 first capacitors are respectively connected to the first end of the transistor through the corresponding n1 first switches, and the second ends of the n1 first capacitors are respectively connected to the second end of the transistor through the corresponding n1 first switches; (n1 - 1) second switches, adjacent two first capacitors are connected in series through one of the second switches, and the second end of the last first capacitor among the (n1 - 1) first capacitors is connected to the first end of the transistor through one of the second switches; In the first stage, the first switches are turned on and the second switches are turned off; in the second stage, the second switches are turned on and the first switches are turned off.

6. The ideal diode circuit according to claim 3, wherein, The second - stage boost unit includes: n2 second capacitors, where n2 is a positive integer greater than or equal to 2; 2n2 - 1 second switches, the first ends of the n2 second capacitors are respectively connected to the output end of the first - stage boost unit through the corresponding n2 second switches, among the n2 second capacitors, the second ends of the first (n2 - 1) second capacitors are respectively connected to the second end of the transistor through the corresponding (n2 - 1) second switches, and the second end of the last second capacitor is connected to the second end of the transistor; An output capacitor, the first end of the output capacitor is connected to the power - supply end of the driving module, and the second end of the output capacitor is connected to the second end of the transistor; n2 first switches, adjacent two second capacitors are connected in series through one of the first switches, and the first end of the first second capacitor among the n2 second capacitors is connected to the first end of the output capacitor through one of the first switches; In the first stage, the first switches are turned on and the second switches are turned off; in the second stage, the second switches are turned on and the first switches are turned off.

7. The ideal diode circuit according to claim 3, wherein The logic control module includes: A threshold comparison unit, which is used to generate a first signal or a second signal according to the driving voltage output by the boost module; A logic signal unit, connected to the output end of the threshold comparison unit, and is used to send the start signal to the boost module when receiving the first signal; where the start signal includes an alternately output first clock signal and a second clock signal; The first clock signal is used to drive the first - stage boost unit to connect the two ends of each first capacitor to the two input ends of the first - stage boost unit respectively, and drive the second - stage boost unit to connect multiple second capacitors in series in sequence and connect the series - connected multiple second capacitors in parallel with the output capacitor; The second clock signal is used to drive the first - stage boost unit to sequentially connect a plurality of the first capacitors in series and drive the second - stage boost unit to connect the serially - connected plurality of the first capacitors to each of the second capacitors respectively.

8. The ideal diode circuit according to claim 7, wherein The threshold comparison unit includes: A voltage - dividing circuit, a first end of the voltage - dividing circuit is connected to an output end of the boost module, and a second end of the voltage - dividing circuit is connected to a second end of the transistor; A comparator, including a first comparison terminal, a second comparison terminal and a comparison output terminal, the first comparison terminal is connected to a voltage - dividing terminal of the voltage - dividing circuit, the second comparison terminal is connected to a comparison voltage source, and the comparison output terminal is connected to the logic signal unit; wherein, the comparison voltage source is used to provide a reference comparison voltage.

9. The ideal diode circuit according to claim 8, characterized in that, The comparator is a hysteresis comparator, and the hysteresis comparator includes a first comparison value and a second comparison value; the first comparison value is less than the second comparison value; The hysteresis comparator is configured to output the first signal when the voltage - dividing voltage of the voltage - dividing circuit is less than the first comparison value; and output the second signal when the voltage - dividing voltage of the voltage - dividing circuit is greater than the second comparison value.

10. The ideal diode circuit according to claim 7, characterized in that, The logic signal unit includes a first power supply terminal and a second power supply terminal, the first power supply terminal of the logic signal unit is connected to an output end of the boost module, and the second power supply terminal of the logic signal unit is connected to a second end of the transistor.

11. A vehicle, characterized in that, The vehicle includes the ideal diode circuit according to any one of claims 1 - 10.

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