Broadband radio frequency signal direct acquisition preprocessing device and method

Abstract

The invention belongs to the technical field of signal devices, and particularly relates to a broadband radio frequency signal direct acquisition preprocessing device and method. The device comprises a metal cavity shell, a power supply circuit and a control circuit, and a printed board is installed in the metal cavity shell. An amplitude limiter, a radio frequency switch, a low-pass filter, a first-stage low-noise amplifier, a first-stage preselection switch filter group, a first-stage temperature compensation attenuator, a preselection switch wave trap group, a first-stage numerical control attenuator, a second-stage amplifier, a second-stage temperature compensation attenuator and a second-stage numerical control attenuator are sequentially arranged on the printed board in the signal transmission direction. A third-stage temperature compensation attenuator, a third-stage amplifier, a third-stage numerical control attenuator, a fourth-stage amplifier, a second-stage preselection switch filter bank, a coupler and a detector. The invention provides a broadband radio frequency signal direct sampling preprocessing device and method. High-fidelity direct sampling and real-time processing of broadband radio frequency signals within the frequency band range of 30 MHz to 3000 MHz are achieved.

Description

Technical Field

[0001] The present invention belongs to the technical field of signal devices, and particularly relates to a broadband radio frequency signal direct sampling and preprocessing device and method. Background Art

[0002] Constrained by the domestic device development level, a superheterodyne architecture is mostly adopted when developing a wireless signal processing system, that is, a radio frequency receiver designed to perform analog-to-digital (ADC) conversion in the intermediate frequency (IF) frequency band. Although this receiver can reduce the signal processing capabilities and speed requirements of the digital signal processing part at the ADC backend, the traditional superheterodyne architecture broadband receiver has extremely high requirements for the complexity of the radio frequency signal front-end processing part, requiring multiple analog frequency conversion channels to process in parallel and multiple high-precision frequency sources as mixing local oscillator signals, resulting in high system volume and cost. Moreover, for the frequency conversion receiver with a superheterodyne architecture, limited by factors such as the nonlinearity of a large number of analog devices, it is difficult to achieve high performance in some indicators such as noise figure, in-band spurious suppression, image rejection, and two-tone dynamic range. The current mainstream architecture is to design a system based on the idea of software-defined radio (SDR), moving the digital processing work after the acquisition of radio frequency signals forward to the antenna end as much as possible, reducing the complexity of the front-end receiver as much as possible, and leveraging the digital signal processing capabilities of large-scale integrated circuit devices such as FPGA, DSP, CPU, and GPU at the backend. Additionally, it is more convenient and flexible to replace the functional payload and adapt to artificial intelligence (AI) algorithms such as machine learning (ML).

[0003] The invention patent with the application number 202210579584.7 discloses a radio frequency direct sampling ADC anti-aliasing tunable filter. The filter includes a tunable filter, a radio frequency variable gain amplifier, and an ADC input buffer; the output end of the tunable filter is connected to the input end of the radio frequency variable gain amplifier, and the output end of the radio frequency variable gain amplifier is connected to the input end of the ADC input buffer. The tunable filter adopts a six-stage Chebyshev type-II structure filter, and each stage of the Chebyshev type-II structure filter adopts an active LC filter architecture, and the zero points and poles of the corresponding filter are changed by changing the values of LC. This invention is mainly adjustable for signals with an intermediate frequency of 1.5 GHz and a bandwidth of 500 MHz to 1 GHz, meeting the anti-aliasing application requirements of a 2 GHz sampling high-speed ADC. However, this invention cannot complete the signal preprocessing function of the radio frequency signal direct sampling front end in the frequency band range of 30 MHz to 3000 MHz and is not applicable to the signal processing system with a broadband radio frequency direct sampling system.

[0004] The invention patent application No. 202311743874.1 discloses a radio frequency wide-open large-dynamic digital detection and receiving system and method. This invention directly samples the intermediate frequency signal with a large-dynamic ADC, reducing the requirements for the dynamic range of ultra-high-speed ADCs. It realizes the fast frequency hopping of the local oscillator signal through two high-speed DACs and a radio frequency wide-open switch, and realizes the swept-frequency acquisition within a wide frequency band by controlling the output frequency of the DAC through an FPGA. The expansion method is simple and effective. However, this invention cannot complete the preprocessing function of the direct sampling front end for radio frequency signals in the frequency band range of 30 MHz to 3000 MHz and is not applicable to signal processing systems with a direct sampling system for broadband radio frequency signals. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the purpose of the present invention is to provide a broadband radio frequency signal direct sampling preprocessing device and method, which solve the problems of high system complexity, high price, poor spurious suppression, limited dynamic range, and poor anti-interference ability in the existing superheterodyne technology system, and realize high-fidelity direct sampling and real-time processing of broadband radio frequency signals in the frequency band range of 30 MHz to 3000 MHz based on the software radio architecture.

[0006] The technical solution adopted by the present invention is as follows: A broadband radio frequency signal direct sampling preprocessing device includes a metal cavity housing, a power supply circuit, and a control circuit. A printed circuit board is installed inside the metal cavity housing. The power supply circuit and the control circuit are electrically connected to the printed circuit board respectively. Along the signal transmission direction on the printed circuit board, there are successively arranged a limiter, a radio frequency switch, a low-pass filter, a first-stage low-noise amplifier, a first-stage preselection switch filter bank, a first-stage temperature compensation attenuator, a preselection switch notch filter group, a first-stage digital control attenuator, a second-stage amplifier, a second-stage temperature compensation attenuator, a second-stage digital control attenuator, a third-stage temperature compensation attenuator, a third-stage amplifier, a third-stage digital control attenuator, a fourth-stage amplifier, a second-stage preselection switch filter group, a coupler, and a detector.

[0007] The present invention realizes the design of the preprocessing method for direct sampling of broadband radio frequency signals through a limiter, a radio frequency switch, a low-pass filter, a coupler, a detector, a preselection switch notch filter, a two-stage segmented preselection switch filter group, a three-stage temperature compensation attenuator, a three-stage digital control attenuator, a four-stage amplifier, a power supply circuit, and a control circuit. Through the preprocessing of broadband radio frequency signals before direct sampling in the frequency band range of 30 MHz to 3000 MHz, the present invention realizes relevant index requirements such as small noise coefficient, flat passband, large dynamic range, high gain, high harmonic suppression, and high in-band spurious suppression, laying a foundation for the development of the system under the radio frequency direct sampling system.

[0008] As a preferred embodiment of the present invention, the metal cavity housing includes an upper housing and a lower housing. The printed circuit board includes an upper printed circuit board and a lower printed circuit board. The upper printed circuit board is installed inside the upper housing, and the lower printed circuit board is installed inside the lower housing. A plurality of blind slots are provided at the edges of both the upper printed circuit board and the lower printed circuit board. A plurality of vias are provided at each blind slot, and a circular pad is provided at each via inside the blind slot. An intermediate connector is further provided inside the metal cavity housing. An upper connector is plugged into the upper side of the intermediate connector, and a lower connector is plugged into the lower side of the intermediate connector. The pin core of the upper connector is welded to the circular pad through the via from one side of the blind slot of the upper printed circuit board, and the pin core of the lower connector is welded to the circular pad through the via from one side of the blind slot of the lower printed circuit board.

[0009] As a preferred embodiment of the present invention, the power supply circuit includes a low dropout regulator and a power supply filter circuit. The low dropout regulator stabilizes the input voltage to the required voltage. The required voltage is divided into two paths and output to two groups of power supply filter circuits. The filtered power supplies respectively supply power to the upper printed circuit board and the lower printed circuit board. The power supplies of the upper printed circuit board and the lower printed circuit board are respectively divided into three paths for output. One path is regulated by the low dropout regulator to the voltage required by the radio frequency switch to supply power to the radio frequency switch. The other two paths are respectively supplied to the first-stage low-noise amplifier, the second-stage amplifier, the third-stage amplifier, and the fourth-stage amplifier after passing through the 3-stage LC filter circuit.

[0010] As a preferred embodiment of the present invention, the control circuit includes a serial-to-parallel converter and an isolation circuit. The serial-to-parallel converter converts the input several-bit serial signal into several-bit parallel signals, and the output parallel signals are output through the isolation circuit to control the radio frequency switch, the first-stage digital control attenuator, the second-stage digital control attenuator, and the third-stage digital control attenuator.

[0011] As a preferred embodiment of the present invention, the limiter adopts a GaAs MMIC limiter. The loss of the limiter is less than 0.4 dB, the flatness is less than 0.1 dB, and the standing wave of the input and output ports is less than 1.5. The limiter is connected to an external receiving antenna. The anti-burning power of the limiter is 5 W, and the limiting level is 16 dBm. The radio frequency switch adopts a COMS single-pole double-throw radio frequency switch. The loss of the radio frequency switch is less than 1 dB, and the standing wave of the input and output ports is less than 1.5. The radio frequency switch includes a common port and two shunt ports. One shunt port is connected to the previous-stage limiter, and the other shunt port is connected to the self-test source input port to switch the received radio frequency signal and the self-test signal. The low-pass filter adopts an LTCC low-pass filter, which suppresses frequencies above 4500 MHz. The insertion loss of the low-pass filter is less than 1 dB, and the stopband rejection is greater than 20 dBc. One port of the low-pass filter is connected to the common port of the RF switch to perform low-pass filtering on the received signal or the self-test signal. The first-stage low-noise amplifier adopts a GaAs MMIC amplifier with a gain of 22 dB and a noise figure of less than 2 dB. The input of the first-stage low-noise amplifier is connected to the output of the low-pass filter to perform low-noise amplification on the received signal or the self-test signal. The first-stage preselection switch filter bank includes N band-pass filters, covering the frequency band of 30 MHz to 3000 MHz. The filtering bandwidth of the N band-pass filters can be configured within the range of 30 MHz to 1000 MHz. The first-stage preselection switch filter bank adopts inductance-capacitance type filters, low-temperature co-fired ceramic filters or surface acoustic wave filters according to different RF frequency bands. The input end of the first-stage preselection switch filter bank is connected to the output of the first-stage low-noise amplifier to perform preliminary preselection and filtering on the low-noise amplified RF signal, forming N RF band-limited signals in different frequency bands and simultaneously filtering out the amplified harmonic interference signals. The attenuation of the first-stage temperature compensation attenuator is 3 dB, and the temperature coefficient of attenuation is 0.006 dB / °C. The first-stage temperature compensation attenuator performs amplitude temperature compensation on the RF signal after the first-stage preselection filter bank. The preselection switch notch filter bank includes a direct-through signal, a band-stop filter from 97 MHz to 108 MHz, and a band-stop filter from 935 MHz to 950 MHz. The preselection switch notch filter bank performs direct-through or segmented band-stop notch filtering on the signal after the first-stage temperature compensation attenuator. The first-stage digital control attenuator is a 1-bit 8 dB attenuator with an insertion loss of less than 2 dB and a flatness of less than 0.5 dB. The first-stage digital control attenuator is connected to the output end of the preselection switch notch filter bank to perform 8 dB attenuation adjustment on the RF signal output by the preselection switch notch filter bank according to the input control signal.

[0012] As a preferred solution of the present invention, the second-stage amplifier adopts a GaAs MMIC amplifier with a gain of 22 dB and a noise figure of less than 2 dB. The input of the second-stage amplifier is connected to the output of the first-stage digital control attenuator to amplify the RF signal after the first-stage digital control attenuator. The attenuation of the second-stage temperature compensation attenuator is 3 dB, and the temperature coefficient of attenuation is 0.006 dB / °C. The second-stage temperature compensation attenuator performs amplitude temperature compensation on the RF signal after the second-stage amplifier. The second-stage numerically controlled attenuator is a 1-bit 31dB attenuator, and the insertion loss of the second-stage numerically controlled attenuator is less than 2dB and the flatness is less than 0.5dB; according to the input control signal, the second-stage numerically controlled attenuator performs 31dB attenuation adjustment on the output signal of the second-stage amplifier.

[0013] As a preferred embodiment of the present invention, the attenuation of the third-stage temperature compensation attenuator is 3dB, and the temperature coefficient of the attenuation is 0.006dB / °C; the third-stage temperature compensation attenuator performs amplitude temperature compensation on the RF signal after the second-stage numerically controlled attenuator; The gain of the third-stage amplifier is 32dB, the flatness is less than 1dB, and the output 1dB compression point is greater than 18dBm; the input of the third-stage amplifier is connected to the output of the third-stage temperature compensation attenuator, and amplifies the RF signal preselected by the previous stage; The third-stage numerically controlled attenuator is a 5-bit attenuator, the attenuation step of the third-stage numerically controlled attenuator is 1dB, the attenuation range is 1dB to 31dB, the insertion loss is less than 2dB, and the flatness is less than 0.5dB; according to the input control signal, the third-stage numerically controlled attenuator performs 1dB to 31dB attenuation adjustment on the preselected RF signal of the previous stage.

[0014] As a preferred embodiment of the present invention, the gain of the fourth-stage amplifier is 32dB, the flatness is less than 1dB, and the output 1dB compression point is greater than 18dBm; the input of the fourth-stage amplifier is connected to the third-stage numerically controlled attenuator, and amplifies the preselected RF signal of the previous stage; The second-stage preselection switch filter bank includes N band-pass filters, the second-stage preselection switch filter bank covers the frequency band of 30MHz to 3000MHz, and the filtering bandwidth of the N band-pass filters can be configured within the range of 30MHz to 1000MHz; the second-stage preselection switch filter bank uses inductance-capacitance type filters, low-temperature co-fired ceramic filters or surface acoustic wave filters according to different RF frequency bands; the input of the second-stage preselection switch filter bank is connected to the output of the fourth-stage amplifier, performs second filtering on the preselected and amplified RF signal of the previous stage, and outputs the preprocessed RF signal; The insertion loss of the coupler is less than 2dB, the flatness is less than 0.5dB, and the coupling degree is 25dB; the coupler is connected to the second-stage preselection switch filter bank, and outputs the preprocessed RF signal to the direct sampling and digitization processing unit; The detector is a broadband high-dynamic range logarithmic detector, which converts the RF input signal into a corresponding logarithmic linear voltage output, the input power range is -60dBm to 10dBm, and the rise / fall response time is less than 100ns; the input of the detector is connected to the output of the coupler, and outputs a corresponding voltage signal to the self-test output port according to the coupled power.

[0015] A broadband RF signal direct sampling preprocessing method, comprising the following steps: S1: First, the RF signal received by the antenna enters the limiter, and the signal greater than 10 dBm is limited, and the remaining signals are sent to the RF switch after passing through; S2: The antenna signal or the self-check signal is selected by the RF switch and output to the first-stage low-noise amplifier, amplified to a power of 22 dB, and then sent to the first-stage preselection switch filter bank; S3: According to the frequency band where the target signal is located, the N-channel filters in the 30 MHz - 3000 MHz frequency band of the first-stage preselection switch filter bank are used to preselect and filter the RF signal with a bandwidth of 30 MHz - 1000 MHz to form 1 path of band-limited signal; S4: The band-limited RF signal after the first-stage preselection filtering passes through the first-stage temperature compensation attenuator for temperature compensation attenuation of 3 dB amplitude; S5: The signal is sent to the preselection switch notch filter bank to suppress the notch of N specific frequency band signals or select the signal to pass through directly; S6: The signal passes through the first-stage digital control attenuator for 8 dB gain control and then outputs to the second-stage amplifier for 22 dB gain amplification; S7: The amplified RF signal is successively output to the second-stage temperature compensation attenuator for 3 dB power temperature compensation, the second-stage digital control attenuator for 31 dB gain control, and the third-stage temperature compensation attenuator for 3 dB power compensation; S8: The signal passes through the third-stage amplifier for 32 dB gain amplification and outputs to the third-stage digital control attenuator, and performs 1 dB - 31 dB gain control; S9: The signal is then output to the fourth-stage amplifier for 32 dB gain amplification and outputs to the second-stage preselection switch filter bank; S10: The N-channel filters of the second-stage preselection switch filter bank preselect and filter the RF signal with a bandwidth of 30 MHz - 1000 MHz to form 1 path of RF signal after conditioning, filtering, and band-limiting; S11: Finally, the preprocessed RF signal is output through the coupler, and the signal meets the requirements of the Nyquist sampling theorem, the optimal sampling level range of the high-speed analog-to-digital converter, and the performance index requirements of the receiving system, realizing the preprocessing function before the direct sampling of the RF signal.

[0016] As a preferred embodiment of the present invention, in step S11, when the power of the output preprocessed signal exceeds the saturation level of the backend ADC sampler, the third-stage digital control attenuator is selected for gain control of 1 dB to 31 dB; if the sampling level requirement still cannot be met after the third-stage digital control attenuator performs 31 dB gain control, at this time, the second-stage digital control attenuator is selected for 31 dB gain control, and then the third-stage digital control attenuator is selected for 1 dB to 31 dB gain control; if the sampling level still cannot meet the requirement after being adjusted by the third-stage digital control attenuator and the second-stage digital control attenuator, the first-stage digital control attenuator and the second-stage digital control attenuator are selected simultaneously for 39 dB gain control, and finally the third-stage digital control attenuator is used for 1 dB to 31 dB gain control.

[0017] The beneficial effects of the present invention are as follows: The present invention realizes the design of the preprocessing method for direct sampling of broadband RF signals through a limiter, a RF switch, a low-pass filter, a coupler, a detector, a preselection switch notch filter, a two-stage segmented preselection switch filter bank, a three-stage temperature compensation attenuator, a three-stage digital control attenuator, a four-stage amplifier, a power supply circuit, and a control circuit. Through the preprocessing of broadband RF signals in the frequency range of 30 MHz to 3000 MHz before direct sampling, the present invention achieves the relevant index requirements such as small noise figure, flat passband, large dynamic range, high gain, high harmonic suppression, and high in-band spurious suppression, laying a foundation for the development of the system under the RF direct sampling system. Description of the Drawings

[0018] Figure 1 is the principle block diagram of the broadband RF direct sampling signal receiving preprocessing device; Figure 2 is the structural schematic diagram of the metal cavity housing; Figure 3 is the partial structural schematic diagram of the printed circuit board; Figure 4 is the principle block diagram of the power supply processing; Figure 5 is the principle block diagram of the power supply for the upper and lower layer printed circuit boards; Figure 6 is the principle block diagram of the control circuit; Figure 7 is the flowchart of the broadband RF signal direct sampling preprocessing method.

[0019] In the figure: 1 - metal cavity housing; 2 - printed circuit board; 3 - limiter; 4 - RF switch; 5 - low-pass filter; 6 - first-stage low-noise amplifier; 7 - first-stage preselector switch filter bank; 8 - first-stage temperature compensation attenuator; 9 - preselector switch notch filter bank; 10 - first-stage digital control attenuator; 11 - second-stage amplifier; 12 - second-stage temperature compensation attenuator; 13 - second-stage digital control attenuator; 14 - third-stage temperature compensation attenuator; 15 - third-stage amplifier; 16 - third-stage digital control attenuator; 17 - fourth-stage amplifier; 18 - second-stage preselector switch filter bank; 19 - coupler; 20 - detector; 101 - lower housing; 102 - lower-layer printed circuit board; 103 - upper housing; 104 - upper-layer printed circuit board; 105 - upper-layer connector; 106 - intermediate connector; 107 - lower-layer connector; 201 - blind slot; 202 - via hole; 203 - circular pad. Specific embodiments

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Usually, the components of the embodiments of the present invention described and illustrated in the drawings here can be arranged and designed in various different configurations.

[0021] Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention. It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other.

[0022] As Figure 1 shown, the broadband RF signal direct sampling preprocessing device of this embodiment includes a metal cavity housing 1, a power supply circuit, and a control circuit. A printed circuit board 2 is installed inside the metal cavity housing 1. The power supply circuit and the control circuit are electrically connected to the printed circuit board 2 respectively. Along the signal transmission direction on the printed circuit board 2, a limiter 3, an RF switch 4, a low-pass filter 5, a first-stage low-noise amplifier 6, a first-stage preselector switch filter bank 7, a first-stage temperature compensation attenuator 8, a preselector switch notch filter bank 9, a first-stage digital control attenuator 10, a second-stage amplifier 11, a second-stage temperature compensation attenuator 12, a second-stage digital control attenuator 13, a third-stage temperature compensation attenuator 14, a third-stage amplifier 15, a third-stage digital control attenuator 16, a fourth-stage amplifier 17, a second-stage preselector switch filter bank 18, a coupler 19, and a detector 20 are arranged in sequence. Figure 1Among them, RFin is the radio frequency input signal, RFout is the radio frequency output signal, ZJin is the quality inspection input signal, and ZJout is the quality inspection output signal.

[0023] The present invention realizes the design of the preprocessing method for directly sampling broadband radio frequency signals through a limiter 3, a radio frequency switch 4, a low-pass filter 5, a coupler 19, a detector 20, a preselection switch trap filter, a two-stage segmented preselection switch filter bank, a three-stage temperature compensation attenuator, a three-stage numerically controlled attenuator, a four-stage amplifier, a power supply circuit, and a control circuit. Through the preprocessing of broadband radio frequency signals in the frequency range of 30 MHz to 3000 MHz before direct sampling, the present invention meets the relevant index requirements such as small noise coefficient, flat passband, large dynamic range, high gain, high harmonic suppression, and high in-band spurious suppression, laying a foundation for the development of the system under the radio frequency direct sampling system.

[0024] Specifically, as Figure 2 shown, the metal cavity housing 1 includes an upper housing 103 and a lower housing 101. The upper housing 103 and the lower housing 101 are installed and fixed with screws, and both the upper housing 103 and the lower housing 101 are hermetically connected with a cover plate by laser welding.

[0025] As Figure 3 shown, the printed circuit board 2 includes an upper-layer printed circuit board 104 and a lower-layer printed circuit board 102. The upper-layer printed circuit board 104 is installed in the upper housing 103, and the lower-layer printed circuit board 102 is installed in the lower housing 101. A plurality of blind slots 201 are provided at the edges of both the upper-layer printed circuit board 104 and the lower-layer printed circuit board 102. A plurality of vias 202 are provided at each blind slot 201, and a circular pad 203 is provided at each via 202 on the inner side of the blind slot 201.

[0026] An intermediate connector 106 is further provided in the metal cavity housing 1. An upper connector 105 is inserted on the upper side of the intermediate connector 106, and a lower connector 107 is inserted on the lower side of the intermediate connector 106. The pin core of the upper connector 105 is welded to the circular pad 203 through the via 202 from one side of the blind slot 201 of the upper-layer printed circuit board 104, and the pin core of the lower connector 107 is welded to the circular pad 203 through the via 202 from one side of the blind slot 201 of the lower-layer printed circuit board 102.

[0027] As Figure 4As shown, the power supply circuit includes a low-dropout regulator and a power supply filter circuit. The low-dropout regulator stabilizes the input voltage to the required voltage. The required voltage is divided into two paths and output to two groups of power supply filter circuits. The filtered power supplies respectively supply power to the upper printed circuit board 104 and the lower printed circuit board 102. The power supply filter circuit is a 5-order LC filter circuit, and the inductor uses a ferrite wire-wound chip inductor, which can reduce the voltage drop of the filter circuit. The filtered power supplies respectively supply power to the upper printed circuit board 104 and the lower printed circuit board 102, ensuring that the power supplies of the upper printed circuit board 104 and the lower printed circuit board 102 are relatively independent.

[0028] As Figure 5 shown, the power supplies of the upper printed circuit board 104 and the lower printed circuit board 102 are respectively divided into three paths and output. One path is regulated to the required voltage of the radio frequency switch 4 by the low-dropout regulator to supply power to the radio frequency switch 4. The other two paths are respectively filtered by a 3-order LC filter circuit and then supply power to the first-stage low-noise amplifier 6, the second-stage amplifier 11, the third-stage amplifier 15, and the fourth-stage amplifier 17.

[0029] As Figure 6 shown, the control circuit includes a serial-to-parallel converter and an isolation circuit. The serial-to-parallel converter converts the input several-bit serial signal into several-bit parallel signals, and the output parallel signals are output through the isolation circuit to control the radio frequency switch 4, the first-stage digital control attenuator 10, the second-stage digital control attenuator 13, and the third-stage digital control attenuator 16. The isolation circuit is a 3-order LC filter circuit, which reduces the crosstalk between control signals. Figure 6 Among them, CLK is the input clock, DATA is the input data, LE is the enable signal, and D0~Dn are the output data.

[0030] Specifically, the limiter 3 uses a GaAs MMIC limiter 3, with a loss less than 0.4 dB, a flatness less than 0.1 dB, and a standing wave of the input and output ports less than 1.5. The limiter 3 is connected to an external receiving antenna, with an anti-burning power of 5 W and a limiting level of 16 dBm, avoiding the signal power received by the antenna being too large and damaging the subsequent circuit, playing a role in protecting the subsequent circuit.

[0031] The radio frequency switch 4 uses a COMS single-pole double-throw radio frequency switch 4, with a loss less than 1 dB and a standing wave of the input and output ports less than 1.5. The radio frequency switch 4 includes a common port and two shunt ports. One shunt port is connected to the previous-stage limiter 3, and the other shunt port is connected to the self-test source input port to switch the received radio frequency signal and the self-test signal.

[0032] The low-pass filter 5 uses an LTCC low-pass filter 5 to suppress frequencies above 4500 MHz, with an insertion loss of less than 1 dB and a stopband rejection greater than 20 dBc. One port of the low-pass filter 5 is connected to the common port of the RF switch 4 to perform low-pass filtering on the received signal or the self-test signal.

[0033] The first-stage low-noise amplifier 6 (LAN1) uses a GaAs MMIC amplifier with a gain of 22 dB and a noise figure of less than 2 dB. The input of the first-stage low-noise amplifier 6 is connected to the output of the low-pass filter 5 to perform low-noise amplification on the received signal or the self-test signal.

[0034] The first-stage preselection switch filter bank 7 includes N band-pass filters covering the frequency band of 30 MHz to 3000 MHz. The filtering bandwidth of the N band-pass filters can be configured within the range of 30 MHz to 1000 MHz. The first-stage preselection switch filter bank 7 is implemented using LC (inductor-capacitor) type filters, LTCC (low-temperature co-fired ceramic) type filters, and SAW (surface acoustic wave) type filters according to different RF frequency bands. The input end of the first-stage preselection switch filter bank 7 is connected to the output of the first-stage low-noise amplifier 6 to perform preliminary preselection and filtering on the low-noise amplified RF signal, forming N RF band-limited signals in different frequency bands and simultaneously filtering out the amplified harmonic interference signals.

[0035] The first-stage temperature compensation attenuator 8 performs amplitude temperature compensation on the RF signal after the first-stage preselection filter bank, with an attenuation of 3 dB and an attenuation temperature coefficient of 0.006 dB / °C, ensuring the amplitude consistency of the preselected signal at high and low temperatures.

[0036] The preselection switch notch filter bank 9 includes a direct-through signal, a band-stop filter from 97 MHz to 108 MHz, and a band-stop filter from 935 MHz to 950 MHz; the preselection switch notch filter bank 9 performs direct-through or segmented band-stop notch filtering on the signal after the first-stage temperature compensation attenuator 8.

[0037] The first-stage digital control attenuator 10 is a 1-bit 8 dB attenuator with an insertion loss of less than 2 dB and a flatness of less than 0.5 dB. The first-stage digital control attenuator 10 is connected to the output end of the preselection switch notch filter bank 9 to perform 8 dB attenuation adjustment on the RF signal output by the notch filter bank according to the input control signal.

[0038] The second-stage amplifier 11 (LAN2) uses a GaAs MMIC amplifier with a gain of 22 dB and a noise figure of less than 2 dB for the second-stage amplifier 11; the input of the second-stage amplifier 11 is connected to the output of the first-stage digital control attenuator 10 to amplify the RF signal after the first-stage digital control attenuator 10.

[0039] The attenuation of the second-stage temperature compensation attenuator 12 is 3 dB, and the temperature coefficient of attenuation is 0.006 dB / °C; the second-stage temperature compensation attenuator 12 performs amplitude temperature compensation on the RF signal after the second-stage amplifier 11.

[0040] The second-stage digital control attenuator 13 is a 1-bit 31 dB attenuator. The insertion loss of the second-stage digital control attenuator 13 is less than 2 dB, and the flatness is less than 0.5 dB; according to the input control signal, the second-stage digital control attenuator 13 performs 31 dB attenuation adjustment on the output signal of the second-stage amplifier 11.

[0041] The attenuation of the third-stage temperature compensation attenuator 14 is 3 dB, and the temperature coefficient of attenuation is 0.006 dB / °C; the third-stage temperature compensation attenuator 14 performs amplitude temperature compensation on the RF signal after the second-stage digital control attenuator 13.

[0042] The gain of the third-stage amplifier 15 (LAN3) is 32 dB, the flatness is less than 1 dB, and the output 1 dB compression point is greater than 18 dBm; the input of the third-stage amplifier 15 is connected to the output of the third-stage temperature compensation attenuator 14, and amplifies the preselected RF signal of the previous stage.

[0043] The third-stage digital control attenuator 16 is a 5-bit attenuator. The attenuation step of the third-stage digital control attenuator 16 is 1 dB, the attenuation range is 1 dB to 31 dB, the insertion loss is less than 2 dB, and the flatness is less than 0.5 dB; according to the input control signal, the third-stage digital control attenuator 16 performs 1 dB to 31 dB attenuation adjustment on the preselected RF signal of the previous stage.

[0044] The gain of the fourth-stage amplifier 17 (LAN4) is 32 dB, the flatness is less than 1 dB, and the output 1 dB compression point is greater than 18 dBm; the input of the fourth-stage amplifier 17 is connected to the third-stage digital control attenuator 16, and amplifies the preselected RF signal of the previous stage; The second-stage preselection switch filter bank 18 includes N band-pass filters, covering the frequency band of 30 MHz to 3000 MHz. The filtering bandwidth of the N band-pass filters can be configured within the range of 30 MHz to 1000 MHz. The filter bank is implemented by using LC (inductor-capacitor) type filters, LTCC (low-temperature co-fired ceramic) type filters, and SAW (surface acoustic wave) type filters according to different RF frequency bands. The input of the second-stage preselection switch filter bank 18 is connected to the output of the fourth-stage amplifier 17, and performs secondary filtering on the preselected and amplified RF signal of the previous stage, and outputs the preprocessed RF signal.

[0045] The insertion loss of the coupler 19 is less than 2 dB, the flatness is less than 0.5 dB, and the coupling degree is 25 dB. The coupler 19 is connected to the second-stage preselection switch filter bank 18 and outputs the preprocessed radio frequency signal to the direct sampling and digitizing processing unit.

[0046] The detector 20 is a broadband high-dynamic-range logarithmic detector 20 that converts the radio frequency input signal into a corresponding logarithmic-linear voltage output. The input power range is -60 dBm to 10 dBm, and the rise / fall response time is less than 100 ns. The input of the detector 20 is connected to the output of the coupler 19, and according to the coupled power, it outputs a corresponding voltage signal to the self-test output port.

[0047] As Figure 7 shown, the broadband radio frequency signal direct sampling and preprocessing method of this embodiment includes the following steps: S1: First, the radio frequency signal received by the antenna enters the limiter 3, and the signal greater than 10 dBm is limited, and the remaining signals are sent to the radio frequency switch 4 after passing through. S2: The radio frequency switch 4 selects the antenna signal or the self-test signal and outputs it to the first-stage low-noise amplifier 6. After being amplified to a power of 22 dB, it is sent to the first-stage preselection switch filter bank 7. S3: According to the frequency band where the target signal is located, through the N-channel filters in the 30 MHz to 3000 MHz frequency band of the first-stage preselection switch filter bank 7, the radio frequency signal with a bandwidth of 30 MHz to 1000 MHz is preselected and filtered to form a single-channel band-limited signal. S4: The band-limited radio frequency signal after the first-stage preselection filtering passes through the first-stage temperature compensation attenuator 8 for a temperature compensation attenuation of 3 dB in amplitude. S5: Then the signal is sent to the preselection switch notch filter bank 9 to suppress the signals in N specific frequency bands or select the signal to pass through directly. S6: Then the signal passes through the first-stage digital control attenuator 10 for an 8 dB gain control and is output to the second-stage amplifier 11 for a 22 dB gain amplification. S7: The amplified radio frequency signal is successively output to the second-stage temperature compensation attenuator 12 for a 3 dB power temperature compensation, the second-stage digital control attenuator 13 for a 31 dB gain control, and the third-stage temperature compensation attenuator 14 for a 3 dB power compensation. S8: Then the signal passes through the third-stage amplifier 15 for a 32 dB gain amplification and is output to the third-stage digital control attenuator 16 for a gain control of 1 dB to 31 dB. S9: Then the signal is output to the fourth-stage amplifier 17 for a 32 dB gain amplification and is output to the second-stage preselection switch filter bank 18. S10: The N filters of the second - stage pre - selection switched - filter bank 18 perform pre - selection filtering on the RF signals with a bandwidth of 30 MHz to 1000 MHz, forming 1 path of RF signals after conditioning, filtering, and band - limiting. S11: Finally, the pre - processed RF signals are output through the coupler 19. The signals meet the requirements of the Nyquist sampling theorem, the optimal sampling level range of the high - speed analog - to - digital converter, and the performance indicators of the receiving system, realizing the pre - processing function before direct sampling of RF signals.

[0048] The module of the present invention usually adopts intelligent digital gain control (DGC) - related algorithms. When the power of the output pre - processed signal exceeds the saturation level of the backend ADC sampler, the third - stage digital - controlled attenuator 16 is preferentially selected for gain control of 1 dB to 31 dB. If the third - stage digital - controlled attenuator 16 still cannot meet the sampling level requirements after 31 dB of gain control, then the second - stage digital - controlled attenuator 13 should be selected for 31 dB of gain control, and then the third - stage digital - controlled attenuator 16 is selected for 1 dB to 31 dB of gain control. If the sampling level still cannot meet the requirements after adjustment by the third - stage digital - controlled attenuator 16 and the second - stage digital - controlled attenuator 13, then the first - stage and second - stage digital - controlled attenuators 13 are simultaneously selected for 39 dB of gain control, and finally the third - stage digital - controlled attenuator 16 is used for 1 dB to 31 dB of gain control. According to the sampling rate of the backend ADC sampling device, under the condition of meeting the Nyquist sampling theorem, two - stage N - path switched - filter banks are pre - selected in a timely manner for band - limiting processing of RF signals.

[0049] According to the sampling rate of the backend ADC sampling device, under the condition of meeting the Nyquist sampling theorem, two - stage N - path switched - filter banks are pre - selected in a timely manner for band - limiting processing of RF signals.

[0050] The specific implementation of the wide - band RF signal direct - sampling pre - processing device is as follows: According to the components of the present invention, the implementation materials and devices used are specifically as follows: The housing of the metal cavity housing 1 is made of 6061 aluminum, the cover plate is made of 4047 aluminum, and the upper housing 103 and the lower housing 101 are respectively connected to the cover plate by laser welding.

[0051] The limiter 3 is selected as ILM - 0020A - PQ3.

[0052] The RF switch 4 is selected as MXD8723E, which has a small volume and a small low - frequency noise coefficient.

[0053] The low - pass filter 5 is selected as LFCN2012 - 3000B01.

[0054] The first - stage low - noise amplifier 6 and the second - stage amplifier 11 are selected as MWL0035, with a gain of 22.5 dB, a flatness of less than 1 dB, and an output P - 1 greater than 21.5 dBm.

[0055] The first - stage pre - selection switched filter bank 7 and the second - stage pre - selection switched filter bank 18 are self - made 16 - to - 1 switched filter banks, with a frequency coverage of 30 MHz to 3000 MHz, a signal bandwidth that can be selected from 30 MHz to 1000 MHz, an insertion loss of less than 8 dB, and a stop - band rejection of greater than 30 dBc.

[0056] The first - stage temperature - compensated attenuator 8, the second - stage temperature - compensated attenuator 12, and the third - stage temperature - compensated attenuator 14 select MTVA1202N6W3S.

[0057] The pre - selection switched notch filter bank 9 is a self - made 3 - to - 1 switched notch filter bank, including one direct - through signal, a band - stop filter from 97 MHz to 108 MHz, and a band - stop filter from 935 MHz to 950 MHz.

[0058] The first - stage digital - controlled attenuator 10 selects MWA3001Q. Its control pins "1", "12", "14", "15", and "16" are connected to high level, and the control pin "13" is connected to the control level, thus realizing a 1 - bit 8 - dB attenuation function.

[0059] The second - stage digital - controlled attenuator 13 selects MWA3001Q. Its control pin "1" is connected to high level, and the control pins "12", "13", "14", "15", and "16" are connected to the same control level, thus realizing a 1 - bit 31 - dB attenuation function.

[0060] The third - stage amplifier 15 and the fourth - stage amplifier 17 select HGC180 - 4BLP3, with an amplification gain of 32 dB and a flatness of less than 1 dB.

[0061] The third - stage digital - controlled attenuator 16 is MWA3001Q. Its control pin "1" is connected to high level, and the control pins "12", "13", "14", "15", and "16" are respectively connected to a control level, thus realizing a 5 - bit 1 - to - 31 - dB attenuation function.

[0062] The coupler 19 selects YDC8501 - QP3.

[0063] The detector 20 selects YDC8108 - QP3.

[0064] The serial - to - parallel converter selects HGC166 - 3LP3, which converts the input 13 - bit serial signal into a 13 - bit parallel signal, realizing the control functions of channel selection, attenuation control, and self - test signal selection.

[0065] The indexes of the traditional intermediate - frequency signal receiving system in the 30 MHz to 3000 MHz frequency band with super - heterodyne system are as follows: spurious suppression in the pass - band: ≥60 dBc; two - tone dynamic range: ≥60 dBc; system noise figure: ≤7.0 dB.

[0066] The specifications of the direct RF signal sampling system in the 30 MHz to 3000 MHz frequency band based on the present invention are as follows: spurious suppression in the passband: ≥70 dBc; two-tone dynamic range: ≥90 dBc; system noise figure: ≤4.5 dB.

[0067] Through comparison, it can be found that the software-defined radio (SDR) receiving system designed based on the present invention has obvious advantages and can be applied to the subsequent technological developments such as 5G and 6G, as well as a large number of applications in various wireless communications, radar arrays, wireless electromagnetic spectrum monitoring, and digital signal beamforming (DBF).

[0068] The present invention is not limited to the above optional implementation manners. Any person can obtain other various forms of products under the inspiration of the present invention. However, no matter what changes are made in its shape or structure, as long as the technical solutions fall within the scope defined by the claims of the present invention, they are all within the protection scope of the present invention.

Claims

1. A direct sampling preprocessing device for broadband radio frequency signals, characterized in that: It includes a metal cavity housing (1), a power supply circuit and a control circuit. A printed circuit board (2) is installed inside the metal cavity housing (1). The power supply circuit and the control circuit are electrically connected to the printed circuit board (2) respectively. Along the signal transmission direction on the printed circuit board (2), a limiter (3), a radio frequency switch (4), a low-pass filter (5), a first-stage low-noise amplifier (6), a first-stage preselector switch filter bank (7), a first-stage temperature compensation attenuator (8), a preselector switch notch filter bank (9), a first-stage digital control attenuator (10), a second-stage amplifier (11), a second-stage temperature compensation attenuator (12), a second-stage digital control attenuator (13), a third-stage temperature compensation attenuator (14), a third-stage amplifier (15), a third-stage digital control attenuator (16), a fourth-stage amplifier (17), a second-stage preselector switch filter bank (18), a coupler (19) and a detector (20) are arranged in sequence.

2. The broadband radio frequency signal direct sampling and preprocessing device according to claim 1, wherein: The metal cavity housing (1) includes an upper housing (103) and a lower housing (101). The printed circuit board (2) includes an upper-layer printed circuit board (104) and a lower-layer printed circuit board (102). The upper-layer printed circuit board (104) is installed inside the upper housing (103), and the lower-layer printed circuit board (102) is installed inside the lower housing (101). A plurality of blind slots (201) are opened at the edges of both the upper-layer printed circuit board (104) and the lower-layer printed circuit board (102). A plurality of vias (202) are opened at each blind slot (201). A circular pad (203) is arranged at each via (202) on the inner side of the blind slot (201). An intermediate connector (106) is further arranged inside the metal cavity housing (1). An upper connector (105) is plugged on the upper side of the intermediate connector (106), and a lower connector (107) is plugged on the lower side of the intermediate connector (106). The pin core of the upper connector (105) is welded to the circular pad (203) through the via (202) from one side of the blind slot (201) of the upper-layer printed circuit board (104), and the pin core of the lower connector (107) is welded to the circular pad (203) through the via (202) from one side of the blind slot (201) of the lower-layer printed circuit board (102).

3. The broadband radio frequency signal direct sampling preprocessing device according to claim 2, wherein: The power supply circuit includes a low-dropout regulator and a power supply filtering circuit. The low-dropout regulator stabilizes the input voltage to the required voltage. The required voltage is divided into two paths and output to two groups of power supply filtering circuits. The filtered power supplies supply power to the upper-layer printed circuit board (104) and the lower-layer printed circuit board (102) respectively. The power supplies of the upper-layer printed circuit board (104) and the lower-layer printed circuit board (102) are respectively divided into three paths for output. One path is regulated by a low-dropout regulator to the voltage required by the radio frequency switch (4) to supply power to the radio frequency switch (4), and the other two paths are respectively supplied to the first-stage low-noise amplifier (6), the second-stage amplifier (11), the third-stage amplifier (15) and the fourth-stage amplifier (17) after passing through a 3-stage LC filtering circuit.

4. A direct sampling preprocessing device for broadband RF signals according to claim 1, characterized in that: The control circuit includes a serial-parallel converter and an isolation circuit. The serial-parallel converter converts the input serial signal of several bits into a parallel signal of several bits, and the output parallel signal is output through the isolation circuit to control the radio frequency switch (4), the first-stage digitally controlled attenuator (10), the second-stage digitally controlled attenuator (13), and the third-stage digitally controlled attenuator (16).

5. The broadband RF signal direct sampling and preprocessing device according to claim 1, characterized in that: The limiter (3) uses a GaAs MMIC limiter (3). The loss of the limiter (3) is less than 0.4 dB, the flatness is less than 0.1 dB, and the standing wave of the input and output ports is less than 1.

5. The limiter (3) is connected to an external receiving antenna. The anti-burning power of the limiter (3) is 5 W, and the limiting level is 16 dBm; The radio frequency switch (4) uses a COMS single-pole double-throw radio frequency switch (4). The loss of the radio frequency switch (4) is less than 1 dB, and the standing wave of the input and output ports is less than 1.

5. The radio frequency switch (4) includes a common port and two shunt ports. One shunt port is connected to the previous-stage limiter (3), and the other shunt port is connected to the self-test source input port to switch the received radio frequency signal and the self-test signal; The low-pass filter (5) uses an LTCC low-pass filter (5). The low-pass filter (5) suppresses frequencies above 4500 MHz. The insertion loss of the low-pass filter (5) is less than 1 dB, and the stopband suppression is greater than 20 dBc. One port of the low-pass filter (5) is connected to the common port of the radio frequency switch (4) to perform low-pass filtering on the received signal or the self-test signal; The first-stage low-noise amplifier (6) uses a GaAs MMIC amplifier. The gain of the first-stage low-noise amplifier (6) is 22 dB, and the noise figure is less than 2 dB. The input of the first-stage low-noise amplifier (6) is connected to the output of the low-pass filter (5) to perform low-noise amplification on the received signal or the self-test signal; The first-stage preselection switch filter bank (7) includes N band-pass filters. The first-stage preselection switch filter bank (7) covers the frequency band of 30 MHz to 3000 MHz, and the filtering bandwidth of the N band-pass filters can be configured within the range of 30 MHz to 1000 MHz. The first-stage preselection switch filter bank (7) uses an inductance-capacitance type filter, a low-temperature co-fired ceramic type filter, or a surface acoustic wave type filter according to different radio frequency bands. The input end of the first-stage preselection switch filter bank (7) is connected to the output of the first-stage low-noise amplifier (6) to perform preliminary preselection and filtering on the low-noise amplified radio frequency signal, forming N radio frequency band-limited signals of different frequency bands and simultaneously filtering out the amplified harmonic interference signals; The attenuation of the first-stage temperature compensation attenuator (8) is 3 dB, and the temperature coefficient of the attenuation is 0.006 dB / °C. The first-stage temperature compensation attenuator (8) performs amplitude temperature compensation on the radio frequency signal after the first-stage preselection filter bank; The preselection switch notch filter bank (9) includes a direct-through signal, a band-stop filter in the range of 97 MHz to 108 MHz, and a band-stop filter in the range of 935 MHz to 950 MHz; the preselection switch notch filter bank (9) performs direct-through or segmented band-stop notch filtering on the signal after the first-stage temperature compensation attenuator (8). The first-stage digital controlled attenuator (10) is a 1-bit 8 dB attenuator, and the insertion loss of the first-stage digital controlled attenuator (10) is less than 2 dB and the flatness is less than 0.5 dB; the first-stage digital controlled attenuator (10) is connected to the output end of the preselection switch notch filter bank (9), and according to the input control signal, performs 8 dB attenuation adjustment on the RF signal output by the preselection switch notch filter bank (9).

6. The broadband RF signal direct sampling and preprocessing device according to claim 5, characterized in that: The second-stage amplifier (11) uses a GaAs MMIC amplifier, and the gain of the second-stage amplifier (11) is 22 dB and the noise figure is less than 2 dB; the input of the second-stage amplifier (11) is connected to the output of the first-stage digital controlled attenuator (10), and amplifies the RF signal after the first-stage digital controlled attenuator (10). The attenuation amount of the second-stage temperature compensation attenuator (12) is 3 dB, and the temperature coefficient of the attenuation amount is 0.006 dB / °C; the second-stage temperature compensation attenuator (12) performs amplitude temperature compensation on the RF signal after the second-stage amplifier (11). The second-stage digital controlled attenuator (13) is a 1-bit 31 dB attenuator, and the insertion loss of the second-stage digital controlled attenuator (13) is less than 2 dB and the flatness is less than 0.5 dB; according to the input control signal, the second-stage digital controlled attenuator (13) performs 31 dB attenuation adjustment on the output signal of the second-stage amplifier (11).

7. The broadband RF signal direct sampling preprocessing device according to claim 6, characterized in that: The attenuation amount of the third-stage temperature compensation attenuator (14) is 3 dB, and the temperature coefficient of the attenuation amount is 0.006 dB / °C; the third-stage temperature compensation attenuator (14) performs amplitude temperature compensation on the RF signal after the second-stage digital controlled attenuator (13). The gain of the third-stage amplifier (15) is 32 dB, the flatness is less than 1 dB, and the output 1 dB compression point is greater than 18 dBm; the input of the third-stage amplifier (15) is connected to the output of the third-stage temperature compensation attenuator (14), and amplifies the preselected RF signal of the previous stage. The third-stage digital controlled attenuator (16) is a 5-bit attenuator, the attenuation step of the third-stage digital controlled attenuator (16) is 1 dB, the attenuation range is 1 dB to 31 dB, the insertion loss is less than 2 dB, and the flatness is less than 0.5 dB; according to the input control signal, the third-stage digital controlled attenuator (16) performs 1 dB to 31 dB attenuation adjustment on the preselected RF signal of the previous stage.

8. A direct sampling preprocessing device for broadband radio frequency signals according to claim 7, characterized in that: The gain of the fourth-stage amplifier (17) is 32 dB, the flatness is less than 1 dB, and the output 1 dB compression point is greater than 18 dBm; the input of the fourth-stage amplifier (17) is connected to the third-stage digital controlled attenuator (16), and amplifies the preselected RF signal of the previous stage. The second-stage preselection switched filter bank (18) includes N band-pass filters. The second-stage preselection switched filter bank (18) covers the frequency band from 30 MHz to 3000 MHz, and the filtering bandwidth of the N band-pass filters can be configured within the range of 30 MHz to 1000 MHz; the second-stage preselection switched filter bank (18) adopts inductance-capacitance type filters, low-temperature co-fired ceramic filters or surface acoustic wave filters according to different radio frequency bands; the input of the second-stage preselection switched filter bank (18) is connected to the output of the fourth-stage amplifier (17), and the radio frequency signal preselected and amplified in the previous stage is filtered for the second time, and the preprocessed radio frequency signal is output; The coupler (19) has an insertion loss of less than 2 dB, a flatness of less than 0.5 dB, and a coupling degree of 25 dB; the coupler (19) is connected to the second-stage preselection switched filter bank (18), and outputs the preprocessed radio frequency signal to the direct sampling and digitization processing unit; The detector (20) is a broadband high-dynamic range logarithmic detector (20), which converts the radio frequency input signal into a corresponding logarithmic linear voltage output, with an input power range of -60 dBm to 10 dBm and a rise / fall response time of less than 100 ns; the input of the detector (20) is connected to the output of the coupler (19), and according to the coupled power, a corresponding voltage signal is output to the self-test output port.

9. A direct sampling preprocessing method for broadband radio frequency signals, using a direct sampling preprocessing device for broadband radio frequency signals according to any one of claims 1 to 8, characterized in that: It includes the following steps: S1: First, the radio frequency signal received by the antenna enters the limiter (3), and the signal greater than 10 dBm is limited, and the remaining signals are sent to the radio frequency switch (4) after passing through; S2: The antenna signal or the self-test signal is selected by the radio frequency switch (4) and output to the first-stage low-noise amplifier (6). After being amplified to a power of 22 dB, it is sent to the first-stage preselection switched filter bank (7); S3: According to the frequency band where the target signal is located, the N filters in the 30 MHz to 3000 MHz frequency band of the first-stage preselection switched filter bank (7) are used to preselect and filter the radio frequency signal with a bandwidth of 30 MHz to 1000 MHz to form a single path of band-limited signal; S4: The band-limited radio frequency signal after the first-stage preselection filtering passes through the first-stage temperature compensation attenuator (8) for a temperature compensation attenuation of 3 dB in amplitude; S5: The signal is sent to the preselection switched notch filter bank (9) to suppress the signals in N specific frequency bands or select the signal to pass through directly; S6: The signal passes through the first-stage digital control attenuator (10) for an 8 dB gain control and then is output to the second-stage amplifier (11) for a 22 dB gain amplification; S7: The amplified radio frequency signal is successively output to the second-stage temperature compensation attenuator (12) for a 3 dB power temperature compensation, the second-stage digital control attenuator (13) for a 31 dB gain control, and the third-stage temperature compensation attenuator (14) for a 3 dB power compensation; S8: The signal passes through the third-stage amplifier (15) for a 32 dB gain amplification and is output to the third-stage digital control attenuator (16), and a gain control of 1 dB to 31 dB is performed; S9: The signal is output to the fourth-stage amplifier (17) for gain amplification of 32 dB and then output to the second-stage preselection switch filter bank (18). S10: The N filters of the second-stage preselection switch filter bank (18) perform preselection filtering on the RF signal with a bandwidth of 30 MHz to 1000 MHz to form one RF signal that has been conditioned, filtered, and band-limited. S11: Finally, the preprocessed RF signal is output through the coupler (19). The signal meets the requirements of the Nyquist sampling theorem, the optimal sampling level range of the high-speed analog-to-digital converter, and the performance indicators of the receiving system, realizing the preprocessing function before direct sampling of the RF signal.

10. A direct sampling preprocessing method for broadband radio frequency signals according to claim 9, characterized in that: In step S11, when the power of the output preprocessed signal exceeds the saturation level of the backend ADC sampler, the third-stage digital control attenuator (16) is selected for gain control of 1 dB to 31 dB. If the sampling level requirement is still not met after the third-stage digital control attenuator (16) performs 31 dB gain control, the second-stage digital control attenuator (13) is selected for 31 dB gain control at this time, and then the third-stage digital control attenuator (16) is selected for gain control of 1 dB to 31 dB. If the sampling level still cannot meet the requirements after being adjusted by the third-stage digital control attenuator (16) and the second-stage digital control attenuator (13), the first-stage digital control attenuator (10) and the second-stage digital control attenuator (13) are selected simultaneously for 39 dB gain control, and finally the third-stage digital control attenuator (16) is used for gain control of 1 dB to 31 dB.

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