Printed circuit board with ceramic substrate embedded in local area and preparation method of printed circuit board

Abstract

The invention relates to a printed circuit board with a ceramic substrate embedded in a local area and a preparation method of the printed circuit board, and belongs to the technical field of semiconductor devices. The preparation method comprises the following steps: performing surface treatment on the upper surface and the lower surface of the core plate to form the L3 layer and the L4 layer; processing a through groove; sticking an adhesive tape; mounting the power chip module in the through groove; forming a first bonding layer and an L2 layer on the surface of the L3 layer; removing the adhesive tape; forming a second bonding layer and an L5 layer on the surface of the L4 layer; processing a blind hole and filling copper; processing a through hole and metalizing the inner wall; performing surface treatment on the L2 layer and the L5 layer; the ceramic substrate is bonded to the area, corresponding to the power chip module, of the surface of the L5 layer through silver paste and is baked and fixed; forming a third bonding layer and an L1 layer on the surface of the L2 layer; forming a fourth bonding layer and an L6 layer on the surface of the L5 layer; processing a blind hole and filling copper; performing surface treatment on the L1 layer; and resistance welding processing, anti-oxidation treatment and cutting forming are carried out. According to the preparation method, the heat dissipation performance and the voltage tolerance of the printed circuit board can be effectively improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and particularly to a printed circuit board with a locally embedded ceramic substrate and a preparation method thereof. Background Art

[0002] With the rapid development of power electronics technology, the performance requirements for power devices are continuously increasing, especially in terms of heat dissipation, electrical performance, structural compactness, and cost-effectiveness. At present, although traditional SiC chip packaging technologies (such as surface mounting or sintering on ceramic substrates) can also meet basic packaging requirements, they still have limitations in terms of heat dissipation efficiency, electrical performance optimization, system volume reduction, manufacturing cost reduction, and reliability improvement.

[0003] To solve the above problems, the prior art generally embeds SiC chips into the internal structure of printed circuit boards. This embedded technology optimizes electrical performance, reduces transmission losses and electromagnetic interference by directly integrating SiC chips into the printed circuit board interior to shorten the connection distance between the chips and other components. In addition, this design can improve the integration degree, contribute to reducing the volume and weight of the system, and meet the requirements for miniaturized and lightweight applications.

[0004] However, due to the heat dissipation performance limitations of printed circuit board materials, the embedded technology faces challenges in heat dissipation management. Currently, printed circuit boards with embedded SiC chips usually use copper blocks and dense laser drilling to transfer heat and high thermal conductivity adhesive films to dissipate heat. However, in order to fill the line spacing during the printed circuit board lamination process, the thermal conductivity of the heat dissipation adhesive film is usually lower than 15 W / mK, making it difficult to effectively conduct the heat that may exceed 200 °C generated by the SiC chip during operation, resulting in insufficient heat dissipation efficiency and seriously affecting the chip performance.

[0005] In addition, to reduce the thermal resistance and accelerate the heat dissipation efficiency, the thickness of the heat dissipation adhesive film is usually designed to be relatively thin, generally less than 200 μm. At the same time, as the charging pile platform voltage increases, the voltage parameters of the SiC chip are also continuously rising, from 400 V to 800 V, and even up to 1200 V. In this case, the relatively thin heat dissipation adhesive film may be broken down and fail due to the high voltage. Therefore, although the embedded technology has advantages in terms of integration degree and electrical performance, it still needs to be improved in terms of heat dissipation and high voltage tolerance. Summary of the Invention

[0006] The object of the present invention is to overcome the deficiencies of the prior art and provide a printed circuit board with a locally embedded ceramic substrate and a preparation method thereof.

[0007] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0008] In a first aspect, the present invention provides a method for preparing a printed circuit board with a ceramic substrate embedded in a local area, comprising the following steps:

[0009] S1. Perform surface treatment on the upper surface of the core board to form an L3 layer, and perform surface treatment on the lower surface of the core board to form an L4 layer;

[0010] S2. Machine through-holes in the surface-treated core board;

[0011] S3. Stick a tape on the surface of the L4 layer;

[0012] S4. Mount the power chip module into the through-holes;

[0013] S5. Stack a bonding sheet and a copper foil on the surface of the L3 layer in sequence, and perform lamination to respectively form a first bonding layer and an L2 layer; after lamination, the bonding sheet is heated and melted to fill the gap between the power chip module and the core board and then cured;

[0014] S6. Remove the tape on the surface of the L4 layer;

[0015] S7. Stack a bonding sheet and a copper foil on the surface of the L4 layer in sequence, and perform lamination to respectively form a second bonding layer and an L5 layer;

[0016] S8. Machine blind holes between the L2 layer and the L3 layer and between the L5 layer and the L4 layer, and fill copper in the blind holes;

[0017] S9. Machine through-holes through the L2 layer to the L5 layer, and metallize (copper plate) the inner wall of the through-holes;

[0018] S10. Perform surface treatment on the L2 layer and the L5 layer respectively;

[0019] S11. Bond the ceramic substrate to the area corresponding to the power chip module on the surface of the L5 layer with silver paste and bake for fixation;

[0020] S12. First, stack a bonding sheet and a copper foil on the surface of the L5 layer in sequence, and perform lamination to respectively form a fourth bonding layer and an L6 layer, wherein the copper foil is in contact with the surface of the ceramic substrate; then stack a bonding sheet and a copper foil on the surface of the L2 layer in sequence, and perform lamination to respectively form a third bonding layer and an L1 layer;

[0021] S13. Machine blind holes between the L1 layer and the L2 layer, and fill copper in the blind holes; perform surface treatment on the L1 layer;

[0022] S14. After solder mask processing, anti-oxidation treatment and cutting and shaping, obtain a printed circuit board with a ceramic substrate embedded in a local area.

[0023] The preparation method of the present invention adopts a local embedding design, combining a ceramic substrate with a high thermal conductivity and an adhesive sheet with high resin fluidity. It can not only improve the heat dissipation performance and structural stability of the power chip module, but also show significant advantages in cost control, effectively improving the heat dissipation and voltage tolerance of the printed circuit board.

[0024] Among them, in step S11, a ceramic substrate with a high heat dissipation coefficient is used to replace the traditional heat dissipation adhesive film to enhance the thermal management ability of the power chip module. Moreover, during the preparation process of the printed circuit board, a silver paste is precisely dot-coated in a region where the ceramic substrate is to be adhered by a dispensing process, and then the ceramic substrate is attached thereto and cured in an oven. This can not only make full use of the excellent heat dissipation characteristics of the ceramic substrate, but also ensure that under high-load working conditions, the power chip module can achieve rapid and effective heat conduction, thereby preventing damage caused by overheating.

[0025] At the same time, in step S12, an adhesive sheet is used in the non-power chip module area. This material is superior to the heat dissipation adhesive film in terms of fluidity and voltage resistance performance. In the specific preparation process, the adhesive sheet in the power chip module area is precisely die-cut first, and then panelized and laminated. The high resin flow of the adhesive sheet can be used to completely fill the circuit spacing on the surface of the L5 layer, and the bonding force with the copper foil can reach more than 1.0 N / mm after lamination, thereby ensuring the structural stability of the printed circuit board and the reliability of electrical performance. In addition, choosing to embed the ceramic substrate in a local area instead of using ceramic materials throughout the substrate can effectively control costs while ensuring the heat dissipation efficiency, achieving a balance between performance and economic benefits.

[0026] As an embodiment of the present invention, the core board described in step S1 is a double-sided copper clad laminate.

[0027] The double-sided copper clad laminate includes an inner core board and copper layers on the upper and lower surfaces of the inner core board. The thickness of the inner core board is 0 - 20 μm greater than the thickness of the power chip module; there is no special limitation on the thickness of the copper layers on the upper and lower surfaces, as long as the purpose of the present invention can be achieved. For example, the thickness of the copper layer on the upper surface is 12 - 54 μm, and the thickness of the copper layer on the lower surface is 12 - 54 μm.

[0028] As an embodiment of the present invention, the surface treatment described in step S1, the surface treatment described in step S10, and the surface treatment described in step S13 include graphic transfer; the graphic transfer includes film pasting, exposure, development, etching, and film stripping.

[0029] As an embodiment of the present invention, in step S2, the surface-treated core board is processed with through-holes by one or more of die-cutting with a steel mold, mechanical milling, CO2 laser drilling, and UV cutting. The through-hole area is the area where the power chip module is embedded.

[0030] As an embodiment of the present invention, the tape described in step S3 includes a polyimide base film and an acrylic adhesive layer provided on the surface of the polyimide base film.

[0031] In this tape, the thickness of the polyimide base film is 20 - 30 μm, and the thickness of the acrylic adhesive layer is 20 - 30 μm; preferably, the thickness of the polyimide base film is 25 μm, and the thickness of the acrylic adhesive layer is 25 μm.

[0032] As an embodiment of the present invention, the adhesive sheets described in step S5, step S7, and step S12 are each independently selected from at least one of PP semi-cured adhesive sheets and ABF semi-cured adhesive sheets.

[0033] As an embodiment of the present invention, the thicknesses of the copper foils described in step S5, step S7, and step S12 are 3 - 65 μm; for example, the thickness of the copper foil can be 3 μm, 12 μm, 18 μm, 35 μm, 65 μm.

[0034] As an embodiment of the present invention, the ceramic substrate described in step S11 is selected from any one of Si3N4 substrates, AlN substrates, and Al2O3 substrates.

[0035] Preferably, the ceramic substrate described in step S11 is a Si3N4 substrate; specifically, the Si3N4 substrate can be Si3N4-AMB, which has a heat dissipation coefficient of 80 W / mK, a medium thermal resistance, excellent toughness, better heat capacity parameters, and better reliability than AlN substrates (such as AlN-DBC) and Al2O3 substrates (such as Al2O3-DBC), enabling significant improvements in the heat dissipation capacity, current capacity, and power density of the power chip module, and being very suitable for automotive-grade silicon carbide module applications.

[0036] As an embodiment of the present invention, the baking temperature in step S11 is ≥150°C.

[0037] The purpose of baking is to form a sintered silver layer in the silver paste layer between the L5 layer and the ceramic substrate, thereby firmly fixing the ceramic substrate on the surface of the L5 layer.

[0038] In a second aspect, the present invention provides a printed circuit board with a locally embedded ceramic substrate prepared by the above preparation method.

[0039] Compared with the prior art, the beneficial effects of the present invention are:

[0040] The present invention effectively solves the problem of poor heat dissipation of printed circuit boards in the prior art by locally embedding a ceramic substrate at a specific position and utilizing its thermal conductivity, ensuring that the heat generated by the SiC chip under high-intensity operation can be quickly conducted and avoiding damage to the power chip module due to excessive temperature. Additionally, by using a dispensing process to apply a layer of silver paste in the area where the ceramic substrate needs to be bonded, and then attaching the ceramic substrate and baking it for curing, it not only helps improve production efficiency but also ensures the bonding strength and stability between the ceramic substrate and the L5 layer, further enhancing the reliability of the product. At the same time, choosing to locally embed the ceramic substrate instead of using ceramic materials throughout the substrate can effectively control costs while ensuring heat dissipation efficiency, achieving a balance between performance and economic benefits.

[0041] The present invention uses a bonding sheet in the non-power chip module area, and its fluidity and withstand voltage performance are superior to those of the heat dissipation adhesive film in the prior art; through the punching and pressing processes, it can ensure the complete filling of the thick copper gap, and the bonding force with the copper foil reaches more than 1.0 N / mm (far higher than 0.4 N / mm or less in the prior art), thereby improving the structural stability, reducing the risk of copper foil peeling in reliability tests, and ensuring the safe use of the product. Brief Description of the Drawings

[0042] Figure 1 It is a schematic structural diagram of the printed circuit board after the treatment in step S1 in the preparation method of the present invention;

[0043] Figure 2 It is a schematic structural diagram of the printed circuit board after the treatment in step S2 in the preparation method of the present invention;

[0044] Figure 3 It is a schematic structural diagram of the printed circuit board after the treatment in step S3 in the preparation method of the present invention;

[0045] Figure 4 It is a schematic structural diagram of the printed circuit board after the treatment in step S4 in the preparation method of the present invention;

[0046] Figure 5 It is a schematic structural diagram of the printed circuit board after the treatment in step S5 in the preparation method of the present invention;

[0047] Figure 6 It is a schematic structural diagram of the printed circuit board after the treatment in step S6 in the preparation method of the present invention;

[0048] Figure 7 It is a schematic structural diagram of the printed circuit board after the treatment in step S7 in the preparation method of the present invention;

[0049] Figure 8 It is a schematic structural diagram of the printed circuit board after the treatment in step S8 in the preparation method of the present invention;

[0050] Figure 9 It is a schematic structural diagram of the printed circuit board after being processed in step S9 in the preparation method of the present invention;

[0051] Figure 10 It is a schematic structural diagram of the printed circuit board after being processed in step S10 in the preparation method of the present invention;

[0052] Figure 11 It is a schematic structural diagram of the printed circuit board after being processed in step S11 in the preparation method of the present invention;

[0053] Figure 12 It is a schematic structural diagram of the printed circuit board after being processed in step S12 in the preparation method of the present invention;

[0054] Figure 13 It is a schematic structural diagram of the printed circuit board after being processed in step S13 in the preparation method of the present invention;

[0055] Figure 14 It is a schematic structural diagram of the printed circuit board after being processed in step S14 in the preparation method of the present invention. Specific embodiments

[0056] To better illustrate the purpose, technical solution and advantages of the present invention, the present invention will be further described below in conjunction with specific embodiments. Other materials, reagents, etc. used in the embodiments can be obtained from commercial channels without special instructions.

[0057] To make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0058] In addition, terms such as "first" and "second" in the present invention are used to distinguish the same items or similar items with basically the same functions. It should be understood that there is no logical or temporal dependence relationship between "first", "second", and "nth", nor are the quantity and execution order limited.

[0059] The embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings of the specification.

[0060] The present invention provides a preparation method for a printed circuit board with a locally embedded ceramic substrate, including the following steps:

[0061] S1. Perform surface treatment (i.e., graphic transfer treatment) on the upper surface of the core board to form layer L3, and perform surface treatment (i.e., graphic transfer treatment) on the lower surface of the core board to form layer L4;

[0062] Specifically, use a double-sided copper clad laminate as the core board, and the total thickness of the core board is 1.27 mm.

[0063] As Figure 1 shown, the copper layer on the upper surface of the core board undergoes the processes of film lamination → exposure → development → etching → film stripping to complete the graphic transfer of the core board layer and form a circuit layout pattern as layer L3; then, the copper layer on the lower surface of the core board undergoes the processes of film lamination → exposure → development → etching → film stripping to complete the graphic transfer of the core board layer and form a circuit layout pattern as layer L4.

[0064] It should be noted that the type of the core board can be selected according to actual needs. The circuit layout patterns on the upper surface and the lower surface of the core board can be the same circuit pattern or different circuit images. Moreover, the graphic transfer process on the upper surface and the graphic transfer process on the lower surface of the core board can be carried out simultaneously, or the graphic transfer on the upper surface can be carried out first and then the graphic transfer on the lower surface, or the graphic transfer on the lower surface can be carried out first and then the graphic transfer on the upper surface.

[0065] S2. Machine through-holes on the surface-treated core board;

[0066] As Figure 2 shown, use a milling machine to machine through-holes on the surface-treated core board. The through-holes are used for embedding power chip modules.

[0067] S3. Stick a tape on the surface of layer L4;

[0068] As Figure 3 shown, use a taping machine to stick a tape on the surface of layer L4. The tape is a high-temperature resistant tape, which is composed of a polyimide base film with a thickness of 25 μm and an acrylic adhesive layer with a thickness of 25 μm located on the surface of the polyimide base film.

[0069] S4. Mount the power chip module into the through-hole;

[0070] As Figure 4 shown, place the power chip module into the through-hole and fix it with the tape at the bottom of the through-hole to prevent the power chip module from moving. The power chip module is composed of a power chip module (SiC MOSFET) and a heat dissipation copper block with grooves. The power chip module is fixed to the groove part of the heat dissipation copper block by sintered silver. The distance between the heat dissipation copper block and the through-hole is 30 - 100 μm. At the same time, possible manufacturing tolerances and assembly clearances need to be considered to accurately place the power chip module into the through-hole.

[0071] S5. Stack a bonding sheet and a copper foil on the surface of the L3 layer in sequence, and perform lamination to form a first bonding layer and the L2 layer respectively; during lamination, the bonding sheet is heated and melted, and after filling the gap between the power chip module and the core board, it is cured;

[0072] As Figure 5 shown, first stack 2 bonding sheets (PP semi-cured bonding sheet material with a thickness of 65 μm) on the surface of the L3 layer, and then cover a layer of copper foil (with a thickness of 18 μm) on the surface of the bonding sheet; then, at a temperature of 235 °C, perform lamination at 3 MPa. During the high-temperature lamination process, the bonding sheet is heated and melted to form a flowing glue, and the flowing glue flows into and fills the gap between the power chip module and the core board. After curing, the power chip module is firmly embedded inside the core board. At the same time, the copper foil serves as the L2 layer, and a first bonding layer is formed after the flowing glue between the L2 layer and the L3 layer is cured.

[0073] S6. Remove the tape on the surface of the L4 layer (as Figure 6 shown);

[0074] S7. Stack a bonding sheet and a copper foil on the surface of the L4 layer in sequence, and perform lamination to form a second bonding layer and the L5 layer respectively;

[0075] As Figure 7 shown, first stack 2 bonding sheets (PP semi-cured bonding sheet material with a thickness of 65 μm) on the surface of the L4 layer, and then cover a layer of copper foil (with a thickness of 18 μm) on the surface of the bonding sheet; then, at a temperature of 235 °C, perform lamination at 3 MPa. During the high-temperature lamination process, the bonding sheet is heated and melted to form a flowing glue, and the flowing glue flows into and fills the gap between the power chip module and the core board. After curing, the power chip module is firmly embedded inside the core board. At the same time, the copper foil serves as the L5 layer, and a second bonding layer is formed after the flowing glue between the L4 layer and the L5 layer is cured.

[0076] S8. Process blind holes between the L2 layer and the L3 layer and between the L5 layer and the L4 layer, and fill copper in the blind holes;

[0077] As Figure 8 shown, after preprocessing the surface of the L2 layer and the surface of the L5 layer, use a laser drilling machine to process blind holes at the positions of the power chip module and the heat dissipation copper block, that is, at the position of the power chip module. The blind holes are located between the L2 layer and the L3 layer and between the L5 layer and the L4 layer. Remove the drilling sludge on the blind holes, and electroplate to fill the blind holes so that copper columns are formed inside the blind holes. The hole diameter of the blind holes is 200 μm, and the blind holes are mainly used to achieve electrical connection (i.e., conduct the circuit) and heat dissipation in specific areas within the same layer or between different layers.

[0078] S9. Process through holes penetrating the L2 layer to the L5 layer, and metallize the inner wall of the through holes;

[0079] AsFigure 9 As shown, mechanical drilling is carried out through L2 layer to L5 layer (i.e., through L2 layer, the first bonding layer, the core board, the second bonding layer and L5 layer) to form through holes; then the drilling dirt of the through holes is removed, and electroplating is carried out to metallize the inner wall of the through holes until the thickness of the electroplated hole copper ≥ 25μm. At the same time, epoxy resin is filled in the electroplated through holes. The hole diameter of the through holes is 0.4mm, which is used to penetrate the entire circuit board and connect the copper foil circuits between different layers to ensure that signals and power can be smoothly transmitted between layers.

[0080] S10. Surface treatment (i.e., graphic transfer treatment) is carried out on L2 layer and L5 layer respectively;

[0081] As Figure 10 shown, L2 layer undergoes the processes of laminating → exposure → development → etching → stripping to complete graphic transfer and form a circuit layout pattern; L5 layer undergoes the processes of laminating → exposure → development → etching → stripping to complete graphic transfer and form a circuit layout pattern.

[0082] S11. The ceramic substrate is bonded to the area corresponding to the power chip module on the surface of L5 layer through silver paste and baked for fixation;

[0083] As Figure 11 shown, a layer of silver paste is dot-coated in the area corresponding to the power chip module on the surface of L5 layer using a dispensing machine, and then the ceramic substrate (Si3N4-AMB) is pasted on the surface of the silver paste and baked at 180°C for 2h for fixation.

[0084] S12. First, a bonding sheet and a copper foil are sequentially stacked on the surface of L5 layer and pressed to form the fourth bonding layer and L6 layer respectively, where the copper foil is in contact with the surface of the ceramic substrate; then a bonding sheet and a copper foil are sequentially stacked on the surface of L2 layer and pressed to form the third bonding layer and L1 layer respectively;

[0085] As Figure 12 shown, first, the area corresponding to the ceramic substrate is punched out from the bonding sheet (PP semi-cured bonding sheet material with a thickness of 65μm) so that the ceramic substrate is just exposed after being stacked on the surface of L5 to avoid the bonding sheet sticking above the ceramic substrate and affecting the heat dissipation performance; then 2 layers of punched bonding sheets are stacked on the surface of L5 layer, and a layer of copper foil (with a thickness of 65μm) is covered on the surface of the bonding sheet; then, at a temperature of 235°C, pressing is carried out at 3MPa. The bonding sheet is melted and formed into a flowing glue during the high-temperature pressing process, and the copper foil serves as L6 layer. After the flowing glue between L6 layer and L5 layer is cured, the fourth bonding layer is formed.

[0086] First, stack 2 layers of bonding sheets (PP semi-cured bonding sheet with a thickness of 65 μm) on the surface of the L2 layer, and then cover a layer of copper foil (with a thickness of 12 μm) on the surface of the bonding sheet; then, at a temperature of 235 °C, press-bond at 3 MPa. The bonding sheet melts during the high-temperature press-bonding process to form a flowing glue, and the copper foil serves as the L1 layer. After the flowing glue between the L1 layer and the L2 layer cures, a third bonding layer is formed.

[0087] S13. Process blind holes between the L1 layer and the L2 layer, and fill the blind holes with copper; perform surface treatment (i.e., pattern transfer treatment) on the L1 layer;

[0088] As Figure 13 shown, after pre-treating the surface of the L1 layer, process blind holes (hole diameter is 150 μm) with a laser drilling machine. The blind holes are located between the L1 layer and the L2 layer. Remove the drilling residues on the blind holes, electroplate to fill the blind holes, and form copper columns inside the blind holes. The L1 layer undergoes the processes of film pasting → exposure → development → etching → film stripping to complete pattern transfer and form a circuit layout pattern.

[0089] S14. Through solder mask processing, anti-oxidation treatment, and cutting and forming, a printed circuit board with a ceramic substrate embedded in a local area is obtained.

[0090] As Figure 14 shown, the solder mask processing protects the areas where green oil needs to be printed, the anti-oxidation treatment is to deposit nickel-palladium-gold (or nickel-gold) to protect the pads that need to be soldered, and through cutting and forming, a printed circuit board with a ceramic substrate embedded in a local area is obtained.

[0091] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and do not limit the protection scope of the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the essence and scope of the technical solutions of the present invention.

Claims

1. A preparation method of a printed circuit board with a locally embedded ceramic substrate, characterized in that, It includes the following steps: S1. Perform surface treatment on the upper surface of the core board to form layer L3, and perform surface treatment on the lower surface of the core board to form layer L4; S2. Process through-holes on the surface-treated core board; S3. Stick a tape on the surface of layer L4; S4. Mount the power chip module into the through-hole; S5. Stack a bonding sheet and a copper foil on the surface of layer L3 in sequence, and press them to form a first bonding layer and layer L2 respectively; After pressing, the bonding sheet is heated and melted to fill the gap between the power chip module and the core board, and then cured; S6. Remove the tape on the surface of layer L4; S7. Stack a bonding sheet and a copper foil on the surface of layer L4 in sequence, and press them to form a second bonding layer and layer L5 respectively; S8. Process blind holes between layer L2 and layer L3 and between layer L5 and layer L4, and fill copper in the blind holes; S9. Process through-holes through layer L2 to layer L5, and metallize the inner wall of the through-holes; S10. Perform surface treatment on layer L2 and layer L5 respectively; S11. Bond the ceramic substrate to the area corresponding to the power chip module on the surface of layer L5 through silver paste and bake and fix it; S12. First, stack a bonding sheet and a copper foil on the surface of layer L5 in sequence, and press them to form a fourth bonding layer and layer L6 respectively, where the copper foil is in contact with the surface of the ceramic substrate; Then stack a bonding sheet and a copper foil on the surface of layer L2 in sequence, and press them to form a third bonding layer and layer L1 respectively; S13. Process blind holes between layer L1 and layer L2, and fill copper in the blind holes; Perform surface treatment on layer L1; S14. Through solder mask processing, anti-oxidation treatment and cutting and forming, a printed circuit board with a ceramic substrate embedded in a local area is obtained.

2. The preparation method according to claim 1, characterized in that, In step S1, the core board is a double-sided copper clad laminate.

3. The preparation method according to claim 1, characterized in that, The surface treatment in step S1, the surface treatment in step S10, and the surface treatment in step S13 include pattern transfer; The pattern transfer includes film pasting, exposure, development, etching and film stripping.

4. The preparation method according to claim 1, wherein In step S2, the through-holes are processed on the surface-treated core board by one or more of die stamping, mechanical milling, CO2 laser drilling, and UV cutting.

5. The preparation method according to claim 1, characterized in that, In step S3, the tape includes a polyimide base film and an acrylic adhesive layer provided on the surface of the polyimide base film.

6. The preparation method according to claim 1, wherein, The bonding sheet in step S5, the bonding sheet in step S7, and the bonding sheet in step S12 are each independently selected from at least one of PP semi-cured bonding sheet materials and ABF semi-cured bonding sheet materials.

7. The preparation method according to claim 1, characterized in that, The thickness of the copper foil in step S5, the copper foil in step S7, and the copper foil in step S12 is 3 - 65 μm.

8. The preparation method according to claim 1, characterized in that, In step S11, the ceramic substrate is selected from any one of Si3N4 substrates, AlN substrates, and Al2O3 substrates.

9. The preparation method according to claim 1, characterized in that, In step S11, the baking temperature ≥ 150 °C.

10. A printed circuit board with a ceramic substrate embedded in a local area prepared by the preparation method according to any one of claims 1 - 9.

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