Back contact cell and manufacturing method thereof, back contact stacked cell, and photovoltaic module

Abstract

The embodiments of the present disclosure relate to the photovoltaic field and provide a back-contact cell and a manufacturing method thereof, a back-contact stack cell, and a photovoltaic module. The manufacturing method includes: providing a substrate having a first and a second relative surface, the second surface including a first and a second region alternately arranged along a second direction; forming a stack structure including a stacked tunneling layer, a doped polysilicon layer and a first protective layer on the first region; forming an initial second passivation stack including a stacked intrinsic amorphous silicon film and a doped amorphous silicon film covering the second surface; forming a second protective layer on the side of the doped amorphous silicon film away from the substrate; etching the first region using a first laser etching process; using the second protective layer located on the second region as an etching barrier layer and the first protective layer as an etching stop layer, and using a first etching solution to remove the initial second passivation stack or the second protective layer and the initial second passivation stack remaining on the first region, which is at least beneficial to improving the photoelectric conversion efficiency of the back-contact cell.

Description

Technical Field

[0001] The present disclosure relates to the photovoltaic field, and in particular to a back-contact cell and a manufacturing method thereof, a back-contact stacked cell, and a photovoltaic module. Background Art

[0002] As fossil fuels gradually deplete, photovoltaic cells are becoming increasingly popular as a new energy alternative. Photovoltaic cells convert sunlight into electricity. They utilize the photovoltaic principle to generate charge carriers, which are then extracted using electrodes, enabling efficient utilization of the electrical energy. To further reduce grid lines obstructing the front surface of photovoltaic cells, research on BC cells (back contact) is intensifying.

[0003] However, in order to improve the photoelectric conversion efficiency of BC cells, a passivation contact structure is also designed on the back of the BC cell. Based on this, the existing preparation process of back-contact cells that introduce a passivation contact structure is usually relatively complicated. In addition, when designing different passivation contact structures in different areas to contact grid lines of different polarities, both lasers and etching solutions are required. Not only is it difficult to completely remove the passivation contact structures that need to be removed, but it is also easy to cause various damages to the passivation contact structures that need to be retained, resulting in poor stability in the preparation process of back-contact cells and low photoelectric conversion efficiency of the prepared back-contact cells.

[0004] Therefore, how to improve the photoelectric conversion efficiency of BC cells still needs further research. Summary of the Invention

[0005] The embodiments of the present disclosure provide a back-contact cell and a method for manufacturing the same, a back-contact stacked cell, and a photovoltaic module, which are at least beneficial in improving the photoelectric conversion efficiency of the back-contact cell.

[0006] According to some embodiments of the present disclosure, on the one hand, an embodiment of the present disclosure provides a method for manufacturing a back-contact battery, comprising: providing a substrate, wherein the substrate has a first surface and a second surface opposite to each other along a first direction, the second surface comprising a first region and a second region alternately arranged along a second direction, the first direction being a thickness direction of the substrate, and the second direction intersecting with the first direction; forming a stacked structure on the first region, wherein the stacked structure comprises a tunneling layer, a doped polysilicon layer and a first protective layer stacked along the first direction; forming an initial second passivation stack on a surface jointly constituted by the second surface and the stacked structure, wherein the initial second passivation stack comprises an intrinsic amorphous silicon film and a doped amorphous silicon film stacked along the first direction; A second protective layer is formed on one side of the silicon film; a first laser etching process is used to etch the second protective layer and the initial second passivation stack located on the first area, and part of the initial second passivation stack, or part of the second protective layer and part of the initial second passivation stack remain on the first area; the second protective layer located on the second area is used as an etching barrier layer, and the first protective layer is used as an etching stop layer, and a first etching solution is used to remove the initial second passivation stack remaining on the first area, or the second protective layer and the initial second passivation stack remaining on the first area are removed, and the remaining initial second passivation stack located on the second area is the second passivation stack, and the tunneling layer and the doped polysilicon layer constitute the first passivation stack.

[0007] In some embodiments, after forming the stacked structure and before forming the initial second passivation stack, the manufacturing method of the back contact battery further includes: performing a texturing treatment on the first surface to convert the first surface into a texturing surface; forming a passivation anti-reflection layer on the texturing surface; wherein the process temperature used in the step of forming the passivation anti-reflection layer is a first temperature, and the process temperature used in the step of forming the second protective layer is a second temperature, and the first temperature is greater than or equal to the second temperature.

[0008] In some embodiments, the second temperature is 150°C to 250°C.

[0009] In some embodiments, the steps of forming the passivation anti-reflection layer include: using a first deposition process to form an aluminum oxide film on the velvet surface, and the aluminum oxide film is also formed on a partial area of ​​the second surface and on the side surface connecting the first surface and the second surface; using a second deposition process to form a silicon nitride film on the side of the aluminum oxide film away from the substrate; using a chain etching process to remove the silicon nitride film located on a partial area of ​​the second surface and the side surface, and the remaining silicon nitride film located on the first surface is a silicon nitride layer; using the silicon nitride layer as an etching stop layer, using a third etching solution to remove the aluminum oxide film located on a partial area of ​​the second surface and the side surface, and the remaining aluminum oxide film located on the first surface is an aluminum oxide layer, and the passivation anti-reflection layer includes the aluminum oxide layer and the silicon nitride layer.

[0010] In some embodiments, the step of forming the stacked structure includes: forming an initial stacked structure on the second surface, the initial stacked structure including a tunneling film, a doped polysilicon film and a first protective film stacked along the first direction; using a second laser etching process to preliminarily etch the initial stacked structure located on the second area to remove part of the thickness of the initial stacked structure, and performing laser modification treatment on at least part of the thickness of the initial stacked structure; using a second etching liquid to remove the remaining initial stacked structure located on the second area, the remaining initial stacked structure located on the first area is the stacked structure, the remaining tunneling film located on the first area is the tunneling layer, the remaining doped polysilicon film located on the first area is the doped polysilicon layer, and the remaining first protective film located on the first area is the first protective layer.

[0011] In some embodiments, the reaction temperature of the first etching solution is lower than the reaction temperature of the second etching solution; and / or, the reaction time of the first etching solution is lower than the reaction time of the second etching solution; and / or, the first etching solution and the second etching solution are both potassium hydroxide solutions, and the concentration of potassium hydroxide in the first etching solution is lower than that in the second etching solution.

[0012] In some embodiments, in the step of forming the stacked structure, the second etching solution also etches the substrate located in the second area, the surface of the substrate located in the second area is the second surface, the surface of the substrate located in the first area is the first surface, and the first surface is used as the reference plane, so that the second surface is lower than the first surface.

[0013] In some embodiments, along the first direction, a distance between the second surface and the first surface is 3 μm-10 μm.

[0014] In some embodiments, the laser used in the first laser etching process is a first laser, the laser used in the second laser etching process is a second laser, and the wavelength of the first laser is smaller than the wavelength of the second laser.

[0015] In some embodiments, a first laser is used to generate a first laser in the first laser etching process; and a second laser is used to generate a second laser in the second laser etching process; wherein, the laser scanning speed of the first laser is greater than the laser scanning speed of the second laser; and / or, the power of the first laser is less than the power of the second laser; and / or, the frequency of the first laser is less than the frequency of the second laser.

[0016] In some embodiments, the laser scanning speed of the first laser is 40m / s~60m / s, and the laser scanning speed of the second laser is 30m / s~50m / s; and / or, the power of the first laser is 10W~30W, and the power of the second laser is 60W~80W; and / or, the frequency of the first laser is 900kHz~1100kHz, and the frequency of the second laser is 1100kHz~1300kHz.

[0017] In some embodiments, after forming the second passivation stack, the method for manufacturing the back-contact battery further includes: removing the second protective layer located on the second region and removing the first protective layer using an acid pickling process.

[0018] According to some embodiments of the present disclosure, on the other hand, embodiments of the present disclosure further provide a back-contact battery, which is a back-contact battery formed by the back-contact battery manufacturing method as described in any one of the above items.

[0019] According to some embodiments of the present disclosure, another aspect of the embodiments of the present disclosure further provides a back-contact stack cell, comprising: a bottom cell, which is a back-contact cell formed by the method for manufacturing a back-contact cell as described in any one of the above items, or is a back-contact cell as described above; a top cell, which is one of a perovskite cell, a donor-acceptor cell, a cadmium telluride solar cell, a copper indium gallium selenide solar cell or a gallium arsenide solar cell, and the top cell is located on one side of the bottom cell.

[0020] According to some embodiments of the present disclosure, on the other hand, the embodiments of the present disclosure further provide a photovoltaic module, comprising: a cell string, formed by connecting a plurality of back-contact cells formed by the manufacturing method of the back-contact cell as described in any of the above items, or connected by a plurality of back-contact cells as described above, or connected by a plurality of back-contact laminated cells as described above; a packaging film for covering the surface of the cell string; and a cover plate for covering the surface of the packaging film facing away from the cell string.

[0021] The technical solution provided by the embodiments of the present disclosure has at least the following advantages:

[0022] Before performing the first laser etching process, not only is a first protective layer formed on the first region, but a second protective layer is also formed on the side of the doped amorphous silicon film away from the intrinsic amorphous silicon film. Then, without causing laser damage or over-etching to the stacked structure, the first laser etching process is first used to perform preliminary etching on the second protective layer and the initial second passivation stack located on the first region. Then, in cooperation with the second protective layer and the first protective layer located on the second region, the first etching solution is used to perform supplementary etching on the initial second passivation stack remaining on the first region, or the second protective layer and the initial second passivation stack remaining on the first region, to ensure that in the ultimately formed back contact cell, the first passivation stack composed of the tunneling layer and the doped polysilicon layer is only located in the first region, and the second passivation stack is only located in the second region, thereby facilitating reduction of the series resistance of the ultimately formed back contact cell and improving the fill factor of the back contact cell, thereby improving the photoelectric conversion efficiency of the back contact cell. Moreover, with the mutual coordination of various steps, it is beneficial to improve the stability of the preparation process of the back-contact battery and reduce the difference in photoelectric conversion efficiency between different back-contact energy batteries prepared, thereby improving the yield of the prepared back-contact battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the drawings do not constitute a scale limitation. In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the traditional technology, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 A flow chart of a method for manufacturing a back-contact battery according to an embodiment of the present disclosure;

[0025] Figure 2 A partial cross-sectional schematic diagram of a substrate in a method for manufacturing a back-contact battery provided in one embodiment of the present disclosure;

[0026] Figure 3 A schematic partial cross-sectional view of a back-contact battery manufacturing method according to an embodiment of the present disclosure after an initial stacked structure is formed;

[0027] Figure 4A partial cross-sectional schematic diagram of a back-contact battery after forming a stacked structure in a method for manufacturing the back-contact battery according to an embodiment of the present disclosure;

[0028] Figure 5 A schematic partial cross-sectional view after forming an aluminum oxide film and a silicon nitride film in a method for manufacturing a back-contact battery provided by an embodiment of the present disclosure;

[0029] Figure 6 A schematic partial cross-sectional view after forming a silicon nitride layer in a method for manufacturing a back-contact battery provided by an embodiment of the present disclosure;

[0030] Figure 7 A schematic partial cross-sectional view of a back-contact battery manufacturing method according to an embodiment of the present disclosure after an aluminum oxide layer is formed;

[0031] Figure 8 A schematic partial cross-sectional view of a back contact battery manufacturing method according to an embodiment of the present disclosure after forming an initial second passivation stack;

[0032] Figure 9 A schematic partial cross-sectional view after forming a second protective layer in a method for manufacturing a back-contact battery provided by an embodiment of the present disclosure;

[0033] Figure 10 A schematic partial cross-sectional view after the first laser etching process is performed in the method for manufacturing a back-contact battery provided by one embodiment of the present disclosure;

[0034] Figure 11 A schematic partial cross-sectional view of a back-contact battery after etching using a first etching solution in a method for manufacturing the back-contact battery according to an embodiment of the present disclosure;

[0035] Figure 12 A partial cross-sectional schematic diagram of a back contact battery after an acid pickling process in a method for manufacturing a back contact battery provided by an embodiment of the present disclosure;

[0036] Figure 13 A partial cross-sectional schematic diagram of a back-contact stacked battery provided in yet another embodiment of the present disclosure;

[0037] Figure 14 A schematic diagram of a connection method between a top cell and a bottom cell in a back-contact stacked cell according to another embodiment of the present disclosure;

[0038] Figure 15 A schematic diagram of another connection method for the top cell and the bottom cell in a back-contact stacked cell provided in another embodiment of the present disclosure;

[0039] Figure 16 A schematic diagram of another connection method for the top cell and the bottom cell in a back-contact stack cell provided in yet another embodiment of the present disclosure.

[0040] Description of reference numerals:

[0041] 100, substrate; 110, first surface; 120, second surface; 130, first region; 140, second region; 150, side; 101, stacked structure; 111, initial stacked structure; 102, tunneling layer; 112, tunneling film; 103, doped polysilicon layer; 113, doped polysilicon film; 123, first passivation stack; 104, first protective layer; 114, first protective film; 10 5. Initial second passivation stack; 115. Second passivation stack; 106. Intrinsic amorphous silicon film; 116. Intrinsic amorphous silicon layer; 107. Doped amorphous silicon film; 117. Doped amorphous silicon layer; 108. Second protective layer; 109. Passivation anti-reflection layer; 119. Aluminum oxide film; 129. Silicon nitride film; 139. Silicon nitride layer; 149. Aluminum oxide layer; 159. Bottom cell; 169. Top cell. DETAILED DESCRIPTION

[0042] As can be seen from the background technology, the photoelectric conversion efficiency of back-contact cells needs to be improved.

[0043] The embodiments of the present disclosure provide a back-contact cell and a method for manufacturing the same, a back-contact stacked cell, and a photovoltaic module. In the method for manufacturing the back-contact cell, before performing a first laser etching process, not only a first protective layer is formed on the first region, but also a second protective layer is formed on the side of the doped amorphous silicon film away from the intrinsic amorphous silicon film. Then, without causing laser damage or over-etching to the stacked structure, the first laser etching process is first used to perform preliminary etching on the second protective layer and the initial second passivation stack located on the first region. Then, in cooperation with the second protective layer and the first protective layer located on the second region, a first etching solution is used to perform supplementary etching on the initial second passivation stack remaining on the first region, or the second protective layer and the initial second passivation stack remaining on the first region, to ensure that in the final back-contact cell, the first passivation stack composed of the tunneling layer and the doped polysilicon layer is only located in the first region, and the second passivation stack is only located in the second region, thereby facilitating reduction of the series resistance of the final back-contact cell and improving the fill factor of the back-contact cell, thereby improving the photoelectric conversion efficiency of the back-contact cell. Moreover, with the mutual coordination of various steps, it is beneficial to improve the stability of the preparation process of the back-contact battery and reduce the difference in photoelectric conversion efficiency between different back-contact energy batteries prepared, thereby improving the yield of the prepared back-contact battery.

[0044] In the description of the embodiments of the present disclosure, technical terms such as "first" and "second" are used solely to distinguish between different objects and should not be understood to indicate or imply relative importance or to implicitly specify the quantity, specific order, or primary and secondary relationship of the technical features indicated. In the description of the embodiments of the present disclosure, "plurality" means more than two, unless otherwise specifically defined.

[0045] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present disclosure. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0046] In the description of the embodiments of the present disclosure, the term "and / or" is merely a description of an association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can represent the following three situations: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0047] In the description of the embodiments of the present disclosure, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0048] In the description of the embodiments of the present disclosure, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the embodiments of the present disclosure.

[0049] In the description of the embodiments of the present disclosure, unless otherwise expressly specified or limited, technical terms such as "installed," "connected," "connected," and "fixed" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and they can refer to internal connectivity between two components or interaction between two components. Those skilled in the art can understand the specific meanings of the above terms in the embodiments of the present disclosure based on specific circumstances.

[0050] In the accompanying drawings corresponding to the embodiments of the present disclosure, the thickness and area of ​​layers are exaggerated for better understanding and ease of description. When a component (such as a layer, film, region, or substrate) is described as being on or on the surface of another component, the component may be "directly" located on the surface of the other component, or a third component may be present between the two components. Conversely, when a component is described as being on the surface of another component, or as being formed or disposed on the surface of one component, it indicates that there is no third component between the two components. Furthermore, when a component is described as being "substantially" formed on another component, this means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0051] In the description of the embodiments of the present disclosure, when a component is referred to as "including" another component, unless otherwise specified, this does not exclude other components, and other components may further be included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on" another component, it may be "directly on" the other component (i.e., located on the surface of the other component with no other components between them) or another component may be present between them. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "directly on" another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, this means that no other components are located between them.

[0052] The terms used herein in the description of the various embodiments are intended only to describe the specific embodiments and are not intended to be limiting. As used in the description of the various embodiments and the appended claims, "the component" is intended to include the plural form unless the context clearly indicates otherwise. A component includes a layer, film, region, or plate.

[0053] The following describes various embodiments of the present disclosure in detail with reference to the accompanying drawings. However, those skilled in the art will appreciate that many technical details are provided in the various embodiments of the present disclosure to help readers better understand the embodiments of the present disclosure. However, even without these technical details and the various variations and modifications based on the following embodiments, the technical solutions claimed in the embodiments of the present disclosure can be implemented.

[0054] An embodiment of the present disclosure provides a method for manufacturing a back-contact battery. The method for manufacturing a back-contact battery provided by an embodiment of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0055] Combined with reference Figures 1 to 11 , Figure 1 A flowchart of a method for manufacturing a back-contact battery provided in one embodiment of the present disclosure is provided. The method for manufacturing a back-contact battery includes at least the following steps:

[0056] S1: Reference Figure 2 , Figure 2 A partial cross-sectional schematic diagram of a substrate in a method for manufacturing a back-contact battery provided in an embodiment of the present disclosure is provided. A substrate 100 is provided. The substrate 100 has a first surface 110 and a second surface 120 opposite to each other along a first direction X. The second surface 120 includes first areas 130 and second areas 140 alternately arranged along a second direction Y. The first direction X is the thickness direction of the substrate 100, and the second direction Y intersects with the first direction X.

[0057] It should be noted that in order to improve the clarity of the diagram, Figure 2 Only one first area 130 and one second area 140 are illustrated. In actual applications, the second surface includes multiple first areas and multiple second areas, and a first area and a second area are alternately arranged along the second direction. In other words, there is a first area between two adjacent second areas, and there is a second area between two adjacent first areas.

[0058] S2: Combined with reference Figure 3 and Figure 4 A stacked structure 101 is formed on the first region 130. The stacked structure 101 includes a tunneling layer 102, a doped polysilicon layer 103 and a first protective layer 104 stacked along the first direction X. It should be noted that the following will be Figure 3 and Figure 4 Provide detailed explanation.

[0059] S3: Reference Figures 5 to 8 An initial second passivation stack 105 is formed on the surface formed by the second surface 120 and the stacked structure 101. The initial second passivation stack 105 includes an intrinsic amorphous silicon film 106 and a doped amorphous silicon film 107 stacked along the first direction X. It should be noted that Figure 8 A partial cross-sectional diagram of a back contact battery manufacturing method provided in an embodiment of the present disclosure after forming an initial second passivation stack. Figures 5 to 7 Provide detailed explanation.

[0060] S4: Reference Figure 9 , Figure 9 A partial cross-sectional schematic diagram after forming a second protective layer in the manufacturing method of a back-contact battery provided in one embodiment of the present disclosure, wherein the second protective layer 108 is formed on a side of the doped amorphous silicon film 107 away from the intrinsic amorphous silicon film 106 .

[0061] S5: Combined with reference Figure 9 and Figure 10 , using a first laser etching process, the second protective layer 108 and the initial second passivation stack 105 located on the first area 130 are etched, and part of the initial second passivation stack 105, or part of the second protective layer 108 and part of the initial second passivation stack 105 remain on the first area 130.

[0062] It should be noted that Figure 10 A partial cross-sectional schematic diagram of a back contact cell manufacturing method according to an embodiment of the present disclosure after the first laser etching process is performed. In addition, Figure 10 Taking the example where part of the second protective layer 108 and part of the initial second passivation stack 105 remain on the first region 130 after the first laser etching process, in actual applications, the first laser etching process can also remove the second protective layer located on the first region, and the initial second passivation stack may contain both the doped amorphous silicon film and the intrinsic amorphous silicon film, or only the intrinsic amorphous silicon film.

[0063] S6: Combined with reference Figure 10 and Figure 11 , using the second protective layer located on the second area 140 as an etching barrier layer and the first protective layer 104 as an etching stop layer, using a first etching solution to remove the initial second passivation stack 105 remaining on the first area 130, or, removing the second protective layer 108 and the initial second passivation stack 105 remaining on the first area 130, and the remaining initial second passivation stack 105 located on the second area 140 is the second passivation stack 115.

[0064] It should be noted that the remaining intrinsic amorphous silicon film 106 located on the second region 140 can be regarded as the intrinsic amorphous silicon layer 116, and the remaining doped amorphous silicon film 107 located on the second region 140 can be regarded as the doped amorphous silicon layer 117. The second passivation stack 115 includes the intrinsic amorphous silicon layer 116 and the doped amorphous silicon layer 117 stacked along the first direction X.

[0065] in, Figure 11 A schematic partial cross-sectional view of a back-contact battery after etching using a first etching solution in a method for manufacturing the back-contact battery according to an embodiment of the present disclosure.

[0066] It is worth noting that when performing step S5: using the first laser etching process to etch the second protective layer 108 and the initial second passivation stack 105 located on the first area 130, on the one hand, based on the limitations of the accuracy of the laser itself, such as the lack of uniformity of the laser energy, on the other hand, in order to avoid laser damage to the stacked structure 101 located on the first area 130, and on the other hand to avoid over-etching of the stacked structure 101 by the first laser etching process, the laser energy used in the first laser etching process is limited. Therefore, after the first laser etching process, part of the initial second passivation stack 105, or part of the second protective layer 108 and part of the initial second passivation stack 105 remain on the first area 130.

[0067] On this basis, the first protective layer 104 and the second protective layer 108 are first designed before the first laser etching process. Subsequently, the second protective layer located on the second area 140 is used as an etching barrier layer, and the first protective layer 104 is used as an etching stop layer. The first etching solution is used to remove the initial second passivation stack 105 remaining on the first area 130, or the second protective layer 108 and the initial second passivation stack 105 remaining on the first area 130 are removed to ensure that in the finally formed back contact battery, the first passivation stack 123 composed of the tunneling layer 102 and the doped polysilicon layer 103 is only located in the first area 130, and the second passivation stack 115 is only located in the second area 140. In this way, on the one hand, it is possible to effectively avoid the initial second passivation stack 105 remaining on the stacked structure 101, so as to avoid the increase in the series resistance and the decrease in the fill factor of the back contact battery caused by the initial second passivation stack 105 remaining on the first region 130; on the other hand, the supplementary etching based on the first etchant is conducive to reducing the laser energy used in the first laser etching process in step S5, so as to avoid laser damage to the stacked structure 101 located on the first region 130, and to avoid over-etching of the stacked structure 101 by the first laser etching process; on the other hand, in the step of supplementary etching with the first etchant, not only can the second protective layer 108 located on the second region 140 be used as an etching barrier layer to prevent the first etchant from etching the initial second passivation stack 105 located on the second region 140, but the first protective layer 104 can also be used as an etching stop layer to prevent the first etchant from over-etching the stacked structure 101, for example, to avoid etching the doped polysilicon layer 103. Such a multi-faceted coordinated design is not only beneficial to improving the photoelectric conversion efficiency of the back-contact battery, but also beneficial to improving the stability of the preparation process of the back-contact battery, and reducing the difference in photoelectric conversion efficiency between different back-contact batteries, thereby improving the yield of the prepared back-contact battery.

[0068] In other words, before the first laser etching process is performed, not only is the first protective layer 104 formed on the first region 130, but a second protective layer 108 is also formed on the side of the doped amorphous silicon film 107 away from the intrinsic amorphous silicon film 106. Then, without causing laser damage or over-etching to the stacked structure 101, the first laser etching process is first used to perform a preliminary etching of the second protective layer 108 and the initial second passivation stack 105 located on the first region 130. Then, with the cooperation of the second protective layer 108 and the first protective layer 104 located on the second region 140, the first etching solution is used to perform a supplementary etching of the second protective layer 108 and the initial second passivation stack 105 located on the first region 130. This ensures that in the ultimately formed back-contact cell, the stacked structure 101 is located only in the first region 130, and the second passivation stack 115 is located only in the second region 140. This helps reduce the series resistance of the ultimately formed back-contact cell, improves the fill factor of the back-contact cell, and thereby improves the photoelectric conversion efficiency of the back-contact cell. Moreover, the mutual coordination of steps S2 to S6 is conducive to improving the stability of the preparation process of the back-contact battery and reducing the difference in photoelectric conversion efficiency between different back-contact batteries prepared, thereby improving the yield of the prepared back-contact battery.

[0069] It should be noted that the back-contact cell provided in one embodiment of the present disclosure is a photovoltaic cell formed on the basis of BC cell platform technology, combining Topcon (Tunnel Oxide Passivated Contact) technology and HJT (Heterojunction with Intrinsic Thin-layer) technology.

[0070] The following will describe in more detail the method for manufacturing a back-contact battery provided by an embodiment of the present disclosure with reference to the accompanying drawings.

[0071] In some embodiments, reference Figure 4 The doped polysilicon layer 103 formed in step S2 is doped with a first type of doping element, referring to Figure 8 The doped amorphous silicon film 107 formed in step S3 is doped with a second type doping element, the first type doping element is one of an N-type doping element and a P-type doping element, and the second type doping element is the other of the N-type doping element and the P-type doping element.

[0072] In some examples, the N-type doping element may be at least one of Group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As); the P-type semiconductor substrate is doped with a P-type element, and the P-type doping element may be at least one of Group III elements such as boron (B), aluminum (Al), gallium (Ga), or gallium (In).

[0073] In some embodiments, the substrate 100 is configured to receive incident light and generate photogenerated carriers.

[0074] In some cases, the material of substrate 100 may be an elemental semiconductor material. Optionally, the elemental semiconductor material is composed of a single element, such as silicon or germanium. The elemental semiconductor material may be in a single crystalline state, a polycrystalline state, an amorphous state, or a microcrystalline state (a state having both single crystalline and amorphous states is referred to as a microcrystalline state). For example, silicon may be at least one of single crystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0075] In other cases, the substrate 100 may be made of a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanium, silicon carbide, gallium arsenide, indium gallium, perovskite, cadmium telluride, or copper indium selenide.

[0076] In some other cases, the substrate 100 may also be a sapphire substrate, a silicon-on-insulator substrate, or a germanium-on-insulator substrate.

[0077] In some embodiments, the substrate 100 may be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with N-type doping elements, while the P-type semiconductor substrate is doped with P-type elements.

[0078] In some embodiments, in conjunction with reference Figures 5 to 8 After performing step S2, i.e. forming the stacked structure 101, and before performing step S3, i.e. forming the initial second passivation stack 105, the method for manufacturing the back contact cell may further include the following steps:

[0079] Combined with reference Figure 4 and Figure 5 , performing a velvet treatment on the first surface 110 to convert the first surface 110 into a velvet surface; Figures 5 to 8 , forming a passivation anti-reflection layer 109 on the suede surface; wherein the process temperature used in the step of forming the passivation anti-reflection layer 109 is the first temperature, forming the second protective layer 108 (reference Figure 9 ) step, the process temperature used is the second temperature, and the first temperature is greater than or equal to the second temperature.

[0080] It is worth noting that in the initial second passivation stack 105 formed in the subsequent step S3, the intrinsic amorphous silicon film 106 and the doped amorphous silicon film 107 are both amorphous. In order to ensure the excellent passivation performance of the intrinsic amorphous silicon film 106 and the doped amorphous silicon film 107 on the second region 140, and to ensure that the photoelectric conversion efficiency of the back contact battery will not be reduced, the process temperature of other process steps after the formation of the initial second passivation stack 105 should not be too high to avoid affecting the amorphous state of the intrinsic amorphous silicon film 106 and the doped amorphous silicon film 107. Based on this, before the initial second passivation stack 105 is formed on the second surface 120, the first surface 110 is textured and a passivation anti-reflection layer 109 is formed on the textured surface. Even if the first temperature is greater than the second temperature, the process temperature of forming the passivation anti-reflection layer 109 can be avoided from having an adverse effect on the amorphous state of the intrinsic amorphous silicon film 106 and the doped amorphous silicon film 107, so as to ensure that the finally formed second passivation stack 115 has excellent passivation performance for the second region 140, so as to improve the light trapping effect of the first surface 110 on the incident light while ensuring that the second surface 120 is well passivated, so as to further improve the photoelectric conversion efficiency of the back contact cell.

[0081] It should be noted that the process steps of texturing the first surface 110 and forming a passivation anti-reflection layer 109 on the velvet surface are interspersed between the step of preparing the stacked structure 101 for the first area 130 of the second surface 120 and the step of preparing the second passivation stack 115 for the second area 140 of the second surface 120. This is beneficial to ensuring that the process temperature for forming the passivation anti-reflection layer 109 on the velvet surface, that is, the first temperature, is not subject to excessive restrictions. It can be prepared at a higher process temperature, that is, the first temperature is designed to be greater than the second temperature, and it can also be prepared at a lower process temperature that is adapted to the subsequently formed intrinsic amorphous silicon film 106 and doped amorphous silicon film 107, that is, the first temperature is designed to be equal to the second temperature.

[0082] Furthermore, the process temperature for texturing the first surface 110 is generally lower than the process temperature (ie, the second temperature) used in forming the second protection layer 108. In some examples, the process temperature for texturing the first surface 110 is generally lower than 100°C.

[0083] In some cases, the second temperature may be 150°C to 250°C, for example, 160°C, 170°C, 180°C, 190°C, 200°C, 210°C, 220°C, 230°C, or 240°C.

[0084] In some cases, a plasma-enhanced chemical vapor deposition (PECVD) process can be used to form the second protective layer 108. It is worth noting that the PECVD process utilizes plasma to enhance the deposition process, thereby achieving a lower process temperature and a faster deposition rate. This helps ensure that the process temperature used in the step of forming the second protective layer 108, i.e., the second temperature, is relatively low, and improves the production efficiency of back-contact cells.

[0085] In some cases, in conjunction with reference Figures 5 to 7 The steps of forming the passivation anti-reflection layer 109 may include: referring to Figure 5 , using the first deposition process, an aluminum oxide film 119 is formed on the velvet surface, and the aluminum oxide film 119 is also formed on a portion of the second surface 120 and on the side surface 150 connecting the first surface 110 and the second surface 120; continue to refer to Figure 5 , a second deposition process is used to form a silicon nitride film 129 on the side of the aluminum oxide film 119 away from the substrate 100; Figure 5 and Figure 6 , using a chain etching process, the silicon nitride film 129 located on a portion of the second surface 120 and the side surface 150 is removed, and the remaining silicon nitride film 129 located on the first surface 110 is the silicon nitride layer 139; combined with reference Figure 6 and Figure 7 The silicon nitride layer 139 is used as an etching stop layer, and the aluminum oxide film 119 located on a partial area of ​​the second surface 120 and the side surface 150 is removed by using a third etching solution. The remaining aluminum oxide film 119 located on the first surface 110 is the aluminum oxide layer 149. The passivation anti-reflection layer 109 includes the aluminum oxide layer 149 and the silicon nitride layer 139.

[0086] in, Figure 5 A schematic partial cross-sectional view after forming an aluminum oxide film and a silicon nitride film in a method for manufacturing a back-contact battery provided by an embodiment of the present disclosure; Figure 6 A schematic partial cross-sectional view after forming a silicon nitride layer in a method for manufacturing a back-contact battery provided by an embodiment of the present disclosure; Figure 7 A partial cross-sectional view of a method for manufacturing a back contact cell according to an embodiment of the present disclosure after forming an aluminum oxide layer. In addition, to illustrate the side surface 150, Figure 5 and Figure 6 The figure only illustrates one first area 130 and one second area 140 between two side surfaces 150 . In actual applications, there are multiple first areas and multiple second areas between two opposite side surfaces.

[0087] It is worth noting that in the step of forming the aluminum oxide film 119, the aluminum oxide film 119 has a wrap-around plating phenomenon; in the step of forming the silicon nitride film 129, the silicon nitride film 129 also has a wrap-around plating phenomenon. Based on this, it is necessary to use different etching processes in the future to remove the silicon nitride film 129 and the aluminum oxide film 119 formed by wrap-around plating in sequence, that is, to remove the silicon nitride film 129 and the aluminum oxide film 119 in the places where the silicon nitride film 129 and the aluminum oxide film 119 are not needed. First, the silicon nitride film 129 located on the partial area and the side surface 150 of the second surface 120 is removed by means of a chain etching process, and the silicon nitride film 129 located on the first surface 110 is retained as a silicon nitride layer 139. When the aluminum oxide film 119 formed by wrap-around plating is subsequently etched, the silicon nitride layer 139 can be used as an etching stop layer, and a third etching solution can be used to remove the aluminum oxide film 119 located on the partial area and the side surface 150 of the second surface 120. In this way, based on the protective effect of the silicon nitride layer 139 on the aluminum oxide film 119 located on the first surface 110, there is no need to use a chain etching process to remove the silicon nitride film 129 formed by the plating. For example, a groove etching process can be used to remove the silicon nitride film 129 formed by the plating, which is beneficial to reducing the process cost of manufacturing back-contact batteries.

[0088] It should be noted that in actual applications, while using the silicon nitride layer as an etch stop, a chain etching process can also be used to remove the aluminum oxide film located on a portion of the second surface and the side surfaces. In other words, based on the protective effect of the silicon nitride layer, a variety of different etching processes can be applied to the step of forming the aluminum oxide layer in the manufacturing method of the back-contact cell provided in one embodiment of the present disclosure.

[0089] In some embodiments, in conjunction with reference Figure 3 and Figure 4 The steps of forming the stacked structure 101 may include: referring to Figure 3 , an initial stacked structure 111 is formed on the second surface 120, the initial stacked structure 111 including a tunneling film 112, a doped polysilicon film 113 and a first protective film 114 stacked along the first direction X; Figure 3 and Figure 4 , using a second laser etching process, the initial stacked structure 111 located on the second area 140 is preliminarily etched to remove a portion of the thickness of the initial stacked structure 111, and at least a portion of the thickness of the initial stacked structure 111 is laser modified; continue to combine with reference Figure 3 and Figure 4, use a second etching solution to remove the remaining initial stacked structure 111 located on the second area 140, the remaining initial stacked structure 111 located on the first area 130 is the stacked structure 101, the remaining tunneling film 112 located on the first area 130 is the tunneling layer 102, the remaining doped polysilicon film 113 located on the first area 130 is the doped polysilicon layer 103, and the remaining first protective film 114 located on the first area 130 is the first protective layer 104.

[0090] in, Figure 3 A schematic partial cross-sectional view of a back-contact battery manufacturing method according to an embodiment of the present disclosure after an initial stacked structure is formed; Figure 4 A schematic partial cross-sectional view of a back-contact battery manufacturing method according to an embodiment of the present disclosure after a stacked structure is formed.

[0091] It is noteworthy that during the second laser etching process, the laser not only etches a portion of the first protective film 114 located in the second region 140, but also modifies at least the remaining portion of the first protective film 114 located in the second region 140. This makes the remaining portion of the first protective film 114 located in the second region 140 more susceptible to etching by the second etching solution than the first protective film 114 located in the first region 130, i.e., the subsequently formed first protective layer 104. It should be noted that the doped polysilicon film 113 or the tunneling film 112 located in the second region 140 may also be affected by the laser in the second laser etching process and modified, making the doped polysilicon film 113 or the tunneling film 112 located in the second region 140 more susceptible to etching by the second etching solution.

[0092] In other words, in the step of using the second etching solution, the first protective film 114 located in the first area 130 can serve as an etching barrier layer, which is beneficial for preventing the second etching solution from etching the doped polysilicon film 113 and the tunneling film 112 located in the first area 130, while completely removing the first protective film 114, the tunneling film 112 and the doped polysilicon film 113 located in the second area 140 to expose the substrate 100 located in the second area 140.

[0093] In some cases, a low-pressure chemical vapor deposition (LPCVD) process can be used to form the tunneling film 112, the doped polysilicon film 113, and the first protective film 114. It is worth noting that the LPCVD process does not use plasma. Instead, the deposition process relies on low pressure and thermal energy to drive chemical reactions, which facilitates the formation of high-quality, uniformly thick films. This improves the film formation quality of the tunneling film 112, the doped polysilicon film 113, and the first protective film 114, thereby enhancing the passivation effect of the ultimately formed first passivation stack 123 on the first region 130.

[0094] In some embodiments, in conjunction with reference Figure 3 and Figure 4 , using a second etching solution to remove the remaining initial stacked structure 111 located on the second area 140; Figure 10 and Figure 11 The first etchant is then used to remove the initial second passivation stack 105 remaining on the first region 130, or the second protective layer 108 and the initial second passivation stack 105 remaining on the first region 130 are removed. It should be noted that, in the step of using the first etchant, the stacked structure 101 has already been formed on the first region 130. The first protective layer 104, which serves as an etch stop layer, may also be damaged due to over-etching by the first etchant. To prevent the first etchant from over-etching the stacked structure 101 and affecting the passivation effect of the first passivation stack 123 on the first region 130, the relevant parameters of the first etchant can be adjusted to ensure that the first protective layer 104 has a protective effect on the doped polysilicon layer 103 and the tunneling layer 102.

[0095] In some cases, the reaction temperature of the first etchant can be lower than the reaction temperature of the second etchant. In this way, by lowering the reaction temperature of the first etchant compared to the reaction temperature of the second etchant, the probability of the first etchant over-etching the first protective layer 104 can be reduced, thereby improving the yield of the formed back-contact battery. In addition, the first laser etching process has already performed preliminary etching on the second protective layer 108 and the initial second passivation stack 105 located on the first area 130. In the step of using the first etchant to perform additional etching on the second protective layer 108 and the initial second passivation stack 105 located on the first area 130, appropriately lowering the reaction temperature of the first etchant can also ensure the removal of the initial second passivation stack 105 remaining on the first area 130, or the removal of the second protective layer 108 and the initial second passivation stack 105 remaining on the first area 130.

[0096] In some cases, the reaction time of the first etchant can be shorter than the reaction time of the second etchant. In this way, by reducing the reaction time of the first etchant compared to the reaction time of the second etchant, the probability of the first etchant over-etching the first protective layer 104 can also be reduced, thereby improving the yield of the formed back-contact battery. In addition, the first laser etching process has already performed preliminary etching on the second protective layer 108 and the initial second passivation stack 105 located on the first area 130. In the step of using the first etchant to perform supplementary etching on the second protective layer 108 and the initial second passivation stack 105 located on the first area 130, appropriately reducing the reaction time of the first etchant can also ensure the removal of the initial second passivation stack 105 remaining on the first area 130, or the removal of the second protective layer 108 and the initial second passivation stack 105 remaining on the first area 130.

[0097] In some cases, both the first etchant and the second etchant can be potassium hydroxide solutions, with the concentration of potassium hydroxide in the first etchant being lower than that in the second etchant. Thus, by reducing the concentration of potassium hydroxide in the first etchant compared to the concentration in the second etchant, the probability of over-etching the first protective layer 104 by the first etchant can be reduced, thereby improving the yield of the resulting back-contact cell. Furthermore, the first laser etching process has already performed a preliminary etching of the second protective layer 108 and the initial second passivation stack 105 located on the first region 130. During the step of supplementally etching the second protective layer 108 and the initial second passivation stack 105 located on the first region 130 using the first etchant, appropriately reducing the concentration of potassium hydroxide in the first etchant can also ensure removal of the initial second passivation stack 105 remaining on the first region 130, or alternatively, remove the second protective layer 108 and the initial second passivation stack 105 remaining on the first region 130.

[0098] It should be noted that to reduce the probability of overetching the first protective layer 104 by the first etchant and thereby improve the yield of the resulting back-contact cell, the first etchant can be designed to have at least one of the following: reaction temperature, reaction time, or potassium hydroxide concentration, lower than that of the second etchant. In other words, any one of the three aforementioned scenarios can be designed, or both, or all can be designed into the manufacturing method.

[0099] In some examples, both the step of using the first etching solution and the step of using the second etching solution can be achieved by a tank alkali polishing process. In the step of using the first etching solution, the concentration of potassium hydroxide in the first etching solution can be 2% to 10%, for example, 3%, 4%, 5%, 6%, 7%, 8% or 9%; the reaction temperature can be lower than 80°C, for example, 78°C, 75°C, 73°C, 70°C, 68°C, 65°C, 63°C or 60°C; the reaction time is 50s to 1000s, for example, 100s, 200s, 300s, 400s, 500s, 600s, 700s, 800s or 900s. The concentration of the second etching solution can be 2%~10%, for example, it can be 3%, 4%, 5%, 6%, 7%, 8% or 9%; the reaction temperature can be higher than or equal to 80°C, for example, it can be 80°C, 83°C, 85°C, 88°C, 90°C, 93°C, 95°C or 98°C; the reaction time is 50s~1000s, for example, it can be 100s, 200s, 300s, 400s, 500s, 600s, 700s, 800s or 900s.

[0100] In some cases, reference Figure 4In the step of forming the stacked structure 101, the second etching solution also etches the substrate 100 located in the second area 140. The surface of the substrate 100 located in the second area 140 is the second surface, and the surface of the substrate 100 located in the first area 130 is the first surface. With the first surface 110 as the reference plane, the second surface is made lower than the first surface. On this basis, after step S6, combined with reference Figure 4 and Figure 11 , the second passivation stack 115 located in the second area 140, that is, the second passivation stack 115 located on the second surface; the stacked structure 101 located in the first area 130, that is, the stacked structure 101 located on the first surface.

[0101] In some examples, reference Figure 11 Taking the first surface 110 as the reference plane, on the basis that the second surface is lower than the first surface, the surface of most areas of the second passivation stack 115 away from the substrate 100 is lower than the surface of the stacked structure 101 away from the substrate 100, and most areas of the doped amorphous silicon layer 117 in the second passivation stack 115 are offset from the doped polysilicon layer 103 in the stacked structure 101 along the first direction X.

[0102] In some examples, reference Figure 4 Along the first direction X, the distance between the second surface and the first surface may be 3 μm to 10 μm, for example, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, etc.

[0103] It is worth noting that the distance between the second surface and the first surface can be adjusted by adjusting the etching degree of the second etching solution on the substrate 100 located in the second area 140. On this basis, the distance between the second surface and the first surface is designed to be 3μm to 10μm. On the one hand, it is beneficial to avoid the distance between the second surface and the first surface being too small, so as to ensure that there is a certain step difference between the second passivation stack 115 and the stacked structure 101, so as to ensure that most areas of the doped amorphous silicon layer 117 in the second passivation stack 115 are staggered with the doped polysilicon layer 103 in the stacked structure 101 along the first direction X; on the other hand, it is beneficial to avoid the distance between the second surface and the first surface being too large, so as to avoid the step difference between the second passivation stack 115 and the stacked structure 101 being too large, thereby avoiding excessive difference in the concave and convex of the back surface of the finally formed back-contact battery, thereby improving the structural stability of the finally formed back-contact battery.

[0104] The first laser etching process and the second laser etching process are described in detail below.

[0105] In some embodiments, the laser used in the first laser etching process is a first laser, the laser used in the second laser etching process is a second laser, and the wavelength of the first laser may be smaller than the wavelength of the second laser.

[0106] It is worth noting that the reference Figure 4 or Figure 7 Before the first laser etching process is performed, a stacked structure 101 has been formed on the first region 130; Figure 9 and Figure 10 In the subsequent first laser etching process, excessive energy generated by the first laser when irradiating the first region 130 or excessive penetration depth of the film layer on the first region 130 can easily cause significant laser damage to the stacked structure 101. Therefore, the wavelength of the first laser can be designed to be smaller than the wavelength of the second laser, which helps reduce the penetration depth of the first laser and prevents significant laser damage to the stacked structure 101, thereby ensuring excellent passivation effect of the first passivation stack 123 on the first region 130.

[0107] In some examples, the first laser is a purple laser and the second laser is a green laser. Compared to the green laser, the purple laser has a smaller wavelength, a smaller penetration depth into the film layer, and the energy of the purple laser is more concentrated on the surface of the film layer, both of which help reduce the probability of the first laser causing significant laser damage to the stacked structure 101.

[0108] It is worth noting that both purple laser and green laser belong to picosecond laser, which is an ultrashort pulse laser. Purple laser can also refer to ultraviolet picosecond laser, and green laser can also refer to green picosecond laser.

[0109] In some embodiments, a first laser is used to generate a first laser in the first laser etching process, and a second laser is used to generate a second laser in the second laser etching process. Furthermore, to prevent the first laser from causing laser damage to the stacked structure 101, the laser scanning rate, power, or frequency of the first laser can be adjusted to prevent excessive energy generated when the first laser irradiates the first region 130.

[0110] In some cases, the laser scanning speed of the first laser can be greater than the laser scanning speed of the second laser. It is worth noting that the size of the light spot irradiated on the film layer can be controlled by adjusting the laser scanning speed. Designing the laser scanning speed of the first laser to be greater than the laser scanning speed of the second laser can help reduce the size of the light spot irradiated on the film layer by the first laser, thereby reducing the probability of the first laser causing significant laser damage to the stacked structure 101.

[0111] In some examples, the laser scanning speed of the first laser can be 40m / s to 60m / s, for example, 41m / s, 42m / s, 43m / s, 44m / s, 45m / s, 46m / s, 47m / s, 48m / s, 49m / s, 50m / s, 51m / s, 52m / s, 53m / s, 54m / s, 55m / s, 56m / s, 57m / s, 58m / s, or 59m / s, etc. ; The laser scanning speed of the second laser can be 30m / s~50m / s, for example, it can be 30m / s, 31m / s, 32m / s, 33m / s, 34m / s, 35m / s, 36m / s, 37m / s, 38m / s, 39m / s, 40m / s, 41m / s, 42m / s, 43m / s, 44m / s, 45m / s, 46m / s, 47m / s, 48m / s or 49m / s, etc.

[0112] In some cases, the power of the first laser can be less than the power of the second laser. It is worth noting that the energy of the laser light output by the laser can be controlled by adjusting the power of the laser. Designing the power of the first laser to be less than the power of the second laser is beneficial for reducing the energy of the first laser light output by the first laser, thereby reducing the energy of the first laser light irradiated on the film layer, and reducing the probability of the first laser light causing significant laser damage to the stacked structure 101.

[0113] In some examples, the power of the first laser can be 10W~30W, for example, 11W, 12W, 13W, 14W, 15W, 16W, 17W, 18W, 19W, 20W, 21W, 22W, 23W, 24W, 25W, 26W, 27W, 28W or 29W; the power of the second laser can be 60W~80W, for example, 61W, 62W, 63W, 64W, 65W, 66W, 67W, 68W, 69W, 70W, 71W, 72W, 73W, 74W, 75W, 76W, 77W, 78W or 79W.

[0114] In some cases, the frequency of the first laser can be lower than the frequency of the second laser. It is worth noting that the overlap ratio of the light spots irradiated on the film layer can be controlled by adjusting the laser frequency. Designing the frequency of the first laser to be lower than the frequency of the second laser can help reduce the overlap ratio of the light spots formed by the first laser on the film layer, thereby reducing the probability of the first laser causing significant laser damage to the stacked structure 101.

[0115] In some examples, the frequency of the first laser can be 900kHz~1100kHz, for example, 910kHz, 920kHz, 930kHz, 940kHz, 950kHz, 960kHz, 970kHz, 980kHz, 990kHz, 1000kHz, 1010kHz, 1020kHz, 1030kHz, 1040kHz, 1050kHz, 1060kHz, 1070kHz, 1080kHz or 1090kHz; The frequency of the second laser can be 1100kHz~1300kHz, for example, it can be 1110kHz, 1120kHz, 1130kHz, 1140kHz, 1150kHz, 1160kHz, 1170kHz, 1180kHz, 1190kHz, 1200kHz, 1210kHz, 1220kHz, 1230kHz, 1240kHz, 1250kHz, 1260kHz, 1270kHz, 1280kHz or 1290kHz, etc.

[0116] It should be noted that, by adjusting the laser scanning speed and the laser frequency, the overlap rate of the light spots irradiated on the film layer can also be controlled.

[0117] Furthermore, to reduce the probability of the first laser causing laser damage to the stacked structure 101, the first laser can be designed to have at least one of a lower laser scanning speed, power, or frequency than the second laser. In other words, the above three scenarios can be designed one at a time, two at a time, or all at once in the manufacturing method.

[0118] In some examples, based on the design of at least one of the laser scanning speed, power, or frequency of the first laser being smaller than that of the second laser, when the first laser is a purple laser, the second laser may be a green laser or a purple laser.

[0119] In some embodiments, in conjunction with reference Figure 11 and Figure 12 , Figure 12 A partial cross-sectional schematic diagram of a back-contact cell manufacturing method after an acid pickling process is performed in one embodiment of the present disclosure. After forming the second passivation stack 115, the back-contact cell manufacturing method may further include: using an acid pickling process to remove the second protective layer 108 located on the second region 140, and to remove the first protective layer 104. This facilitates the subsequent formation of a first gate line electrically connected to the doped polysilicon layer 103 on the first passivation stack 123, and a second gate line electrically connected to the doped amorphous silicon layer 117 on the second passivation stack 115.

[0120] It should be noted that before forming the first and second gate lines, a transparent conductive film is first formed on the surface formed by the first passivation stack 123 and the second passivation stack 115. The transparent conductive film is then patterned. The remaining transparent conductive film includes transparent conductive layers arranged alternately and spaced apart along the second direction Y. Subsequently, the first and second gate lines are formed on the transparent conductive layers. A single transparent conductive layer is located on a single first region 130 or a single second region 140. This creates a gap between adjacent transparent conductive layers, which helps prevent short circuits between the first and second gate lines.

[0121] In some embodiments, reference Figure 9 The material of the second protection layer 108 may include at least one of silicon oxide, silicon nitride or silicon oxynitride.

[0122] In some embodiments, reference Figure 4 The material of the first protection layer 104 may include at least one of silicon oxide, silicon nitride or silicon oxynitride.

[0123] In some examples, in conjunction with reference Figure 11 and Figure 12 In the pickling process, a hydrofluoric acid solution may be used to remove the second protection layer 108 located on the second area 140 and the first protection layer 104 .

[0124] In summary, before the first laser etching process is performed, not only is the first protective layer 104 formed on the first region 130, but the second protective layer 108 is also formed on the side of the doped amorphous silicon film 107 away from the intrinsic amorphous silicon film 106. Then, without causing laser damage or over-etching to the stacked structure 101, the first laser etching process is first used to perform a preliminary etching of the second protective layer 108 and the initial second passivation stack 105 located on the first region 130. Then, with the cooperation of the second protective layer 108 and the first protective layer 104 located on the second region 140, the first etching solution is used to perform a supplementary etching of the second protective layer 108 and the initial second passivation stack 105 located on the first region 130. This ensures that in the ultimately formed back-contact cell, the stacked structure 101 is located only in the first region 130, and the second passivation stack 115 is located only in the second region 140. This helps reduce the series resistance of the ultimately formed back-contact cell, improves the fill factor of the back-contact cell, and thereby improves the photoelectric conversion efficiency of the back-contact cell. Moreover, the mutual coordination of steps S2 to S6 is conducive to improving the stability of the preparation process of the back-contact battery and reducing the difference in photoelectric conversion efficiency between different back-contact batteries prepared, thereby improving the yield of the prepared back-contact battery.

[0125] Another embodiment of the present disclosure further provides a back-contact battery, formed using the manufacturing method of the back-contact battery provided in the aforementioned embodiment. The following describes the back-contact battery provided in another embodiment of the present disclosure in detail with reference to the accompanying drawings. It should be noted that portions identical or corresponding to the aforementioned embodiments are not described in detail here.

[0126] refer to Figure 12 The back-contact cell includes: a substrate 100, the substrate 100 having a first surface 110 and a second surface 120 opposite to each other along a first direction X, the second surface 120 including first areas 130 and second areas 140 alternately arranged along a second direction Y, the first direction X being the thickness direction of the substrate 100, and the second direction Y intersecting with the first direction X; a stacked structure 101 located on the first area 130, the stacked structure 101 including a tunneling layer 102, a doped polysilicon layer 103 and a first protective layer 104 stacked along the first direction X; a second passivation stack 115 located on the second area 140, the second passivation stack 115 including an intrinsic amorphous silicon layer 116 and a doped amorphous silicon layer 117 stacked along the first direction X.

[0127] Another embodiment of the present disclosure further provides a back-contact tandem battery, comprising a back-contact battery formed by the method for manufacturing a back-contact battery provided in the aforementioned embodiment, or a back-contact battery provided in the aforementioned embodiment. The back-contact tandem battery provided in another embodiment of the present disclosure will be described in detail below with reference to the accompanying drawings. It should be noted that portions identical or corresponding to those in the aforementioned embodiments will not be repeated here.

[0128] refer to Figure 13 , Figure 13 A partial cross-sectional schematic diagram of a back-contact stack cell provided for another embodiment of the present disclosure, the back-contact stack cell comprising: a bottom cell 159, which is a back-contact cell formed by the manufacturing method of the back-contact cell provided in the aforementioned embodiment, or a back-contact cell provided in the aforementioned embodiment; a top cell 169, which is one of a perovskite cell, a donor-acceptor cell, a cadmium telluride solar cell, a copper indium gallium selenide solar cell or a gallium arsenide solar cell, and the top cell 169 is located on one side of the bottom cell 159.

[0129] In some embodiments, the top cell 169 may include a stacked first transmission layer, a perovskite substrate, a second transmission layer, a transparent conductive layer, and an anti-reflection layer, wherein the first transmission layer faces the bottom cell 159 .

[0130] In some examples, the first transport layer may be one of an electron transport layer and a hole transport layer, and the second transport layer may be the other of the electron transport layer and the hole transport layer.

[0131] In some embodiments, the band gap width of the top cell 169 is wider than that of the bottom cell 159. Therefore, stacking the top cell 169 on the bottom cell 159 can enable the stacked cell to have a wider spectral response range, thereby maximizing the use of solar energy and improving the efficiency of the solar cell.

[0132] In some embodiments, the bottom cell 159 further includes a first gate line electrically connected to the doped polysilicon layer 103 , and a second gate line electrically connected to the doped amorphous silicon layer 117 .

[0133] The connection method of the top battery 169 and the bottom battery 159 is described in detail below.

[0134] In some embodiments, reference Figure 14 , Figure 14 This is a schematic diagram of a connection method for the top cell and bottom cell in a back-contact stack cell according to another embodiment of the present disclosure. The top cell 169 and the bottom cell 159 can form a four-terminal stack structure. The positive and negative electrodes in the top cell 169 are each led out as independent terminals, and the first and second grid lines in the bottom cell 159 are also led out as independent terminals. In other words, the top cell 169 and the bottom cell 159 in the four-terminal stack structure can be manufactured independently. The top cell 169 and the bottom cell 159 are optically connected, the circuits are independent of each other, and each has its own independent output.

[0135] In this way, on the one hand, it is beneficial to avoid the limitation of current matching on the performance of the back-contact stacked cell, and is beneficial to maximizing the utilization rate and conversion efficiency of sunlight, thereby obtaining higher photoelectric conversion efficiency; on the other hand, the top cell 169 and the bottom cell 159 are optically coupled, and there is no need to consider the process compatibility issues caused by the current matching of the top cell 169 and the bottom cell 159. The process is relatively simple, and the production line of the top cell 169 and the bottom cell 159 can be combined to prepare the four-terminal stacked structure without the need to modify the existing production line, thereby reducing the preparation cost of the back-contact stacked cell.

[0136] In other embodiments, reference Figure 15 , Figure 15 This diagram illustrates another connection method for the top and bottom cells in a back-contact stacked battery according to another embodiment of the present disclosure. Top cell 169 and bottom cell 159 can form a three-terminal stacked structure. Top cell 169 and bottom cell 159 maintain good ohmic contact. A terminal is connected to the end of top cell 169 away from bottom cell 159. The first and second gate lines in bottom cell 159 are connected as two independent terminals.

[0137] This allows the top cell 169 to be connected to the bottom cell 159 by depositing the top cell 169 directly on the bottom cell 159, eliminating the need for additional circuit design. This helps reduce the manufacturing cost of photovoltaic modules composed of back-contact tandem cells. Furthermore, the three-terminal tandem structure formed by the top cell 169 and the bottom cell 159 does not require current matching, which also means that the band gap and thickness of the top cell 169 are more tolerant.

[0138] It is worth noting that the two-terminal stacked structure of a TOPCon cell or HJT cell and a perovskite cell in series has a "minimum current limit", and the current of the two-terminal stacked structure is the minimum current of the two series-connected cells. Only when the currents of the two series-connected cells are matched or closely matched can the entire device operate at maximum power. When there is a large mismatch in current (for example, in the morning or evening, when the color temperature of sunlight is lower and the spectrum shifts), the power generation power of the two-terminal stacked structure drops significantly. The three-terminal stacked structure composed of perovskite combined with back-contact cells can output the mismatched current through an extra terminal, ensuring that the back-contact stacked cell can operate at a relatively higher power. Moreover, the voltage matching required in the three-terminal stacked structure is less affected by changes in the solar spectrum than the current, so the three-terminal stacked structure has a wider range of scenario adaptability.

[0139] In some other embodiments, reference Figure 16 , Figure 16 This is a schematic diagram of another connection method for the top and bottom cells in a back-contact stack cell according to another embodiment of the present disclosure. The top cell 169 and the bottom cell 159 can form a two-terminal stack structure. The positive electrode of the top cell 169 is electrically connected to one of the first and second grid lines of the bottom cell 159 to form one terminal, and the negative electrode of the top cell 169 is electrically connected to the other of the first and second grid lines of the bottom cell 159 to form the other terminal.

[0140] Another embodiment of the present disclosure provides a photovoltaic module, comprising a plurality of back-contact cells formed by the manufacturing method of the back-contact cells provided in the preceding embodiments, or a plurality of back-contact cells provided in the preceding embodiments, or a plurality of back-contact laminated cells provided in the preceding embodiments. It should be noted that portions identical or corresponding to the preceding embodiments are not described in detail herein.

[0141] The photovoltaic module includes: a cell string, which is formed by connecting back-contact cells formed by the manufacturing method of back-contact cells provided by multiple aforementioned embodiments, or is formed by connecting back-contact cells provided by multiple aforementioned embodiments, or is formed by connecting back-contact laminated cells provided by multiple aforementioned embodiments; an encapsulation film for covering the surface of the cell string; and a cover plate for covering the surface of the encapsulation film facing away from the cell string.

[0142] Those skilled in the art will appreciate that the above-described embodiments are specific examples for implementing the present disclosure, and in actual applications, various changes may be made to them in form and detail without departing from the spirit and scope of the embodiments of the present disclosure. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the embodiments of the present disclosure. Therefore, the scope of protection of the embodiments of the present disclosure shall be based on the scope defined in the claims.

Claims

1. A method for manufacturing a back contact battery, characterized in that: include: Providing a substrate, the substrate having a first surface and a second surface opposite to each other along a first direction, the second surface including a first region and a second region alternately arranged along a second direction, the first direction being a thickness direction of the substrate, and the second direction intersecting the first direction; forming a stacked structure on the first region, the stacked structure including a tunneling layer, a doped polysilicon layer, and a first protective layer stacked along the first direction; performing a velvet treatment on the first surface to convert the first surface into a velvet surface; forming a passivation anti-reflection layer on the suede surface; forming an initial second passivation stack on a surface jointly formed by the second surface and the stacked structure, wherein the initial second passivation stack comprises an intrinsic amorphous silicon film and a doped amorphous silicon film stacked along the first direction; forming a second protective layer on a side of the doped amorphous silicon film away from the intrinsic amorphous silicon film, wherein a process temperature used in the step of forming the passivation anti-reflection layer is a first temperature, and a process temperature used in the step of forming the second protective layer is a second temperature, and the first temperature is greater than or equal to the second temperature; Using a first laser etching process, etching the second protective layer and the initial second passivation stack located on the first region, so that a portion of the initial second passivation stack, or a portion of the second protective layer and a portion of the initial second passivation stack remain on the first region; The second protective layer located on the second area is used as an etching barrier layer, and the first protective layer is used as an etching stop layer. A first etching solution is used to remove the initial second passivation stack remaining on the first area, or the second protective layer and the initial second passivation stack remaining on the first area are removed, and the initial second passivation stack remaining on the second area is the second passivation stack, and the tunneling layer and the doped polysilicon layer constitute the first passivation stack.

2. The method for manufacturing a back contact battery according to claim 1, wherein: The second temperature is 150°C to 250°C.

3. The method for manufacturing a back contact battery according to claim 1, wherein: The steps of forming the passivation anti-reflection layer include: Using a first deposition process, forming an aluminum oxide film on the velvet surface, and the aluminum oxide film is also formed on a partial area of ​​the second surface and on a side surface connecting the first surface and the second surface; forming a silicon nitride film on a side of the aluminum oxide film away from the substrate using a second deposition process; Using a chain etching process, the silicon nitride film located on a portion of the second surface and the side surface is removed, and the remaining silicon nitride film located on the first surface is a silicon nitride layer; The silicon nitride layer is used as an etching stop layer and a third etching solution is adopted to remove the aluminum oxide film located on a partial area of ​​the second surface and the side surface. The remaining aluminum oxide film located on the first surface is an aluminum oxide layer, and the passivation anti-reflection layer includes the aluminum oxide layer and the silicon nitride layer.

4. The method for manufacturing a back contact battery according to claim 1, wherein: The steps of forming the stacked structure include: forming an initial stacked structure on the second surface, the initial stacked structure comprising a tunneling film, a doped polysilicon film, and a first protective film stacked along the first direction; Using a second laser etching process, preliminarily etching the initial stacked structure located on the second region to remove a portion of the thickness of the initial stacked structure, and performing laser modification treatment on at least a portion of the thickness of the initial stacked structure; A second etching solution is used to remove the remaining initial stacked structure located on the second area. The remaining initial stacked structure located on the first area is the stacked structure, the remaining tunneling film located on the first area is the tunneling layer, the remaining doped polysilicon film located on the first area is the doped polysilicon layer, and the remaining first protective film located on the first area is the first protective layer.

5. The method for manufacturing a back contact battery according to claim 4, wherein: The reaction temperature of the first etching solution is lower than the reaction temperature of the second etching solution; and / or, the reaction time of the first etching solution is lower than the reaction time of the second etching solution; and / or, the first etching solution and the second etching solution are both potassium hydroxide solutions, and the concentration of potassium hydroxide in the first etching solution is lower than that in the second etching solution.

6. The method for manufacturing a back contact battery according to claim 4, wherein: In the step of forming the stacked structure, the second etching solution also etches the substrate located in the second area, the surface of the substrate located in the second area is the second surface, the surface of the substrate located in the first area is the first surface, and the first surface is used as the reference plane, so that the second surface is lower than the first surface.

7. The method for manufacturing a back contact battery according to claim 6, wherein: Along the first direction, a distance between the second surface and the first surface is 3 μm to 10 μm.

8. The method for manufacturing a back contact battery according to claim 4, wherein: The laser used in the first laser etching process is a first laser, the laser used in the second laser etching process is a second laser, and the wavelength of the first laser is smaller than the wavelength of the second laser.

9. The method for manufacturing a back contact battery according to claim 4, wherein: In the first laser etching process, a first laser is used to generate a first laser; in the second laser etching process, a second laser is used to generate a second laser; The laser scanning speed of the first laser is greater than the laser scanning speed of the second laser; and / or the power of the first laser is less than the power of the second laser; and / or the frequency of the first laser is less than the frequency of the second laser.

10. The method for manufacturing a back contact battery according to claim 9, wherein: The laser scanning speed of the first laser is 40m / s~60m / s, and the laser scanning speed of the second laser is 30m / s~50m / s; and / or, the power of the first laser is 10W~30W, and the power of the second laser is 60W~80W; and / or, the frequency of the first laser is 900kHz~1100kHz, and the frequency of the second laser is 1100kHz~1300kHz.

11. The method for manufacturing a back contact battery according to claim 1, wherein: After forming the second passivation stack, the method for manufacturing the back contact cell further comprises: An acid pickling process is adopted to remove the second protective layer on the second area and the first protective layer.

12. A back contact battery, characterized in that: The back-contact cell is a back-contact cell formed by the method for manufacturing a back-contact cell according to any one of claims 1 to 11.

13. A back contact stacked battery, characterized in that: include: A bottom cell, wherein the bottom cell is a back-contact cell formed by the method for manufacturing a back-contact cell according to any one of claims 1 to 11, or a back-contact cell according to claim 12; The top cell is one of a perovskite cell, a donor-acceptor cell, a cadmium telluride solar cell, a copper indium gallium selenide solar cell or a gallium arsenide solar cell, and the top cell is located on one side of the bottom cell.

14. A photovoltaic module, characterized in that: include: A battery string formed by connecting a plurality of back-contact batteries formed by the method for manufacturing a back-contact battery according to any one of claims 1 to 11, or by connecting a plurality of back-contact batteries according to claim 12, or by connecting a plurality of back-contact stacked batteries according to claim 13; A packaging film, used to cover the surface of the battery string; A cover plate is used to cover the surface of the packaging film facing away from the battery string.

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