Miniature light emitting diode chip and display panel

Abstract

The present application relates to a kind of micro light emitting diode chips, comprising: a plurality of array arrangement micro light emitting diode;And conductive structure, it is located between the micro light emitting diode, wherein the conductive structure surrounds the micro light emitting diode, and the conductive structure electrically contacts the micro light emitting diode.Between micro light emitting diode, conductive structure can be reflected to the light emitted by micro light emitting diode, in turn improve the luminous intensity of micro light emitting diode chip, and improve the light output rate in preset light angle.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of micro light emitting diode, and in particular to a micro light emitting diode chip and a display panel. BACKGROUND

[0002] Micro light emitting diode (Micro-LED) is a new display technology. By miniaturizing traditional light emitting diodes, the size of the light emitting diodes reaches microns, and the micro LED array is integrated on a chip, so as to form a high-density display panel. As a semiconductor element with small size and light emitting function, the micro light emitting diode device has the advantages of low power consumption, long service life, high brightness, high contrast ratio and the like. With the gradual development of display technology, the micro light emitting diode technology has gradually become a trend of new display technology and is paid more and more attention.

[0003] However, the light extraction efficiency (Wall-Plug Efficiency, WPE, also known as electrical-to-optical conversion efficiency) of the existing micro light emitting diode device is too low and needs to be further improved. SUMMARY

[0004] To solve at least part of the above problems in the prior art, the task of the present application is to provide a micro light emitting diode chip, comprising:

[0005] a plurality of arrayed micro light emitting diodes; and

[0006] a conductive structure between the micro light emitting diodes, wherein the conductive structure is arranged to surround the micro light emitting diodes, and the conductive structure is configured to electrically contact the micro light emitting diodes and at least partially reflect light emitted by the micro light emitting diodes.

[0007] Further, the bottoms of adjacent conductive structures are connected, and all the conductive structures are connected as a whole.

[0008] Further, the bottom size of the micro light emitting diode is greater than the top size.

[0009] Further, the longitudinal section of the adjacent two conductive structures presents a shape of a bifurcated peak.

[0010] Further, the longitudinal section of the adjacent two conductive structures presents a shape of a bifurcated peak.

[0011] Further, the conductive structure is a multilayer structure, wherein the conductive structure comprises one or more third metal layers.

[0012] Further, the material of the third metal layer is selected from one or more of Ti, Pt, Au, Al, Ag.

[0013] Further, the conductive structure further comprises a fourth metal layer corresponding to each of the third metal layers, and the fourth metal layers are interleaved with the third metal layers, each of the third metal layers being on a corresponding fourth metal layer.

[0014] Further, the conductive structure further comprises a first metal layer at the bottom of the conductive structure, and the fourth metal layers and the third metal layers are on the first metal layer.

[0015] Further, the conductive structure further comprises a second metal layer corresponding to each of the fourth metal layers, each of the fourth metal layers being on a corresponding second metal layer, and the second metal layers are on the first metal layer.

[0016] Further, the conductive structure has a gap.

[0017] Further, the micro light emitting diode comprises:

[0018] an epitaxial layer;

[0019] a first transparent conductive layer under the epitaxial layer;

[0020] a second transparent conductive layer on the side and top of the epitaxial layer; and

[0021] an insulating layer on the side of the epitaxial layer and the side of the first transparent conductive layer, and between the epitaxial layer and the second transparent conductive layer.

[0022] Further, the bottom of the conductive structure is lower than the epitaxial layer.

[0023] Further, the top of the conductive structure is higher than the top of the epitaxial layer; and / or

[0024] the top of the conductive structure is flush with the top of the epitaxial layer; and / or

[0025] the top of the conductive structure is 0-1 microns lower than the top of the epitaxial layer.

[0026] Further, the conductive structure surrounds the epitaxial layer.

[0027] Further, the bottom size of the epitaxial layer is larger than the top size of the epitaxial layer.

[0028] Further, the epitaxial layer comprises a first type epitaxial layer, a second type epitaxial layer, and a light emitting layer between the first type epitaxial layer and the second type epitaxial layer.

[0029] Further, the second type epitaxial layer is electrically connected with the first transparent conductive layer.

[0030] The first type epitaxial layer is electrically connected with the second transparent conductive layer.

[0031] Further, the micro light emitting diode further comprises a first bonding layer on the side of the first transparent conductive layer away from the epitaxial layer.

[0032] Further, the first bonding layers of all micro light emitting diodes are not connected.

[0033] Further, a driving backboard is further included, which is electrically connected with the micro light emitting diodes.

[0034] Further, the driving backboard has driving electrodes, each micro light emitting diode corresponding to one driving electrode.

[0035] Further, the surface of the driving electrode is provided with a second bonding layer, which is bonded with the first bonding layer, and the second bonding layer is in electrical contact with the driving electrode.

[0036] Further, a microlens is further included, which is arranged on the micro light emitting diode, and adjacent microlenses are connected.

[0037] Further, there is a gap between adjacent microlenses, and the gap is located between two adjacent conductive structures.

[0038] Further, the microlens has an air gap inside, and the air gap is located between the epitaxial layer and the conductive structure.

[0039] The present application also provides a display panel comprising the above-mentioned micro light emitting diode chip.

[0040] The present application has at least the following beneficial effects: The conductive structure arranged between the micro light emitting diodes can reflect the light emitted by the micro light emitting diodes, thereby improving the luminous brightness of the micro light emitting diode chip and the light emission rate within the preset light emission angle. The conductive structure arranged between the micro light emitting diodes can reflect the light emitted by the micro light emitting diodes, avoid light absorption by the side wall, thereby improving the total light emission amount, and the conductive structure with the reflection ability can also avoid light entering the adjacent micro light emitting diodes, thereby avoiding light crosstalk between the adjacent micro light emitting diodes. BRIEF DESCRIPTION OF DRAWINGS

[0041] To further clarify the above and other advantages and features of the present embodiments, a more particular description of embodiments of the application will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It is appreciated that these drawings depict only typical embodiments of the application and are therefore not to be considered limiting of its scope. The same or corresponding elements in the drawings are denoted by the same or similar reference signs.

[0042] Figure 1 A top view of a micro light emitting diode display chip according to one embodiment of the present application is shown;

[0043] Figure 2 A top view of a conductive structure according to one embodiment of the present application is shown;

[0044] Figure 3 A longitudinal sectional view of a micro light emitting diode display chip according to one embodiment of the present application is shown;

[0045] Figure 4 A longitudinal sectional view of a conductive structure according to one embodiment of the present application is shown;

[0046] Figure 5 A longitudinal sectional view of a conductive structure according to another embodiment of the present application is shown;

[0047] Figure 6 A longitudinal sectional view of a micro light emitting diode chip according to another embodiment of the present application is shown; and

[0048] Figure 7 A longitudinal sectional view of a micro light emitting diode chip with microlens according to one embodiment of the present application is shown. DETAILED DESCRIPTION

[0049] It should be noted that components in the various drawings can be exaggerated for illustrative purposes and are not necessarily drawn to scale.

[0050] In the present application, the embodiments are merely intended to illustrate the solutions of the present application and should not be understood as limiting.

[0051] In the present application, unless specifically indicated, the quantifier "one", "a" does not exclude the scenario of multiple elements.

[0052] It should also be noted herein that, in the embodiments of the present application, only a part of components or assemblies can be shown for the sake of clarity and simplicity, but those skilled in the art can understand that, under the teaching of the present application, the required components or assemblies can be added according to the specific scene needs.

[0053] It should also be noted that within the scope of this invention, the terms "same", "equal", and "equal to" do not mean that the two values ​​are absolutely equal, but allow for a certain reasonable error. In other words, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0054] It should also be noted that in the description of this invention, the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not explicitly or implicitly suggest that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0055] Furthermore, the embodiments of the present invention describe the process steps in a specific order. However, this is only for the convenience of distinguishing each step, and is not a limitation on the order of each step. In different embodiments of the present invention, the order of each step can be adjusted according to the process.

[0056] In this application, the term "configuration" refers to setting the shape, structure, material and / or function of a target object to achieve a desired technical effect. "Configuration" includes a variety of alternative technical means to achieve the technical effect, which become apparent from the teachings of this application.

[0057] In this invention, the term "horizontal profile" has the following meanings: for regular shapes, it refers to the horizontal dimension; for irregular shapes, it refers to the maximum horizontal dimension. For example, for a hemispherical microlens, its horizontal profile refers to its bottom diameter; for a cylindrical micro-light-emitting diode, its horizontal profile refers to the diameter of its cylindrical cross-section. The maximum horizontal profile refers to the maximum value of the aforementioned dimension.

[0058] Figure 1 A top view schematic diagram of a miniature light-emitting diode chip according to an embodiment of the present invention is shown; Figure 2 A top view schematic diagram of a conductive structure according to an embodiment of the present invention is shown; Figure 3 A longitudinal cross-sectional schematic diagram of a micro light-emitting diode chip according to an embodiment of the present invention is shown; Figure 4 A longitudinal cross-sectional schematic diagram of a conductive structure according to an embodiment of the present invention is shown; Figure 5 A longitudinal cross-sectional schematic diagram of a conductive structure according to another embodiment of the present invention is shown.

[0059] likeFigure 1 and 3 As shown, the micro LED chip includes multiple micro LEDs 101 arranged in an array and a conductive structure 102.

[0060] Each microLED chip has a size not exceeding 1 cm, preferably not exceeding 20 micrometers. MicroLEDs are formed in an array within the microLED chip, with resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the microLED structure is in the nanometer range, for example, 20 nm to 100 nm. Each microLED can form at least a portion of the pixel elements on the microLED chip.

[0061] In some embodiments, the spacing of the micro-LED array, i.e. the minimum center-to-center distance between the micro-LEDs, can be between about 2 micrometers and about 50 micrometers.

[0062] In some embodiments, the number of pixels on a micro LED chip can range from thousands to millions.

[0063] The conductive structure 102 is located between the miniature light-emitting diodes 101. The conductive structure 102 surrounds the miniature light-emitting diodes 101. The conductive structure 102 is electrically connected to the miniature light-emitting diodes 101.

[0064] The miniature light-emitting diode 101 and the conductive structure 102 are described in detail below.

[0065] like Figure 3 As shown, the miniature light-emitting diode 101 includes a first transparent conductive layer 104, an epitaxial layer 103, an insulating layer 105, and a second transparent conductive layer 106.

[0066] In an embodiment of the present invention, the epitaxial layer 103 is located between the first transparent conductive layer 104 and the second transparent conductive layer 106. The epitaxial layer 103 is located above the first transparent conductive layer 104, and the first transparent conductive layer 104 is in contact with the bottom surface of the epitaxial layer 103.

[0067] The size of the first transparent conductive layer 104 is larger than the size of the epitaxial layer 103.

[0068] In an embodiment of the present invention, the second transparent conductive layer 106 is located on the top and side of the epitaxial layer 103, and the second transparent conductive layers 106 of all micro light-emitting diodes are electrically connected to each other. The second transparent conductive layer 106 is also electrically connected to the conductive structure 102.

[0069] In the embodiments of the present application, the material of the first transparent conductive layer 104 and / or the second transparent conductive layer 106 can include indium tin oxide (In2O5Sn), so as to improve the conductive performance and light emission effect.

[0070] It should be noted that the material of the first transparent conductive layer 104 and / or the second transparent conductive layer 106 can also include other appropriate materials, such as fluorine-doped tin oxide (FTO) and zinc oxide (ZnO).

[0071] In the embodiments of the present application, the insulating layer 105 is located on the side of the epitaxial layer 103 and the side of the first transparent conductive layer 104, and the insulating layers 105 of all the micro light emitting diodes are connected to each other. The insulating layer 105 is used to isolate the first transparent conductive layer 104 and the second transparent conductive layer 106. Furthermore, the insulating layer 105 is transparent.

[0072] In other embodiments, the insulating layer 105 covers the side of the first transparent conductive layer 104, the side of the epitaxial layer 103, and the top portion area.

[0073] Since the size of the first transparent conductive layer 104 is larger than the size of the bottom of the epitaxial layer 103, a step is formed. The insulating layer 105 and the second transparent conductive layer 106 cover the side of the first transparent conductive layer 104 and the side of the epitaxial layer 103, and due to the step at the first transparent conductive layer 104, the insulating layer 105 and the second transparent conductive layer 106 also have a step.

[0074] In the embodiments of the present application, the size of the bottom of the epitaxial layer 103 is larger than the size of the top of the epitaxial layer 103. It should be noted that the lateral cross-sectional shape of the epitaxial layer 103 is not limited to a circular shape, but can also be other appropriate shapes, such as a rectangular shape, a square shape, or a polygonal shape, etc.

[0075] As shown in FIG. 1, the epitaxial layer 103 includes a first type epitaxial layer 1031, a second type epitaxial layer 1032, and a light emitting layer 1033 located therebetween. Figure 3

[0076] In the embodiments of the present application, the first type epitaxial layer 1031 is located above the light emitting layer 1033, and the second type epitaxial layer 1032 is located below the light emitting layer 1033. The second type epitaxial layer 1032 is electrically connected to the first transparent conductive layer 104, and the first type epitaxial layer 1031 is electrically connected to the second transparent conductive layer 106.

[0077] In some embodiments, the light emitting layer is formed by a plurality of stacked quantum well layers, in particular superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include a plurality of pairs of quantum well layers stacked with quantum barrier layers.

[0078] ​In some embodiments, the first type epitaxial layer is a semiconductor material with the first type of conductivity and includes a plurality of semiconductor layers. The main body material of the first type epitaxial layer can be, but is not limited to, composed of at least two or more elements from Ga, N, As, P, In, and Al. In addition, the first type epitaxial layer can include, but is not limited to, a confinement layer and a waveguide layer from top to bottom; in addition, in some embodiments, an ohmic contact layer can be formed on the confinement layer. In some embodiments, the second type epitaxial layer is a semiconductor material with the second type of conductivity and includes a plurality of semiconductor layers. The main body material of the second type epitaxial layer can be, but is not limited to, composed of materials such as Ga, N, As, P, In, or Al. In addition, the second type epitaxial layer can include, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer from top to bottom; in addition, an ohmic contact layer can be formed below the window layer. In one embodiment, the first type of conductivity is different from the second type of conductivity.

[0079] In some embodiments, the first type epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type epitaxial layer is a P-type GaN layer or a P-type AlGaN layer, i.e., the material of the second type epitaxial layer can be a material layer of the second type of conductivity composed of at least two or more elements from Ga, N, As, Al, In, and P, and the first type epitaxial layer can be a material layer of the first type of conductivity composed of at least two or more elements from Ga, N, As, Al, In, and P. In one embodiment, the light-emitting layer includes a plurality of quantum well layers and an electron blocking layer, and the plurality of quantum well layers are InGaN / GaN quantum well layers, InGaN / AlGaN quantum well layers, or InGaAs / AlGaAs quantum well layers. In another embodiment, the first type epitaxial layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second type epitaxial layer is an N-type GaN layer or an N-type AlGaN layer.

[0080] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, the thickness is 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the light-emitting layer is a multiple quantum well (MQW).

[0081] In some embodiments, one of the first and second type epitaxial layers is an N-type semiconductor layer and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer. The N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al x In 1-x P, where x ranges from 0.1 to 0.5, for example x is 0.5. Further, in these embodiments, the thickness of the N-type cladding layer is no more than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e 17 cm -3 to 1e 18 cm -3 In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer formed on the doped N-type contact layer. The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e 18 cm -3 to 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example 65 nm. In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light emitting layer and the doped P-type contact layer is formed on the P-type cladding layer.

[0082] In some embodiments, the material of the P-type cladding layer is Al x In 1-x P, where x is 0.3 to 0.5, for example x is 0.5. In such embodiments, the thickness of the P-type cladding layer is no more than 380 nm, for example, the thickness of the P-type cladding layer is 360 nm.

[0083] In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example 20 nm.

[0084] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed below the P-type cladding layer, a first doped P-type transition layer formed on the P-type cladding layer, and a second doped P-type transition layer formed on the first doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example, 65 nm.

[0085] In some embodiments, the material of the first doped P-type transition layer is (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example, 30 nm.

[0086] In some embodiments, the material of the second doped P-type transition layer is Al x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is 10 nm to 30 nm, for example, 20 nm.

[0087] In some embodiments, the doping concentration of the second doped P-type transition layer is greater than the doping density of the first doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times the doping concentration of the second doped P-type transition layer.

[0088] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second doped P-type transition layer. Further, in some embodiments, the doping concentration of the second doped P-type transition layer is 2 to 4 times the doping concentration of the first doped P-type transition layer.

[0089] For example, the doping concentration of the first doped P-type transition layer is greater than 1e 18 cm -3 , the doping density of the second doped P-type transition layer is 2e 18 cm -3 - 4e 18 cm -3The doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0090] In embodiments of the present application, the micro light emitting diode 101 further comprises a first bonding layer 107, which is located on the side of the first transparent conductive layer 104 away from the epitaxial layer 103, i.e. the first bonding layer 107 is located under the first transparent conductive layer 104. The number of the first bonding layer 107 is the same as the number of the epitaxial layer 103. The first bonding layer 107 of each micro light emitting diode 101 is independent, and all the first bonding layers 107 are not connected.

[0091] The size of the first bonding layer 107 is greater than or equal to the size of the first transparent conductive layer 104.

[0092] In embodiments of the present application, the insulating layer 105 also covers the side surface of the first bonding layer 107.

[0093] As shown in Figure 3 , the conductive structure 102 has an inner wall 1021 facing the micro light emitting diode and an outer wall 1022 facing away from the micro light emitting diode. The lower ends of the outer walls 1022 between adjacent conductive structures 102 are connected.

[0094] The surface of the conductive structure 102 towards the light emitting diode 101 has light reflecting ability, for example it is made of metal, so that the conductive structure 102 can at least partially reflect the light emitted by the light emitting diode 101. As shown in Figure 3 , the reflection process is that the light emitted from the light emitting layer of the light emitting diode 101 passes through the transparent layer (such as the second transparent conductive layer) above it, then a first part of these lights (whose exit angle is small enough not to hit the side conductive structure 102, within a predetermined light exit angle, such as within ± 20°) directly exits, a second part of these lights (whose exit angle is large enough to hit the side conductive structure 102) hits the conductive structure 102 and exits after reflection, changing the direction of the light path, becoming within the predetermined light exit angle, thereby effectively improving the light extraction efficiency. Preferably, the proportion of light reflected by the conductive structure 102 to the light emitted by the light emitting diode 101 may be, for example, 10%-60%. By setting the conductive structure 102 with light reflecting ability, the amount of light absorbed by the side wall can be significantly reduced, thereby significantly increasing the total light exit amount. At the same time, the conductive structure 102 can also isolate light and prevent light crosstalk between adjacent light emitting diodes 101.

[0095] In the embodiment of the present application, the conductive structure 102 is electrically connected with the second transparent conductive layer 106. By arranging the conductive structure 102 to electrically contact the second transparent conductive layer 106 around the micro light emitting diode 101, the electric contact area between the conductive structure 102 and the micro light emitting diode 101 can be significantly increased, so that the active layer (light emitting layer) of the micro light emitting diode 101 can emit light more uniformly, effectively avoiding the situation that light is emitted only at the electric contact position or near the electric contact position or the light emitted at the electric contact position or near the electric contact position is too bright.

[0096] The size of the bottom of the conductive structure is larger than the size of the top. Since the bottoms of the adjacent conductive structures 102 are connected, the longitudinal section of the two adjacent conductive structures 102 presents a shape of bifurcated peaks.

[0097] Further, the longitudinal section of the two adjacent conductive structures 102 can be asymmetric, and the heights can be different, which is not limited herein.

[0098] The bottoms of the adjacent conductive structures 102 are connected. Further, all the conductive structures 102 are connected as a whole, and the overall top view shape is as shown in Figure 2 .

[0099] In the embodiment, the top view shape (i.e. cross-sectional shape) of the micro light emitting diode 101 is circular, and the top view shape of the overall conductive structure is the grid shape left after the circular shape is removed (as shown in Figure 2 ).

[0100] In other embodiments, the top view shape of the micro light emitting diode 101 can also be other appropriate shapes, such as rectangular, square or regular polygon, etc. The top view shape of the overall conductive structure can also be the shape left after other appropriate shapes are removed, such as the grid shape left after a rectangular, square or polygon is removed.

[0101] In the embodiment of the present application, the bottom of the conductive structure 102 is lower than the epitaxial layer 103 of the micro light emitting diode 101.

[0102] In the embodiment of the present application, the top of the conductive structure 102 can be higher than the top of the epitaxial layer 103; the top of the conductive structure 102 can also be flush with the top of the epitaxial layer 103; the top of the conductive structure 102 can also be lower than the top of the epitaxial layer 103 (for example, 0-1 microns lower than the top of the epitaxial layer 103). In one chip, the above 1, 2 or 3 situations can exist simultaneously.

[0103] Preferably, the top of the conductive structure 102 is higher than the top of the epitaxial layer 103 of the micro light-emitting diode 101. By making the height of the top of the conductive structure 102 greater than the height of the top plane of the epitaxial layer 103 of the micro light-emitting diode 101, a higher conductive structure 102 can be obtained, which further increases the chance of light reflection and increases the light extraction efficiency.

[0104] like Figure 4 As shown, the conductive structure 102 can be divided into a first part 1023 whose inner wall is in direct contact with the micro LED, and a second part 1024 whose inner wall is not in direct contact with the micro LED. The second part 1024 is located above the first part 1023. As shown in the figure, it is divided by a dashed line; the part below the dashed line is the first part 1023, and the part above the dashed line is the second part 1024. The inner wall of the first part 1023 is in electrical contact with the second transparent conductive layer 106.

[0105] The second part 1024 of the conductive structure 102 has a three-dimensional shape. For example... Figure 4 As shown, in one embodiment, the three-dimensional shape of the second part 1024 is a cup shape with an open bottom, and the angle α between the inner wall of the second part 1024 and the horizontal direction is at least 90°, such that light incident from the micro light-emitting diode 101 onto the inner wall is reflected to the outside of the micro light-emitting diode 101.

[0106] The cup-shaped structure creates a reflective effect. When light from the miniature LED shines at a wide angle onto the inner wall of the cup-shaped metal, the reflection increases the light extraction efficiency at narrow angles. This cup-shaped structure achieves better light focusing.

[0107] like Figure 5 As shown, in another embodiment, the three-dimensional shape of the second part 1024 is a bowl shape with an open bottom, and the inner wall of the second part 1024 is arc-shaped. The angle β between the tangent at each point on the inner wall and the horizontal direction is at least 90°, so that the light incident from the micro light-emitting diode 101 onto the inner wall is reflected to the outside of the micro light-emitting diode 101.

[0108] In other embodiments, the number of conductive structures 102 may be 1 / 4 or 1 / 9 of the number of micro LEDs 101, with each conductive structure 102 surrounding 4 micro LEDs 101 or 9 micro LEDs 101, without limitation.

[0109] Conductive structures can increase the current spread between adjacent micro-LEDs, reduce the resistance between adjacent micro-LEDs, and reduce losses. Conductive structures can allow current to spread quickly and evenly to all micro-LEDs.

[0110] In an embodiment of the present invention, the conductive structure 102 may be a multilayer structure, and the conductive structure 102 may include one or more third metal layers.

[0111] In embodiments of the present application, the material of the third metal layer can be one or more of Pt, Au, Al, Ag.

[0112] In some embodiments, the conductive structure 102 can further include: a fourth metal layer corresponding to each of the third metal layers; wherein the fourth metal layers are staggered with the third metal layers, and each of the third metal layers is located on a corresponding fourth metal layer.

[0113] By adopting the fourth metal layer corresponding to each of the third metal layers, and the fourth metal layers are staggered with the third metal layers, and each of the third metal layers is located on a corresponding fourth metal layer, the influence of electromigration in the conductive structure 102 can be effectively suppressed by setting the fourth metal layer, especially in the case of a large density of micro light emitting diodes 101 in the micro light emitting diode chip, the possibility of increasing the height of the conductive structure 102 can be obtained by setting the fourth metal layer, and the light extraction efficiency is further improved by the higher conductive structure 102.

[0114] Further, the fourth metal layer can include a titanium (Ti) metal layer. It should be pointed out that the material of the fourth metal layer can also include other appropriate materials, such as titanium nitride (TiN).

[0115] In some embodiments, the conductive structure 102 can further include: a first metal layer located at the bottom layer of the conductive structure 102, and the fourth metal layer and the third metal layer are located above the first metal layer.

[0116] The first metal layer is formed between the micro light emitting diodes 101, and the fourth metal layer and the third metal layer are located on the first metal layer, which can effectively improve the stability of the bottom of the conductive structure 102 by the adhesion of the first metal layer, especially in the case of a large density of micro light emitting diodes 101 in the micro light emitting diode chip, the possibility of increasing the height of the conductive structure 102 can be obtained by setting the first metal layer, and the light extraction efficiency is further improved by the higher conductive structure 102.

[0117] Further, the first metal layer can include a chromium (Cr) metal layer. It should be pointed out that the material of the first metal layer can also include other appropriate materials, such as one or more of titanium (Ti), nickel (Ni), titanium nitride (TiN), tungsten (W). The first metal layer can increase the bonding force with the insulating material inside and outside the LED.

[0118] In embodiments of the present application, the conductive structure 102 can further include: a second metal layer corresponding to each of the fourth metal layers, and each of the fourth metal layers is located on a corresponding second metal layer.

[0119] By forming the second metal layer corresponding to the fourth metal layer, and each layer of the fourth metal layer is located on the corresponding second metal layer, the stability of the conductive structure 102 can be improved by the characteristics of the second metal layer having high hardness and good corrosion resistance. Especially in the case of a large density of micro light emitting diodes 101 in the micro light emitting diode chip, the possibility of increasing the height of the conductive structure 102 can be obtained by setting the second metal layer, and the light output rate is further improved by the higher conductive structure 102.

[0120] The second metal layer can include a platinum (Pt) metal layer and a nickel (Ni) metal layer. It should be noted that the second metal layer can be a single platinum metal layer, a single nickel metal layer, or any stack of a single platinum metal layer and a single nickel metal layer.

[0121] Figure 6 A longitudinal cross-sectional view of a micro light emitting diode chip according to another embodiment of the present application is shown.

[0122] In some embodiments, as shown in Figure 6 , there is a stack gap 1025 in the conductive structure 102.

[0123] The conductive structure 102 can be formed by metal evaporation, and the stack gap 1025 is formed during the metal evaporation process. The presence of the stack gap 1025 has the advantage of reducing the stress of the film layer in the conductive structure 102. The number of stack gaps 1025 is not fixed, and the position of the stack gap 1025 in the conductive structure 102 is not fixed, for example, the stack gap 1025 exists in the second part and / or the first part of the conductive structure 102. Figure 6 The number and position of the stack gap 1025 in

[0124] Figure 7 A longitudinal cross-sectional view of a micro light emitting diode chip with a microlens according to an embodiment of the present application is shown.

[0125] As shown in Figure 7 , the micro light emitting diode chip further includes a microlens 300. The microlens 300 is arranged above the micro light emitting diode, wherein at least one microlens 300 is arranged above the epitaxial layer 103 of the micro light emitting diode to form a microlens array. The adjacent microlenses 300 are connected, and the horizontal profile of the microlens 300 is larger than the maximum horizontal profile of the micro light emitting diode.

[0126] As shown in Figure 7As shown, in an embodiment of the present invention, a gap 301 is provided between adjacent microlenses. In an embodiment of the present invention, the bottom of the gap 301 is higher than the top of the epitaxial layer 103. In another embodiment of the present invention, the bottom of the gap 301 is lower than the top of the epitaxial layer 103 and higher than the bottom of the epitaxial layer 103. In yet another embodiment of the present invention, the bottom of the gap is located above the conductive structure 102. Specifically, as shown, the gap 301 is located between two adjacent conductive structures (i.e., between bifurcation peaks).

[0127] In addition, such as Figure 7 As shown, in embodiments of the present invention, the microlens may also have an air gap 302 inside. Each lens may have multiple air gaps, and the size and length of each air gap may be the same or different. Furthermore, within the same chip, the number and / or position and / or size of the air gaps in different microlenses may be the same or different. As shown, in some embodiments of the present invention, the air gap 302 is located at the edge of the microlens 300, specifically, for example, on both sides of the epitaxial layer 103, preferably, it is located between the epitaxial layer 103 and the conductive structure 102. Also, as shown, in some embodiments of the present invention, the top of the air gap 302 is higher than the top of the epitaxial layer 103, and its bottom may be higher than or lower than the top of the epitaxial layer 103. As shown, in some embodiments of the present invention, the bottom of the air gap 302 is higher than the top of the conductive structure 102. In still other embodiments of the present invention, the bottom of the air gap 302 is lower than the top of the conductive structure 102. It should be noted that in other embodiments of the present invention, the microlens may not have an air gap 302 inside.

[0128] In embodiments of the present invention, such as Figure 3 As shown, the miniature light-emitting diode chip also includes a driving backplane 201, on which the miniature light-emitting diode 101 is disposed. The driving backplane 201 can be an integrated circuit (IC) board. The epitaxial layer 103 is electrically connected to the driving backplane 201, and the driving backplane 201 is used to control the lighting and extinguishing of the epitaxial layer 103.

[0129] In some embodiments, the integrated circuit board can be electrically connected to each micro-LED in the micro-LED array via separate metal interconnects.

[0130] In some embodiments, each miniature light-emitting diode can be electrically controlled individually by an integrated circuit board.

[0131] In some embodiments, the integrated circuit board can be electrically connected to the electrodes of a micro light-emitting diode chip via metal interconnects.

[0132] In an embodiment of the present application, the driving back plate 201 has driving electrodes 202, each micro light emitting diode 101 corresponding to one driving electrode 202. The driving electrodes 201 can be conductive vias, such as copper vias.

[0133] In an embodiment of the present application, the surface of the driving electrode 202 is provided with a second bonding layer 203, the second bonding layer 203 being in electrical contact with the driving electrode 202; the second bonding layer 203 being bonded with the first bonding layer 107.

[0134] In an embodiment of the present application, there is also provided a display panel comprising the micro light emitting diode chip as described above.

[0135] Although some embodiments of the present application have been described in the present application, it should be understood that these embodiments are merely for illustration. Many variations, alternative and modifications will be apparent to those skilled in the art in view of the teachings of the present application. The appended claims are intended to cover such variations, alternative and modifications as falling within the scope of the present application. The present application claims the benefit of Chinese Patent Application No. 201910593593.2, filed on June 14, 2019, which is incorporated by reference in its entirety.

Claims

1. A miniature light-emitting diode chip, characterized in that, include: Multiple miniature light-emitting diodes arranged in an array; as well as A conductive structure is located between the micro-light-emitting diodes, wherein the conductive structure surrounds the micro-light-emitting diodes and is in electrical contact with the micro-light-emitting diodes. In this configuration, adjacent micro-LEDs are connected by two conductive structures. Each conductive structure has an inner wall facing the adjacent micro-LED and an outer wall facing away from it. The lower ends of the outer walls of the two conductive structures are connected, and the longitudinal cross-sections of the two conductive structures exhibit a bifurcated peak shape. All conductive structures are integrated into a single unit. In this embodiment, the bottom dimension of the micro LED is larger than its top dimension. In this case, the longitudinal cross-sectional shapes of adjacent conductive structures are asymmetrical. The conductive structure is a multilayer structure, wherein the conductive structure includes one or more third metal layers. The conductive structure further includes a fourth metal layer, which corresponds one-to-one with each of the third metal layers, and the fourth metal layers and the third metal layers are staggered, with each third metal layer located on the corresponding fourth metal layer. The conductive structure further includes a first metal layer, which is located at the bottom layer of the conductive structure, and the fourth metal layer and the third metal layer are located on top of the first metal layer.

2. The micro light-emitting diode chip according to claim 1, characterized in that, The material of the third metal layer is selected from one or more of Ti, Pt, Au, Al, and Ag.

3. The miniature light-emitting diode chip according to claim 1, characterized in that, The conductive structure further includes a second metal layer, which corresponds one-to-one with the fourth metal layer. Each fourth metal layer is located on the corresponding second metal layer, and the second metal layer is located on top of the first metal layer.

4. The micro light-emitting diode chip according to claim 1, characterized in that, The conductive structure has interlocking gaps.

5. The micro light-emitting diode chip according to claim 1, characterized in that, The miniature light-emitting diode includes: Epitaxial layer; A first transparent conductive layer is located below the epitaxial layer; A second transparent conductive layer is located on the side and top surfaces of the epitaxial layer; and An insulating layer is located on the side of the epitaxial layer and the side of the first transparent conductive layer, and is located between the epitaxial layer and the second transparent conductive layer.

6. The miniature light-emitting diode chip according to claim 5, characterized in that, The bottom of the conductive structure is below the epitaxial layer.

7. The micro light-emitting diode chip according to claim 5, characterized in that, The top of the conductive structure is higher than the top of the epitaxial layer; and / or The top of the conductive structure is flush with the top of the epitaxial layer; and / or The top of the conductive structure is 0-1 micrometers lower than the top of the epitaxial layer.

8. The micro light-emitting diode chip according to claim 5, characterized in that, The conductive structure surrounds the epitaxial layer.

9. The micro light-emitting diode chip according to claim 5, characterized in that, The bottom dimension of the epitaxial layer is larger than the top dimension of the epitaxial layer.

10. The micro light-emitting diode chip according to claim 5, characterized in that, The epitaxial layer includes a first type epitaxial layer, a second type epitaxial layer, and a light-emitting layer located between the two.

11. The micro light-emitting diode chip according to claim 10, characterized in that, The second type of epitaxial layer is electrically connected to the first transparent conductive layer; The first type of epitaxial layer is electrically connected to the second transparent conductive layer.

12. The micro light-emitting diode chip according to claim 5, characterized in that, The micro light-emitting diode also includes a first bonding layer, which is located on the side of the first transparent conductive layer opposite to the epitaxial layer.

13. The micro light-emitting diode chip according to claim 12, characterized in that, The first bonding layers of all the micro LEDs are not connected to each other.

14. The micro light-emitting diode chip according to claim 12, characterized in that, It also includes a drive backplane, which is electrically connected to the micro LED.

15. The micro light-emitting diode chip according to claim 14, characterized in that, The driving backplate has driving electrodes, with each micro LED corresponding to one driving electrode.

16. The micro light-emitting diode chip according to claim 15, characterized in that, A second bonding layer is disposed on the surface of the driving electrode. The second bonding layer is located on the bottom surface of the first bonding layer and is in electrical contact with the driving electrode.

17. The micro light-emitting diode chip according to claim 10, characterized in that, It also includes microlenses disposed on the micro light-emitting diode, with adjacent microlenses connected to each other.

18. The micro light-emitting diode chip according to claim 17, characterized in that, There is a gap between adjacent microlenses, and the gap is located above or between two adjacent conductive structures.

19. The micro light-emitting diode chip according to claim 17, characterized in that, The microlens has an air gap inside, which is located between the epitaxial layer and the conductive structure.

20. A display panel comprising a micro light-emitting diode chip according to any one of claims 1 to 19.

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