Memory management method and device, electronic equipment, storage medium and program product

Abstract

The invention discloses a memory management method and device, electronic equipment, a storage medium and a program product, and belongs to the technical field of communication. The method comprises the steps that memory application requests corresponding to at least two tasks are received, the memory application requests corresponding to the tasks are used for requesting to allocate memories for the tasks, and one task corresponds to one memory application request; obtaining the memory priority of each task; based on the memory priority of each task, determining a memory area corresponding to each task; and based on the memory area corresponding to each task, allocating a memory to each task.

Description

Technical Field

[0001] This application belongs to the field of communication technologies, and particularly relates to a memory management method, apparatus, electronic device, storage medium, and program product. Background Art

[0002] Currently, when tasks running in the foreground and background of an electronic device need to apply for memory, the tasks running in the foreground and background can separately send memory application requests to the Central Processing Unit (CPU) of the electronic device, so that the CPU can search for multiple free memory blocks in the memory unit and allocate memory for the tasks running in the foreground and background respectively; that is to say, when the CPU allocates memory, the tasks to which the memory is allocated are all treated equally, and any task uses the same path to apply for memory.

[0003] However, in the above method, since the tasks to which the memory is allocated are all treated equally when the CPU allocates memory, when the tasks running in the foreground and background apply for memory simultaneously, the task running in the background may successfully apply for memory, while the task running in the foreground may fail to apply for memory, and is forced to trigger memory recycling. Even after memory recycling, it still fails to apply for memory, resulting in the electronic device may experience a lag phenomenon. Thus, the efficiency of the electronic device for memory management is relatively poor. Summary of the Invention

[0004] An object of embodiments of this application is to provide a memory management method, apparatus, electronic device, storage medium, and program product, which can improve the efficiency of memory management of an electronic device.

[0005] In a first aspect, embodiments of this application provide a memory management method, which includes: receiving memory application requests corresponding to at least two tasks, where the memory application request corresponding to a task is used to request memory allocation for the task, and one task corresponds to one memory application request; obtaining the memory priority of each of the at least two tasks; determining the memory area corresponding to each of the at least two tasks based on the memory priorities among the at least two tasks; and allocating memory to each of the at least two tasks respectively based on the memory area corresponding to each of the at least two tasks.

[0006] Second aspect, an embodiment of the present application provides a memory management device, which includes: a receiving module, an obtaining module, a determining module, and an allocating module; the receiving module is configured to receive memory application requests corresponding to at least two tasks, and the memory application request corresponding to a task is used to request memory allocation for the task, and one task corresponds to one memory application request. The obtaining module is configured to obtain the memory priority of each task received by the receiving module. The determining module is configured to determine the memory area corresponding to each of the at least two tasks based on the memory priority of each of the at least two tasks obtained by the obtaining module. The allocating module is configured to allocate memory to each of the at least two tasks respectively based on the memory area corresponding to each of the at least two tasks determined by the determining module.

[0007] Third aspect, an embodiment of the present application provides an electronic device, which includes a processor and a memory. The memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, the steps of the method described in the first aspect are implemented.

[0008] Fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored, and when the program or instruction is executed by a processor, the steps of the method described in the first aspect are implemented.

[0009] Fifth aspect, an embodiment of the present application provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor, and the processor is configured to run a program or instruction to implement the method described in the first aspect.

[0010] Sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium, and the program product is executed by at least one processor to implement the method described in the first aspect.

[0011] In an embodiment of the present application, memory application requests corresponding to at least two tasks are received. The memory application request corresponding to a task is used to request memory allocation for the task, and one task corresponds to one memory application request; then, the memory priority of each of the at least two tasks is obtained; then, based on the memory priorities of the at least two tasks, the memory area corresponding to each of the at least two tasks is determined; finally, memory is allocated to each of the at least two tasks respectively based on the memory area corresponding to each of the at least two tasks. In this solution, fine-grained control of memory resources in the electronic device can be performed through memory priorities, thereby reducing the contention of memory resources in a multi-task scenario with different memory priorities. In this way, the efficiency of memory management of the electronic device is improved. Description of the Drawings

[0012] Figure 1 is one of the flowcharts of a memory management method provided by an embodiment of the present application;

[0013] Figure 2 is the second flowchart of a memory management method provided by an embodiment of the present application;

[0014] Figure 3 is the third flowchart of a memory management method provided by an embodiment of the present application;

[0015] Figure 4 is the fourth flowchart of a memory management method provided by an embodiment of the present application;

[0016] Figure 5 is the fifth flowchart of a memory management method provided by an embodiment of the present application;

[0017] Figure 6 is the sixth flowchart of a memory management method provided by an embodiment of the present application;

[0018] Figure 7 is the seventh flowchart of a memory management method provided by an embodiment of the present application;

[0019] Figure 8 is the first structural schematic diagram of a memory management device provided by an embodiment of the present application;

[0020] Figure 9 is the second structural schematic diagram of a memory management device provided by an embodiment of the present application;

[0021] Figure 10 is the first hardware structural schematic diagram of an electronic device provided by an embodiment of the present application;

[0022] Figure 11 is the second hardware structural schematic diagram of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0023] Next, the technical solutions in the embodiments of the present application will be clearly described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope protected by the present application.

[0024] The terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such terms can be interchanged under appropriate circumstances, so that the embodiments of this application can be implemented in an order other than those illustrated or described herein. The objects distinguished by "first", "second", etc. are generally of the same category, and do not limit the number of objects. For example, the first object can be one or more. In addition, "and / or" in the description and claims means at least one of the connected objects. The character " / ", generally represents an "or" relationship between the associated objects before and after.

[0025] The terms "at least one (item)", "at least one of", etc. in the description and claims of this application refer to any one, any two or more combinations of the objects they contain. For example, at least one (item) of a, b, and c can represent: "a", "b", "c", "a and b", "a and c", "b and c", and "a, b, and c", where a, b, and c can be single or multiple. Similarly, "at least two (items)" means two or more, and its meaning is similar to that of "at least one (item)".

[0026] The following provides a specific explanation of the professional terms provided in the embodiments of this application.

[0027] Scheduling priority: Scheduling priority refers to the priority level when a task or process is scheduled to run in an operating system. The scheduling priority determines the order in which tasks or processes are scheduled. In a real-time system, task scheduling priority is particularly important because it reflects the importance and urgency of tasks. The operating system usually assigns a priority to each process, and this priority can be static or dynamically changing. Static priority is determined when the process is created and remains unchanged throughout the running period; while dynamic priority can change as the process progresses or the waiting time increases. It can be understood that scheduling priority refers to the mechanism that determines the execution order of different processes or threads in a multi-tasking environment. Scheduling priority is usually managed by the scheduler of the operating system, which uses a series of rules to determine which task should obtain CPU time and when.

[0028] Memory Page: A technology used by the operating system to manage memory. It divides physical memory into fixed-size blocks. Memory paging is a mechanism that divides physical memory into fixed-size blocks (called pages, usually 4KB) and divides the logical address space into blocks of the same size (called page tables). Paging allows for non-contiguous physical memory allocation, thus reducing external fragmentation. Working principle: Physical address space: The actual memory address. Page table: Maintains the mapping relationship between logical pages and physical pages. When a program needs to access a certain address, the CPU divides the logical address into a page number and an offset within the page, looks up the corresponding physical page frame number through the page table, and then adds the offset to obtain the physical address.

[0029] Basic Page: In paged storage management, the basic page in memory refers to dividing the logical address space of a process into several equally sized slices, called pages or pages. The page size in a paging system should be appropriate, and the page size should be a power of 2, usually 512B - 8KB. The size of each page is fixed.

[0030] Anonymous Page: A concept in the operating system's memory management, mainly used for dynamic memory allocation and inter-process communication. Anonymous pages are memory pages that do not directly correspond to files on disk. They are usually used in cases such as heap memory allocation, stack space, and shared memory segments. These pages exist in physical memory, but there is no direct association with a file in the file system. They will be swapped out to the swap partition during reclamation.

[0031] The main characteristics and uses of anonymous pages include:

[0032] 1. Dynamic memory allocation: Many applications need to dynamically allocate memory during runtime. Anonymous pages provide a simple way to meet these needs without creating corresponding files in the file system.

[0033] 2. Memory protection: Anonymous pages allow the operating system to provide independent memory spaces for each process, protecting the memory between processes from being directly accessed.

[0034] 3. Simplify Input / Output (I / O): For memory that does not require persistent storage, anonymous pages can reduce the overhead of file I / O and improve the efficiency of memory access.

[0035] 4. Process heap and stack: Most applications use the heap and stack to store local variables, objects, etc. during runtime. Anonymous pages provide support for this memory.

[0036] 5. Page replacement: In cases of high memory pressure, anonymous pages can be swapped to disk to free up memory for other processes.

[0037] File-backed Pages: Memory pages that are directly associated with a specific file on disk.

[0038] Least Recently Used (LRU): A common page replacement algorithm used to manage memory in a computer system. The LRU algorithm is based on the assumption that if data has not been accessed recently, it is less likely to be accessed in the future. Therefore, when memory reclamation is performed, the LRU algorithm selects the page that has not been accessed for the longest time and removes it from physical memory.

[0039] Transparent Huge Pages (THP) is a memory management technique in the Linux operating system kernel. THP reduces the number of page tables and improves address translation efficiency by using larger page sizes, such as 2MB or 1GB. This can improve system performance when processing large data sets, especially in applications such as databases and high-performance computing. The "transparent" nature of THP means that applications can benefit from the advantages of large pages without any modification. The operating system automatically handles the allocation and management of large pages in the background. This is more convenient compared to traditional large page management, which usually requires explicitly requesting and using specific-sized pages in the application code.

[0040] Folio: A structure in the Linux kernel that represents a contiguous memory page.

[0041] Large Folio: Refers to a Folio that contains more than one page, as opposed to a Folio with only one page.

[0042] multi-sized THP (mTHP): An implementation in the Linux kernel where anonymous pages support Large Folio. When enabled, it fills multiple (depending on the configuration and the size of the virtual memory address space, and >= 4) contiguous physical pages at once for a task that triggers an anonymous page fault.

[0043] Swap: Refers to the action of swapping out anonymous pages to the swap space on disk when the system memory is insufficient. The swap space allows the operating system to simulate more memory space, enabling multiple processes to run simultaneously, even if the total amount of memory they require exceeds the size of physical memory. By moving data between physical memory and the swap space, the operating system can ensure that the most active and important processes can continue to run in physical memory, while less frequently used data is temporarily stored in the swap space.

[0044] zRAM: A compressed memory page driver in the Linux kernel that can create a compressible block device in memory, typically used as swap space. Different from traditional hard disk swap space, the swap space provided by zRAM is in memory and reduces the amount of physical memory required through real-time compression.

[0045] The memory management method, device, electronic device, storage medium, and program product provided by the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings, through specific embodiments and their application scenarios.

[0046] The memory management method, device, electronic device, storage medium, and program product provided by the embodiments of the present application can be applied to memory allocation scenarios and memory recycling scenarios.

[0047] Currently, tasks in the kernel of an electronic device have scheduling priorities. Tasks with higher scheduling priorities will be scheduled first and have more CPU running time. In a scenario where foreground-running tasks and background-running tasks coexist, foreground-running tasks are configured with higher scheduling priorities.

[0048] When tasks with high scheduling priorities and tasks with low scheduling priorities simultaneously apply for memory resources, since the kernel's control over memory resources is limited to controlling the amount of memory used, for example, the Linux system configures the amount of memory used in the memory control group (memcg), it only restricts how much memory the processes in the control group can use at most. Moreover, when the kernel allocates memory, the tasks to which the memory is allocated are treated equally, and any task uses the same code path to apply for memory. When tasks with different scheduling priorities simultaneously apply for memory allocation, since memory is allocated from the same memory area, a task with a low scheduling priority may successfully allocate memory, while a task with a high scheduling priority may fail to allocate memory and be forced to trigger memory recycling, and may still not be able to allocate memory even after recycling. When tasks with different scheduling priorities simultaneously apply for memory recycling, the tasks from which memory is recycled are treated equally, and any task is recycled evenly. In the LRU list scanned during memory recycling, since memory is recycled from the same memory area, and the memory allocated to tasks with high scheduling priorities and the memory allocated to tasks with low scheduling priorities in this same memory area are mixed together, a task with a high scheduling priority may be recycled earlier than a task with a low scheduling priority. Thus, the efficiency of the electronic device in performing memory management is poor.

[0049] It can be understood that the above-mentioned memory allocation and memory recycling are both caused by all tasks being treated equally when applying for memory, so that low-priority tasks affect the normal operation of high-priority tasks. In particular, for electronic devices, slow or failed memory allocation for high-scheduling-priority tasks and memory recycling will directly affect whether the application runs smoothly and the user experience.

[0050] In the memory management method, device, electronic device, storage medium, and program product provided in the embodiments of the present application, the memory resources in the electronic device can be finely controlled through memory priorities, thereby reducing the contention for memory resources in a multi-task scenario with different memory priorities. In this way, the efficiency of the electronic device for memory management is improved.

[0051] The execution subject of the memory management method provided in the embodiments of the present application can be a memory management device, and this memory management device can be an electronic device or a functional module in the electronic device. Hereinafter, taking the electronic device as an example, the technical solutions provided in the embodiments of the present application will be described.

[0052] The embodiments of the present application provide a memory management method. Figure 1 The flowchart of a memory management method provided in the embodiments of the present application is shown. As Figure 1 shown, the memory management method provided in the embodiments of the present application may include the following steps 201 to 204.

[0053] Step 201: The electronic device receives memory application requests corresponding to at least two tasks.

[0054] In the embodiments of the present application, the memory application requests corresponding to the above tasks are used to request memory allocation for the tasks, and one memory application request corresponds to one of the at least two tasks.

[0055] Optionally, in the embodiments of the present application, the above tasks generally refer to a series of predefined operations or instructions executed by the electronic device, and these operations can be automated or manually triggered by the user.

[0056] Exemplarily, the above tasks can be processes or threads.

[0057] Optionally, in the embodiments of the present application, at least two first application programs in the electronic device can send at least two memory application requests to the CPU in the electronic device through processes or threads, so that the CPU can receive at least two memory application requests.

[0058] Optionally, in the embodiments of the present application, each of the at least two first application programs can be any application program in the electronic device.

[0059] Exemplarily, the above application can be a communication application, a game application, a video application, etc.

[0060] Step 202, the electronic device obtains the memory priority of each of at least two tasks.

[0061] Optionally, in the embodiments of the present application, the above memory priority can be preset by the electronic device; or user-defined.

[0062] Example 1, the electronic device can add system calls, for example: getmempry system call and setmempry system call, to obtain and modify the memory priority of tasks through the system call method.

[0063] Example 2, the electronic device can add a procfs file node, for example, the path is / proc / <pid> / mempry, obtaining and modifying the memory priority of tasks by reading and writing procfs files.

[0064] Optionally, in the embodiments of the present application, a memory priority list may be stored in the electronic device. All tasks in the electronic device may be stored in the memory priority list corresponding to the memory priority. The electronic device may obtain the memory priority of each task in at least two tasks by querying the memory priority list.

[0065] Exemplarily, the above memory priority list may be a set or an array.

[0066] Optionally, in the embodiments of the present application, the above memory priority list may include a task identifier and the memory priority corresponding to the task identifier.

[0067] Optionally, in the embodiments of the present application, the above task identifier may be any one of the following: a text identifier, a numerical identifier, a special symbol identifier, etc.

[0068] Exemplarily, the above memory priority set may be {Task 1, 2; Task 2, 3; Task 3, 4}, where Task 1, Task 2, and Task 3 in the above set are task identifiers, and 2, 3, and 4 in the set are the memory priorities corresponding to the task identifiers.

[0069] Optionally, in the embodiments of the present application, the storage order of the task identifier and the memory priority corresponding to the task identifier in the above memory priority list may be in ascending order or descending order. Specifically, it may be determined according to actual usage requirements, and the embodiments of the present application do not limit it.

[0070] Optionally, in the embodiments of the present application, a first correspondence between each task in at least two tasks and the memory priority may be stored in the electronic device, so that the electronic device may determine the memory priority of each task in at least two tasks according to the first correspondence.

[0071] Exemplarily, taking at least two tasks as two tasks, the electronic device may find the memory priority corresponding to the first task, for example 8, from the first correspondence according to the above first correspondence, and find the memory priority corresponding to the second task, for example 5, from the first correspondence.

[0072] It should be noted that for each task in the above at least two tasks, the electronic device may find the memory priority corresponding to each task through the above embodiments. To avoid repetition, it will not be elaborated here.

[0073] Step 203: The electronic device determines the memory area corresponding to each task in at least two tasks based on the memory priority of each task in at least two tasks.

[0074] Optionally, in the embodiments of the present application, the above-mentioned memory area may be a memory space (zone), or a memory pool (pagepool), or a memory block (page block).

[0075] Optionally, in the embodiments of the present application, different memory priorities may correspond to different memory areas, and the sizes of the memory pages in the different memory areas may be the same or different.

[0076] Optionally, in the embodiments of the present application, one memory priority corresponds to one memory area, and each of the different memory areas is independent of each other; the higher the memory priority, the larger the size of the memory pages in the memory area corresponding to the memory priority.

[0077] In this way, since the sizes of the memory pages in different memory areas are different, the larger the size of the memory pages in the memory area, the fewer the number of memory addressings performed by the electronic device, and thus the faster the memory allocation and recycling rates; therefore, it can be understood that in the case where the size of the memory pages in the memory area corresponding to the high memory priority is larger, the rates of memory allocation and memory recycling for the high memory priority are higher, so that the tasks corresponding to the high memory priority are favored in the entire memory allocation and recycling process to ensure the performance of the tasks corresponding to the high memory priority.

[0078] Exemplarily, when the memory priority is a high memory priority, the memory pages in the memory area corresponding to the high memory priority may be transparent huge pages; when the memory priority is a low memory priority, the memory pages in the memory area corresponding to the low memory priority may be basic pages.

[0079] It should be noted that the above "high memory priority" and "low memory priority" are only examples and are relative highs and lows, and it is not the case that there are only two options for memory priority, i.e., high and low. For example, the scheduling priority range in the Unix system is [-20, 19], and the memory priority is also a value range. For example, the memory priority range may also be [-20, 19], and each value in this memory priority range may correspond to a memory priority.

[0080] Optionally, in the embodiments of the present application, the memory priorities of each of the above-mentioned at least two tasks may be the same or different. Specifically, it may be determined according to actual usage requirements, and the embodiments of the present application do not make any restrictions.

[0081] Step 204: The electronic device allocates memory to each of the at least two tasks respectively based on the memory area corresponding to each of the at least two tasks.

[0082] It should be noted that the specific process of the above step 204 can be found in the following embodiments in detail. To avoid repetition, it will not be elaborated here.

[0083] In the memory management method provided by the embodiments of the present application, an electronic device may receive memory application requests corresponding to at least two tasks. The memory application requests corresponding to the tasks are used to request memory allocation for the tasks, and one task corresponds to one memory application request. Then, obtain the memory priority of each of the at least two tasks. Next, based on the memory priorities among the at least two tasks, determine the memory area corresponding to each of the at least two tasks. Finally, based on the memory area corresponding to each of the at least two tasks, allocate memory to each of the at least two tasks respectively. In this solution, through the memory priority, fine-grained control of the memory resources in the electronic device can be performed, thereby reducing the contention of memory resources in a multi-task scenario with different memory priorities. In this way, the efficiency of the electronic device for memory management is improved.

[0084] Optionally, in the embodiments of the present application, in combination with the above Figure 1 As Figure 2 shown, the above step 203 can be specifically implemented by the following step 203a.

[0085] Step 203a: When the first memory priority of the first task among the at least two tasks is greater than or equal to the first threshold, the electronic device determines the first memory area as the memory area corresponding to the first task.

[0086] In the embodiments of the present application, the above first memory area includes the memory area corresponding to the second memory priority, and the second memory priority is less than the first threshold.

[0087] Optionally, in the embodiments of the present application, the above first threshold may be preset by the electronic device; or user-defined.

[0088] Exemplarily, the above first threshold may be 8, 9, 10. It can be specifically determined according to the actual usage situation, and the embodiments of the present application do not make limitations.

[0089] For example, assume that the first memory priority of the first task is 10 and the first threshold is 8. The electronic device compares the first memory priority 10 with the first threshold 8 and knows that the first memory priority is greater than the first threshold.

[0090] Optionally, in the embodiments of the present application, the above first memory area may further include the memory area corresponding to the first memory priority and the memory area corresponding to the second memory priority.

[0091] Optionally, in the embodiments of the present application, the electronic device may store a second correspondence between the first memory priority and the first memory area. In this way, the electronic device can determine the first memory area according to the second correspondence and use the first memory area as the memory area of the first task.

[0092] Optionally, in the embodiments of the present application, when the first memory priority of the first task is less than the first threshold, the electronic device determines the third memory area as the memory area corresponding to the first task.

[0093] In the embodiments of the present application, the above-mentioned third memory area is the memory area corresponding to the first memory priority.

[0094] In the embodiments of the present application, the electronic device can determine the memory area corresponding to the memory priority by judging the memory priority level of the first task, so as to obtain memory resources from the memory area corresponding to the memory priority, reducing the phenomenon of memory preemption among multiple tasks in the same memory area and improving the efficiency of the electronic device in memory management.

[0095] Optionally, in the embodiments of the present application, the memory application request corresponding to the first task carries the first memory allocation requirement information corresponding to the first task; combined with Figure 1 , as Figure 3 shown, the above step 204 can be specifically implemented by the following step 204a.

[0096] Step 204a: When the first memory priority of the first task among at least two tasks is greater than or equal to the first threshold, the electronic device allocates memory for the first task based on the first memory allocation requirement information and the free memory large pages in the first memory area.

[0097] In the embodiments of the present application, the above-mentioned memory large pages are composed of consecutive memory base pages.

[0098] Exemplarily, the above-mentioned memory large pages can be multi-size transparent large pages.

[0099] Optionally, in the embodiments of the present application, the memory amount of the above-mentioned free memory large pages can be greater than or equal to the memory application amount indicated in the first memory allocation requirement information.

[0100] Exemplarily, when the first memory priority of the first task among at least two tasks is greater than or equal to the first threshold, the electronic device can randomly select at least one consecutive free memory large page from the first memory area to allocate memory for the first task.

[0101] Optionally, in the embodiments of the present application, when the first memory priority of the first task among at least two tasks is greater than or equal to the first threshold, and the memory amount corresponding to the free memory pages in the memory area corresponding to the first memory priority is less than the memory application amount indicated in the first memory allocation requirement information, the electronic device may first select free large memory pages from the memory area corresponding to the first memory priority, then select free basic pages from the memory area corresponding to the second memory priority, and finally allocate the free large memory pages and the free basic pages to the first task.

[0102] Exemplarily, the CPU in the electronic device may send the address pointers corresponding to the above-mentioned free large memory pages and the above-mentioned free basic pages to the first task, so that the first task can obtain memory resources from the above-mentioned free large memory pages and the above-mentioned free basic pages according to the address pointers.

[0103] Optionally, in the embodiments of the present application, when the first memory priority of the first task among at least two tasks is less than the first threshold, the electronic device allocates memory for the first task based on the first memory allocation requirement information and the free memory basic pages in the third memory area.

[0104] Exemplarily, when the first memory priority of the first task among at least two tasks is less than the first threshold, the electronic device may randomly select at least one discrete free memory basic page from the third memory area to allocate memory for the first task.

[0105] It should be noted that when the first memory priority of the first task among at least two tasks is less than the first threshold, the electronic device can only randomly select at least one discrete free memory basic page from the third memory area to allocate memory for the first task.

[0106] Exemplarily, the CPU in the electronic device may send the address pointer corresponding to the above-mentioned free basic page to the first task, so that the first task can obtain memory resources from the above-mentioned free basic page according to the address pointer.

[0107] It should be noted that in the memory allocation scenario, for each task among at least two tasks, the electronic device can allocate memory for each task among at least two tasks through the above embodiments. To avoid repetition, it will not be elaborated here.

[0108] In the embodiments of the present application, the first task can obtain memory resources from the memory area corresponding to the first memory priority and the memory area corresponding to the second memory priority, so that the tasks corresponding to the high memory priority are given preferential treatment throughout the memory allocation process to ensure the performance of the tasks corresponding to the high memory priority.

[0109] Optionally, in the embodiments of the present application, in combination with Figure 1 , such as Figure 4 As shown in the figure, the memory management method provided by the embodiment of the present application further includes the following steps 301 and 302.

[0110] Step 301: When the electronic device triggers memory recycling, the electronic device determines a memory recycling list corresponding to each of at least two tasks based on the memory priority of each of the at least two tasks.

[0111] Optionally, in the embodiment of the present application, a third correspondence between the memory priority and the memory recycling list may be stored in the electronic device, so that the electronic device can determine the memory recycling list corresponding to each of the at least two tasks according to the third correspondence.

[0112] Exemplarily, the above memory recycling list may be an LRU memory recycling list.

[0113] Step 302: The electronic device reclaims memory for each of the at least two tasks respectively based on the memory recycling list corresponding to each of the at least two tasks.

[0114] In the embodiment of the present application, the electronic device can determine the memory to be reclaimed through the memory recycling list corresponding to each of the at least two tasks, and then reclaim memory for each of the at least two tasks respectively.

[0115] Optionally, in the embodiment of the present application, when the first memory priority of the first task is greater than or equal to the first threshold, the electronic device can determine the memory to be reclaimed through the memory recycling list corresponding to the first memory priority and the memory recycling list corresponding to the second memory priority, and then reclaim memory for the first task.

[0116] Exemplarily, when the first memory priority of the first task is greater than or equal to the first threshold, the electronic device preferentially determines the first memory to be reclaimed through the memory recycling list corresponding to the second memory priority; when the first memory to be reclaimed is less than the memory amount indicated by the first memory allocation requirement information, the electronic device then determines the second memory to be reclaimed through the memory recycling list corresponding to the first memory priority.

[0117] Optionally, in the embodiment of the present application, when the first memory priority of the first task is less than the first threshold, the electronic device can determine the memory to be reclaimed through the memory recycling list corresponding to the first memory priority, and then reclaim memory for the first task.

[0118] Exemplarily, when the first memory priority of the first task is less than the first threshold, the electronic device can only determine the memory to be reclaimed through the memory recycling list corresponding to the first memory priority.

[0119] Optionally, in the embodiments of the present application, the memory recovery list includes a memory area identifier corresponding to the memory recovery list and a memory identifier in the memory area. The electronic device may determine the memory to be recovered from the memory area according to the LRU algorithm.

[0120] Optionally, in the embodiments of the present application, the memory identifier may be any of the following: a text identifier, a digital identifier, a special symbol identifier, etc. It can be specifically determined according to actual usage requirements, and the embodiments of the present application do not make any restrictions.

[0121] Optionally, in the embodiments of the present application, the memory area identifier may be any of the following: a text identifier, a digital identifier, a special symbol identifier, etc. It can be specifically determined according to actual usage requirements, and the embodiments of the present application do not make any restrictions.

[0122] It should be noted that the execution timing of the above steps 301 and 302 may be before step 203 or after step 204. It can be specifically determined according to actual usage requirements, and the embodiments of the present application do not make any restrictions. Exemplarily, as Figure 4 shown, the execution timing of the above steps 301 and 302 may be after 204.

[0123] In the embodiments of the present application, when the electronic device performs memory recovery, for tasks with high memory priority, the electronic device may obtain memory resources from memory areas lower than the memory area corresponding to the high memory priority and the memory area corresponding to the high memory priority. Tasks corresponding to the high memory priority are given preferential treatment throughout the memory recovery process to ensure the performance of tasks corresponding to the high memory priority.

[0124] Optionally, in the embodiments of the present application, in combination with Figure 4 , as Figure 5 shown, the specific implementation of the "the electronic device determines a memory recovery list corresponding to each of the at least two tasks based on the memory priority of each of the at least two tasks" in step 301 may be achieved according to the following step 301a.

[0125] Step 301a: When the first memory priority of the first task among the at least two tasks is greater than or equal to the first threshold, the electronic device includes the second memory area in the memory recovery list corresponding to the first memory priority.

[0126] In the embodiments of the present application, the second memory area includes a memory area corresponding to a third memory priority, and the third memory priority is less than the first threshold.

[0127] Optionally, in the embodiments of the present application, the second memory area may further include a memory area corresponding to the first memory priority and a memory area corresponding to the third memory priority.

[0128] Optionally, in the embodiments of the present application, when the first memory priority of the first task among at least two tasks is greater than or equal to the first threshold, the electronic device adds the memory area identifier of the second memory area and the memory identifier of the memory in the second memory area to the memory recycling list corresponding to the first memory priority.

[0129] Optionally, in the embodiments of the present application, when the first memory priority of the first task among at least two tasks is less than the first threshold, the electronic device can perform memory recycling through the memory recycling list corresponding to the first memory priority.

[0130] It should be noted that for the memory recycling scenario, for each of the at least two tasks, the electronic device can perform memory recycling operations for each of the at least two tasks through the above embodiments. To avoid repetition, it will not be elaborated here.

[0131] In the embodiments of the present application, the electronic device can place the memory recycling pages of tasks with different memory priorities in independent LRU lists. When performing memory recycling, different LRU lists are selected according to the memory priority of the task that triggers the recycling, so as to ensure that the memory of tasks with high memory priority is less likely to be recycled.

[0132] Optionally, in the embodiments of the present application, the memory management method provided by the embodiments of the present application may further include the following steps 401 and 402.

[0133] Step 401: The electronic device obtains the scheduling priorities corresponding to at least one task.

[0134] Optionally, in the embodiments of the present application, the electronic device can determine the scheduling priorities corresponding to at least two tasks from the scheduling priority list; or, the electronic device can store the correspondence between each task in at least one task and the scheduling priority, and the electronic device can determine the scheduling priorities corresponding to at least one task through this correspondence.

[0135] Optionally, in the embodiments of the present application, the above scheduling priority list can be a scheduling priority set or a scheduling priority array.

[0136] It can be understood that the above scheduling priority list includes the task identifiers of each of the above at least two tasks and the scheduling priorities corresponding to the task identifiers of each of the above at least two tasks.

[0137] It should be noted that the above scheduling priority is not limited to only two options of high and low. The scheduling priority is a value range. For example, the scheduling priority range in the Unix system is [-20, 19], and each value in this scheduling priority range can correspond to a scheduling priority.

[0138] Step 402: The electronic device configures a corresponding memory priority for each of at least one task based on the scheduling priority.

[0139] In the embodiments of the present application, the scheduling priority of a task corresponds to the memory priority of the task.

[0140] Optionally, in the embodiments of the present application, after the electronic device determines the scheduling priority corresponding to each of at least one task, the kernel in the electronic device may directly assign the scheduling priority corresponding to each of at least one task to the memory priority corresponding to each of at least one task. That is, the scheduling priority corresponding to each of at least one task is the same as the memory priority corresponding to each of at least one task.

[0141] Optionally, in the embodiments of the present application, the memory priority of each of the above at least one task may correspond to the scheduling priority of each of the above at least one task; or, the memory priority of each of the above at least one task may not correspond to the scheduling priority of each of the above at least one task; that is, the electronic device may not configure the memory priority of each of at least one task according to the scheduling priority of each of at least one task.

[0142] Optionally, in the embodiments of the present application, the electronic device may automatically configure the corresponding memory priority for at least one task through the kernel; or, the electronic device may allow the user to customize the memory priority corresponding to at least one task through the procfs file.

[0143] In one example, the electronic device may automatically configure the memory priority of the task through the getmempry interface or the setmempry interface in the kernel.

[0144] In another example, the electronic device may create a procfs node path. For example, the procfs node path is / proc / <pid> / mempry, allowing users to customize the memory priority of configured tasks by reading and writing procfs files.

[0145] Optionally, in the embodiments of the present application, the entities for setting the memory priority of the electronic device include, but are not limited to: heuristic algorithms in the kernel, dynamic setting by the system according to Quality of Service (QOS), active setting by the administrator, etc.

[0146] Specifically, the heuristic algorithm in the kernel means: for example, the kernel actively obtains the size of the system's free memory. When the free memory exceeds the threshold and there are no high-memory-priority processes in the system, the memory priority of tasks with a high scheduling priority is also set to be high. When the scheduling priority decreases, the memory priority also decreases synchronously.

[0147] Dynamic configuration by the system according to QOS means: for example, when a task is running in the foreground, the memory priority of the task is increased. Conversely, when it is moved to the background, its memory priority is correspondingly decreased.

[0148] Active setting by the administrator means: for specific tasks, the electronic device can actively set the memory priority of specific tasks through the kernel or procfs nodes.

[0149] Optionally, in the embodiments of the present application, during the operation of the electronic device system, specific tasks can be set to a high memory priority, and the remaining tasks can be set to the default priority.

[0150] It should be noted that the above specific tasks refer to tasks that will cause the electronic device to freeze in the case of not being able to obtain memory resources in a timely manner.

[0151] Exemplarily, the above specific tasks can be at least one of the following: tasks running in the foreground, I / O reading tasks, interaction tasks, and process interaction tasks, etc. It can be specifically determined according to actual usage requirements and is not limited in the embodiments of the present application.

[0152] It should be noted that in the present application, the scheduling priority of CPU resources is not applied to memory resources, but a memory priority that is on the same level as the scheduling priority.

[0153] The core difference between the scheduling priority and the memory priority is that the scheduling priority solves the problem of all tasks being equally allocated the same length of CPU time and queuing in order. The memory priority solves the problem of all tasks being equally allocated memory resources. In addition, it is not the case that the higher the scheduling priority of a task, the higher its memory priority. The two may be completely opposite.

[0154] Exemplarily, during the running of application A, a message B is suddenly received. The user triggers the electronic device to switch tasks from application A to application B to view message B. Since application A is switched to run in the background, its scheduling priority will be reduced. The electronic device can adjust the scheduling priority of application B to a high scheduling priority. However, the memory priority of application A cannot be reduced because if the memory priority of application A is reduced, its memory will be preferentially reclaimed. When application A is switched back to the foreground to run, if the memory is reclaimed, it will cause a sense of lag for the user. Therefore, not only should the memory priority of application A not be reduced, but it should also maintain a high memory priority.

[0155] The differences between the scheduling priority and the memory priority are explained in detail below through Table 1.

[0156] Table 1

[0157]

[0158] In the embodiments of the present application, the electronic device can configure corresponding memory priorities for each task in at least one task based on the scheduling priority, so that tasks with high scheduling priorities can have high memory priorities. Furthermore, tasks with high scheduling priorities can be given preferential treatment in the entire memory allocation and recycling process to ensure the performance of tasks with high scheduling priorities.

[0159] Optionally, in the embodiments of the present application, the memory management method provided in the embodiments of the present application further includes the following step 501.

[0160] Step 501: When it is detected that the running state of the third task among at least two tasks is updated from the first state to the second state, the electronic device updates the stored memory priority corresponding to the third task to the fourth memory priority based on the corresponding relationship between the running state and the memory priority.

[0161] In the embodiments of the present application, the above-mentioned fourth memory priority corresponds to the second state.

[0162] Exemplarily, taking the current running state of the third task as running in the foreground and the memory priority corresponding to running in the foreground as 8, when the third task switches from running in the foreground to running in the background, the electronic device can adjust the third task to the memory priority corresponding to running in the background, such as 5, according to the corresponding relationship between the running state and the memory priority, and update the stored memory priority 8 corresponding to the third task to the fourth memory priority 5.

[0163] Optionally, in the embodiments of the present application, after the electronic device updates the memory priority corresponding to the third task to the fourth memory priority, it may perform memory management for the third task according to the fourth memory priority. The specific process can be found in the above embodiments. To avoid repetition, it will not be elaborated here.

[0164] In the embodiments of the present application, the electronic device may monitor the running state of the third task in real time. Therefore, when the running state of the third task changes, the memory priority corresponding to the third task can be dynamically adjusted, improving the efficiency of the electronic device in adjusting the memory priority.

[0165] Each of the above method embodiments, or various possible implementation manners in each method embodiment, may be executed independently, or, on the premise of no contradiction, may also be executed in combination with each other. Specifically, it can be determined according to actual usage requirements. The embodiments of the present application do not limit this.

[0166] The following provides a specific explanation for the memory allocation scenario provided by the present application through specific examples. Exemplarily, as Figure 6 shown, taking only two memory priorities (high and low) as an example, the memory management method provided by the embodiments of the present application may include the following steps 20 to 24.

[0167] Step 20: The electronic device sets the memory priority of each task in the electronic device through system calls or procfs nodes.

[0168] Step 21: When receiving memory allocation requests for two tasks, determine whether the task applying for memory allocation has a high memory priority.

[0169] In the embodiments of the present application, if the task applying for memory allocation has a high memory priority, step 22 is executed; if the task applying for memory allocation has a low memory priority, step 24 is executed.

[0170] Step 22: When the free memory pages in the memory area corresponding to the high memory priority are greater than or equal to the memory application amount in the memory application, the electronic device preferentially selects at least 4 consecutive large physical memory pages from the memory area corresponding to the high memory priority and allocates them to the memory corresponding to the high memory priority.

[0171] Step 23: When the free memory pages in the memory area corresponding to the high memory priority are less than the memory application amount in the memory application, the electronic device preferentially selects large memory pages from the memory area corresponding to the high memory priority, and then selects memory base pages from the memory area corresponding to the low memory priority and allocates them to the task corresponding to the high memory priority.

[0172] Optionally, in the embodiments of the present application, when the application amount of tasks corresponding to the high memory priority is in the range of 1K to 4K, the electronic device may also select memory pages from the memory area corresponding to the low memory priority and allocate them to the tasks corresponding to the high memory priority.

[0173] It should be noted that the high and low here are relative. If, for example, 3 memory priorities of high, medium, and low are configured, the allocation logic triggered by the high memory priority is to first select memory from the memory area corresponding to the high priority, then select memory from the memory area corresponding to the medium priority, and finally select memory from the memory area corresponding to the low priority.

[0174] For the allocation logic triggered by the medium memory priority, it is to first select memory from the memory area corresponding to the medium priority, and then select memory from the memory area corresponding to the low priority.

[0175] For the allocation logic triggered by the low memory priority, it is only possible to select memory from the memory area corresponding to the low priority.

[0176] Step 24: When the free memory pages in the memory area corresponding to the low memory priority are greater than or equal to the memory application amount in the memory application, the electronic device can only select discrete physical memory basic pages from the memory area corresponding to the low memory priority and allocate them to the tasks corresponding to the low memory priority.

[0177] The following uses a specific example to specifically explain the memory recycling scenario provided by the present application. Exemplarily, as Figure 7 shown, taking only two memory priorities (high and low) as an example, the memory management method provided by the embodiments of the present application may include the following steps 30 to 34.

[0178] Step 30: The electronic device sets the memory priority of each task in the electronic device through a system call or a procfs node.

[0179] Step 31: When the electronic device triggers memory recycling, determine whether the task applying for recycled memory is of high memory priority.

[0180] In the embodiments of the present application, if the task applying for memory allocation is of high memory priority, step 32 is executed; if the task applying for memory allocation is of low memory priority, step 34 is executed.

[0181] Step 32: When the size of the memory pages that can be recycled in the LRU list corresponding to the low memory priority is greater than or equal to the memory application amount, the electronic device performs memory recycling in the memory area corresponding to the low memory priority through the LRU list corresponding to the low memory priority.

[0182] Step 33: When the size of the memory pages that can be reclaimed in the LRU list corresponding to the low memory priority is less than the memory application amount, the electronic device preferentially performs memory reclaim in the memory area corresponding to the low memory priority through the LRU list corresponding to the low memory priority, and performs memory reclaim in the memory area corresponding to the high memory priority through the LRU list corresponding to the high memory priority.

[0183] It should be noted that the high and low here are relative. If three memory priorities such as high, medium, and low are configured, the memory reclaim logic triggered by the high memory priority is to first perform memory reclaim through the LRU list corresponding to the low priority. If the memory application amount is not satisfied, it will fallback to perform memory reclaim through the LRU list corresponding to the medium memory priority, and finally perform memory reclaim through the LRU list corresponding to the high memory priority.

[0184] For the memory reclaim logic triggered by the medium memory priority, it is to first perform memory reclaim through the LRU list corresponding to the low priority. If the memory application amount is not satisfied, it will fallback to perform memory reclaim through the LRU list corresponding to the medium memory priority.

[0185] For the memory reclaim logic triggered by the low memory priority, it can only perform memory reclaim through the LRU list corresponding to the low priority.

[0186] Step 34: The electronic device performs memory reclaim in the memory area corresponding to the low memory priority through the LRU list corresponding to the low memory priority.

[0187] In the embodiments of the present application, the memory resources in the electronic device can be finely controlled through the memory priority, thereby reducing the contention of memory resources in the multi-task scenario of different memory priorities. In this way, the efficiency of the electronic device for memory management is improved.

[0188] It should be noted that for the memory management method provided in the embodiments of the present application, the execution subject can be a memory management device. In the embodiments of the present application, taking the memory management device executing the memory management method as an example, the memory management device provided in the embodiments of the present application is described.

[0189] Figure 8 Shows a possible structural schematic diagram of the memory management device involved in the embodiments of the present application. As Figure 8 shown, the memory management device 70 may include: a receiving module 71, an obtaining module 72, a determining module 73, and an allocating module 74.

[0190] Among them, a receiving module 71 is configured to receive memory application requests corresponding to at least two tasks. The memory application request corresponding to a task is used to request memory allocation for the task, and one task corresponds to one memory application request. An obtaining module 72 is configured to obtain the memory priority of each task received by the receiving module 71. A determining module 73 is configured to determine the memory area corresponding to each task based on the memory priority of each task obtained by the obtaining module 72. An allocating module 74 is configured to allocate memory to each task respectively based on the memory area corresponding to each task determined by the determining module 73.

[0191] In a possible implementation manner, the above determining module 73 is specifically configured to, when the first memory priority of the first task among at least two tasks is greater than or equal to a first threshold, determine the first memory area as the memory area corresponding to the first task; wherein, the first memory area includes the memory area corresponding to the second memory priority, and the second memory priority is less than the first threshold.

[0192] In a possible implementation manner, the memory application request corresponding to the first task carries the first memory allocation requirement information corresponding to the first task; the above allocating module 74 is specifically configured to, when the first memory priority of the first task among at least two tasks is greater than or equal to a first threshold, allocate memory to the first task based on the first memory allocation requirement information and the free memory large pages in the first memory area, and the memory large pages are composed of consecutive memory base pages.

[0193] In a possible implementation manner, in combination Figure 8 , as Figure 9 shown, the memory management device 70 provided by the embodiment of the present application further includes: a recycling module 75. The above determining module 73 is further configured to, when the electronic device triggers memory recycling, determine the memory recycling list corresponding to each task based on the memory priority of each task. The recycling module 75 is configured to recycle memory for each task respectively based on the memory recycling list corresponding to each task determined by the determining module 73.

[0194] In a possible implementation manner, the above determining module 73 is specifically configured to, when the first memory priority of the first task among at least two tasks is greater than or equal to a first threshold, include the second memory area in the memory recycling list corresponding to the first memory priority; wherein, the second memory area includes the memory area corresponding to the third memory priority, and the third memory priority is less than the first threshold.

[0195] The embodiment of the present application provides a memory management device. Since the memory management device can perform fine-grained control on the memory resources in the memory management device through the memory priority, the contention of memory resources in a multi-task scenario with different memory priorities is reduced. In this way, the efficiency of the memory management device for memory management is improved.

[0196] The memory management device in the embodiments of the present application can be an electronic device or a component in an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices other than terminals. Exemplarily, the mobile electronic device can be a mobile phone, a tablet computer, a laptop computer, a handheld computer, a vehicle-mounted electronic device, a Mobile Internet Device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. It can also be a server, a Network Attached Storage (NAS), a personal computer (PC), a television (TV), a teller machine, or a self-service machine, etc. The embodiments of the present application do not make specific limitations.

[0197] The memory management device in the embodiments of the present application can be a device with an operating system. The operating system can be an Android operating system, an iOS operating system, or other possible operating systems. The embodiments of the present application do not make specific limitations.

[0198] The memory management device provided in the embodiments of the present application can implement each process implemented in the above embodiments. To avoid repetition, it will not be elaborated here.

[0199] Optionally, as Figure 10 shown, the embodiments of the present application further provide an electronic device 90, including a processor 91 and a memory 92. A program or instruction that can run on the processor 91 is stored on the memory 92. When the program or instruction is executed by the processor 91, it implements each step of the above embodiments of the memory management method and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0200] It should be noted that the electronic devices in the embodiments of the present application include the above-mentioned mobile electronic devices and non-mobile electronic devices.

[0201] Figure 11 A schematic diagram of the hardware structure of an electronic device for implementing the embodiments of the present application.

[0202] The electronic device 100 includes, but is not limited to, components such as a radio frequency unit 101, a network module 102, an audio output unit 103, an input unit 104, a sensor 105, a display unit 106, a user input unit 107, an interface unit 108, a memory 109, and a processor 110.

[0203] Those skilled in the art can understand that the electronic device 100 may further include a power source (such as a battery) for supplying power to each component. The power source can be logically connected to the processor 110 through a power management system, so as to implement functions such as management of charging, discharging, and power consumption management through the power management system. Figure 11 The structure of the electronic device shown does not limit the electronic device. The electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here.

[0204] Among them, the interface unit 108 is used to receive memory application requests corresponding to at least two tasks. The memory application request corresponding to a task is used to request memory allocation for the task, and one task corresponds to one memory application request. The processor 110 is used to obtain the memory priority of each task; and based on the memory priority of each task, determine the memory area corresponding to each task; and based on the memory area corresponding to each task, allocate memory to each task respectively.

[0205] Optionally, in the embodiment of the present application, the above-mentioned processor 110 is specifically used to, when the first memory priority of the first task among at least two tasks is greater than or equal to the first threshold, determine the first memory area as the memory area corresponding to the first task; where the first memory area includes the memory area corresponding to the second memory priority, and the second memory priority is less than the first threshold.

[0206] Optionally, in the embodiment of the present application, the memory application request corresponding to the above-mentioned first task carries the first memory allocation requirement information corresponding to the first task; the above-mentioned processor 110 is specifically used to, when the first memory priority of the first task among at least two tasks is greater than or equal to the first threshold, allocate memory for the first task based on the first memory allocation requirement information and the free memory large pages in the first memory area, and the memory large pages are composed of consecutive memory base pages.

[0207] Optionally, in the embodiment of the present application, the above-mentioned processor 110 is further used to, when the electronic device triggers memory recycling, determine the memory recycling list corresponding to each task based on the memory priority of each task; and based on the memory recycling list corresponding to each task, recycle memory for each task respectively.

[0208] Optionally, in the embodiments of the present application, the above-mentioned processor 110 is specifically configured to include the second memory area in the memory recycling list corresponding to the first memory priority when the first memory priority of the first task among at least two tasks is greater than or equal to the first threshold; wherein, the second memory area includes the memory area corresponding to the third memory priority, and the third memory priority is less than the first threshold.

[0209] The embodiments of the present application provide an electronic device. Since the electronic device can perform fine-grained control over the memory resources in the electronic device through memory priorities, the contention of memory resources in a multi-task scenario with different memory priorities is reduced. Thus, the efficiency of memory management of the electronic device is improved.

[0210] The electronic device provided by the embodiments of the present application can implement each process implemented by the above method embodiments and can achieve the same technical effects. To avoid repetition, details are not described herein again.

[0211] The beneficial effects of various implementation manners in this embodiment can be specifically referred to the beneficial effects of the corresponding implementation manners in the above method embodiments. To avoid repetition, details are not described herein again.

[0212] It should be understood that in the embodiments of the present application, the input unit 104 may include a Graphics Processing Unit (GPU) 1041 and a microphone 1042. The graphics processor 1041 processes the image data of static pictures or videos obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 106 may include a display panel 1061, and the display panel 1061 may be configured in the form of a liquid crystal display, an organic light-emitting diode, etc. The user input unit 107 includes at least one of a touch panel 1071 and other input devices 1072. The touch panel 1071 is also called a touch screen. The touch panel 1071 may include two parts: a touch detection device and a touch controller. The other input devices 1072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, power on / off keys, etc.), a trackball, a mouse, and a joystick, which are not described herein again.

[0213] The memory 109 can be used to store software programs and various data. The memory 109 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data. Among them, the first storage area can store an operating system, application programs or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 109 can include volatile memory or non-volatile memory, or the memory 109 can include both volatile and non-volatile memory. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDR SDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synch link dynamic random access memory (SLDRAM), and a direct rambus random access memory (DRRAM). The memory 109 in the embodiments of the present application includes but is not limited to these and any other suitable types of memory.

[0214] The processor 110 may include one or more processing units; optionally, the processor 110 integrates an application processor and a modem processor. Among them, the application processor mainly processes operations related to the operating system, user interface, and application programs, etc., and the modem processor mainly processes wireless communication signals, such as a baseband processor. It can be understood that the above-mentioned modem processor may not be integrated into the processor 110 either.

[0215] The embodiments of the present application also provide a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, it implements each process of the above method embodiments and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0216] Among them, the processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory ROM, random access memory RAM, magnetic disks, or optical discs, etc.

[0217] Another embodiment of the present application provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement each process of the above method embodiment, and can achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0218] It should be understood that the chip mentioned in the embodiments of the present application may also be referred to as a system-on-chip, system chip, chip system, or system-on-chip, etc.

[0219] The embodiments of the present application provide a computer program product. The program product is stored in a storage medium and is executed by at least one processor to implement each process of the above memory management method embodiment, and can achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0220] It should be noted that in this article, the term "including", "comprising", or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article, or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article, or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article, or device including that element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the reverse order according to the functions involved. For example, the described methods may be executed in an order different from that described, and various steps may be added, omitted, or combined. Additionally, the features described with reference to certain examples may be combined in other examples.

[0221] Through the description of the above embodiments, those skilled in the art can clearly understand that the above embodiment methods can be implemented by means of software plus a necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. The computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions for causing a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in various embodiments of the present application.

[0222] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific implementation manners. The above specific implementation manners are merely illustrative rather than restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them belong to the protection scope of the present application.< / pid> < / pid>

Claims

1. A memory management method, characterized in that The method includes: Receiving memory application requests corresponding to at least two tasks, where the memory application request corresponding to a task is used to request allocation of memory for the task, and one task corresponds to one memory application request; Obtaining the memory priority of each task; Based on the memory priority of each task, determining the memory area corresponding to each task; Based on the memory area corresponding to each task, allocating memory to each task respectively.

2. The method according to claim 1, characterized in that The determining, based on the memory priority of each task, the memory area corresponding to each task includes: In the case where the first memory priority of the first task among the at least two tasks is greater than or equal to a first threshold, determining the first memory area as the memory area corresponding to the first task; Wherein, the first memory area includes the memory area corresponding to the second memory priority, and the second memory priority is less than the first threshold.

3. The method according to claim 2, wherein The memory application request corresponding to the first task carries the first memory allocation requirement information corresponding to the first task; The allocating, based on the memory area corresponding to each task, memory to each task respectively includes: In the case where the first memory priority of the first task among the at least two tasks is greater than or equal to a first threshold, allocating memory to the first task based on the first memory allocation requirement information and the free large memory pages in the first memory area, where the large memory pages are composed of consecutive basic memory pages.

4. The method according to claim 1, wherein The method further includes: In the case where the electronic device triggers memory recycling, determining a memory recycling list corresponding to each task based on the memory priority of each task; Based on the memory recycling list corresponding to each task, recycling memory for each task respectively.

5. The method according to claim 4, characterized in that, The determining, based on the memory priority of each task, the memory recycling list corresponding to each task includes: In the case where the first memory priority of the first task among the at least two tasks is greater than or equal to a first threshold, including the second memory area in the memory recycling list corresponding to the first memory priority; Wherein, the second memory area includes the memory area corresponding to the third memory priority, and the third memory priority is less than the first threshold.

6. A memory management device, characterized in that, The memory management device includes: a receiving module, an obtaining module, a determining module, and an allocating module; The receiving module is configured to receive memory application requests corresponding to at least two tasks, where the memory application request corresponding to a task is used to request allocation of memory for the task, and one task corresponds to one memory application request; The obtaining module is configured to obtain the memory priority of each task received by the receiving module; The determining module is configured to determine the memory area corresponding to each task based on the memory priority of each task obtained by the obtaining module; The allocating module is configured to allocate memory to each task respectively based on the memory area corresponding to each task determined by the determining module.

7. The device according to claim 6, characterized in that, The determining module is specifically configured to, in the case where the first memory priority of the first task among the at least two tasks is greater than or equal to a first threshold, determine the first memory area as the memory area corresponding to the first task; Among them, the first memory area includes a memory area corresponding to a second memory priority, and the second memory priority is less than the first threshold.

8. The device according to claim 7, characterized in that, The memory application request corresponding to the first task carries the first memory allocation requirement information corresponding to the first task; The allocation module is specifically configured to, when the first memory priority of the first task among the at least two tasks is greater than or equal to the first threshold, allocate memory for the first task based on the first memory allocation requirement information and the free memory large pages in the first memory area, where the memory large pages are composed of consecutive memory base pages.

9. The device according to claim 6, characterized in that, The memory management device further includes: a recycling module; The determination module is further configured to, when the electronic device triggers memory recycling, determine a memory recycling list corresponding to each task based on the memory priority of each task; The recycling module is configured to recycle memory for each task respectively based on the memory recycling list corresponding to each task determined by the determination module.

10. The device according to claim 9, characterized in that, The determination module is specifically configured to, when the first memory priority of the first task among the at least two tasks is greater than or equal to the first threshold, include the second memory area in the memory recycling list corresponding to the first memory priority; Among them, the second memory area includes a memory area corresponding to a third memory priority, and the third memory priority is less than the first threshold.

11. An electronic device, characterized in that, It includes a processor, a memory, and a program or instruction stored on the memory and executable on the processor. When the program or instruction is executed by the processor, the steps of the memory management method according to any one of claims 1 to 5 are implemented.

12. A readable storage medium, characterized in that, A program or instruction is stored on the readable storage medium. When the program or instruction is executed by the processor, the steps of the memory management method according to any one of claims 1 to 5 are implemented.

13. A computer program product, the computer program product is stored in a storage medium, and the computer program product is executed by at least one processor to implement the memory management method according to any one of claims 1 to 5.

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