Dynamic quantum feedback system based on branch prediction

Abstract

The invention discloses a dynamic quantum feedback system based on branch prediction, and the system obtains the states of k moments based on the comparison between IQ coordinate values of k moments and the distance of which the state is 0 or 1, and obtains the statistical probability of an intermediate moment when the states of the k moments are all selected states based on the comparison between the states of the k moments and a state table. The total delay time of distance calculation and state table matching is short, so that the efficiency is improved; according to the method, more accurate prediction can be realized aiming at various conditions by utilizing a mode of combining the predicted intermediate moment statistical probability and the historical statistical probability.

Description

Technical Field

[0001] The present invention belongs to the technical field of quantum computing, and particularly relates to a dynamic quantum feedback system based on branch prediction. Background Art

[0002] Quantum feedback is essential for many quantum algorithms, such as fast reset, quantum state teleportation, and quantum error correction. These algorithms utilize feedback to dynamically change operations in a quantum program based on intermediate measurement results, thereby improving the flexibility of the program. Especially in quantum error correction, feedback is a crucial part, and typically, readout and bit correction occupy more than 70% of the time. Since current noisy quantum hardware relies on error correction to suppress errors, feedback will frequently appear in future quantum applications.

[0003] However, similar to conditional judgment in classical CPUs, quantum feedback also introduces extremely high computational overhead in quantum programs. In addition, due to the uncertainty of the gate operations after feedback, the computation is blocked during the feedback stage, further increasing the latency. Specifically, the feedback process first performs readout on a quantum processor and then conducts classical processing on an FPGA board to determine subsequent quantum operations. In Google's quantum error correction experiment, readout and reset respectively require 500 ns and 160 ns of classical processing time. The overall latency is 26.4 times that of a single gate operation. During this relatively long feedback time, qubits are exposed to various error sources, resulting in a relatively high error rate. Feedback errors include readout errors and feedback gate errors. The results of a single-bit active reset experiment conducted on the IBM_brisbane platform show that the error rate is 2.07%. This error rate is much higher than the threshold of quantum error correction, bringing significant error correction overhead.

[0004] Current feedback optimization methods mainly focus on accelerating feedback calculations on FPGAs. To reduce feedback latency, the literature by Yves Salathé, Philipp Kurpiers, Thomas Karg, Christian Lang, Christian Kraglund Andersen, Abdulkadir Akin, Sebastian Krinner, Christopher Eichler, and Andreas Wallraff. 2018. Low-latency digital signal processing for feedback and feedforward in quantum computing and communication. Physical Review Applied 9, 3(2018), 034011. discloses accelerating state classification through parallel computing and pipelining; the literature by Gang Huang, Yilun Xu, Neelay Fruitwala, Abhi D Rajagopala, Kasra Nowrouzi, Ravi K Naik, David Santiago, and Irfan Siddiqi. 2023. QubiC 2.0: A Flexible Advanced Full Stack Quantum Bit Control System. In 2023 IEEE International Conference on Quantum Computing and Engineering (QCE), Vol. 2. IEEE, 248–249. implements a waveform table to accelerate waveform preparation and uses fine-grained DAC optimization to minimize feedback latency; the literature by Cheng Guo, Jin Lin, Lian-Chen Han, Na Li, Li-Hua Sun, Fu-Tian Liang, Dong-Dong Li, Yu-Huai Li, Ming Gong, Yu Xu, Sheng-Kai Liao, and Cheng-Zhi Peng. 2022. Low-latency readout electronics for dynamic superconducting quantum computing. AIP Advances 12, 4 (2022). discloses using parallel computing when demodulating and reading IQ waveforms.However, these methods usually only bring a modest improvement in latency, which is still not enough to overcome the performance bottleneck caused by the latency wall. Summary of the Invention

[0005] The present invention provides a dynamic quantum feedback system based on branch prediction, which overcomes the performance bottleneck caused by the latency wall, introduces branch prediction more efficiently, and solves the quantum feedback problem.

[0006] A specific embodiment of the present invention provides a dynamic quantum feedback system based on branch prediction, including an FPGA, and the FPGA includes: ADC and DAC modules, which are used to receive the waveform data of the current shot, and are also used to process the waveform data of the branch circuit information corresponding to the prediction result to obtain an analog waveform for pre-executing the branch circuit; A feedback controller, which is connected to the ADC and DAC modules through SerDes, and the feedback controller includes state classification, a dynamic timing controller, and waveform preparation: The state classification is used to process the waveform data to obtain the states at k moments, compare the states at k moments with the state table to obtain the statistical probability at the intermediate moment when the states at k moments are all selected states, obtain the historical statistical probability of the selected state based on the state distribution of historical shots, and combine the historical statistical probability with the intermediate moment statistical probability to obtain the prediction statistical probability that the state is the selected state; The waveform preparation is used to, when the received prediction statistical probability is greater than the set threshold, use the selected state as the prediction result, send a feedback signal to the dynamic timing controller, and after receiving the feedback signal through the dynamic timing controller, send the waveform data of the branch circuit information corresponding to the prediction result to the ADC and DAC modules.

[0007] Preferably, the state classification includes a stream adapter, a parameter register, a demodulator, a demodulation result queue, a historical branch register, a state table, and a Bayesian prediction model; The stream adapter is used to collect and process the waveform data within the time window to obtain the real part and the imaginary part of the waveform data, and send the real part and the imaginary part of the waveform data to the demodulator; The parameter register is used to send the physical parameters of the quantum bit to the demodulator; The demodulator is used to demodulate the real part and the imaginary part of the waveform data and the physical parameters of the quantum bit together to obtain the IQ coordinate values of the waveforms at each moment within the time window; The demodulation result queue is used to compare the distance between the IQ coordinate values at different moments and the state of 0 or 1 to obtain the states at different moments, and send the states at different moments to the historical branch register; The historical branch register is used to receive the states at historical moments and the current time window, so as to obtain the states at the most recent k moments, and send the states at the most recent k moments to the state; The state table is used to obtain the statistical probability of the intermediate moment when the states at k moments are all selected states based on the received states at the most recent k moments through the correspondence between the states at k moments and the statistical probability of the intermediate moment; The Bayesian prediction model is used to combine the historical statistical probability that the state is the selected state in the historical period with the statistical probability of the intermediate moment to obtain the predicted statistical probability that the state is the selected state.

[0008] Preferably, when the waveform is prepared for when the received predicted statistical probability is less than the set threshold, the waveform preparation module does not generate a feedback signal, waits to receive the predicted statistical probability of the next moment, and performs the threshold judgment again.

[0009] Preferably, the waveform preparation includes a branch decision maker, an operation table, a waveform library, a waveform sequence, a decoder, and a feedback signal interconnection; The branch decision maker is used to compare the predicted statistical probability with the set threshold. When the received predicted statistical probability is greater than the set threshold, it sends a feedback signal to the dynamic timing controller, receives the feedback signal through the feedback signal interconnection, and then sends the prediction result to the operation table to find the address of the pre-executed branch circuit corresponding to the selected state. Based on the found address, it obtains the corresponding waveform through the waveform library, decodes the corresponding waveform through the decoder to obtain waveform data carrying the information of the pre-executed branch circuit, and transmits the waveform data carrying the information of the pre-executed branch circuit to the ADC and DAC modules through the JESD interface.

[0010] Preferably, it further includes a data bus and a backplane. If it is necessary to trigger another FPGA to execute the corresponding branch circuit, the dynamic moment controller sends the feedback information to the branch decision maker of another FPGA through the data bus and the backplane, and pre-executes the corresponding branch circuit through the branch decision maker of another FPGA.

[0011] Preferably, the waveform library includes a waveform generation unit and a cache storage unit, and the cache storage unit includes a pre-execution cache, a reusable cache, and a recovery cache; The waveform generation unit is used to retrieve the corresponding waveform from the pre-execution cache and the reusable cache based on the received found address, and send the retrieved waveform to the decoder; The reusable cache and the recovery cache are also used to, when the prediction result is inconsistent with the read result after the read process is completed, trigger the waveform library to retrieve the waveform in the recovery cache or the reusable cache for branch recovery through the branch decision maker.

[0012] Preferably, the decoder is used to decode the corresponding waveform through a run - length decoder, and then reconstruct the decoding result through Huffman decoding to obtain waveform data carrying pre - execution branch circuit information.

[0013] Preferably, the ADC and DAC module includes an ADC sub - module and a DAC sub - module; The ADC sub - module includes an ADC core and a digital down - sampler, and captures the waveform data of the current shot through the ADC core and the digital down - sampler in sequence to obtain a low - frequency waveform; The DAC sub - module includes an interpolation module and a DAC core, and performs the interpolation module and the DAC core on the waveform data carrying pre - execution branch circuit information in sequence to obtain an analog waveform.

[0014] Preferably, it further includes a clock management module, and the clock management module is used to generate a reference clock, and synchronize the clocks of the ADC sub - module and the DAC sub - module through the generated reference clock.

[0015] Compared with the prior art, the beneficial effects of the present invention are as follows: Based on the present invention, the states at k moments are obtained by comparing the IQ coordinate values at k moments with the distances from the states of 0 or 1. The statistical probability of the intermediate moment when the states at k moments are all selected states is obtained by comparing the states at k moments with a state table. The predicted statistical probability is obtained based on the intermediate moment statistical probability and the historical statistical probability. If the predicted statistical probability is greater than a set threshold, the selected state is used as the prediction result. Based on the prediction result, the corresponding branch circuit can be executed in advance, shortening the delay time. At the same time, the overall delay time of the above - mentioned distance calculation and state table matching is short, thereby improving the efficiency. The present invention combines the predicted intermediate moment statistical probability with the historical statistical probability, and can achieve more accurate prediction for various situations. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a quantum feedback structure diagram on a typical quantum device; Figure 2 is a typical quantum feedback delay decomposition diagram, where Figure 2 in (a) is a relationship diagram between lifetime and readout delay, Figure 2 in (b) is a bar chart of the minimum delay time of ADC processing, state classification, waveform preparation, and DAC processing; Figure 3 is a flow chart of dynamic quantum feedback based on branch prediction and a diagram of gate pre - execution situation provided by a specific embodiment of the present invention, where Figure 3 in (a) is a flow chart of dynamic quantum feedback based on branch prediction, Figure 3 in (b) is a typical gate pre - execution situation diagram; Figure 4 It is a flowchart of a typical branch prediction method; Figure 5 It is a quantum bit state classification diagram and a readout trajectory diagram. Among them, Figure 5 in (a) is the circuit and state classification diagram of superconducting qubit readout, Figure 5 in (b) is the readout trajectory diagram on the IQ plane; Figure 6 It is a block diagram of the quantum branch prediction process provided by a specific embodiment of the present invention; Figure 7 It is a block diagram of a dynamic quantum feedback system based on branch prediction provided by a specific embodiment of the present invention. Among them, Figure 7 in (a) is the structure diagram of the feedback controller, Figure 7 in (b) is the structure diagram of the waveform generation and reception module, Figure 7 in (c) is the structure diagram of the feedback controller processing unit; Figure 8 It is a flowchart of branch recovery provided by a specific embodiment of the present invention; Figure 9 It is a flowchart of dynamic timing and static timing provided by a specific embodiment of the present invention. Among them, Figure 9 in (a) is a comparison diagram of static and dynamic timing control, Figure 9 in (b) is the timing diagram of the feedback flip-flop; Figure 10 It is a flowchart of waveform decoding provided by a specific embodiment of the present invention. Detailed implementation manners

[0017] Facing the problem of the quantum feedback delay bottleneck, a key technology is to introduce branch prediction (BP), an important mechanism in the CPU, to optimize quantum feedback. A typical branch prediction mechanism predicts the most likely branch and pre-executes the instructions under that branch. When the prediction is successful, branch prediction can significantly reduce the overhead caused by pipeline stalls. However, if the prediction fails, the CPU needs additional instructions to restore the computing state. The effectiveness of the prediction mainly depends on the accuracy of the prediction. However, traditional branch prediction methods cannot be directly applied to quantum workloads for mainly two reasons. First, quantum bits can be in a superposition state, making the readout result more random, while traditional branch prediction is designed for deterministic results. For example, when measuring a quantum bit that is in the and states with a 50% probability, it is not beneficial to use deterministic prediction; second, quantum readout is a long and continuous process, providing intermediate information for prediction during the process, while traditional readout is discrete and cannot utilize this information. Therefore, there is an urgent need for a prediction design for quantum feedback, and thus there is an urgent need to design a new quantum prediction method.

[0018] Quantum feedback is divided into two stages. First, the qubit is read out. Second, the read-out information is sent to a classical feedback controller, which classifies the qubit state and decides the branch (0 or 1) of the quantum program according to the qubit state. The physical implementation adopted in this paper is based on superconducting quantum hardware, Figure 1 showing the quantum feedback structure on a typical quantum device. This structure includes an ADC module for capturing the waveform from the qubit as the read-out information. This information is processed by an FPGA, which contains two key units: state classification demodulates the waveform and classifies the qubit state; waveform preparation reads the waveform data of the selected branch from memory. These waveforms are synchronized by a timing controller, then enter a buffer, and finally are sent to the quantum processor through a DAC.

[0019] Figure 2 showing the decomposition of the delay during the feedback process, indicating a 660 nanosecond delay bottleneck according to the current quantum hardware. Specifically for the quantum processor, reducing the read-out delay requires enhancing the coupling strength between the read-out resonator and the qubit, but this will also lead to a reduction in the qubit lifetime (i.e., T1). Figure 2 (a) in shows the relationship between the lifetime and the read-out delay in different quantum processor designs. For example, Walter et al. achieved the minimum read-out delay - 88 nanoseconds, but their qubit lifetime was also the shortest, only 7.6 microseconds. To ensure an effective lifetime, Google limits the minimum read-out delay to 500 nanoseconds. On the other hand, as Figure 2 (b) in shows, the current feedback controller includes ADC processing, state classification, waveform preparation, and DAC processing, and the minimum delays of each module are 44 nanoseconds, 24 nanoseconds, 36 nanoseconds, and 56 nanoseconds respectively. Overall, this constitutes a 660 nanosecond delay bottleneck (500 nanoseconds of read-out + 160 nanoseconds of feedback hardware), and this bottleneck cannot be further reduced through hardware-level optimization. In addition, under the current serial feedback mechanism, it can be observed that the latest feedback controller is already close to the minimum delay, indicating that the optimization space is very limited.

[0020] Specific embodiments of the present invention accelerate the feedback process by introducing a new branch prediction algorithm and pre-executing quantum gates. Figure 3(a) in this example shows the working process. For a given quantum circuit, first identify the available feedback positions as measurement samplings, i.e., the current shots, which allows the pre-execution of instructions, and then start the program execution. During the feedback readout process, analyze the probabilities of each branch iteratively according to the historical branches of previous shots. When the probability of a certain branch exceeds the threshold θ, the quantum gate operations in that branch will be pre-executed. When the readout is completed, judge whether the prediction is correct. If the prediction is wrong, a recovery operation needs to be performed. Specifically, since the quantum circuit is reversible, reverse quantum gates will be applied in this paper to cancel the pre-executed gate operations, and then execute the correct branch.

[0021] In a specific embodiment of the present invention, the feedback process is accelerated by introducing a new branch prediction algorithm and pre-executing quantum gates. Figure 3 (a) shows the working process. For a given quantum circuit, first identify the available feedback positions, which allows the pre-execution of instructions, and then start the program execution. During the feedback readout process, analyze the probabilities of each branch iteratively according to the historical branches of previous shots. When the probability of a certain branch exceeds the threshold, the quantum gate operations in that branch will be pre-executed. When the readout is completed, judge whether the prediction is correct. If the prediction is wrong, a recovery operation needs to be performed. Specifically, since the quantum circuit is reversible, reverse quantum gates will be applied in this paper to cancel the pre-executed gate operations, and then execute the correct branch. According to the principles of quantum mechanics, all quantum gates can theoretically be pre-executed.

[0022] According to the principles of quantum mechanics, all quantum gates can theoretically be pre-executed. We summarize the following several typical gate pre-execution cases in Figure 3 (b) as follows: Case 1: There are no other gate operations or readout operations before the X gate on q2, so this X gate can be pre-executed. This situation is common in feedback-based quantum error correction (the construction of logical T gates) and also often appears in quantum state transfer tasks, such as the construction of remote entanglement gates.

[0023] Case 2: The feedback gate operation involves a two-bit gate operation that depends on the readout bit q1. Since the readout operation occupies q1, it cannot be directly pre-executed on q1. But an auxiliary bit q′1 can be used. After the readout, q1 will collapse into a classical state, which can be prepared in advance on q’1. Subsequently, the original gate operation acting on q1 can be applied to q’1 instead. On the other hand, after the readout is completed, q1 can also be recycled to minimize the waste of qubit resources.

[0024] Case 3: For feedback operations (such as bit reset) that must act on the readout bit, the feedback gate operation must be applied after the readout process is completed. Different from the traditional method, we can adopt prediction techniques to apply the feedback gate immediately at the moment when the readout ends, thus eliminating the hardware processing delay of more than 100 nanoseconds.

[0025] The pre-execution of the gate essentially adjusts the operation timing in the directed acyclic graph (DAG) of the quantum circuit. The above four cases essentially constitute the DAG constraint analysis in quantum feedback pre-execution. For example, in Case 1, the feedback operation on Q2 is independent and unconstrained, and it is assumed that the error state recovery process during the execution of the dynamic circuit is also unconstrained, so it can be executed in advance. While Cases 2 and 3 are subject to the same constraint, that is, operations cannot be performed on busy qubits, so gate pre-execution must be performed on the auxiliary qubits to convert them to legal states. Cases 1 to 3 cover almost all practical situations of quantum feedback, enabling the branch prediction-based method to accelerate most feedback applications.

[0026] As Figure 4 shown, a classical branch prediction method uses historical branches to predict possible branches in the current state and stores them in a state table composed of <state, branch> pairs. The branch of each state in the state table is the branch with the highest frequency of occurrence in that state, which is dynamically updated during the CPU execution process. This feature is based on the temporal locality of the CPU and consists of the most recent k feedback branches to form the current state. The prediction is completed through table matching to find the most likely direction. For example Figure 4 in, when the two most recent branch directions are "1, 1", the state is "11". For the state table containing <11, 1>, the prediction result is branch 1, and pre-execute branch 1.

[0027] However, due to the existence of quantum superposition states, the branches in quantum feedback exhibit higher randomness. In addition, the branch prediction in a classical CPU assumes temporal correlation between branches, so branches from different programs can be used to predict the current branch; but the branches between different quantum programs are independent of each other. This embodiment adopts a combined model for branch prediction. Specifically, a quantum program usually executes multiple times (referred to as shots). In addition, each readout has only two possible results and two possible states: 0 or 1. In one embodiment, this embodiment only needs to predict the readout result, that is, the probability P predict_1 , because P predict_0 = 1 - P predict_1 . This embodiment uses two key features to model the probability of each shot: 1. The historical branch distribution of the current feedback, including the readout result, that is, the statistical probability P of the state being 1history_1 ; 2. The reading result at an intermediate moment during the reading process of the current shot, that is, the probability that the state is 1 (i.e., P read_1 ).

[0028] Since the reading in the quantum system is a continuous process, in this embodiment, the probability P can be statistically calculated at an intermediate moment during this process read_1 . As Figure 5 shown in (a) of, in superconducting quantum hardware, the reading is realized by a reading resonator coupled to the qubit. The state of each qubit is measured by sending a reading waveform to the reading resonator and identifying the frequency shift (referred to as the dispersive shift) of the waveform. A part of the reading waveform can distinguish the frequency shift through the I and Q values, and a longer waveform can provide higher accuracy. At time t i , the reading controller captures a segment of the waveform, whose complex amplitude is pulse = [a1, a2, ···, a L , where L is the specified window length. The I and Q values are calculated according to the demodulation formula as follows: , , where a i .real and a i .imag are the real part and the imaginary part of the i-th amplitude a i respectively, and L is the number of amplitudes. As Figure 5 shown in (a) of, the I and Q values of different states (i.e., 0 or 1) are located in different clusters on the IQ plane with V I and V Q as the horizontal and vertical axes, which are used to classify the reading results. For example, Figure 5 (b) of shows the I and Q value trajectories from time t1 to t6.

[0029] Since the I and Q values at different time points form a trajectory, the prediction is completed by comparing this trajectory with a pre-generated table. Specifically, at time t i , this embodiment demodulates the captured reading waveform to obtain the IQ values. Then, by calculating the distance between the IQ values and the center of 0 or 1 for comparison, this embodiment can identify the most likely state at this moment. However, there is noise in the reading process, which will cause data jitter at each time point. This embodiment records the most likely states of the nearest k time points as a trajectory and compares it with the trajectory in the <state, P read_1 > table, which records the P read_1 under different trajectories, where k is a user-defined parameter determined according to the prediction granularity. In addition, <state, P read_1>The table comes from the initial 100 shots. These shots do not enable feedback prediction but are used to calculate the probability that the read result is 1 in each state, and the probabilities in this state table remain unchanged during the execution of the feedback program.

[0030] In this embodiment, the Bayesian model is used to combine the historical probability and the probability based on the intermediate read waveform to predict the overall prediction probability: , when it is greater than the threshold, the pre-execution of branch 1 is enabled, and the subsequent prediction of this feedback in the current shot is terminated. For example, as Figure 6 shown, the historical probability P history_1 of branch 1 is 0.7. During the prediction process, the read waveform is iteratively analyzed, and the possible read result trajectories are recorded. The current state is the state at the most recent 3 moments, that is, the states at times t1, t2, and t3, which is 111. According to the <states, P read1 >table, the probability that the read result is 1 in the current shot is P read_1 = 0.95. Combining P history1 and P read1 , the final probability used for predicting branch 1 is: , obviously, in the prediction of P read_1 , the complexity of distance calculation and table matching is O(1) (i.e., 3 clock cycles), and the number of clock cycles required for Bayesian calculation does not exceed 5. Therefore, the overall delay is only 32 ns. In terms of accuracy, this prediction utilizes both historical results and the current read state. Therefore, for the feedback scenario where the qubit states are uniformly distributed (50% are 0 and 50% are 1), due to the uniform probability, the historical distribution probabilistically converges to 0.5, and the current read probability can better reflect the final read result of this shot, and probability prediction can be performed based on the current read state. On the contrary, in the case of a higher read error rate, more accurate prediction can be achieved through historical results. At the implementation level, the historical result distribution is updated immediately after each prediction, so no delay is introduced. Therefore, the framework provided by this embodiment of the present invention has high time efficiency and accurate prediction.

[0031] In a specific embodiment, an example of updating the historical result distribution immediately after each prediction is: updating the value of the historical statistical probability before each shot. For example, before the 10th shot, the 0 / 1 ratio of the previous 9 shots is 8:1, then the historical statistical probability is 1 / 9 = 0.111. The final read result of the 10th shot is 1. Before the 11th shot, the historical statistical probability is updated. The 0 / 1 ratio of the previous 10 shots is 8:2, and the historical statistical probability this time is 2 / 10 = 0.2.

[0032] Based on the above concept, the present invention provides a dynamic quantum feedback system (ARTERY) based on branch prediction, asFigure 7 As shown in (a) of , this embodiment provides an FPGA, a data bus, and a backplane. The FPGA includes an ADC and a DAC module, a feedback controller, and a clock management module.

[0033] The clock management module provided in this embodiment generates a reference clock for the ARTERY system and provides a synchronous clock for the ADC and DAC modules.

[0034] The ADC and DAC modules responsible for waveform reception and transmission provided in this embodiment are integrated in an additional card. These chips are connected to the feedback controller through SerDes (Serializer / Deserializer) to achieve high-speed waveform data transmission.

[0035] The FPGA provided in this embodiment is connected to the backplane through a data bus to achieve the reception and transmission of feedback signals with other FPGAs.

[0036] As Figure 7 shown in (b) of , the input waveform provided in this embodiment is captured by an ADC core and a digital downsampler to obtain a low-frequency waveform. Among them, the ADC core is used to convert an analog signal into a digital signal. In addition, after the output waveform is processed by data interpolation, an analog waveform is generated through a DAC core. The DAC core is used to convert a digital signal into an analog signal. The digital downsampler and the interpolation module take a long time and account for the main delay in the processing of the ADC and DAC.

[0037] As Figure 7 shown in (c) of , the feedback controller provided in this embodiment includes state classification, a dynamic timing controller, and waveform preparation.

[0038] Among them, the state classification module provided in this embodiment includes a buffer, a stream adapter, a parameter register, a demodulator, a demodulation result queue, a history branch register, a state table, a read prediction register, and a Bayesian prediction model.

[0039] The readout waveform input through the JESD interface in this embodiment is first received and buffered, and then adjusted by the stream adapter. Among them, two stream adapters process the input stream. One generates the real part of the waveform, and the other processes the imaginary part. The stream adapter collects waveform data within the window length (t1, t2) and sends it to the demodulator. The waveform is then demodulated together with the pre-stored physical parameters of the qubits. The demodulation result is pushed into a depth of , in the demodulation result queue, where pulse length is the time required to fully read the waveform, window length is the window length, providing the IQ coordinate values of the waveforms at each moment within the time window, comparing the distance between the IQ coordinate values at different moments and the state of 0 or 1 to obtain the states at different moments, and sending the states at different moments to the historical branch register. The historical branch register with width k records the preliminary classification result of the quantum state at time t2, that is, the state. Whenever the value in the historical branch register is updated, the intermediate moment statistical probability P read can be obtained through the state table, which is implemented using on-chip storage units and occupies a maximum memory size of 2k - 3(k + 16) bytes.

[0040] The Bayesian prediction model provided in this embodiment consists of a multiplier and a FIFO for synchronizing timing, used to store the readout prediction and output P after k cycles. predict . The intermediate moment statistical probability is sent to the FIFO through the read prediction register. The intermediate moment statistical probabilities with all states being 1 are directly sent to the Bayesian prediction period through the FIFO. The historical statistical probabilities with all states being 1 in the historical prediction are directly sent to the Bayesian prediction period. At the same time, the product of and is sent to the Bayesian predictor. The prediction statistical probability, that is, the prediction result, is obtained through the Bayesian predictor and sent to the branch prediction period for comparison to determine whether it exceeds a preset threshold.

[0041] The waveform preparation provided in this embodiment includes a branch decision maker, an operation table, a waveform library, a waveform sequence, a decoder, and a feedback signal interconnection. The branch decision maker compares the prediction statistical probability with a set threshold. When the received prediction statistical probability is greater than the set threshold, it sends a feedback signal to the dynamic timing controller and receives the feedback signal through the feedback signal interconnection, and then sends the prediction result to the operation table to find the address of the pre-executed branch circuit corresponding to the selected state. Based on the found address, the corresponding waveform is obtained through the waveform library. The corresponding waveform is decoded by the decoder to obtain the waveform data carrying the information of the pre-executed branch circuit, and the waveform data carrying the information of the pre-executed branch circuit is transmitted to the ADC and DAC modules through the JESD interface.

[0042] In a specific embodiment, if it is necessary to trigger another FPGA to execute the corresponding branch circuit, the dynamic moment controller sends the feedback information to the branch decision maker of another FPGA through the data bus and the backplane, and the corresponding branch circuit is pre-executed through the branch decision maker of another FPGA.

[0043] In a specific embodiment, the waveform library includes a waveform generation unit and a cache storage unit, and the cache storage unit includes a pre-execution cache, a reusable cache, and a recovery cache; The waveform generation unit is configured to retrieve a corresponding waveform from the pre-execution cache and the reusable cache based on the received lookup address, and send the retrieved waveform to the decoder; The reusable cache and the recovery cache are further configured to, when the prediction result is inconsistent with the read result after the read process corresponding to the pre-execution circuit is completed, it can be understood that the above read result is the IQ value and the state, then trigger the waveform library to retrieve the waveform in the recovery cache or the reusable cache for branch recovery through the branch decision maker.

[0044] Specifically, for branch recovery: when the feedback read is completed, compare the final read result with the intermediate read result, and if the prediction is incorrect, branch recovery is enabled. Figure 8 Shows the hardware implementation of waveform preparation with recovery function. The waveform generation unit finds the specific waveform according to the memory address and adds it to the waveform queue, and at the same time adds the waveform to the corresponding cache for subsequent processes to use. In one embodiment, for the Rx(θ) gate in the branch sub-circuit, the corresponding recovery sub-circuit uses Rx(-θ). The waveforms of these two operations can reuse the Gaussian envelope stored in the on-board high-speed memory (DDR), thus reducing the storage space. For two-qubit gates such as the CZ gate, or special single-qubit gates such as the X gate, there is no significant change in the waveforms between the branch sub-circuit and the recovery sub-circuit, and these gates can be directly reused. Based on this reusability and the time dependence between executions, we designed three waveform caches for temporary storage before gate execution. The pre-execution cache stores waveforms that cannot be reused in the branch sub-circuit, such as gate operations; the reusable cache stores gate operations shared between the branch and recovery sub-circuits; the recovery cache stores the unique waveforms of the recovery sub-circuit. Since the time difference between executions (usually more than 30 ns) is greater than the waveform parallel generation time based on the waveform envelope (7 cycles, 28 ns), the waveforms in the pre-execution cache and the recovery cache can be generated in an overlapping manner. In addition, the pre-execution cache and the recovery cache can share the same memory space, thereby reducing the storage overhead.

[0045] For the feedback signal between FPGAs, the transmission is through the predictor-feedback signal interconnection module-backplane path. This process also includes a trigger signal issued by the dynamic timing controller to ensure the synchronization of communication between FPGAs. This design implements a scalable branch prediction method.

[0046] When the waveform preparation is used when the received prediction statistical probability is less than the set threshold, the waveform preparation module does not generate a feedback signal, waits to receive the prediction statistical probability at the next moment, and makes a threshold judgment again.

[0047] This embodiment provides the use of Bayesian analysis based on branch prediction, where the timing of branch direction prediction is inherently uncertain. To support the dynamic execution of branch circuits, traditional static timing schemes need to be updated to conditional execution with dynamic timing. It is necessary to design an on-chip dynamic timing control scheme to modify the timing according to the predicted quantum state, allow low-latency execution, avoid alignment errors, and minimize the idle time of the entire quantum system by adjusting the execution window.

[0048] As Figure 9 shown in (a) of [], the execution of quantum instructions generally requires changing the execution of branch circuit instructions from a way restricted by a fixed schedule to a way controlled by a feedback signal. For example, under static timing, the RX(π / 2) waveform is executed at a fixed time point, such as t = 200dt. In contrast, under dynamic timing, the instruction is executed conditionally: after receiving the feedback signal, the controller immediately issues the RX waveform for execution.

[0049] Figure 9 (b) of [] shows the working strategy of the dynamic moment controller provided in this embodiment for the feedback signal. At time t m , the Bayesian predictor generates a probability prediction P predict , and this value is lower than the threshold. Therefore, the dynamic timing controller does not issue a feedback signal, and the branch circuit remains inactive. After a time window length of L, at time t m+1 , the Bayesian predictor updates its prediction, and the predicted value exceeds the threshold, meeting the condition for executing the branch circuit. Therefore, the dynamic timing controller issues a feedback signal. If the feedback process is executed on the same FPGA, the branch decision maker immediately starts the execution of the branch circuit after receiving the feedback signal. In the case of cross-FPGA feedback, the feedback signal is transmitted through the backplane to the branch decision maker on a different FPGA. After receiving the remote trigger, the other FPGA starts the pre-execution of the branch circuit.

[0050] Inside the FPGA, the signal transmission speed between the DAC and the ADC is significantly faster than the transmission between FPGAs through SerDes (for example, 4ns vs. 48ns). However, due to the limitation of the bandwidth of the Advanced eXtensible Interface (AXI), the number of DACs and ADCs that can be connected to a single FPGA is limited. Quantum waveforms usually contain a large number of "0" signals for idle operations and are thus easily compressed. To solve this problem, this embodiment adopts an adaptive sampling rate method to optimize the use of on-chip bandwidth. By dynamically adjusting the sampling rate based on the compressed waveform, this design reduces the data transmission burden, thereby maximizing the integration density of DACs on each FPGA.

[0051] When deploying the control waveform of the branch circuit, in this embodiment, high-sampling-rate analog-to-digital conversion data is generated through waveform encoding. Before transmitting the data to the DAC module, a decoding unit is designed to process the encoded waveforms from the waveform library. As Figure 10 shown, assume that the resolution of the DAC is 16 bits and the sampling rate is 2 GSPS (200 million samples per second). For the basic gate set consisting of RX, RY, RZ, and CZ, the circuit-execution required waveform data includes a 30-ns XY waveform, a 60-ns CZ waveform, and a 2-μs readout waveform. After encoding, these waveforms are stored in an offline waveform library. When the branch decision maker receives a feedback signal, it retrieves the required pre-encoded waveforms from the waveform library. Then, the waveforms are transmitted through the AXI bus and sent to the decoder for processing. The decoder uses a combination of run-length decoding and Huffman decoding. The waveforms are first decoded using a run-length decoder and then reconstructed into the original waveforms using a Huffman table. Once decoded, the waveforms are converted back to their original form and adjusted to the required DAC sampling rate. Finally, the decoded waveforms are sent to the DAC module for further processing and converted into analog signals, thus ensuring a higher integration density of the DAC on each FPGA under the same transmission bandwidth.

Claims

1. A dynamic quantum feedback system based on branch prediction, characterized in that Including an FPGA, the FPGA includes: An ADC and a DAC module, which are used to receive the waveform data of the current shot, and are also used to process the waveform data of the branch circuit information corresponding to the prediction result to obtain an analog waveform, so as to pre-execute the branch circuit; A feedback controller, the feedback controller is connected to the ADC and DAC modules through SerDes, and the feedback controller includes state classification, a dynamic timing controller, and waveform preparation: The state classification is used to process the waveform data to obtain the states at k moments, compare the states at k moments with the state table to obtain the intermediate moment statistical probability that the states at k moments are all selected states, and obtain the historical statistical probability of the selected state based on the state distribution of historical shots. The historical statistical probability is combined with the intermediate moment statistical probability to obtain the predicted statistical probability that the state is the selected state; The waveform preparation is used to, when the received predicted statistical probability is greater than the set threshold, use the selected state as the prediction result, send a feedback signal to the dynamic timing controller, and after receiving the feedback signal through the dynamic timing controller, send the waveform data of the branch circuit information corresponding to the prediction result to the ADC and DAC modules.

2. The dynamic quantum feedback system based on branch prediction according to claim 1, wherein The state classification includes a stream adapter, a parameter register, a demodulator, a demodulation result queue, a historical branch register, a state table, and a Bayesian prediction model; The stream adapter is used to collect and process the waveform data within the time window to obtain the real part and the imaginary part of the waveform data, and send the real part and the imaginary part of the waveform data to the demodulator; The parameter register is used to send the physical parameters of the quantum bit to the demodulator; The demodulator is used to demodulate the real part and the imaginary part of the waveform data and the physical parameters of the quantum bit together to obtain the IQ coordinate values of the waveforms at each moment within the time window; The demodulation result queue is used to compare the IQ coordinate values at different moments with the distances of the states of 0 or 1 to obtain the states at different moments, and send the states at different moments to the historical branch register; The historical branch register is used to receive the states of the historical moment and the current time window, so as to obtain the states of the nearest k moments, and send the states of the nearest k moments to the state; The state table is used to obtain the intermediate moment statistical probability that the states at k moments are all selected states based on the corresponding relationship between the received states at the nearest k moments and the intermediate moment statistical probability; The Bayesian prediction model is used to combine the historical statistical probability that the state is the selected state in the historical period with the intermediate moment statistical probability to obtain the predicted statistical probability that the state is the selected state.

3. The dynamic quantum feedback system based on branch prediction according to claim 1, characterized in that When the waveform preparation is used and the received predicted statistical probability is less than the set threshold, the waveform preparation module does not generate a feedback signal, waits to receive the predicted statistical probability of the next moment, and makes a threshold judgment again.

4. The dynamic quantum feedback system based on branch prediction according to claim 1, characterized in that The waveform preparation includes a branch decision maker, an operation table, a waveform library, a waveform sequence, a decoder, and a feedback signal interconnection; The branch decision maker compares the predicted statistical probability with a set threshold. When the received predicted statistical probability is greater than the set threshold, it sends a feedback signal to the dynamic timing controller, and receives the feedback signal through the interconnection of the feedback signal, and then sends the prediction result to the operation table to find the address of the pre-executed branch circuit corresponding to the selected state. Based on the found address, the corresponding waveform is obtained through the waveform library, and the corresponding waveform is decoded by a decoder to obtain waveform data carrying the information of the pre-executed branch circuit. The waveform data carrying the information of the pre-executed branch circuit is transmitted to the ADC and DAC modules through the JESD interface.

5. The dynamic quantum feedback system based on branch prediction according to claim 4, characterized in that It also includes a data bus and a backplane. If it is necessary to trigger another FPGA to execute the corresponding branch circuit, the dynamic timing controller sends the feedback information to the branch decision maker of another FPGA through the data bus and the backplane, and the corresponding branch circuit is pre-executed by the branch decision maker of another FPGA.

6. The dynamic quantum feedback system based on branch prediction according to claim 4, wherein The waveform library includes a waveform generation unit and a cache storage unit. The cache storage unit includes a pre-execution cache, a reusable cache, and a recovery cache; The waveform generation unit is used to retrieve the corresponding waveform from the pre-execution cache and the reusable cache based on the received and found address, and send the retrieved waveform to the decoder; The reusable cache and the recovery cache are also used when the prediction result is inconsistent with the read result after the read process is completed, then the waveform library is triggered by the branch decision maker to retrieve the waveform in the recovery cache or the reusable cache for branch recovery.

7. The dynamic quantum feedback system based on branch prediction according to claim 4, wherein The decoder is used to decode the corresponding waveform through a run-length decoder, and then reconstruct the decoded result through Huffman decoding to obtain waveform data carrying the information of the pre-executed branch circuit.

8. The dynamic quantum feedback system based on branch prediction according to claim 1, characterized in that The ADC and DAC modules include an ADC sub-module and a DAC sub-module; The ADC sub-module includes an ADC core and a digital downsampler, and the waveform data of the current shot is captured through the ADC core and the digital downsampler in sequence to obtain a low-frequency waveform; The DAC sub-module includes an interpolation module and a DAC core, and the waveform data carrying the information of the pre-executed branch circuit is output and passed through the interpolation module and the DAC core in sequence to obtain an analog waveform.

9. The dynamic quantum feedback system based on branch prediction according to claim 8, characterized in that It also includes a clock management module. The clock management module is used to generate a reference clock, and synchronize the clocks of the ADC sub-module and the DAC sub-module through the generated reference clock.

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