Circuit structure for reducing output voltage change

Abstract

The invention provides a circuit structure for reducing output voltage change. The circuit structure comprises a controller A1, a current detection circuit, a stabilizing circuit and a charging circuit, in the current detection circuit, power supply voltage VDD is grounded through a current detection tube MS and a current detection resistor RS in sequence; in the charging circuit, a power tube MP outputs an output voltage VOUT and an output current IOUT for charging a battery load F1; the control end of the power tube MP is connected with the control end of the current detection tube MS; the positive input end of the controller A1 is connected between the first feedback resistor RF1 and the second feedback resistor RF2, the output end of the controller A1 is connected to the control end of the power tube MP, and the controller A1 is used for adjusting the conduction state of the power tube MP and the current detection tube MS so as to adjust the output voltage VOUT; a first end of the stabilizing circuit is connected to power supply voltage VDD, a second end of the stabilizing circuit is grounded, a third end of the stabilizing circuit is connected to a current output end of the current detection tube MS, a fourth end of the stabilizing circuit is connected to a current output end of the power tube MP, and the stabilizing circuit is used for controlling the current flowing through the power tube MP according to the magnitude of the output current IOUT, so that the change rate of the output voltage VOUT is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of battery power supply, and particularly relates to a circuit structure for reducing the change of output voltage. Background Art

[0002] Figure 1 The topological structure diagram of a battery charging circuit in the prior art is shown. Refer to Figure 1 This battery charging circuit includes a controller A1', a power transistor MP', a first feedback resistor RF1', a second feedback resistor RF2', and a battery load F1'. The output voltage of this battery charging circuit is VOUT', and the output current is IOUT'. The battery load F1' is charged through the output voltage and output current.

[0003] In the actual application process of the battery charging circuit, the output voltage VOUT' often decreases as the output current IOUT' increases. This is because when the output current IOUT' increases, the current flowing through the power transistor MP' will necessarily increase. If the output voltage VOUT' remains unchanged or increases at this time, the gate-source voltage difference and drain-source voltage difference of the power transistor MP' will remain unchanged or decrease, thus unable to provide the required increased current, which contradicts the actual increase in current demand in the power transistor MP'. Therefore, to meet the requirement of increasing current in the circuit, the output voltage VOUT' will necessarily decrease when the output current IOUT' increases. Especially when the output current IOUT' is small, the change of the output voltage VOUT' with the output current IOUT' is more obvious.

[0004] When the battery charging circuit is unloaded or the output current IOUT' is very small, the current in the power transistor MP' only flows through the first feedback resistor RF1' and the second feedback resistor RF2'. The resistance values of the first feedback resistor RF1' and the second feedback resistor RF2' are usually very large, so the current flowing through them is extremely small. Also, since the size of the power transistor MP' is very large, at this time, the power transistor MP' is almost in a cut-off state. Therefore, when the battery charging circuit is unloaded, that is, when the output current IOUT' is 0 or very small, the control loop is in an unstable working state. Only when the output current IOUT' is large enough, the power transistor MP' is in a conducting state, and the control loop will enter a stable state. Therefore, when the battery charging circuit is gradually loaded from an unloaded state, that is, when the output current IOUT' increases from 0, the power transistor MP' gradually changes from a cut-off state to a conducting state, and the control loop gradually changes from an unstable working state to a stable working state. During this process, the output voltage VOUT' will change significantly. After the power transistor MP' is conducting, the control loop is always in a stable working state. After that, when the output current IOUT' increases again, the change of the output voltage VOUT' will decrease.

[0005] Figure 2 It shows the waveform diagram of the output voltage varying with the output current. Refer to Figure 2 , when the battery charging circuit is unloaded, the output voltage VOUT’ is 3V. When the output current IOUT’ is 100mA, the output voltage VOUT’ is 2.98V. Therefore, when the battery charging circuit changes from no load to full load, that is, when the output current IOUT’ changes from 0mA to 100mA, the change rate of the output voltage VOUT’ is . Summary of the Invention

[0006] The object of the present invention is to solve the problem that the change rate of the output voltage of the existing battery charging circuit is relatively large during the process of gradually loading from no load, thus affecting the accuracy of the charging circuit.

[0007] According to the first aspect of the present invention, a circuit structure for reducing the change of the output voltage is provided, including a controller A1, a current detection circuit, a stabilization circuit and a charging circuit; In the current detection circuit, the power supply voltage VDD is grounded through a current detection tube MS and a current detection resistor RS in sequence; In the charging circuit, the power supply voltage VDD is grounded through a power transistor MP, a first feedback resistor RF1 and a second feedback resistor RF2 in sequence; the power supply voltage VDD is also grounded through the power transistor MP and a battery load F1; the current output end of the power transistor MP outputs the output voltage VOUT and the output current IOUT, which are used to charge the battery load F1; The control end of the power transistor MP is connected to the control end of the current detection tube MS; The positive input end of the controller A1 is connected between the first feedback resistor RF1 and the second feedback resistor RF2, the negative input end is connected to an external voltage VREF, and the output end is connected to the control end of the power transistor MP, which is used to adjust the conduction states of the power transistor MP and the current detection tube MS, so as to adjust the output voltage VOUT; The first end of the stabilization circuit is connected to the power supply voltage VDD, the second end is grounded, the third end is connected to the current output end of the current detection tube MS, and the fourth end is connected to the current output end of the power transistor MP, which is used to control the current flowing through the power transistor MP according to the magnitude of the output current IOUT, so as to reduce the change rate of the output voltage VOUT.

[0008] In a possible implementation manner, when the output current IOUT is less than a preset threshold, the stabilization circuit generates a downward auxiliary current at the current output end of the power transistor MP, so that the auxiliary current flows through the power transistor MP; when the output current IOUT exceeds the preset threshold, the stabilization circuit stops generating the auxiliary current, thereby reducing the change rate of the output voltage VOUT.

[0009] In a possible implementation, the stability circuit includes a first switching transistor M1, a second switching transistor M2, a first stabilizing resistor RC1, and a control module; The current input terminal of the first switching transistor M1 is connected to the current output terminal of the power transistor MP, the current output terminal of the first switching transistor M1 is grounded, and the control terminal is connected to the first node A of the control module; The current input terminal of the second switching transistor M2 is connected to the power supply voltage VDD, the current output terminal is connected to the first node A of the control module through the first stabilizing resistor RC1, and the control terminal is connected to the second node B of the control module; The third node C of the control module is connected to the current output terminal of the current detecting transistor MS.

[0010] In a possible implementation, the control module includes a third switching transistor M3 and a fourth switching transistor M4; The current input terminal of the third switching transistor M3 serves as the first node A, the current output terminal is grounded, and the control terminal is connected to the first node A; The current input terminal of the fourth switching transistor M4 serves as the second node B and the third node C, the current output terminal of the fourth switching transistor M4 is grounded, and the control terminal of the fourth switching transistor M4 is connected to the control terminal of the third switching transistor M3.

[0011] In a possible implementation, the control module includes a fifth switching transistor M5, a sixth switching transistor M6, a seventh switching transistor M7, and a trigger unit; The current input terminal of the fifth switching transistor M5 serves as the third node C, and the current output terminal of the fifth switching transistor M5 is grounded; The current input terminals of the sixth switching transistor M6 and the seventh switching transistor M7 are both connected to the trigger unit, and the current output terminals of the sixth switching transistor M6 and the seventh switching transistor M7 are both grounded; The control terminals of the fifth switching transistor M5, the sixth switching transistor M6, and the seventh switching transistor M7 all serve as the first node A; The current input terminal of the seventh switching transistor M7 is connected to the control terminal of the seventh switching transistor M7.

[0012] In a possible implementation, the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, and the first switching transistor M1 form a current mirror structure.

[0013] In a possible implementation, the control module further includes an eighth switching transistor M8; The current input terminal of the eighth switching transistor M8 serves as the first node A, the current output terminal is grounded, and the control terminal serves as the third node C.

[0014] In a possible implementation, in the triggering unit, the power supply voltage VDD is grounded through the second stabilizing resistor RC2 and the ninth switching transistor M9 in sequence; The control terminal of the ninth switching transistor M9 serves as the third node C.

[0015] In a possible implementation, the triggering unit further includes a tenth switching transistor M10; The current input terminal of the tenth switching transistor M10 is connected to the power supply voltage VDD, the current output terminal is connected to the current input terminal of the sixth switching transistor M6, and the control terminal is connected to the current input terminal of the ninth switching transistor M9.

[0016] In a possible implementation, in the triggering unit, the power supply voltage VDD is connected to the current input terminal of the sixth switching transistor M6 through a switching element and an eleventh switching transistor M11 in sequence; the power supply voltage VDD is also connected to the current input terminal of the seventh switching transistor M7 through the third stabilizing resistor RC3 and a twelfth switching transistor M12 in sequence; the power supply voltage VDD is also grounded through a thirteenth switching transistor M13 and a fourth stabilizing resistor RC4; The control terminal of the eleventh switching transistor M11 is connected to the current output terminal of the eleventh switching transistor M11; The control terminals of the twelfth switching transistor M12 and the thirteenth switching transistor M13 are both connected to the control terminal of the eleventh switching transistor M11; The current output terminal of the thirteenth switching transistor M13 serves as the second node B.

[0017] In a possible implementation, the eleventh switching transistor M11 and the twelfth switching transistor M12 have the same parameters; The eighth switching transistor M8 and the ninth switching transistor M9 have the same parameters.

[0018] In a possible implementation, the switching element is a diode or a transistor connected in diode configuration.

[0019] According to the solution of the present invention, the current detection circuit detects the change of current through the current detection tube MS and the current detection resistor RS, and provides a real-time feedback signal for the stabilization circuit. Then, by setting a stabilization circuit that cooperates with the charging circuit and the current detection circuit, when the charging circuit is in an unloaded state or the output current IOUT is very small, there is still a small current flowing through the power transistor MP, thereby ensuring proper conduction of the power transistor MP under different load conditions and avoiding drastic fluctuations in the output voltage VOUT, that is, avoiding the output voltage VOUT from being too large when the charging circuit is unloaded or the output current is small. This structure effectively suppresses the sudden change of the output voltage VOUT during the process of the battery charging circuit gradually changing from unloaded to loaded, improves the stability of the voltage output, reduces the change rate of the output voltage, and enhances the response stability and control accuracy of the entire system.

[0020] Furthermore, by introducing an auxiliary current path, an auxiliary current is provided for the power transistor MP when the output current is small, reducing the output voltage VOUT. At the same time, the auxiliary path is automatically turned off after the output current exceeds a preset threshold, effectively reducing the power consumption during normal operation. When the battery charging circuit switches from unloaded to full load, the change rate of the output voltage VOUT is only half of that of the prior art, significantly improving the voltage stability. In addition, by adjusting the magnitude of the auxiliary current, the no-load voltage and the change rate of the output voltage can be flexibly set to meet different application requirements.

[0021] Furthermore, through the structural design of the control module in the circuit, both the auxiliary current and the preset threshold are independent of the power supply voltage VDD and other variable parameters, so that consistent control effects can be maintained under different power supply voltage VDD conditions, eliminating the need for parameter adjustment for different power supply voltages, simplifying the design process, and enhancing the adaptability and generality of the circuit structure.

[0022] The above description is only an overview of the technical solution of the present invention. In order to be able to more clearly understand the technical means of the present invention and implement it according to the content of the specification, the following details the preferred embodiments of the present invention as follows. Brief Description of the Drawings

[0023] Figure 1 Shows the topology diagram of the battery charging circuit in the prior art; Figure 2 Shows the waveform diagram of the output voltage changing with the output current; Figure 3 Shows the topology diagram of the circuit structure for reducing the output voltage change in an embodiment of the present invention; Figure 4 Shows the topology diagram of the circuit structure for reducing the output voltage change in another embodiment of the present invention; Figure 5 Shows the topology diagram of the circuit structure for reducing the output voltage change in yet another embodiment of the present invention; Figure 6 Shows a circuit structure topology diagram for reducing output voltage variation according to another embodiment of the present invention. Detailed implementation manners

[0024] To make the above objects, features, and advantages of the present application more apparent and understandable, the following will, with reference to the accompanying drawings, give a detailed description of the specific implementation manners of the present application. It can be understood that the specific embodiments described herein are only used to explain the present application and not to limit the present application. Additionally, it should be noted that, for the sake of convenience of description, only the parts related to the present application rather than all the structures are shown in the drawings. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0025] The terms "including" and "having" in the present application and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to these processes, methods, products, or devices.

[0026] Referring to "embodiment" in this context means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0027] Figure 3 Shows a circuit structure topology diagram for reducing output voltage variation according to an embodiment of the present invention. As Figure 3As shown in the figure, the circuit structure for reducing the output voltage variation includes a controller A1, a current detection circuit 100, a stabilization circuit 200, and a charging circuit 300. In the current detection circuit 100, the power supply voltage VDD is grounded successively through a current detection transistor MS and a current detection resistor RS. In the charging circuit 300, the power supply voltage VDD is grounded successively through a power transistor MP, a first feedback resistor RF1, and a second feedback resistor RF2. The power supply voltage VDD is also grounded successively through the power transistor MP and a battery load F1. The current output terminal of the power transistor MP outputs an output voltage VOUT and an output current IOUT for charging the battery load F1. The control terminal of the power transistor MP is connected to the control terminal of the current detection transistor MS. The positive input terminal of the controller A1 is connected between the first feedback resistor RF1 and the second feedback resistor RF2, the negative input terminal is connected to an external voltage VREF, and the output terminal is connected to the control terminal of the power transistor MP, for adjusting the conduction states of the power transistor MP and the current detection transistor MS, thereby adjusting the output voltage VOUT. The first terminal of the stabilization circuit 200 is connected to the power supply voltage VDD, the second terminal is grounded, the third terminal is connected to the current output terminal of the current detection transistor MS, and the fourth terminal is connected to the current output terminal of the power transistor MP, for controlling the current flowing through the power transistor MP according to the magnitude of the output current IOUT, so as to reduce the variation rate of the output voltage VOUT. That is to say, when the output current IOUT is less than a preset threshold, the stabilization circuit generates a downward auxiliary current at the current output terminal of the power transistor MP, such that a small current flows through the power transistor MP. When the output current IOUT exceeds the preset threshold, the stabilization circuit stops generating the downward auxiliary current, thereby reducing the variation rate of the output voltage VOUT.

[0028] According to the above embodiment, the current detection circuit 100 detects the current variation through the current detection transistor MS and the current detection resistor RS, provides a real-time feedback signal to the stabilization circuit 200, and then by setting the stabilization circuit 200 that cooperates with the charging circuit 300 and the current detection circuit 100, when the charging circuit 300 is in an idle state or the output current IOUT is very small, a small current still flows through the power transistor MP, thereby ensuring the proper conduction of the power transistor MP under different load conditions, avoiding the drastic fluctuation of the output voltage VOUT, that is, avoiding the output voltage VOUT being too large when the charging circuit 300 is in an idle state or the output current is small. This structure effectively suppresses the mutation of the output voltage VOUT during the process of the charging circuit 300 gradually changing from an idle state to a loaded state, improves the smoothness of the voltage output, reduces the variation rate of the output voltage, and enhances the response stability and control precision of the entire system.

[0029] Figure 4 shows the circuit structure topology diagram for reducing the output voltage variation of another embodiment of the present invention. As Figure 4As shown, the stabilization circuit 200 in the circuit structure for reducing the output voltage variation includes a first switching transistor M1, a second switching transistor M2, a first stabilizing resistor RC1, and a control module 210. The current input terminal of the first switching transistor M1 is connected to the current output terminal of the power transistor MP, the current output terminal of the first switching transistor M1 is grounded, and the control terminal is connected to the first node A of the control module 210. The current input terminal of the second switching transistor M2 is connected to the power supply voltage VDD, the current output terminal is connected to the first node A of the control module 210 through the first stabilizing resistor RC1, and the control terminal is connected to the second node B of the control module 210. The third node C of the control module is connected to the current output terminal of the current detecting diode MS.

[0030] In this embodiment, when the output current IOUT is small, that is, when the charging circuit 300 is unloaded or the output current is small, the control module 210 sets the second node B to a low level, causing the second switching transistor M2 to conduct. Then, the voltage of the first node A is pulled up through the second switching transistor M2 and the first stabilizing resistor RC1, that is, the control terminal voltage of the first switching transistor M1 is pulled up, so that the first switching transistor M1 conducts. At this time, the first switching transistor M1 generates a pulling-down current I1 at the current output terminal of the power transistor MP, ensuring that there is always current flowing through the power transistor MP and preventing the output voltage VOUT from being too large. As the output current IOUT gradually increases and the system is in a normal loaded state, when the current detecting circuit 100 detects that the current flowing through the current detecting resistor RS exceeds the preset threshold, it pulls down or maintains the voltage of the first node A at a low level, causing the first switching transistor M1 to turn off. At this time, the auxiliary current path is cut off, and the power transistor MP continues to output current to the battery load F1, and the current flowing through it is the output current IOUT, and the auxiliary path no longer participates in the power supply process.

[0031] According to this embodiment, the stabilization circuit 200 maintains a small auxiliary current flowing continuously through the power transistor MP when the charging circuit 300 is unloaded or the output current is small. Figure 2 As can be seen, when a small auxiliary current flows through the power transistor MP, the output voltage VOUT decreases significantly, that is, by setting the stabilization circuit 200, the no-load voltage is effectively reduced, so that when the charging circuit 300 switches from the unloaded state to the loaded state, the variation rate of the output voltage is significantly reduced. In addition, the magnitude of the auxiliary current can be adjusted according to actual requirements, so as to achieve fine control of the no-load voltage and the output voltage variation rate.

[0032] It should be noted that the control module 210 in the above stabilization circuit 200 can be implemented in a variety of different structures to flexibly control the conduction and turn-off of the first switching transistor M1 under different design conditions. This will be described below in combination with specific circuit topologies.

[0033] Embodiment 1 Figure 5The circuit structure topology diagram for reducing the output voltage variation according to another embodiment of the present invention is shown. As Figure 5 shown, the control module 210 in this circuit structure includes a third switching transistor M3 and a fourth switching transistor M4. The current input terminal of the third switching transistor M3 serves as the first node A, the current output terminal is grounded, and the control terminal is connected to the first node A. The current input terminal of the fourth switching transistor M4 serves as the second node B and also as the third node C, the current output terminal of the fourth switching transistor M4 is grounded, and the control terminal of the fourth switching transistor M4 is connected to the control terminal of the third switching transistor M3.

[0034] In the first embodiment, the working principle of the circuit for reducing the output voltage variation is as follows: After the circuit is powered on, the initial output voltage VOUT is 0. At this time, the controller A1 outputs a low level to the control terminals of the power transistor MP and the current detection transistor MS to turn them on, and the output voltage VOUT starts to rise and finally stabilizes at a preset no-load voltage value , and this voltage value is the designed value of the no-load voltage. In some embodiments, the designed value of this no-load voltage can be Figure 2 3V in

[0035] At this time, since the charging circuit 300 is in a no-load state, the current in the power transistor MP only flows through the first feedback resistor RF1 and the second feedback resistor RF2, and the resistance values of the first feedback resistor RF1 and the second feedback resistor RF2 are usually very large, so the current flowing through the power transistor MP is very small. Also, since there is a positive correlation between the current flowing through the power transistor MP and the current IS flowing through the current detection transistor MS, therefore, the current IS flowing through the current detection transistor MS is also small at this time. In the specific design, the current IP flowing through the power transistor MP can be designed to be equal to . Since the current IS is small, the terminal voltage of the current detection resistor RS is also small, so the second switching transistor M2 turns on, and the control terminal voltages of the first switching transistor M1, the third switching transistor M3, and the fourth switching transistor M4 are pulled up by the second switching transistor M2 and the first stabilizing resistor RC1. Therefore, the first switching transistor M1, the third switching transistor M3, and the fourth switching transistor M4 are all turned on. At this time, a current I1 (auxiliary current) flows through the first switching transistor M1, a current I3 flows through the third switching transistor M3, and a current I4 flows through the fourth switching transistor M4. Therefore, when the charging circuit 300 is in a no-load state, a current I1 flows through the power transistor MP.

[0036] In some embodiments, the current I1 is designed to be equal to , and the current I4 is designed to be equal to .

[0037] At this time, the second switching transistor M2 is in a conducting state and operates in the linear region, and the on-resistance is extremely small and can be ignored in the calculation. It can be obtained that the current flowing through the third switching transistor M3 , where VTH3 is the conduction threshold voltage of the third switch tube M3. When the manufacturing process is known, the conduction threshold voltage is a fixed known value, RC1 is the resistance value of the first stabilizing resistor, and VDD is the power supply voltage. Thus, the current flowing through the first switch tube M1 can be obtained. .

[0038] When the charging circuit 300 is in a loaded state, since the resistance values ​​of the first feedback resistor RF1 and the second feedback resistor RF2 are usually very large, the current flowing through the first feedback resistor RF1 and the second feedback resistor RF2 is very small and can be ignored in the calculation. Therefore, the current IP flowing through the power tube MP is equal to IOUT+I1. , from which we can get the current flowing in the current sensing tube MS , and because the current flowing through the fourth switch tube M4 , therefore, the current flowing into the current-sense resistor RS is , so it can be obtained that the control terminal voltage of the second switch tube M2 is As the battery load increases, the output current IOUT increases, and the control terminal voltage of the second switch tube M2 increases. When the control terminal voltage of the second switch tube M2 rises to exceed the preset threshold, that is, When the second switch tube M2 is turned off, the first switch tube M1, the third switch tube M3 and the fourth switch tube M4 are turned off accordingly, and the corresponding currents I1, I3 and I4 are all switched to 0, the auxiliary current path is closed, and the circuit enters a normal load output state. Wherein, VTH2 is the conduction threshold voltage of the second switch tube M2. When the manufacturing process is known, the conduction threshold voltage is a fixed known value.

[0039] Therefore, when the current I1, the current I3 and the current I4 are at the switching point, , so the preset threshold of the output current is .

[0040] From the above analysis, it can be seen that when the charging circuit 300 is in the no-load state, the current I1 always flows through the power tube MP. In some embodiments, the current I1 is designed to be 1 mA, that is, , the no-load current at this time is 1mA, Figure 2 It can be seen that the no-load voltage at this time is 2.99V. When the output current exceeds the preset threshold, that is When the current I1 is switched to 0, only the output current IOUT flows through the power transistor MP. At this time, IOUT0 is designed to be able to satisfy the current value when the power transistor MP is fully turned on, for example, 2 mA. That is, when the output current IOUT exceeds 2 mA, currents such as I1 will be switched to 0, and the power transistor MP is fully turned on. This control strategy ensures that the power transistor MP is fully turned on while avoiding continuously providing auxiliary current after the circuit enters stable load operation, thus effectively reducing the overall power consumption of the system. When the output current IOUT reaches the full-load current of 100 mA, from Figure 2 it can be seen that the corresponding output voltage VOUT is 2.98 V. Therefore, when the charging circuit 300 changes from no-load to full-load, that is, when the output current IOUT changes from 0 mA to 100 mA, the change rate of the output voltage VOUT is only . From the above analysis, it can be seen that after adopting the circuit structure for reducing the output voltage change provided by the present invention, during the process of the output voltage VOUT switching from no-load to loaded, its change rate can be reduced by half compared with the prior art, effectively improving the stability of the output voltage.

[0041] It should be noted that during the actual use of the circuit, the parameter values of the current I1 and the preset threshold IOUT0 can be flexibly set according to specific application requirements. For example, by adjusting the magnitude of the current I1, the no-load voltage and the change rate of the output voltage can be effectively controlled, thereby further optimizing the stability of the system.

[0042] According to the above embodiment, by introducing an auxiliary current path, an auxiliary current is provided for the power transistor MP when the output current is small to reduce the output voltage VOUT, and at the same time, the auxiliary path is automatically turned off after the output current exceeds the preset threshold, effectively reducing the power consumption during normal operation. When the charging circuit 300 switches from no-load to full-load, the change rate of the output voltage VOUT is only half of that of the prior art, significantly improving the voltage stability. In addition, by adjusting the magnitude of the auxiliary current, the no-load voltage and the change rate of the output voltage can be flexibly set to meet different application requirements.

[0043] Embodiment 2 The inventor found that in the circuit structure for reducing the output voltage variation shown in the first embodiment, both the current I1 and the preset threshold IOUT0 are closely related to the power supply voltage VDD. When this circuit structure is applied to scenarios with different power supply voltages VDD, in order to meet the design requirements of the preset I1 and IOUT0, it is necessary to adjust the resistance values of the current sensing resistor RS and the first stabilizing resistor RC1 accordingly. However, if RS and RC1 are on-chip resistors with non-adjustable resistance values, this structure will be difficult to adapt to different VDD voltage environments, restricting its application in multi-voltage platforms and having poor adaptability. Therefore, in order to improve the adaptability of the circuit structure for reducing the output voltage variation and increase its application range, the inventor proposed the circuit structure for reducing the output voltage variation shown in the second embodiment of the present invention. In addition, the circuit structure for reducing the output voltage variation shown in the second embodiment of the present invention also includes a first switching transistor, a second switching transistor, and a first stabilizing resistor, which are represented as the first switching transistor M1', the second switching transistor M2', and the first stabilizing resistor RC1' in this second embodiment for distinction from the first embodiment. Among them, the current flowing through the first switching transistor M1' is represented by I1'.

[0044] Figure 6 FIG. shows a circuit structure topology for reducing the output voltage variation according to another embodiment of the present invention. As Figure 6 shown, the control module 210 in this circuit structure includes a fifth switching transistor M5, a sixth switching transistor M6, a seventh switching transistor M7, and a trigger unit 211. The current input terminal of the fifth switching transistor M5 serves as the third node C, and the current output terminal of the fifth switching transistor M5 is grounded. The current input terminals of the sixth switching transistor M6 and the seventh switching transistor M7 are both connected to the trigger unit 211, and the current output terminals of the sixth switching transistor M6 and the seventh switching transistor M7 are both grounded. The control terminals of the fifth switching transistor M5, the sixth switching transistor M6, and the seventh switching transistor M7 serve as the first node A and are all connected to the control terminal of the first switching transistor M1'. The current input terminal of the seventh switching transistor M7 is connected to the control terminal of the seventh switching transistor M7.

[0045] The fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, and the first switching transistor M1' form a current mirror structure.

[0046] The control module 210 further includes an eighth switching transistor M8. The current input terminal of the eighth switching transistor M8 serves as the first node A, the current output terminal is grounded, and the control terminal serves as the third node C.

[0047] In the trigger unit 211, the power supply voltage VDD is grounded through the second stabilizing resistor RC2 and the ninth switching transistor M9 in sequence, and the control terminal of the ninth switching transistor M9 serves as the third node C.

[0048] The trigger unit 211 further includes a tenth switching transistor M10. The current input terminal of the tenth switching transistor M10 is connected to the power supply voltage VDD, the current output terminal is connected to the current input terminal of the sixth switching transistor M6, and the control terminal is connected to the current input terminal of the ninth switching transistor M9.

[0049] In the trigger unit 211, the power supply voltage VDD is sequentially connected to the current input terminal of the sixth switching transistor M6 through a switching element and an eleventh switching transistor M11. The power supply voltage VDD is also sequentially connected to the current input terminal of the seventh switching transistor M7 through a third stabilizing resistor RC3 and a twelfth switching transistor M12. The power supply voltage VDD is also sequentially connected to the ground through a thirteenth switching transistor M13 and a fourth stabilizing resistor RC4. The control terminal of the eleventh switching transistor M11 is connected to the current output terminal of the eleventh switching transistor M11. The control terminals of the twelfth switching transistor M12 and the thirteenth switching transistor M13 are both connected to the control terminal of the eleventh switching transistor M11. The current output terminal of the thirteenth switching transistor M13 serves as the second node B.

[0050] The above-mentioned switching element is a first diode D1 or a triode in diode connection.

[0051] The parameters of the eleventh switching transistor M11 and the twelfth switching transistor M12 are the same, and the parameters of the eighth switching transistor M8 and the ninth switching transistor M9 are the same.

[0052] In the second embodiment, the working principle of the circuit for reducing the output voltage variation is as follows: After the circuit is powered on, as analyzed in the first embodiment above, the designed value of the no-load voltage is , and in some embodiments, the designed value of this no-load voltage can be Figure 2 3V in

[0053] When the charging circuit 300 is no-load, as analyzed in the first embodiment above, the currents flowing through the power transistor MP and the current detection transistor MS are very small, and the current IP flowing through the power transistor MP is designed to be equal to Therefore, the terminal voltage of the current detecting resistor RS is small, that is, the control terminal voltages of the eighth switching transistor M8 and the ninth switching transistor M9 are also small, so the eighth switching transistor M8 and the ninth switching transistor M9 are both in the off state. The second stable resistor RC2 pulls up the control terminal voltage of the tenth switching transistor M10, making the tenth switching transistor M10 also in the off state. At the same time, the control terminal voltage of the second switching transistor M2' is pulled down by the fourth stable resistor RC4, so the second switching transistor M2' conducts. At this time, the voltage of the first node A is pulled up by the second switching transistor M2' and the first stable resistor RC1', that is, the control terminal voltages of the first switching transistor M1', the fifth switching transistor M5, the sixth switching transistor M6 and the seventh switching transistor M7 are pulled up, so the first switching transistor M1', the fifth switching transistor M5, the sixth switching transistor M6 and the seventh switching transistor M7 conduct. After the sixth switching transistor M6 conducts, the control terminal voltages of the eleventh switching transistor M11, the twelfth switching transistor M12 and the thirteenth switching transistor M13 are pulled down by the sixth switching transistor M6, so the eleventh switching transistor M11, the twelfth switching transistor M12 and the thirteenth switching transistor M13 also conduct. At this time, the conducting twelfth switching transistor M12 always pulls up the control terminal voltages of the first switching transistor M1', the fifth switching transistor M5, the sixth switching transistor M6 and the seventh switching transistor M7, and currents I1', I5, I6 and I7 flow through the first switching transistor M1', the fifth switching transistor M5, the sixth switching transistor M6 and the seventh switching transistor M7 respectively. At the same time, since the thirteenth switching transistor M13 conducts, the control terminal voltage of the second switching transistor M2' is pulled up, resulting in the turn-off of the second switching transistor M2'.

[0054] At this time, since the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7 and the first switching transistor M1' form a current mirror structure, the ratio relationship of the currents I5, I6, I7 and I1' is , that is, the current I6 is equal to the current I7. Also, since the eleventh switching transistor M11 and the twelfth switching transistor M12 are switching transistors with the same parameters, the gate-source voltage differences of the eleventh switching transistor M11 and the twelfth switching transistor M12 are equal. Therefore, the voltage difference across the third stable resistor RC3 is equal to the forward conduction voltage drop VD1 of the first diode D1. Given the known manufacturing process, this forward conduction voltage drop VD1 is a fixed known value, so it can be obtained that .

[0055] When the charging circuit 300 is in the loaded state, according to the analysis in the above Embodiment 1, the current IP flowing through the power transistor MP = IOUT + I1', and the current flowing through the current detecting tube MS. Also, since the current flowing through the fifth switching transistor M5, therefore, the current flowing into the current detecting resistor RS is , so it can be obtained that the control terminal voltage of the ninth switching transistor M9 is As the load increases, the output current IOUT gradually increases, and the control terminal voltages of the eighth switching transistor M8 and the ninth switching transistor M9 also increase accordingly. When the control terminal voltages of the eighth switching transistor M8 and the ninth switching transistor M9 exceed their conduction threshold voltage VTH (the eighth switching transistor M8 and the ninth switching transistor M9 are switching transistors with the same parameters, and in the case of a known manufacturing process, VTH is a fixed known value), the eighth switching transistor M8 and the ninth switching transistor M9 conduct. After the eighth switching transistor M8 conducts, the control terminal voltages of the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, and the first switching transistor M1' are pulled low, so the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, and the first switching transistor M1' turn off. At the same time, after the ninth switching transistor conducts, the control terminal voltage of the tenth switching transistor M10 is pulled low, so the tenth switching transistor M10 conducts, thereby pulling up the control terminal voltages of the eleventh switching transistor M11, the twelfth switching transistor M12, and the thirteenth switching transistor M13. Therefore, the eleventh switching transistor M11, the twelfth switching transistor M12, and the thirteenth switching transistor M13 turn off. At this time, the currents I5, I6, I7, and I1' are switched to 0.

[0056] Therefore, when the currents I5, I6, I7, and I1' are at the switching point, , so the preset threshold of the output current can be obtained as .

[0057] As can be seen from the above analysis, when the charging circuit 300 is in an unloaded state, a current I1' always flows through the power transistor MP. In some embodiments, the current I1' is designed to be 1 mA, that is , and the no-load current at this time is 1 mA. From Figure 2 it can be seen that the no-load voltage at this time is 2.99 V. When the output current exceeds the preset threshold, that is , the current I1' is switched to 0, and only the output current IOUT flows through the power transistor MP. At this time, the preset threshold IOUT0 is designed to be the current value that can satisfy the full conduction of the power transistor MP, such as 2 mA. That is, when the output current IOUT exceeds 2 mA, currents such as the current I1' will be switched to 0, and the power transistor MP is fully conducting. At the same time, although after the thirteenth switching transistor M13 turns off, the control terminal voltage of the second switching transistor M2' is pulled low by the fourth stabilizing resistor RC4, making the second switching transistor M2' conduct, thereby forming a current path in the branch composed of the second switching transistor M2', the eighth switching transistor M8, and the first stabilizing resistor RC1', but since the first stabilizing resistor RC1' is a high-value resistor, the current in this branch is extremely small and can be almost ignored. Therefore, the circuit structure for reducing the output voltage change proposed in this second embodiment effectively reduces the power consumption during the stable operation of the circuit while ensuring the full conduction of the power transistor MP.

[0058] When the output current IOUT reaches the full-load current of 100 mA, from Figure 2 it can be seen that the corresponding output voltage VOUT is 2.98 V. Therefore, when the charging circuit 300 changes from no-load to full-load, that is, when the output current IOUT changes from 0 mA to 100 mA, the change rate of the output voltage VOUT is only . From the above analysis, after adopting the circuit structure for reducing the output voltage change provided by the present invention, during the process of the output voltage VOUT switching from no-load to loaded, its change rate can be reduced by half, effectively improving the stability of the output voltage.

[0059] During the actual use of the circuit, the parameter values of the current I1' and the preset threshold IOUT0 can be flexibly set according to specific application requirements.

[0060] According to the above embodiments, by introducing an auxiliary current path, a fixed small current I1' (auxiliary current) flows through the power transistor MP at no-load to reduce the output voltage VOUT, so that during the process of the charging circuit 300 changing from no-load to full-load, the output voltage VOUT only drops by about 0.01 V, and the change rate is reduced by half compared with the prior art, significantly improving the stability of the output voltage. After the output current exceeds the preset threshold IOUT0, the auxiliary current path is automatically turned off, thereby ensuring the normal operation of the power transistor MP while significantly reducing the power consumption during the stable operation of the circuit. At the same time, in the circuit structure for reducing the output voltage change proposed in the second embodiment, both the current I1' and the preset threshold IOUT0 are independent of the power supply voltage VDD and other variable parameters. Therefore, this circuit structure is applicable to circuits with any power supply voltage VDD. On the premise that the design values of the current I1' and the preset threshold IOUT0 are the same, it can operate stably without adjusting other parameters, thus simplifying the circuit adaptation process, improving the versatility, and broadening the application scope.

[0061] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0062] The above-described embodiments only represent several implementation manners of the present invention. Their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent should be subject to the appended claims.

Claims

1. A circuit structure for reducing the change in output voltage, characterized in that, It includes a controller A1, a current detection circuit, a stabilization circuit, and a charging circuit; In the current detection circuit, the power supply voltage VDD is grounded through a current detection diode MS and a current detection resistor RS in sequence; In the charging circuit, the power supply voltage VDD is grounded through a power transistor MP, a first feedback resistor RF1, and a second feedback resistor RF2 in sequence; the power supply voltage VDD is also grounded through the power transistor MP and a battery load F1; the current output terminal of the power transistor MP outputs an output voltage VOUT and an output current IOUT for charging the battery load F1; The control terminal of the power transistor MP is connected to the control terminal of the current detection diode MS; The positive input terminal of the controller A1 is connected between the first feedback resistor RF1 and the second feedback resistor RF2, the negative input terminal is connected to an external voltage VREF, and the output terminal is connected to the control terminal of the power transistor MP, for adjusting the conduction states of the power transistor MP and the current detection diode MS, thereby adjusting the output voltage VOUT; The first terminal of the stabilization circuit is connected to the power supply voltage VDD, the second terminal is grounded, the third terminal is connected to the current output terminal of the current detection diode MS, and the fourth terminal is connected to the current output terminal of the power transistor MP, for controlling the current flowing through the power transistor MP according to the magnitude of the output current IOUT, so as to reduce the change rate of the output voltage VOUT.

2. The circuit structure according to claim 1, characterized in that When the output current IOUT is less than a preset threshold, the stabilization circuit generates a downward auxiliary current at the current output terminal of the power transistor MP, so that the auxiliary current flows through the power transistor MP; when the output current IOUT exceeds the preset threshold, the stabilization circuit stops generating the auxiliary current, thereby reducing the change rate of the output voltage VOUT.

3. The circuit structure according to claim 2, characterized in that, The stabilization circuit includes a first switching transistor M1, a second switching transistor M2, a first stabilization resistor RC1, and a control module; The current input terminal of the first switching transistor M1 is connected to the current output terminal of the power transistor MP, the current output terminal of the first switching transistor M1 is grounded, and the control terminal is connected to the first node A of the control module; The current input terminal of the second switching transistor M2 is connected to the power supply voltage VDD, the current output terminal is connected to the first node A of the control module through the first stabilization resistor RC1, and the control terminal is connected to the second node B of the control module; The third node C of the control module is connected to the current output terminal of the current detection diode MS.

4. The circuit structure according to claim 3, characterized in that, The control module includes a third switching transistor M3 and a fourth switching transistor M4; The current input terminal of the third switching transistor M3 serves as the first node A, the current output terminal is grounded, and the control terminal is connected to the first node A; The current input terminal of the fourth switching transistor M4 serves as the second node B and serves as the third node C, the current output terminal of the fourth switching transistor M4 is grounded, and the control terminal of the fourth switching transistor M4 is connected to the control terminal of the third switching transistor M3.

5. The circuit structure according to claim 3, wherein The control module includes a fifth switching transistor M5, a sixth switching transistor M6, a seventh switching transistor M7, and a trigger unit; The current input terminal of the fifth switching transistor M5 serves as the third node C, and the current output terminal of the fifth switching transistor M5 is grounded; The current input terminals of the sixth switching transistor M6 and the seventh switching transistor M7 are both connected to the trigger unit, and the current output terminals of the sixth switching transistor M6 and the seventh switching transistor M7 are both grounded; The control terminals of the fifth switching transistor M5, the sixth switching transistor M6, and the seventh switching transistor M7 all serve as the first node A; The current input terminal of the seventh switching transistor M7 is connected to the control terminal of the seventh switching transistor M7.

6. The circuit structure according to claim 5, characterized in that The fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7 and the first switching transistor M1 form a current mirror structure.

7. The circuit structure according to claim 6, wherein The control module further includes an eighth switching transistor M8; The current input terminal of the eighth switching transistor M8 serves as the first node A, the current output terminal is grounded, and the control terminal serves as the third node C.

8. The circuit structure according to claim 7, wherein In the trigger unit, the power supply voltage VDD is sequentially grounded through a second stabilizing resistor RC2 and a ninth switching transistor M9; The control terminal of the ninth switching transistor M9 serves as the third node C.

9. The circuit structure according to claim 8, characterized in that, The trigger unit further includes a tenth switching transistor M10; The current input terminal of the tenth switching transistor M10 is connected to the power supply voltage VDD, the current output terminal is connected to the current input terminal of the sixth switching transistor M6, and the control terminal is connected to the current input terminal of the ninth switching transistor M9.

10. The circuit structure according to claim 9, characterized in that, In the trigger unit, the power supply voltage VDD is sequentially connected to the current input terminal of the sixth switching transistor M6 through a switching element and an eleventh switching transistor M11; the power supply voltage VDD is also sequentially connected to the current input terminal of the seventh switching transistor M7 through a third stabilizing resistor RC3 and a twelfth switching transistor M12; the power supply voltage VDD is also sequentially grounded through a thirteenth switching transistor M13 and a fourth stabilizing resistor RC4; The control terminal of the eleventh switching transistor M11 is connected to the current output terminal of the eleventh switching transistor M11; The control terminals of the twelfth switching transistor M12 and the thirteenth switching transistor M13 are both connected to the control terminal of the eleventh switching transistor M11; The current output terminal of the thirteenth switching transistor M13 serves as the second node B.

11. The circuit structure according to claim 10, wherein The parameters of the eleventh switching transistor M11 and the twelfth switching transistor M12 are the same; The parameters of the eighth switching transistor M8 and the ninth switching transistor M9 are the same.

12. The circuit structure according to claim 10, wherein The switching element is a diode or a transistor connected in diode configuration.

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