Current mode logic frequency divider applied to satellite-borne communication chip

Abstract

The invention belongs to the technical field of integrated circuits, and particularly relates to a current mode logic frequency divider applied to a satellite-borne wireless communication system. The circuit structure of the frequency divider comprises an anti-radiation frequency divider core circuit, a power detection circuit, an analog-to-digital converter and a control module circuit, an input signal is input to the anti-radiation frequency divider core circuit, and an output signal is generated and output to the power detection circuit. The power detection circuit processes the received signal, outputs a processing result to the analog-to-digital converter, receives an instruction of the control module circuit and generates an output signal of the whole circuit; the analog-to-digital converter converts a processing result output by the power detection circuit into a digital signal and outputs the digital signal to the control module circuit; the control module circuit performs judgment according to an input digital signal, generates a control signal for controlling the working mode of the anti-radiation frequency divider core circuit, and generates a control signal for controlling the power detection circuit and the analog-to-digital converter; the radiation-proof frequency divider core circuit is composed of two identical current mode logic frequency dividers and six numerical control single-pole double-throw switches. Switching of the two paths of frequency divider circuits is controlled by the numerical control switch, and by applying the structure, the circuit failure probability caused by space irradiation can be remarkably reduced, and the anti-irradiation performance and the stability of the circuit are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and particularly relates to a frequency divider. Background Art

[0002] A frequency synthesizer is a key module in wireless communication and affects the implementation of transceiver functions in many systems. In modern wireless communication, to improve the spectrum utilization rate and reduce the influence of multipath interference effects, frequency division multiplexing technology is widely used in various system designs.

[0003] To adapt to various communication standards and enable the frequency synthesizer to be widely used under multiple standards, and to implement the channel conversion function, a key module for the normal operation of the frequency synthesizer is a frequency divider. To support various communication protocols, the frequency divider needs to have performance requirements such as high speed and a wide frequency division ratio; and to meet the functional requirements of freely switching the carrier frequency in a communication system, the frequency divider unit needs to provide a continuously variable frequency division ratio and a wideband output frequency range.

[0004] Currently, the mainstream frequency dividers mainly include digital frequency dividers based on flip-flops and analog frequency dividers. Among them, the current-mode logic frequency divider has a wider frequency division range and occupies a smaller chip area. It is more often in the front stage position in the frequency divider link, used to process the output signal of the injection-locked frequency divider and divide it to a lower frequency band so that the subsequent digital logic gate circuits can work properly.

[0005] At present, the increasingly wide range of communication application fields has put forward more requirements for phased array transceiver systems and frequency divider circuits. In the aerospace field, the working environment of spaceborne chips is the strongly irradiated space. The circuit modules in the chips are affected by irradiation, with a higher failure probability and a shorter expected life. Therefore, it is imperative to pay attention to the special working environment of spaceborne chips in the aerospace field, study chip anti-irradiation technology, and improve the system stability and reliability. Summary of the Invention

[0006] The purpose of the present invention is to propose an anti-irradiation current-mode logic frequency divider applied to spaceborne communication chips.

[0007] The frequency divider proposed by the present invention has a circuit structure including: an anti-radiation frequency divider core circuit, a power detection circuit, an analog-to-digital converter, and a control module circuit; an input signal is input to the anti-radiation frequency divider core circuit, and an output signal is generated and output to the power detection circuit; the power detection circuit processes the received signal, outputs the processing result to the analog-to-digital converter, and receives an instruction from the control module circuit to generate an output signal of the overall circuit; the analog-to-digital converter converts the processing result output by the power detection circuit into a digital signal and outputs it to the control module circuit; the control module circuit makes a judgment based on the input digital signal, generates a control signal for controlling the working mode of the anti-radiation frequency divider core circuit, and generates control signals for controlling the power detection circuit and the analog-to-digital converter.

[0008] In the present invention, the anti-radiation frequency divider core circuit consists of two current-mode logic frequency dividers and six numerically controlled single-pole double-throw switches; the circuit structures of the two frequency dividers are exactly the same, both adopting the basic current-mode logic frequency divider architecture and sharing some circuits.

[0009] The frequency divider designed by the present invention generally has two mutually backup current-mode logic frequency divider circuits. The two frequency dividers are mutually backup and can be switched by changing the connection state of the single-pole double-throw switch under the control of the system, thereby effectively reducing the failure probability of the overall circuit and improving the anti-radiation performance and stability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a schematic structural diagram of the anti-radiation current-mode logic frequency divider of the present invention.

[0011] Figure 2 is a schematic diagram of the anti-radiation frequency divider core circuit. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0012] The present invention will be described in more detail below with reference to the drawings. In the respective drawings, like elements are denoted by like reference numerals. For the sake of clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown in the figures.

[0013] In the following, many specific details of the present invention are described, such as the structure, materials, dimensions, processing techniques, and technologies of the devices, in order to understand the present invention more clearly. However, as those skilled in the art can understand, the present invention can be implemented without these specific details.

[0014] Figure 1 shows a schematic structural diagram of the spaceborne anti-radiation current-mode logic frequency divider of the present invention.

[0015] As Figure 1As shown, the spaceborne radiation-hardened frequency divider 100 in the present invention includes a radiation-hardened frequency divider core circuit 101, a power detection circuit 102, a control module 103, and an analog-to-digital converter 104. The power supply voltage VDD is connected to the radiation-hardened frequency divider core circuit 101, and the differential input signals V in+ and V in- are input to the radiation-hardened frequency divider core circuit 101. The radiation-hardened frequency divider core circuit 101 outputs V op ’ and V on ’ which are transmitted to the power detection circuit 102. The outputs V op and V on of the power detection circuit 102 are used as the output signals of the entire frequency divider circuit. The output pdout of the power detection circuit 102 is transmitted to the analog-to-digital converter 104, the output adout of the analog-to-digital converter 104 is transmitted to the control module 103, the control module 103 outputs Ctrl<1:6> which is transmitted to the radiation-hardened frequency divider core circuit 101, the control module 103 outputs Ctrl7 which is transmitted to the power detection circuit 102, and the control module 103 outputs Ctrl8 which is transmitted to the analog-to-digital converter 104.

[0016] Figure 2 Shows the schematic diagram of the radiation-hardened current-mode logic frequency divider core circuit in the present invention.

[0017] As Figure 2 shown, the radiation-hardened frequency divider core circuit includes a total of 6 single-pole double-throw switches S1-6, 16 transistors M1-M 16 , 4 resistors R L1 -R L4 , and 4 inductors L1-L4; the differential input signal V in+ is connected to the moving end of switch S1, and V in- is connected to the moving end of switch S2; the first current-mode logic frequency divider is composed of transistors M5, M6, M 13 , M 14 , and the second is composed of transistors M7, M8, M 15 , M 16 ; the shared part of the two frequency dividers is composed of transistors M1-M4, M9-M 12 and the load resistors R L1 -R L4 and the load inductors L1-L4; the fixed end 1.1 of switch S1 is connected to the gate terminals of transistors M5, M 14 , the source terminals of M5, M 14 are grounded, and the drain terminals are respectively connected to the fixed end 3.2 of switch S3 and the fixed end 6.1 of switch S6; the fixed end 1.2 of switch S1 is connected to the gate terminals of transistors M8, M 16 , and the source terminals of M8, M 16The source terminal is grounded, and the drain terminals are respectively connected to the fixed terminals 3.1 of switch S3 and 6.2 of switch S6; the fixed terminal 2.1 of switch S2 is connected to the gate terminals of transistors M6, M 13 ; the source terminals of M6, M 13 are grounded, and the drain terminals are respectively connected to the fixed terminals 4.2 of switch S4 and 5.1 of switch S5; the fixed terminal 2.2 of switch S2 is connected to the gate terminals of transistors M7, M 15 ; the source terminals of M7, M 15 are grounded, and the drain terminals are respectively connected to the fixed terminals 4.1 of switch S4 and 5.2 of switch S5; the movable terminal of switch S3 is connected to the source terminals of transistors M1, M2, the gate terminal of M1 is connected to the drain terminals of transistors M9, M 11 ; and is connected to the power supply VDD through resistor R L3 and inductor L3, the gate terminal of M2 is connected to the drain terminals of transistors M 10 , M 12 ; and is connected to the power supply VDD through resistor R L4 and inductor L4; the movable terminal of switch S5 is connected to the source terminals of transistors M9, M 10 ; the gate terminal of M9 is connected to the drain terminals of transistors M2, M4, and is connected to the power supply VDD through resistor R L2 and inductor L2, the gate terminal of M 10 is connected to the drain terminals of transistors M1, M3, and is connected to the power supply VDD through resistor R L1 and inductor L1; the movable terminal of switch S4 is connected to the source terminals of transistors M3, M4, the drain terminal of M3 is connected to the gate terminal of M4 and serves as the output V op ' of this circuit module; the drain terminal of M4 is connected to the gate terminal of M3 and serves as the output V on ' of this circuit module; the movable terminal of switch S6 is connected to the source terminals of transistors M 11 , M 12 ; the drain terminal of M 11 is connected to the gate terminal of M 12 , the drain terminal of M 12 is connected to the gate terminal of M 11 . During the operation of the circuit, the switching of switches S1 - 6 is controlled by the control signals output by the control module, so as to flexibly switch the actually working frequency divider circuit, (M7M8, M 15 M 16 work simultaneously, and are backup to M5M6, M 13 M 14 ), thereby improving the circuit reliability and enhancing the anti - radiation performance and stability of the system.

Claims

1. A current-mode logic frequency divider applied to a spaceborne communication chip, characterized in that The circuit structure includes: an anti-radiation frequency divider core circuit, a power detection circuit, an analog-to-digital converter, and a control module circuit; an input signal is input to the anti-radiation frequency divider core circuit, and an output signal is generated and output to the power detection circuit; the power detection circuit processes the signal it receives, outputs the processing result to the analog-to-digital converter, and receives instructions from the control module circuit to generate the output signal of the overall circuit; the analog-to-digital converter converts the processing result output by the power detection circuit into a digital signal and outputs it to the control module circuit; the control module circuit makes a judgment based on the input digital signal, generates a control signal for controlling the working mode of the anti-radiation frequency divider core circuit, and generates control signals for controlling the power detection circuit and the analog-to-digital converter.

2. The anti-radiation frequency divider applied to the spaceborne communication chip according to claim 1, characterized in that, The anti-radiation frequency divider core circuit is composed of two current-mode logic frequency dividers and six numerically controlled single-pole double-throw switches; the circuit structures of the two frequency dividers are exactly the same, both adopting the basic current-mode logic frequency divider architecture, and sharing some circuits and loads; the two frequency divider circuits are backup to each other and can be switched by changing the connection state of the single-pole double-throw switches under the control of the system, so as to effectively reduce the failure probability of the overall circuit and improve the anti-radiation performance and stability of the system.

3. The anti-radiation frequency divider applied to the spaceborne communication chip according to claim 2, characterized in that, The core circuit of the anti-radiation frequency divider includes a total of 6 single-pole double-throw switches S1 - 6, 16 transistors M1 - M 16 , 4 resistors R L1 -R L4 , 4 inductors L1 - L4; the differential input signal V in+ is connected to the moving end of switch S1, and V in- is connected to the moving end of switch S2; The first current-mode logic frequency divider consists of transistors M5, M6, M 13 , M 14 . The second consists of transistors M7, M8, M 15 , M 16 . The shared part of the two frequency dividers consists of transistors M1-M4, M9-M 12 and load resistors R L1 -R L4 and load inductors L1-L4.

4. The anti-radiation frequency divider applied to the spaceborne communication chip according to claim 3, wherein In the core circuit of the radiation-resistant frequency divider: The fixed terminal 1.1 of switch S1 is connected to the gate terminals of transistors M5 and M 14 , the source terminals of M5 and M 14 are grounded, and the drain terminals are respectively connected to the fixed terminal 3.2 of switch S3 and the fixed terminal 6.1 of switch S6; The fixed terminal 1.2 of switch S1 is connected to the gate terminals of transistors M8 and M 16 , the source terminals of M8 and M 16 are grounded, and the drain terminals are respectively connected to the fixed terminal 3.1 of switch S3 and the fixed terminal 6.2 of switch S6; The fixed terminal 2.1 of switch S2 is connected to the gate terminals of transistors M6 and M 13 , the source terminals of M6 and M 13 are grounded, and the drain terminals are respectively connected to the fixed terminal 4.2 of switch S4 and the fixed terminal 5.1 of switch S5; The fixed terminal 2.2 of switch S2 is connected to the gate terminals of transistors M7 and M 15 , the source terminals of M7 and M 15 are grounded, and the drain terminals are respectively connected to the fixed terminal 4.1 of switch S4 and the fixed terminal 5.2 of switch S5; The movable terminal of switch S3 is connected to the source terminals of transistors M1 and M2, the gate terminal of M1 is connected to the drain terminals of transistors M9 and M 11 , and is connected to the power supply VDD through resistor R L3 and inductor L3, the gate terminal of M2 is connected to the drain terminals of transistors M 10 and M 12 , and is connected to the power supply VDD through resistor R L4 and inductor L4; The movable terminal of switch S5 is connected to the source terminals of transistors M9 and M 10 , the gate terminal of M9 is connected to the drain terminals of transistors M2 and M4, and is connected to the power supply VDD through resistor R L2 and inductor L2, the gate terminal of M 10 is connected to the drain terminals of transistors M1 and M3, and is connected to the power supply VDD through resistor R L1 and inductor L1; The movable terminal of switch S4 is connected to the source terminals of transistors M3 and M4, the drain terminal of M3 is connected to the gate terminal of M4, and serves as the output V op ' of this circuit module; The drain terminal of M4 is connected to the gate terminal of M3, and serves as the output V on ' of this circuit module; The movable terminal of switch S6 is connected to the source terminals of transistors M 11 and M 12 , the drain terminal of M 11 is connected to the gate terminal of M 12 , the drain terminal of M 12 is connected to the gate terminal of M 11 . During the operation of the circuit, the switching of switches S1-6 is controlled by the control signals output by the control module, so as to flexibly switch the actual working frequency divider circuit. (M7M8, M 15 M 16 work together, together with M5M6, M 13 M 14 (mutually backed up), thus improving the circuit reliability and enhancing the radiation resistance performance and stability of the system.

Images