Power semiconductor module and packaging method thereof
By setting up a submodule with spontaneous and controllable breakdown in the central area of the power semiconductor module, the problem of insufficient transient overvoltage protection in the blocking state is solved, spontaneous protection is achieved, shell and tube rupture is avoided, and circuit complexity and cost are reduced.
Patent Information
- Application Number
- CN202510372568.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-27
- Publication Date
- 2025-07-08
AI Technical Summary
The existing power semiconductor modules have insufficient transient overvoltage protection capabilities in the blocking state, resulting in an increase in the internal air pressure of the package, prone to rupture of the tube and shell, and the existing protection methods increase the circuit complexity and cost.
By setting the submodule with the lowest breakdown voltage, the weakest short-circuit current capability or the weakest shutdown current capability in the central area of the submodule array inside the power semiconductor module, the spontaneous controllable breakdown mechanism is used to protect the device during transient short circuit to avoid shell and tube rupture caused by heat concentration.
Effectively protect the power semiconductor module from relying on external circuits in a transient short-circuit state, realize spontaneous protection, avoid packaging edge area failure, extend service life and reduce costs.
Smart Images
Figure CN120282523A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure belongs to the technical field of power electronics, and particularly relates to a power semiconductor module and a packaging method thereof. Background Art
[0002] Power semiconductor packaging modules are high-power semiconductor devices widely used in power control. Taking the press-pack IGBT module as an example, the common design defects of existing power semiconductor packaging modules are described below.
[0003] The flat press-pack (simply referred to as press-pack) IGBT module adopts a cylindrical structure, and multiple IGBT sub-modules are integrated inside it, arranged in a row-column matrix, and are in close contact with the metal plate electrodes under mechanical pressure, and the external is a ceramic housing. The sub-modules inside the press-pack IGBT module are arranged closely according to a certain rule.
[0004] The working states of an insulated gate bipolar transistor (IGBT) can be divided into four states: turn-on, conduction, turn-off, and blocking, corresponding to the triggering stage, conduction stage, turn-off stage, and cut-off stage respectively. Among them, in the blocking state, as the voltage borne by the IGBT device increases, the leakage current will increase. Due to the physical property differences of each sub-module inside the IGBT module, the leakage current will concentrate on the sub-module with the lowest blocking voltage and form a positive feedback, ultimately leading to the short-circuit failure of this sub-module. In the blocking state, if the short-circuit current concentrates on the edge area of the IGBT module, and it is closer to the housing than the sub-modules in the central area, the heat generated by the short circuit will heat the air in the housing, thereby causing the air pressure inside the package to rise, and the housing will eventually rupture due to the increased stress, as shown in Figure 1 shown.
[0005] In the prior art, the IGBT module protection technology mainly relies on detection circuits and control circuits to achieve protection by controlling the IGBT module. The specific means include increasing the impedance of the protection circuit, controlling the turn-off of the IGBT device, etc. The beneficial effect of this type of technology is that it can control the current flowing through the IGBT device when the current or voltage is too high to prevent the IGBT device from being burned out. However, adding a protection circuit will increase the circuit complexity, which is not conducive to system integration and cost reduction; in addition, the above protection methods mainly target the turn-on and turn-off states of the IGBT device and cannot protect against short-circuit failures caused by transient overvoltage in the blocking state. Therefore, the prior art has limited improvement in the transient overvoltage protection ability of the press-pack IGBT in the blocking state. Summary of the Invention
[0006] To solve the above problems, the present disclosure provides a power semiconductor module with transient failure anti-rupture and a packaging method thereof, which can effectively protect the transient short-circuit state of the power semiconductor module without relying on an external protection circuit.
[0007] In a first aspect, the present disclosure provides a power semiconductor module,
[0008] wherein the power semiconductor module includes an external housing and an internal sub-module array;
[0009] Among all the internal sub-modules, the internal sub-module with the lowest breakdown voltage is arranged in the central region of the internal sub-module array; or,
[0010] Among all the internal sub-modules, the internal sub-module with the weakest short-circuit current capability is arranged in the central region of the internal sub-module array; or,
[0011] Among all the internal sub-modules, the internal sub-module with the weakest turn-off current capability is arranged in the central region of the internal sub-module array; or,
[0012] Among all the internal sub-modules, the internal sub-module with the lowest breakdown voltage, the internal sub-module with the weakest short-circuit current capability, and the internal sub-module with the weakest turn-off current capability are all arranged in the central region of the internal sub-module array.
[0013] Further,
[0014] The central region of the internal sub-module array is far from the external housing.
[0015] Further,
[0016] The internal sub-module arranged in the central region of the internal sub-module array enters a short-circuit state of transient failure earlier than other internal sub-modules in the internal sub-module array.
[0017] Further,
[0018] The power semiconductor module further includes a metal plate electrode;
[0019] The internal sub-module array is in close contact with the metal plate electrode.
[0020] Further,
[0021] The material of the external housing is ceramic.
[0022] Further,
[0023] The power semiconductor module is an IGBT module.
[0024] Further,
[0025] The internal sub-module includes at least one IGBT device.
[0026] In a second aspect, based on the same inventive concept, the present disclosure further provides a packaging method for a power semiconductor module, including:
[0027] Install the internal sub-module with the lowest breakdown voltage, or the weakest short-circuit current capability, or the weakest turn-off current capability among all internal sub-modules in the central region of the internal sub-module array; or, set the internal sub-module with the lowest breakdown voltage, the weakest short-circuit current capability, and the weakest turn-off current capability among all internal sub-modules in the central region of the internal sub-module array;
[0028] Encapsulate the internal sub-module array in a package.
[0029] Furthermore,
[0030] Before encapsulation, test all internal sub-modules to determine the internal sub-module with the lowest breakdown voltage, the weakest short-circuit current capability, or the weakest turn-off current capability.
[0031] Furthermore,
[0032] Before encapsulation, reduce the breakdown voltage of some internal sub-modules through a process, or reduce the surge capability of some internal sub-modules through a process, or reduce the turn-off capability of some internal sub-modules through a process.
[0033] Through the design of the intrinsic structure of the power semiconductor module, when breakdown failure or overcurrent failure occurs under the blocking condition, surge tolerance condition, and overcurrent turn-off condition, the central region of the encapsulated module fails first, protecting the edge region of the package from failure, thereby protecting the package from thermal explosion.
[0034] Compared with the prior art, the present disclosure protects the device through the spontaneous controllable breakdown of the device without relying on external circuit control.
[0035] Other features and advantages of the present disclosure will be described in the following description, and some of them will be obvious from the description, or understood by implementing the present disclosure. The objectives and other advantages of the present disclosure can be achieved and obtained through the structures pointed out in the description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0037] Figure 1 Shows a schematic diagram of the internal physical changes of the power semiconductor module during transient failure;
[0038] Figure 2Shows a schematic structural diagram of an IGBT module according to an embodiment of the present disclosure. Detailed implementation manners
[0039] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure. Apparently, the described embodiments are some but not all of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present disclosure without creative efforts shall fall within the protection scope of the present disclosure.
[0040] As Figure 2 shown, the power semiconductor module of the present disclosure is described by taking the IGBT module as an example. However, it should be noted that the Figure 2 structure shown should not be construed as a limitation to the present disclosure.
[0041] The described IGBT module includes an external housing, a metal plate electrode, and an internal sub-module array.
[0042] Among them, the IGBT module is preferably a flat press-fit IGBT module, and the internal sub-module includes at least one IGBT device. The internal sub-module array is in close contact with the metal plate electrode. The material of the external housing is preferably ceramic.
[0043] Before encapsulation, the breakdown voltage of the internal sub-module is detected, and the internal sub-module with the lowest breakdown voltage is selected and installed / set in the central area of the internal sub-module array, as Figure 2 shown by the red square in
[0044] Another optional implementation means is that before encapsulation, the breakdown voltage of some internal sub-modules is reduced through a certain process, and then these internal sub-modules are installed / set in the central area of the internal sub-module array.
[0045] Among them, the implementation methods for reducing the breakdown voltage of the IGBT sub-module are: (1) reducing the wafer thickness; (2) increasing the anode doping to improve the emission efficiency; (3) a low-doped buffer layer to achieve a controllable punch-through breakdown function. The above means enable that when the applied voltage reaches the designed breakdown voltage, the space charge region boundary just extends to the low-doped buffer layer boundary.
[0046] The working mechanism of the embodiments of the present disclosure is explained as follows:
[0047] Suppose that among several parallel internal sub-modules, the blocking voltage (breakdown voltage) of the IGBT device in a certain internal sub-module is lower (the lowest) than that of the IGBT devices in other internal sub-modules. This means that when an overvoltage occurs in the blocking state, the leakage current of the internal sub-module with the lower blocking voltage will increase faster than that of other internal sub-modules (the carriers increase rapidly), and it is easy to form an "avalanche effect" leading to the breakdown of this internal sub-module.
[0048] When the IGBT device in the internal sub-module has a breakdown short circuit, the device current increases sharply, and a large amount of heat is generated instantaneously. If, according to the foregoing solution of the present disclosure, the internal sub-module with a breakdown short circuit is located in the central region of the internal sub-module array, the heat will be effectively dissipated by the radiator; if the internal sub-module with a breakdown short circuit is close to the package housing, the heat dissipation at the edge of the radiator is not very rapid. As Figure 1 shown, the high temperature of the device will heat the air between the internal sub-module and the package housing, thereby causing the air pressure inside the package to rise rapidly, and finally the package housing will burst due to excessive pressure.
[0049] Therefore, installing the internal sub-module with a lower (the lowest) blocking voltage or breakdown voltage in the central region of the internal sub-module array can effectively prevent the package housing of the IGBT module from cracking during a transient overvoltage short circuit, which affects the service life of the IGBT module.
[0050] Based on the same inventive concept, the module package structure of the present disclosure is also applicable to short-circuit failure protection and turn-off failure protection.
[0051] In an alternative implementation, before encapsulation, test and screen the internal sub-module with the weakest short-circuit current capacity or the weakest turn-off current capacity and install it in the central region of the internal sub-module, so as to achieve protection under surge withstand conditions and over-current turn-off conditions. Or, it is also possible to reduce the surge capacity or turn-off capacity of some IGBT sub-modules through a certain process, and then install these IGBT sub-modules in the central region of the array. Among them,
[0052] The implementation methods for reducing the surge capacity of IGBT sub-modules are: (1) reducing the wafer thickness; (2) increasing the anode doping to improve the emission efficiency; (3) reducing the on-resistance of the IGBT device so that the current is more likely to converge to this module.
[0053] The implementation methods for reducing the turn-off capacity of IGBT sub-modules are: (1) adjusting the doping of the n-drift region to make the avalanche more intense at the same voltage when the IGBT device is turned off; (2) adjusting the amplification factor of the internal PNP transistor structure of the IGBT to make the IGBT device more likely to latch up during turn-off over-current, and the current cannot be reduced, causing secondary triggering and failure.
[0054] In summary, the present disclosure provides a power semiconductor module: the power semiconductor module includes an external housing and an internal sub-module array; among all the internal sub-modules, the internal sub-module with the lowest breakdown voltage or the weakest short-circuit current capability or the weakest turn-off current capability is installed in the central region of the internal sub-module array. Wherein: only one of the internal sub-modules with the lowest breakdown voltage or the weakest short-circuit current capability or the weakest turn-off current capability is provided in the central region of the internal sub-module array; or, all the internal sub-modules with the lowest breakdown voltage or the weakest short-circuit current capability or the weakest turn-off current capability are provided in the central region of the internal sub-module array.
[0055] Based on the same inventive concept, the present disclosure also provides a packaging method for a power semiconductor module: installing the internal sub-module with the lowest breakdown voltage or the weakest short-circuit current capability or the weakest turn-off current capability among all the internal sub-modules in the central region of the internal sub-module array; packaging the internal sub-module array in a housing. Or, a packaging method for a power semiconductor module: setting the internal sub-module with the lowest breakdown voltage, the internal sub-module with the weakest short-circuit current capability, and the internal sub-module with the weakest turn-off current capability among all the internal sub-modules in the central region of the internal sub-module array; packaging the internal sub-module array in a housing.
[0056] By designing the intrinsic structure of the power semiconductor module, when breakdown failure or overcurrent failure occurs under the blocking condition, surge tolerance condition, and overcurrent turn-off condition, the central region of the packaged module fails first, protecting the edge region of the package from failure, thereby protecting the housing from thermal explosion. Compared with the prior art, the present disclosure protects the device through self-controlled breakdown of the device without relying on external circuit control.
[0057] Although the present disclosure has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present disclosure.
Claims
1. A power semiconductor module, characterized in that: The power semiconductor module includes an external housing and an internal sub-module array; Among all the internal sub-modules, the internal sub-module with the lowest breakdown voltage is arranged in the central area of the internal sub-module array; Or, Among all the internal sub-modules, the internal sub-module with the weakest short-circuit current capability is arranged in the central area of the internal sub-module array; Or, Among all the internal sub-modules, the internal sub-module with the weakest turn-off current capability is arranged in the central area of the internal sub-module array; Or, Among all the internal sub-modules, the internal sub-module with the lowest breakdown voltage, the internal sub-module with the weakest short-circuit current capability, and the internal sub-module with the weakest turn-off current capability are all arranged in the central area of the internal sub-module array.
2. The power semiconductor module according to claim 1, characterized in that The central area of the internal sub-module array is far from the external housing.
3. The power semiconductor module according to claim 1 or 2, characterized in that The internal sub-module arranged in the central area of the internal sub-module array enters a short-circuit state of transient failure earlier than other internal sub-modules in the internal sub-module array.
4. The power semiconductor module according to claim 1 or 2, characterized in that The power semiconductor module further includes a metal plate electrode; The internal sub-module array is in close contact with the metal plate electrode.
5. The power semiconductor module according to claim 1 or 2, characterized in that The material of the external housing is ceramic.
6. The power semiconductor module according to claim 1 or 2, characterized in that The power semiconductor module is an IGBT module.
7. The power semiconductor module according to claim 6, characterized in that The internal sub-module includes at least one IGBT device.
8. A packaging method for a power semiconductor module, characterized in that: Among all the internal sub-modules, the internal sub-module with the lowest breakdown voltage or the internal sub-module with the weakest short-circuit current capability or the internal sub-module with the weakest turn-off current capability is arranged in the central area of the internal sub-module array; or, among all the internal sub-modules, the internal sub-module with the lowest breakdown voltage, the internal sub-module with the weakest short-circuit current capability, and the internal sub-module with the weakest turn-off current capability are all arranged in the central area of the internal sub-module array; The internal sub-module array is packaged in a housing.
9. The method according to claim 8, characterized in that Before packaging, all the internal sub-modules are tested to determine the internal sub-module with the lowest breakdown voltage or the weakest short-circuit current capability or the weakest turn-off current capability.
10. The method according to claim 8, characterized in that Before packaging, the breakdown voltage of some internal sub-modules is reduced by a process, or the surge capability of some internal sub-modules is reduced by a process, or the turn-off capability of some internal sub-modules is reduced by a process.