Light-emitting chip epitaxial layer, manufacturing method and light-emitting chip

Abstract

The invention relates to a light-emitting chip epitaxial layer, a manufacturing method and a light-emitting chip. The light-emitting chip epitaxial layer comprises a first semiconductor layer; the active layer is arranged on the first semiconductor layer and comprises a first light-emitting section corresponding to the first light-emitting wavelength, a second light-emitting section corresponding to the second light-emitting wavelength and a wavelength control layer arranged between the first light-emitting section and the second light-emitting section; the wavelength control layer is configured to control the electron hole pair at different sides of the wavelength control layer under different currents, so that the light emitting wavelength of the active layer has a transition of more than 60 nanometers; and the second semiconductor layer is arranged on the active layer. The bicolor light emitting based on the epitaxial layer of the light emitting chip can be realized only by providing different currents, and the manufacturing of a bicolor integrated display product is simpler in some implementation processes.

Description

Technical Field

[0001] The present application relates to the field of LEDs, and particularly to an epitaxial layer of a light-emitting chip, a manufacturing method thereof, and a light-emitting chip. Background Art

[0002] With the development of display technologies, existing LCDs (Liquid Crystal Displays) and OLEDs (Organic Light-Emitting Diodes) are gradually unable to meet higher performance requirements. Display products based on MicroLEDs (Micro Light Emitting Diodes) are expected to be widely used in near-eye display fields such as VR (Virtual Reality) and AR (Augmented Reality). However, the dual-color MicroLED solutions mainly include fabricating MicroLEDs of different colors using materials with different compositions and then setting them on a display panel through a mass transfer method; or performing color conversion on monochromatic MicroLEDs. These dual-color display solutions all require one or more monochromatic MicroLED chips, and the manufacturing process of the display products is complex, and it is impossible to simply implement a dual-color integrated MicroLED chip.

[0003] Therefore, how to simply achieve dual-color integration based on a single epitaxial layer is an urgent problem to be solved. Summary of the Invention

[0004] In view of the deficiencies of the above-mentioned related technologies, the purpose of the present application is to provide an epitaxial layer of a light-emitting chip, a manufacturing method thereof, and a light-emitting chip, aiming to solve the problems that the dual-color display solution requires one or more monochromatic MicroLED chips, and the manufacturing process of the display products is complex, and it is impossible to simply implement a dual-color integrated MicroLED chip.

[0005] An epitaxial layer of a light-emitting chip, comprising:

[0006] A first semiconductor layer;

[0007] An active layer disposed on the first semiconductor layer, the active layer including a first light-emitting segment corresponding to a first emission wavelength, a second light-emitting segment corresponding to a second emission wavelength, and a wavelength control layer disposed between the first light-emitting segment and the second light-emitting segment; the wavelength control layer is configured to control electron-hole pairs on different sides of the wavelength control layer under different currents, so that the emission wavelength of the active layer has a shift of more than 60 nanometers;

[0008] A second semiconductor layer disposed on the active layer;

[0009] Wherein, the first semiconductor layer is an N-type semiconductor layer or a P-type semiconductor layer, and the second semiconductor layer has a different conductivity type from the first semiconductor layer; the first light-emitting segment is close to the N-type semiconductor layer, and the second light-emitting segment is close to the P-type semiconductor layer.

[0010] The above-mentioned light-emitting chip epitaxial layer controls the aggregation position of electron-hole pairs at different currents through a wavelength control layer, so that the light-emitting wavelength of the active layer has a shift of more than 60 nanometers at different currents. Therefore, by simply providing different currents, dual-color light emission based on the light-emitting chip epitaxial layer can be achieved, which makes the production of dual-color integrated display products simpler in some implementation processes. In some implementation processes, the number of transfers required is reduced, which is beneficial to production efficiency and yield; in some implementation processes, the number of settings of the color conversion layer is reduced, simplifying the manufacturing process.

[0011] Optionally, the wavelength control layer includes a two-dimensional potential well structure and an electron blocking layer that cooperates with the two-dimensional potential well structure;

[0012] When the current is lower than the threshold current, electrons are enriched at the two-dimensional potential well structure, and the electron blocking layer hinders the continuous migration of the electrons enriched at the two-dimensional potential well structure to confine the electron-hole pairs to the first light-emitting segment;

[0013] When the current is higher than the threshold current, the two-dimensional potential well structure is broken down by electrons, and the electrons enriched at the two-dimensional potential well structure pass through the electron blocking layer to control the electron-hole pairs in the second light-emitting segment.

[0014] The two-dimensional potential well structure will cause a large number of positive charges to gather here and has a strong electron capture ability, so that electron-hole pairs are enriched here, playing an effect of inducing aggregation and enhancing recombination of electron-hole pairs; combined with the blocking of electron migration by the electron blocking layer, most electrons are confined to the first light-emitting segment. When the current is large, the two-dimensional potential well structure undergoes an avalanche breakdown effect under the bombardment of a large number of electrons, enabling a large number of electrons to cross the electron blocking layer and reach the second light-emitting segment, thereby effectively controlling the light-emitting wavelength of the active layer.

[0015] Optionally, the wavelength control layer includes two of the two-dimensional potential well structures, which are respectively located on both sides of the electron blocking layer.

[0016] Forming two-dimensional potential well structures on both sides of the electron blocking layer will enable the wavelength control layer to have a higher control strength over the aggregation position of electron-hole pairs.

[0017] Optionally, the number of periods of the inner quantum barrier layer and the quantum well layer in the first light-emitting segment ranges from 15 to 20, and the number of periods of the inner quantum barrier layer and the quantum well layer in the second light-emitting segment ranges from 2 to 5.

[0018] Generally, it is designed that a large number of recombinations of electron-hole pairs are realized near the junction of the first light-emitting section and the second light-emitting section. Therefore, the number of periods of the second light-emitting section can be configured to be relatively small, avoiding the reduction of the light-emitting efficiency caused by an overly long active layer.

[0019] Optionally, the epitaxial layer of the light-emitting chip further includes at least one of the following:

[0020] The N-type semiconductor layer further includes an electron deceleration layer, and the electron deceleration layer is configured to reduce the migration rate of electrons;

[0021] The N-type semiconductor layer further includes a stress release layer adjacent to the active layer;

[0022] The P-type semiconductor layer further includes a hole accumulation layer disposed on the active layer.

[0023] Through the deceleration of the electron deceleration layer, the kinetic energy of electrons is greatly reduced. When the electrons with reduced kinetic energy encounter an electron blocking layer with a high barrier energy level, they are more likely to be confined to the first light-emitting section, and electrons are more likely to be enriched in large quantities before the electron blocking layer; structures such as the stress release layer and the hole accumulation layer also ensure the quality of the epitaxial layer of the light-emitting chip during fabrication.

[0024] Based on the same inventive concept, the present application further provides a method for fabricating an epitaxial layer of a light-emitting chip, including:

[0025] Providing a first semiconductor layer on a substrate;

[0026] Providing an active layer on the first semiconductor layer, the active layer including a first light-emitting section corresponding to a first emission wavelength, a second light-emitting section corresponding to a second emission wavelength, and a wavelength control layer disposed between the first light-emitting section and the second light-emitting section; the wavelength control layer is configured to control electron-hole pairs on different sides of the wavelength control layer under different currents, so that the active layer has different emission wavelengths; and

[0027] Providing a second semiconductor layer on the active layer;

[0028] Wherein, the first semiconductor layer is an N-type semiconductor layer or a P-type semiconductor layer, and the second semiconductor layer has a different conductivity type from the first semiconductor layer; the first light-emitting section is close to the N-type semiconductor layer, and the second light-emitting section is close to the P-type semiconductor layer.

[0029] The light-emitting chip epitaxial layer fabricated by the above method for fabricating a light-emitting chip epitaxial layer controls the aggregation position of electron-hole pairs at different currents through a wavelength control layer, enabling the light-emitting wavelength of the active layer to have a shift of more than 60 nanometers at different currents. The light-emitting chip fabricated using this light-emitting chip epitaxial layer can obtain the desired light-emitting color by controlling the current magnitude under its driving voltage. Or, different driving voltages can be directly supplied to different light-emitting chips during driving, so that the light-emitting chips formed from the same light-emitting chip epitaxial layer produce different light-emitting colors. Therefore, the above light-emitting chip epitaxial layer simplifies the fabrication of dual-color integrated display products.

[0030] Based on the same inventive concept, the present application also provides a light-emitting chip, comprising:

[0031] The above-mentioned light-emitting chip epitaxial layer;

[0032] A first electrode connected to the first semiconductor layer; and

[0033] A second electrode connected to the second semiconductor layer.

[0034] The above light-emitting chip adopts the aforementioned light-emitting chip epitaxial layer. Its active layer controls electron-hole pairs on different sides of the wavelength control layer at different currents, enabling the light-emitting wavelength of the active layer to have a shift of more than 60 nanometers, and being able to have different light-emitting wavelengths based on different currents, thus finding good applications in dual-color display products. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a schematic diagram of the basic structure of the light-emitting chip epitaxial layer provided by an embodiment of the present application;

[0036] Figure 2 It is a schematic diagram of the active layer structure of the light-emitting chip epitaxial layer provided by an embodiment of the present application;

[0037] Figure 3 It is a schematic diagram of the energy band structure of the wavelength control layer of the light-emitting chip epitaxial layer provided by an embodiment of the present application;

[0038] Figure 4 It is a schematic diagram of the structure of an electron deceleration layer provided by an embodiment of the present application;

[0039] Figure 5 It is a schematic diagram of the structural characteristics of an electron deceleration layer provided by an embodiment of the present application;

[0040] Figure 6 It is a schematic diagram of the structure of another electron deceleration layer provided by an embodiment of the present application;

[0041] Figure 7Schematic diagram of the structural characteristics of another electron deceleration layer provided by an embodiment of the present application;

[0042] Figure 8 Another schematic diagram of the epitaxial layer of a light-emitting chip provided by an embodiment of the present application;

[0043] Figure 9 A schematic diagram of the structure of a light-emitting chip provided by an embodiment of the present application;

[0044] Figure 10 Schematic flow chart of the manufacturing method of the epitaxial layer of a light-emitting chip provided by an embodiment of the present application;

[0045] Figure 11 Schematic flow chart of setting a wavelength control layer provided by an embodiment of the present application;

[0046] Figure 12 Schematic detailed flow chart of setting a wavelength control layer provided by an embodiment of the present application;

[0047] Figure 13 Schematic diagram of the manufacturing process of an exemplary epitaxial layer of a light-emitting chip provided by an embodiment of the present application;

[0048] Figure 14 Schematic diagram of the structural characteristics of the first light-emitting segment of the active layer provided by an embodiment of the present application;

[0049] Figure 15 Schematic diagram of the structural characteristics of the wavelength control layer provided by an embodiment of the present application;

[0050] Figure 16 Schematic diagram of the structural characteristics of the second light-emitting segment of the active layer provided by an embodiment of the present application;

[0051] Explanation of reference numerals:

[0052] 1 - First semiconductor layer; 11 - Electron deceleration layer; 111 - First GaN sub - layer; 112 - First AlGaN sub - layer; 113 - AlN sub - layer; 114 - Second AlGaN sub - layer; 115 - Second GaN sub - layer; 116 - Low - barrier sub - layer; 117 - High - barrier sub - layer; 12 - Electron accumulation layer; 13 - GaN buffer layer; 14 - N - type doped GaN layer; 15 - Stress - release layer; 2 - Active layer; 21 - First light - emitting segment; 22 - Second light - emitting segment; 201 - Quantum barrier layer; 202 - Quantum well layer; 23 - Wavelength control layer; 231 - First GaN layer; 232 - First AlN layer; 233 - First GaN transition layer; 234 - AlGaN layer; 235 - Second GaN transition layer; 236 - Second AlN layer; 237 - Second GaN layer; 3 - Second semiconductor layer; 31 - Hole accumulation layer; 32 - P - type doped GaN layer; 33 - P - type doped ohmic contact layer; 41 - N - type electrode; 42 - P - type electrode; 5 - Substrate; 2DEG - Two - dimensional potential well structure. Detailed implementation manners

[0053] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0054] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in the description of this application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0055] The dual - color display solutions in the related art need to be based on one or more monochromatic Micro LED chips, and the manufacturing process of the display product is complex, and it is impossible to simply implement a dual - color integrated Micro LED chip. Based on this, the present application hopes to provide a solution that can solve the above - mentioned technical problems, and its detailed content will be elaborated in the subsequent embodiments.

[0056] Based on this, the present application hopes to provide a solution that can solve the above - mentioned technical problems, and its detailed content will be elaborated in the subsequent embodiments.

[0057] Embodiment:

[0058] This embodiment provides a light - emitting chip epitaxial layer. Refer to Figure 1As shown, the epitaxial layer of the light-emitting chip includes a first semiconductor layer 1, an active layer 2, and a second semiconductor layer 3. Among them, the first semiconductor layer 1 is an N-type semiconductor layer or a P-type semiconductor layer, and the second semiconductor layer 3 has a different conductivity type from the first semiconductor layer 1; that is, if the first semiconductor layer 1 is an N-type semiconductor layer, then the second semiconductor layer 3 is a P-type semiconductor layer, and vice versa.

[0059] The material of the epitaxial layer of the light-emitting chip can be selected from, including but not limited to, III / V group semiconductor materials such as Al (aluminum), Ga (gallium), In (indium), P (phosphorus), As (arsenic), or N (nitrogen), etc. It usually can include, for example, GaN (gallium nitride) - based materials, AlGaInP (aluminum gallium indium phosphide) - based materials, GaAs (gallium arsenide) - based materials, and so on. In practical applications, the epitaxial layer of the light-emitting chip can be grown on a substrate 5, and the material of the substrate 5 includes but not limited to Al2O3 (aluminum oxide, that is, sapphire), SiC (silicon carbide), Si (silicon), GaN, and can also be other semiconductor materials; the substrate material with better lattice matching can be selected according to the material of the epitaxial layer of the light-emitting chip.

[0060] In this application, the N-type semiconductor layer and the P-type semiconductor layer only represent the distinction of conductivity types. Specifically, in the epitaxial layer of the light-emitting chip, the N-type semiconductor layer includes an N-type doping source, and the P-type semiconductor layer includes a P-type doping source. For example, Si (silicon) can be used as the N-type doping source for GaN materials, and Mg (magnesium) can be used as the P-type doping source for GaN materials, but it is not limited thereto. The N-type semiconductor layer is used to provide electrons, and the P-type semiconductor layer is used to provide holes. The electrons and holes move to the active region for effective recombination, thereby realizing light emission. When growing the epitaxial layer of the light-emitting chip, the N-type semiconductor layer can be grown first. In some examples, the P-type semiconductor layer can also be grown first, which can be specifically set according to actual needs, and this embodiment does not limit.

[0061] The active layer 2 can be a multi-quantum well active layer or a superlattice active layer. The active layer 2 usually includes a plurality of quantum well layers 202 and a plurality of quantum barrier layers 201 arranged alternately. See Figure 2 , in this embodiment, the active layer 2 includes a first light-emitting segment 21 corresponding to a first emission wavelength, a second light-emitting segment 22 corresponding to a second emission wavelength, and a wavelength control layer 23 disposed between the first light-emitting segment 21 and the second light-emitting segment 22; the wavelength control layer 23 is configured to control electron-hole pairs on different sides of the wavelength control layer 23 under different currents, so that the active layer 2 has different emission wavelengths.

[0062] The first light-emitting segment 21 and the second light-emitting segment 22 respectively include a quantum well layer 202 and a quantum barrier layer 201 of several periods, and there are certain differences in the composition or structure of the two, so that they have different light-emitting wavelengths. The first light-emitting segment 21 and the second light-emitting segment 22 are separated by a wavelength control layer 23. When the electron-hole pair is located in the first light-emitting segment 21, the light-emitting wavelength of the active layer 2 is near the first light-emitting wavelength. When the electron-hole pair is located in the second light-emitting segment 22, the light-emitting wavelength of the active layer 2 is near the second light-emitting wavelength. The first light-emitting wavelength and the second light-emitting wavelength can also be range values. It should be noted that the first light-emitting wavelength and the second light-emitting wavelength are different. The light-emitting wavelength of the active layer 2 refers to its main light-emitting wavelength, that is, its peak wavelength. As an example, in order to make the display effect clearly distinguishable, the first light-emitting wavelength and the second light-emitting wavelength can differ by more than 60 nanometers.

[0063] In some embodiments, under a relatively small current, the wavelength control layer 23 controls the electron-hole pairs to be close to the side of the N-type semiconductor layer, that is, the electron-hole pair concentration of the first light-emitting segment 21 is high, and the electrons and holes are mainly recombined in the first light-emitting segment 21; under a relatively large current, the wavelength control layer 23 controls the electron-hole pairs to be close to the side of the P-type semiconductor layer, that is, the electron-hole pair concentration of the second light-emitting segment 22 is high, and the electrons and holes are mainly recombined in the second light-emitting segment 22. It is understandable that in practical applications, it is difficult for the wavelength control layer 23 to absolutely control all the electron-hole pairs. The control of the electron-hole pairs on different sides of the wavelength control layer 23 referred to in this application is to make most of the electron-hole pairs distributed according to the desired rules. Under different currents, affected by the quantum confined Stark effect, the emission wavelength of the active layer 2 will usually produce a certain degree of blue shift as the current increases, and the emission wavelength will change smoothly with the increase of current; however, the wavelength control layer 23 can affect the distribution of a large number of electron-hole pairs, which will cause the electron-hole pair concentration in the first light-emitting segment 21 to drop sharply and the electron-hole pair concentration in the second light-emitting segment 22 to increase sharply after the current exceeds a certain current threshold, thereby switching the emission wavelength.

[0064] The epitaxial layer of the light-emitting chip of this embodiment has two light-emitting segments corresponding to different light-emitting wavelengths. The wavelength control layer 23 controls the aggregation position of electron-hole pairs under different currents, so that the light-emitting wavelength of the active layer 2 under different currents has a transition of more than 60 nanometers. Therefore, only different currents need to be provided to achieve two-color light emission based on the epitaxial layer of the light-emitting chip, which makes the production of two-color integrated display products simpler in some implementation processes. In some implementation processes, the number of transfers required is reduced, which is beneficial to production efficiency and yield; in some implementation processes, the number of times the color conversion layer is set is reduced to simplify the process.

[0065] In semiconductor materials such as GaN, the migration rate of electrons is usually dozens or even hundreds of times higher than that of holes. Therefore, restricting the position where electrons accumulate can effectively control the accumulation region of electron-hole pairs. However, the present application is not limited to only controlling electrons.

[0066] In some embodiments, the wavelength control layer 23 includes a two-dimensional potential well structure 2DEG and an electron blocking layer cooperating with the two-dimensional potential well structure 2DEG. When the current is lower than the threshold current, electrons are enriched at the two-dimensional potential well structure 2DEG, and the electron blocking layer hinders the continuous migration of the electrons enriched at the two-dimensional potential well structure 2DEG and suppresses spontaneous emission to confine the electron-hole pairs to the first light-emitting section 21. When the current is higher than the threshold current, the two-dimensional potential well structure 2DEG is electron-breakdown, and a large number of electrons cross the electron blocking layer to control the electron-hole pairs in the second light-emitting section 22. It can be understood that in order to hinder the electrons enriched at the two-dimensional potential well structure 2DEG, the two-dimensional potential well structure 2DEG is at least disposed on the side of the electron blocking layer close to the N-type semiconductor layer. The two-dimensional potential well structure 2DEG will cause a large number of positive charges to gather here and has a strong electron capture ability, so that electron-hole pairs are enriched here, playing the role of inducing the aggregation of electron-hole pairs and enhancing recombination. Cooperating with the blocking of electron migration by the electron blocking layer, most electrons are confined in the first light-emitting section 21, so that the emission wavelength of the active layer 2 is the first emission wavelength. When the current is large, the two-dimensional potential well structure 2DEG exhibits an avalanche breakdown effect under the bombardment of a large number of electrons, enabling a large number of electrons to cross the electron blocking layer and reach the second light-emitting section 22, so that the emission wavelength of the active layer 2 is the second emission wavelength.

[0067] In some embodiments, the wavelength control layer 23 includes two two-dimensional potential well structures 2DEG, which are respectively located on both sides of the electron blocking layer. Forming two-dimensional potential well structures 2DEG on both sides of the electron blocking layer will enable the wavelength control layer 23 to have a higher control strength over the aggregation position of electron-hole pairs.

[0068] As an example, the two-dimensional potential well structure 2DEG includes a GaN layer and an AlN (aluminum nitride) layer disposed adjacent to the GaN layer; the electron blocking layer includes AlGaN (aluminum gallium nitride). There is a large difference in the bandgap width between GaN and AlN, and the bandgap width of AlN is much higher than that of GaN. There is a band offset at the bottom of the conduction band between the two, and the band offset at the bottom of the conduction band causes a large number of positive charges to gather at the interface between GaN and AlN, thereby bending the bottom of the conduction band to form a two-dimensional potential well structure 2DEG. The high potential barrier ability of AlGaN can effectively restrict electrons and can cooperate with the two-dimensional potential well structure 2DEG to effectively control the aggregation region of electron-hole pairs.

[0069] In some implementation processes, the wavelength control layer 23 further includes: a GaN transition layer, which is provided between the two-dimensional potential well structure 2DEG and the electron blocking layer as a transition. Refer to Figure 3 , which exemplifies a specific implementation manner of a wavelength control layer 23 and its energy band schematic diagram. Assuming that the left side of the figure is the side close to the N-type semiconductor layer, the wavelength control layer 23 in this example sequentially includes a first GaN layer 231, a first AlN layer 232, a first GaN transition layer 233, an AlGaN layer 234, a second GaN transition layer 235, a second AlN layer 236, and a second GaN layer 237 from left to right in the direction shown in the figure. At the interface between the first GaN layer 231 and the first AlN layer 232, the band offset at the bottom of the conduction band causes a large amount of positive charges to accumulate, generating a two-dimensional potential well structure 2DEG. At the interface between the second AlN layer 236 and the second GaN layer 237, the band offset at the bottom of the conduction band causes a large amount of negative charges to accumulate, also forming a two-dimensional potential well structure 2DEG. The AlGaN layer 234 for blocking electrons is disposed in the middle region of the wavelength control layer 23 and is separated from the two-dimensional potential well structures 2DEG on both sides by the first GaN transition layer 233 and the second GaN transition layer 235. The first GaN transition layer 233 and the second GaN transition layer 235 serve as transitions between the two-dimensional potential well structure 2DEG and the AlGaN layer 234, which can ensure the growth quality. The first GaN transition layer 233 and the second GaN transition layer 235 can be set relatively thin, and their thickness ranges can be configured to be 0.2 nanometers to 1.5 nanometers, such as 0.4 nanometers, 0.6 nanometers, 0.8 nanometers, 1 nanometer, 1.2 nanometers, 1.4 nanometers, etc. The first GaN layer 231 and the second GaN layer 237 serve as transitions between the two-dimensional potential well structure 2DEG and the first light emitting segment 21 and the second light emitting segment 22, and respectively cooperate with the first AlN layer 232 and the second AlN layer 236 to form a two-dimensional potential well structure 2DEG. Their thickness ranges can also be configured to be 0.2 nanometers to 1.5 nanometers, such as 0.4 nanometers, 0.6 nanometers, 0.8 nanometers, 1 nanometer, 1.2 nanometers, 1.4 nanometers, etc. The thickness ranges of the first AlN layer 232 and the second AlN layer 236 can be configured to be 0.7 nanometers to 1.3 nanometers, such as 0.8 nanometers, 0.9 nanometers, 1 nanometer, 1.1 nanometers, 1.2 nanometers. In this example, the thickness range of the AlGaN layer 234 serving as the electron blocking layer can be configured to be 4 nanometers to 9 nanometers, such as 5 nanometers, 6 nanometers, 7 nanometers, 8 nanometers, etc., and the Al component content range can be configured to be 6% to 12%, such as 7%, 8%, 9%, 10%, 11%, etc. The wavelength control layer 23 can be in an undoped state; in some examples, the second GaN transition layer 235 can also be doped with a low concentration of N-type, such as silicon doping; the doping concentration range can be 1E 17 atoms per cubic centimeter to 5E 17 atoms per cubic centimeter, such as 2E 17atoms per cubic centimeter, 3E 17 atoms per cubic centimeter, 4E 17 atoms per cubic centimeter, etc.

[0070] In some embodiments, in order to make the wavelength control layer 23 have a stronger confinement ability for electrons, the N-type semiconductor layer further includes an electron deceleration layer 11, and the electron deceleration layer 11 is configured to reduce the migration rate of electrons. Through the deceleration of the electron deceleration layer 11, when the electrons with reduced kinetic energy encounter the electron blocking layer with a high barrier energy level, they are more easily confined to the first light-emitting segment 21, and a large number of electrons are more easily enriched before the electron blocking layer.

[0071] The structure of the electron deceleration layer 11 can be arbitrary. It can be arranged with materials of high and low potential energies alternately, so that when electrons pass through the electron deceleration layer 11, they repeatedly move from low potential to high potential, reducing their kinetic energy.

[0072] As Figure 4 shown, in some embodiments, the electron deceleration layer 11 includes a first GaN sub-layer 111, a first AlGaN sub-layer 112, an AlN sub-layer 113, a second AlGaN sub-layer 114, and a second GaN sub-layer 115 arranged in sequence; the above-mentioned sub-layers in the electron deceleration layer 11 are cyclically arranged for multiple periods. As Figure 5 (a) shows, between the above-mentioned sub-layers of the electron deceleration layer 11, the potential energy height (schematically shown as the longitudinal height in the figure) increases layer by layer and then decreases layer by layer. The multi-period sub-layers cause the potential energy height to change repeatedly, thereby reducing the kinetic energy of electrons. In order to effectively reduce the migration rate of electrons, the setting period of the above-mentioned sub-layers is usually not less than 10. In some embodiments, the setting period of the above-mentioned sub-layers is not more than 15 or 20, for example, it can be set to 12, 14, or can also be set to 16, 18, 20, etc.

[0073] The change trends of the doping concentration and the Al component concentration in the electron deceleration layer 11 of the foregoing example can be respectively as Figure 5 (b) and Figure 5 (c) shown, Figure 5 The longitudinal height of (b) reflects the relative level of its doping concentration, Figure 5 The longitudinal height of (c) reflects the relative level of its Al component concentration.

[0074] In a specific example, the doping concentration range of the first GaN sub-layer 111 is 1E 18 atoms per cubic centimeter to 8E 18 atoms per cubic centimeter, for example 2E 18 atoms per cubic centimeter, 3E 18 atoms per cubic centimeter, 4E 18 atoms per cubic centimeter, 5E18 6E atoms per cubic centimeter 18 7E atoms per cubic centimeter 18 etc.; such as atoms per cubic centimeter; its thickness range can be set to 0.5 nanometers to 2 nanometers, such as 0.8 nanometers, 1 nanometer, 1.2 nanometers, 1.5 nanometers, 1.7 nanometers, etc.

[0075] The doping concentration range of the first AlGaN sub-layer 112 is 1E 17 atoms per cubic centimeter to 8E 17 atoms per cubic centimeter, such as 2E 17 atoms per cubic centimeter, 3E 17 atoms per cubic centimeter, 4E 17 atoms per cubic centimeter, 5E 17 atoms per cubic centimeter, etc.; its thickness range can be set to 0.5 nanometers to 2 nanometers, such as 0.8 nanometers, 1 nanometer, 1.2 nanometers, 1.5 nanometers, 1.7 nanometers, etc.;

[0076] The doping concentration range of the AlN sub-layer 113 is 0 atoms per cubic centimeter to 8E 17 atoms per cubic centimeter, such as 1E 17 atoms per cubic centimeter, 2E 17 atoms per cubic centimeter, 3E 17 atoms per cubic centimeter, 4E 17 atoms per cubic centimeter, 5E 17 atoms per cubic centimeter, 6E 17 atoms per cubic centimeter, 7E 17 atoms per cubic centimeter, etc.; its thickness range can be set to 0.1 nanometers to 1 nanometers, such as 0.3 nanometers, 0.5 nanometers, 0.7 nanometers, 0.9 nanometers, etc.;

[0077] The doping concentration range of the second AlGaN sub-layer 114 is 1E 17 atoms per cubic centimeter to 8E 17 atoms per cubic centimeter, such as 2E 17 atoms per cubic centimeter, 3E 17 atoms per cubic centimeter, 4E 17 atoms per cubic centimeter, 5E 17 atoms per cubic centimeter, etc., and its thickness range can be set to 0.3 nanometers to 1.8 nanometers, such as 0.5 nanometers, 0.8 nanometers, 1 nanometers, 1.2 nanometers, 1.5 nanometers, etc.;

[0078] The doping concentration range of the second GaN sub-layer 115 is 1E 18 atoms per cubic centimeter to 8E 18 atoms per cubic centimeter, such as 2E 18 atoms per cubic centimeter, 3E18 4E atoms per cubic centimeter 18 5E atoms per cubic centimeter 18 6E atoms per cubic centimeter 18 7E atoms per cubic centimeter 18 etc. such as atoms per cubic centimeter, and the thickness range can be set to 0.5 nm to 2 nm, such as 0.8 nm, 1 nm, 1.2 nm, 1.5 nm, 1.7 nm, etc.;

[0079] Among them, the aluminum component content range in the first AlGaN sub-layer 112 and the second AlGaN sub-layer 114 can be configured to be 3% to 20%, such as 5%, 7%, 10%, 13%, 15%, 18%, etc.

[0080] The structures of each period in the electron deceleration layer 11 can be exactly the same. In some implementation processes, there can also be configured to be certain differences between different periods. Within a single sub-layer, the doping concentration can remain unchanged or can have certain variations. For example, in some implementation manners, the doping concentration in a single AlN sub-layer 113 first decreases and then increases along its growth direction; as an example, when growing the AlN sub-layer 113, its doping concentration can gradually decrease from the initial concentration to 0 atoms per cubic centimeter, and then gradually increase from 0 atoms per cubic centimeter to the initial concentration. The range of the initial concentration can be 1E 17 atoms per cubic centimeter to 8E 17 atoms per cubic centimeter. This process of gradual change in doping concentration can be linear or non-linear. By means of the gradual change, the average doping concentration in the AlN sub-layer 113 is lower, which not only ensures its growth quality but also further increases the effect of reducing the electron kinetic energy with lower doping.

[0081] In some other implementation manners, see Figure 6, the electron deceleration layer 11 includes a plurality of periods of low-barrier sub-layers 116 and high-barrier sub-layers 117 stacked alternately. Among them, the high-barrier sub-layer 117 closer to the active layer 2 has a higher barrier height. When electrons pass through the electron deceleration layer 11, they repeatedly move from a low electric potential to a high electric potential, and their kinetic energy is reduced, thereby reducing the electron overflow in the active layer 2, making the overlapping region of the wave functions of electron-hole pairs larger, and ensuring the optical efficiency at a larger current. On the other hand, the barrier height of the high-barrier sub-layer 117 gradually increases in the direction closer to the active layer 2, so that when the current passes through the electron deceleration layer 11, it can have a better lateral expansion effect, which further ensures the optical efficiency and enables the active layer 2 to emit light normally under a stronger quantum-confined Stark effect. It should be noted that the low-barrier sub-layer 116 and the high-barrier sub-layer 117 in this application are only distinguished based on the relative height of the barriers, and no specific numerical limit is imposed on their barriers. The barrier of the low-barrier sub-layer 116 is lower than that of the high-barrier sub-layer 117.

[0082] In some embodiments, the high-barrier sub-layer 117 in the electron deceleration layer 11 can adopt a material containing Al, and by controlling the Al component content therein, the barrier height can be controlled. In order to make the barrier of the high-barrier sub-layer 117 closer to the active layer 2 higher, the high-barrier sub-layer 117 closer to the active layer 2 will have a higher Al component content.

[0083] In this embodiment, the low-barrier sub-layer 116 can include GaN, and the high-barrier sub-layer 117 can include AlN or AlGaN. The high-barrier sub-layer 117 closer to the active layer 2 is configured to have a higher Al component content. As Figure 7 (a) shows, in the low-barrier sub-layer 116 and the high-barrier sub-layer 117, the barrier height within a single layer (shown as the longitudinal height in the figure) can remain unchanged. For example, in a single high-barrier sub-layer 117, the Al component content remains unchanged, and different high-barrier sub-layers 117 form different barrier heights. In this embodiment, the Al component content range of the high-barrier sub-layer 117 farthest from the active layer 2 can be configured to be 1% - 7%, such as 2%, 3%, 4%, 5%, 6%, etc.; the Al component content range of the high-barrier sub-layer 117 closest to the active layer 2 can be configured to be 7% - 20%, such as 9%, 11%, 13%, 15%, 17%, 19%, etc. For the high-barrier sub-layer 117, during the process of approaching the active layer 2, its Al component content can increase linearly layer by layer. In some embodiments, it can also be configured to increase non-linearly layer by layer.

[0084] To ensure that the kinetic energy of electrons is sufficiently reduced, the number of periods of the low-barrier sub-layer 116 and the high-barrier sub-layer 117 is set in the range of 5 to 20, such as 7, 9, 10, 13, 15, 17, 19, etc.; in some examples, it can also be configured to exceed 20. With more periods of the low-barrier sub-layer 116 and the high-barrier sub-layer 117, electrons move from a low electric potential to a high electric potential multiple times when passing through the electron deceleration layer 11. Moreover, the positive electrode has an excess of positive charges and lacks negatively charged electrons. When the positive charges neutralize the electrons, it also promotes electron deceleration. At the same time, since the electric field intensity near the positive electrode is greater than that near the negative electrode, the electric force exerted on the electrons near the positive electrode is also greater, which further promotes electron deceleration; thereby increasing the concentration of electron-hole pairs in the active region. It can be seen that setting the above-mentioned electron deceleration layer 11 in the N-type semiconductor layer can well achieve the effect of weakening the kinetic energy of electrons. It can be understood that the electron deceleration layer 11 is not limited to the example structure, and the effect of reducing the kinetic energy of electrons may be different for different structures of the electron deceleration layer 11. In practical applications, its number of layers can be set according to the actual situation.

[0085] The variation trends of the doping concentration and the Al component content in the exemplary electron deceleration layer 11 can be respectively as Figure 7 (b) and Figure 7 (c) shown, Figure 7 (b)'s longitudinal height reflects the relative level of its doping concentration, Figure 7 (c)'s longitudinal height reflects the relative level of its Al component concentration.

[0086] Continuing with the example of the electron deceleration layer 11 in the previous example, the doping concentration range of the low-barrier sub-layer 116 therein is 1E 18 atoms per cubic centimeter to 9E 18 atoms per cubic centimeter, for example, it can be 2E 18 atoms per cubic centimeter, 3E 18 atoms per cubic centimeter, 4E 18 atoms per cubic centimeter, 5E 18 atoms per cubic centimeter, 6E 18 atoms per cubic centimeter, 7E 18 atoms per cubic centimeter, 8E 18 atoms per cubic centimeter, etc.; its thickness range can be set to 0.5 nanometers to 5 nanometers, such as 1 nanometer, 1.5 nanometers, 2 nanometers, 2.5 nanometers, 3 nanometers, 3.5 nanometers, 4 nanometers, 4.5 nanometers, etc.

[0087] The high barrier sub-layer 117 therein may be undoped; its thickness range may be set to 0.2 nanometers to 3 nanometers, such as 0.5 nanometers, 0.8 nanometers, 1.2 nanometers, 1.5 nanometers, 2 nanometers, 2.3 nanometers, 2.8 nanometers, etc. In this embodiment, the total thickness range of the electron deceleration layer 11 may be controlled within 50 nanometers to 150 nanometers, such as 70 nanometers, 90 nanometers, 110 nanometers, 130 nanometers, etc.

[0088] As Figure 8 shown, in some embodiments, the N-type semiconductor layer further includes an electron aggregation layer 12, which is disposed on the side of the electron deceleration layer 11 close to the active layer 2, and the doping concentration of the electron aggregation layer 12 changes alternately from high to low along the growth direction; Exemplarily, referring to Figure 7 (b), the doping concentration of the electron aggregation layer 12 gradually increases from the lower limit to the upper limit, and then decreases from the upper limit to the lower limit, thereby forming an alternating change from high to low. The rate of change of the doping concentration may be linear or non-linear. The electron aggregation layer 12 can converge the electrons whose kinetic energy has been weakened by the electron deceleration layer 11 here, further enhancing the hindering effect on the electrons.

[0089] Exemplarily, the electron aggregation layer 12 may be configured to satisfy at least one of the following conditions:

[0090] The lower limit range of the doping concentration of the electron aggregation layer 12 is 1E 17 atoms per cubic centimeter to 5E 17 atoms per cubic centimeter, such as 2E 17 atoms per cubic centimeter, 3E 17 atoms per cubic centimeter, 4E 17 atoms per cubic centimeter, etc.; the upper limit range of the doping concentration is 6E 17 atoms per cubic centimeter to 9E 17 atoms per cubic centimeter, such as 7E 17 atoms per cubic centimeter, 8E 17 atoms per cubic centimeter, etc. The doping concentration of the electron aggregation layer 12 is configured to be a relatively low doping concentration, and at the same time, it can also cover the rough interface with high doping, which is beneficial to the growth of the active layer 2. The range of the number of doping concentration change cycles of the electron aggregation layer 12 is 20 to 30, such as 22, 24, 26, 28, etc.; the thickness range of the electron aggregation layer 12 is 20 nanometers to 100 nanometers, such as 40 nanometers, 60 nanometers, 80 nanometers, etc.

[0091] In this example, the material of the electron aggregation layer 12 may be GaN, but is not limited thereto.

[0092] It can be understood that the first emission wavelength and the second emission wavelength of the active layer 2 can be arbitrarily set according to requirements, and the set emission wavelengths can be achieved by controlling conditions such as the material composition and process in the first emission segment 21 and the second emission segment 22. In this embodiment, the first emission wavelength is at least 60 nanometers greater than the second emission wavelength. In some examples, the first emission wavelength and the second emission wavelength can be directly designed to have a difference of more than 60 nanometers, that is, there is a difference of more than 60 nanometers under the same driving current; in other examples, the blue shift of the quantum-confined Stark effect or other cases of emission wavelength drift can be considered, so that the final emission wavelength range of the active layer 2 can form a maximum difference of 60 nanometers under different set currents.

[0093] In order to achieve better color effects and better light efficiency in practical applications, in this embodiment, the first emission wavelength can be configured to be greater than the second emission wavelength. In some embodiments, under the drive of a relatively large current, electron-hole pairs are controlled in the second emission segment 22. As the current increases, affected by the quantum-confined Stark effect, the emission wavelength of the active layer 2 will also undergo a certain degree of blue shift, that is, the wavelength becomes shorter. In this embodiment, by using a shorter emission wavelength in the second emission segment 22, that is, the first emission wavelength is greater than the second emission wavelength, during the conversion process from a smaller current to a larger current, it is the same as the blue shift law of the quantum-confined Stark effect, and the emission wavelength of the active layer 2 is more likely to change to a shorter wavelength, and the light efficiency is better.

[0094] Exemplarily, the first emission wavelength corresponds to green, and the second emission wavelength corresponds to blue. Taking the quantum well layer 202 of the first emission segment 21 and the second emission segment 22 as an example, both use InGaN materials. The first emission segment 21 can use In x Ga 1-x N, where the value range of x is 0.1 to 0.2, such as 0.12, 0.14, 0.16, 0.18, etc.; as the In content increases, the emission wavelength will be shorter. In the second emission segment 22, In y Ga 1-y N is used, and the value range of y is 0.06 to 0.18, such as 0.08, 0.1, 0.12, 0.14, 0.16, etc. This application is not limited to this. In other examples, the active layer 2 can also use other materials. As another example, the first emission wavelength can correspond to red, and the second emission wavelength corresponds to green or blue.

[0095] In some embodiments, the number of periods of the quantum barrier layer 201 and the quantum well layer 202 in the first light-emitting segment 21 is greater than that in the second light-emitting segment 22. Electrons move in the direction from the first light-emitting segment 21 to the second light-emitting segment 22. In this embodiment, it is generally designed that a large number of recombinations of electron-hole pairs are realized near the junction of the first light-emitting segment 21 and the second light-emitting segment 22. Therefore, the number of periods of the second light-emitting segment 22 can be configured to be relatively small to avoid a decrease in the light-emitting efficiency caused by an overly long active layer 2. The number of periods of the first light-emitting segment 21 can be slightly increased, which can increase the region where the wave functions of electron-hole pairs coincide during some implementation processes, reduce electron overflow, and improve the light efficiency. In some examples, the number of periods of the quantum barrier layer 201 and the quantum well layer 202 in the first light-emitting segment 21 ranges from 15 to 20, such as 16, 17, 18, 19; the number of periods of the quantum barrier layer 201 and the quantum well layer 202 in the second light-emitting segment 22 ranges from 2 to 5, such as 3, 4, as long as the electrons passing through the wavelength control layer 23 can be effectively recombined.

[0096] In some embodiments, the N-type semiconductor layer may further include a stress relief layer 15 adjacent to the active layer 2. The stress relief layer 15 can slow down dislocations and stress before growing subsequent materials, ensuring better growth of the active layer 2. In some other embodiments, the P-type semiconductor layer further includes a hole accumulation layer 31 disposed on the active layer 2. The hole accumulation layer 31 can serve as a relay station for hole migration, ensuring the effective number and distribution of holes in the active region.

[0097] The epitaxial layer of the light-emitting chip in this embodiment can be fabricated into a light-emitting chip. In practical applications, a single epitaxial layer of the light-emitting chip can usually be fabricated into multiple light-emitting chips. Based on the epitaxial layer of the light-emitting chip in this embodiment, MicroLED chips can be fabricated, but not limited thereto. For example, Mini LED (Mini Light Emitting Diode, sub-millimeter light-emitting diode) chips can also be fabricated. It can be understood that for light-emitting chips of different sizes, the specific parameter performance of the epitaxial layer of the light-emitting chip can be adjusted, and this application does not limit this. Each light-emitting chip can be closely arranged in an array during fabrication. The epitaxial layer of the light-emitting chip is divided into multiple regions and corresponds to the light-emitting chips one by one. To simplify the fabrication process of the display product, the interval for fabricating the epitaxial layer of the light-emitting chip into a light-emitting chip can be designed according to the requirements in the display product, and the fabricated light-emitting chips can be transferred and utilized as a whole. The light-emitting chips can be fabricated into a front-mounted or flip-chip structure, or a vertical structure.

[0098] This embodiment also provides a light-emitting chip, which includes the above-mentioned light-emitting chip epitaxial layer, a first electrode, and a second electrode. Among them, the first electrode is connected to the first semiconductor layer 1, and the second electrode is connected to the second semiconductor layer 3. The light-emitting chip in this embodiment can be a Micro LED chip, and in some examples, it can also be a Mini LED chip, etc. Refer to Figure 9 As shown, an example of a vertically structured light-emitting chip is illustrated, which sequentially includes an N-type electrode 41, an N-type semiconductor layer disposed on the N-type electrode 41, an active layer 2, a P-type semiconductor layer disposed on the active layer 2, and a P-type electrode 42 connected to the P-type semiconductor layer. In some examples, the light-emitting chip includes an ohmic contact layer, which can be disposed between the N-type electrode 41 and the N-type semiconductor layer, or between the P-type electrode 42 and the P-type semiconductor layer, or an ohmic contact layer is provided at both locations. The material of the ohmic contact layer includes but is not limited to transparent conductive materials such as ITO (indium tin oxide). For the light-emitting chip in this embodiment, by designing the ohmic contact resistance of the ohmic contact layer, it can have a predetermined current under a predetermined driving voltage, thereby achieving a predetermined emission wavelength; for each light-emitting chip formed by the light-emitting chip epitaxial layer, different ohmic contact resistances can be formed, so that the light-emitting chips fabricated from the same light-emitting chip epitaxial layer can directly achieve two different emission wavelengths under the same driving voltage. In practical applications, the light-emitting chip can be fabricated separately and then transferred to the circuit board, or the light-emitting chip epitaxial layer of this application can be directly transferred to the circuit board, and the light-emitting chip can be directly fabricated on the circuit board. This application does not limit this.

[0099] Refer to Figure 10 As shown, this embodiment also provides a method for fabricating a light-emitting chip epitaxial layer, and its steps include but are not limited to:

[0100] S101. Set a first semiconductor layer on the substrate;

[0101] S102. Set an active layer on the first semiconductor layer. The active layer includes a first light-emitting segment corresponding to a first emission wavelength, a second light-emitting segment corresponding to a second emission wavelength, and a wavelength control layer disposed between the first light-emitting segment and the second light-emitting segment;

[0102] The wavelength control layer 23 is configured to control electron-hole pairs on different sides of the wavelength control layer 23 under different currents, so that the active layer 2 has different emission wavelengths;

[0103] S103. Set a second semiconductor layer on the active layer;

[0104] The light-emitting chip epitaxial layer fabricated by the above method for fabricating a light-emitting chip epitaxial layer may be the light-emitting chip epitaxial layer described above in this embodiment. The first semiconductor layer 1 is an N-type semiconductor layer or a P-type semiconductor layer, and the second semiconductor layer 3 has a different conductivity type from the first semiconductor layer 1; the first light-emitting segment 21 is close to the N-type semiconductor layer, and the second light-emitting segment 22 is close to the P-type semiconductor layer. In some examples, the N-type semiconductor layer may be grown first, that is, the first semiconductor layer 1 is an N-type semiconductor layer. In other examples, the P-type semiconductor layer may also be grown first, and then the first semiconductor layer 1 is a P-type semiconductor layer.

[0105] The light-emitting chip epitaxial layer fabricated by the above method for fabricating a light-emitting chip epitaxial layer controls the aggregation position of electron-hole pairs at different currents through the wavelength control layer 23, so that the emission wavelength of the active layer 2 has a shift of more than 60 nanometers at different currents. For a light-emitting chip fabricated using this light-emitting chip epitaxial layer, the required emission color can be obtained by controlling the current magnitude under its driving voltage. Or different driving voltages are directly supplied to different light-emitting chips during driving, so that the light-emitting chips formed from the same light-emitting chip epitaxial layer produce different emission colors. Therefore, the above light-emitting chip epitaxial layer makes the fabrication of dual-color integrated display products simpler.

[0106] In some embodiments, such as Figure 11 , the steps of setting the wavelength control layer 23 include:

[0107] S201. Set a two-dimensional potential well structure;

[0108] S202. Set an electron blocking layer that cooperates with the two-dimensional potential well structure;

[0109] When the current is lower than the threshold current, electrons are enriched at the two-dimensional electron gas (2DEG) of the two-dimensional potential well structure, and the electron blocking layer hinders the continued migration of the electrons enriched at the 2DEG of the two-dimensional potential well structure, so as to confine the electron-hole pairs to the first light-emitting segment 21;

[0110] When the current is higher than the threshold current, the two-dimensional potential well structure 2DEG is broken down by electrons, and the electrons enriched at the 2DEG of the two-dimensional potential well structure pass through the electron blocking layer, so as to control the electron-hole pairs in the second light-emitting segment 22.

[0111] In some embodiments, such as Figure 12 , the steps of setting the wavelength control layer 23 sequentially include:

[0112] S301. Grow a first GaN layer;

[0113] S302. Grow a first AlN layer to cooperate with the first GaN layer to form a two-dimensional potential well structure;

[0114] S303. Grow a first GaN transition layer;

[0115] S304. Grow an AlGaN layer as an electron blocking layer;

[0116] S305. Grow a second GaN transition layer;

[0117] S306. Grow a second AlN layer;

[0118] S307. Grow a second GaN layer to cooperate with the second AlN layer to form a two-dimensional potential well structure;

[0119] Among them, the pressure range when the wavelength control layer 23 is set is 50 mbar to 150 mbar, such as 70 mbar, 90 mbar, 110 mbar, 130 mbar, etc.; the temperature range is 800 °C to 860 °C, such as 820 °C, 840 °C, etc.

[0120] See Figure 13 , this embodiment also provides a specific structure of the light-emitting chip epitaxial layer. The light-emitting chip epitaxial layer in this example realizes blue and green dual-color display. The following is an explanation in combination with its manufacturing process. The manufacturing process of the light-emitting chip epitaxial layer in this example includes but is not limited to:

[0121] S401. See Figure 13 of (a), provide a substrate 5. The material of the light-emitting chip epitaxial layer in this example is mainly GaN, and the substrate 5 can be made of materials such as Al2O3, SiC, Si or GaN.

[0122] S402. See Figure 13 of (b), grow an undoped GaN buffer layer 13 on the substrate 5. The GaN buffer layer 13 is used to relieve stress and defects caused by lattice mismatch. Exemplarily, the thickness range of the GaN buffer layer 13 can be 1.8 μm to 2.3 μm, such as 1.9 μm, 2 μm, 2.1 μm, 2.2 μm, etc.

[0123] S403. See Figure 13 of (c), grow an N-type doped GaN layer 14 on the GaN buffer layer 13. In this example, silicon is used as the N-type doping source for GaN, and its doping concentration range can be 1E 19 to 2.5E 19 , such as 1.3E 19 atoms per cubic centimeter, 1.5E 19 atoms per cubic centimeter, 1.7E 19 atoms per cubic centimeter, 1.9E 19 atoms per cubic centimeter, 2.1E 19 atoms per cubic centimeter, 2.3E 19per cubic centimeter of atoms, etc. The thickness of the N-type doped GaN layer 14 can range from 1 μm to 1.5 μm, such as 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm, etc.

[0124] S404. Refer to Figure 13 (d) of, grow an electron deceleration layer 11 on the N-type doped GaN layer 14. The electron deceleration layer 11 in this example includes alternately stacking multiple periods of low-barrier sub-layers 116 and high-barrier sub-layers 117. The number of set periods ranges from 5 to 20, which strongly weakens the kinetic energy of electrons and enhances the quantum-confined Stark effect of the active layer 2. The total thickness range can be controlled within 50 nm to 150 nm, and controlling its total thickness will not be too high to avoid significantly increasing the total thickness of the epitaxial layer of the light-emitting chip and facilitating the production in the subsequent process.

[0125] The following also exemplifies a specific structure of the electron deceleration layer 11 and its manufacturing process, which includes but is not limited to:

[0126] S501. Grow a low-barrier sub-layer 116, the material of which can be N-type doped GaN. During the growth process, turn off the Al source and turn on the Si source. As in the previous examples of this embodiment, its thickness range can be set to 0.5 nm to 5 nm, and the doping concentration range is 1E 18 atoms per cubic centimeter to 9E 18 atoms per cubic centimeter. When growing a gallium-containing structure such as the low-barrier sub-layer 116, trimethylgallium (TMGa) can be used as the gallium source, but it is not limited to this.

[0127] S502. Grow a high-barrier sub-layer 117, the material of which can be undoped AlN or AlGaN. When the high-barrier sub-layer 117 uses AlN, turn off the Ga source and the Si source and turn on the Al source. When the high-barrier sub-layer 117 uses AlGaN, switch the flow rate of the Ga source to a smaller flow rate, turn off the Si source, and turn on the Al source. Among them, the Al source can use trimethylaluminum (TMAl), but it is not limited to this.

[0128] The above steps S501 to S502 exemplify the manufacturing process of a single period of the low-barrier sub-layer 116 and the high-barrier sub-layer 117. Repeat the above steps 5 to 20 times to complete the production of the electron deceleration layer 11. And during this process, each time the high-barrier sub-layer 117 is grown, the Al component content increases layer by layer. As in the previous examples of this embodiment, it increases from a value in the range of 1% to 7% to a value in the range of 7% to 20%.

[0129] S405. Refer to Figure 13(e), an electron aggregation layer 12 is grown on the electron deceleration layer 11. In this example, the electron aggregation layer 12 is made of GaN material with a relatively low doping concentration. As in the previous examples of this embodiment, its thickness range can be configured to be 20 nanometers to 100 nanometers; the lower limit range of the doping concentration is 1E 17 atoms per cubic centimeter to 5E 17 atoms per cubic centimeter, and the upper limit is 6E 17 atoms per cubic centimeter to 9E 17 atoms per cubic centimeter. During the growth of the electron aggregation layer 12, the Ga source is turned on and its flow rate is maintained constant, the Si source is turned on, and its flow rate repeatedly changes between high and low values between the lower limit and the upper limit of the doping concentration, so as to realize the alternately high and low change of the doping concentration along the growth direction. By setting the electron aggregation layer 12 with a relatively low doping concentration between the stress release layer 15 and the electron deceleration layer 11 with a relatively high N-type doping concentration, while further enhancing the quantum-confined Stark effect, it can also cover the rough interface of the high doping, which is beneficial to ensuring the growth quality of the subsequent structure.

[0130] S406. Refer to Figure 13 (f), a stress release layer 15 is grown on the electron aggregation layer 12. In this example, the stress release layer 15 includes alternately arranged In x Ga 1-x N and GaN. Exemplarily, the value range of x is 0.01 to 0.08, such as 0.03, 0.05, 0.07, etc., and the setting period range can be 3 to 9, such as 5, 6, 8, etc. Among them, the thickness range of the In x Ga 1-x N layer can be 0.5 nanometers to 1.5 nanometers, such as 0.7 nanometers, 1 nanometer, 1.3 nanometers, etc.; in some examples, the thickness range of the In x Ga 1-x N layer can also be 0.5 nanometers to 3 nanometers, such as 1.7 nanometers, 2 nanometers, 2.5 nanometers, etc. The thickness range of the GaN layer can be 1.5 nanometers to 4.5 nanometers, such as 2 nanometers, 3 nanometers, 4 nanometers, etc.; in some examples, the thickness range of the GaN layer can also be 1.5 nanometers to 5 nanometers. In this example, the quantum well layer 202 of the active layer 2 will also use InGaN material. The In component content in the stress release layer 15 is lower than the In component content of the quantum well layer 202. By means of the stress release layer 15, the growth stress is relieved, and when the active layer 2 is grown, a higher concentration of In component is more likely to be injected.

[0131] S407. Refer to Figure 13 (g), an active layer 2 is grown on the stress release layer 15.

[0132] In this example, the first light-emitting segment 21 of the active layer 2 corresponds to a green emission wavelength, and the second light-emitting segment 22 corresponds to a blue emission wavelength.

[0133] See Figure 14 , which is a schematic diagram when growing the first light-emitting segment 21. To make the interface between the quantum barrier layer 201 and the quantum well layer 202 clear, a segmented structure can be used for growth in this example. In this example, the quantum barrier layer 201 of the first light-emitting segment 21 includes AlGaN material, and the quantum well layer 202 includes InGaN material; during the temperature switching process between the growth of the quantum barrier layer 201 and the quantum well layer 202, GaN is used for protection to avoid the phenomenon of In precipitation while ensuring the energy band width. Among them, Figure 14 (a) shows the relative height of the potential energy (schematically shown as the longitudinal height in the figure), Figure 14 (b)'s longitudinal height reflects the relative level of its doping concentration.

[0134] As Figure 14 T1 in, when growing the quantum barrier layer 201 of AlGaN material, the Ga source, Al source, and Si source are simultaneously turned on to grow the quantum barrier layer 201 of AlGaN material with a certain doping concentration.

[0135] As Figure 14 T2 in, when the growth of the quantum barrier layer 201 is completed and the temperature changes to the temperature required for growing the quantum well layer 202 of InGaN material, the Al source is turned off, and at the same time, the Si source flow rate is gradually reduced to 0. In this example, the Si source flow rate is completely turned off when the temperature drops to half of the temperature difference between the quantum barrier layer 201 and the quantum well layer 202, that is, a gradient-doped GaN protective layer is grown in the first half with the doping concentration of the quantum barrier layer 201 of AlGaN material gradually decreasing to 0. Exemplarily, the temperature difference between the quantum barrier layer 201 and the quantum well layer 202 ranges from 60 °C to 120 °C, such as 70 °C, 90 °C, 110 °C, etc.; the growth temperature range of the quantum barrier layer 201 can be 760 °C to 840 °C, such as 780 °C, 800 °C, 820 °C, etc.; the growth temperature range of the quantum well layer 202 can be 660 °C to 740 °C, such as 680 °C, 700 °C, 720 °C, etc.

[0136] As Figure 14 T3 in, maintaining the cooling rate unchanged, turning off the Si source, reducing the Ga source flow rate from the flow rate during the growth of the quantum barrier layer 201 to the flow rate required for growing the quantum well layer 202, and continuously reducing the temperature. During this process, the second half of the undoped GaN protective layer is formed.

[0137] As Figure 14For T4, when the temperature is reduced to the temperature required for the growth of the quantum well layer 202 of the InGaN material and reaches stability, the Ga source and the In source are turned on simultaneously to grow the quantum well layer 202 of the InGaN material.

[0138] As Figure 14 For T5, during the process that after the growth of the quantum well layer 202 of the InGaN material is completed and the temperature changes to the process of growing the quantum barrier layer 201 of the AlGaN material, the In source is turned off, and at the same time, the flow rate of the Ga source is gradually changed to the flow rate required for the growth of the quantum barrier layer 201 of the AlGaN material. In this example, the change rate of the flow rate of the Ga source is completed when the temperature rises to half of the temperature difference between the quantum barrier layer 201 and the quantum well layer 202, forming an undoped GaN protection layer with a gradually increasing growth rate in the first half.

[0139] As Figure 14 For T6, maintaining the heating rate, the Si source is turned on, and the flow rate of the Si source gradually increases from 0 to the flow rate required for the growth of the quantum barrier layer 201 of the AlGaN material. The change of the flow rate of the Si source is completed synchronously with the increase of the temperature. During this process, a gradient-doped GaN protection layer with a doping concentration gradually increasing from 0 to the doping concentration of the quantum barrier layer 201 of the AlGaN material is formed.

[0140] The above Figure 14 Processes of T1 to T6 realized the growth of a single period of the quantum barrier layer 201 and the quantum well layer 202 in the first light-emitting segment 21. When the temperature and the flow rate of the Si source in T6 reach the requirements for the growth of the quantum barrier layer 201, the next quantum barrier layer 201 can be continuously grown. Repeat 15 to 20 cycles to complete the production of the complete first light-emitting segment 21. In this example, the tail end of the first light-emitting segment 21 can end with a GaN material.

[0141] Continuing the above example, refer to Figure 15 , which is a schematic diagram when growing the wavelength control layer 23, Figure 15 showing the relative height of the potential energy (schematically shown as the longitudinal height in the figure); taking the wavelength control layer 23 exemplified above Figure 3 as an example, in practical applications, the manufacturing method of the wavelength control layer 23 is not limited to this, and the wavelength control layer 23 can also be of other structures.

[0142] As Figure 15 For T1, after the first light-emitting segment 21, a section of undoped GaN is grown as the first GaN layer 231. When growing this layer, the Ga source is turned on, all other doping sources are turned off, and it is grown in a low-pressure environment with a pressure range of 50 mbar to 150 mbar. Exemplarily, the environmental pressure can be 70 mbar, 90 mbar, 110 mbar, 130 mbar, etc. As Figure 15For T2, then turn on the Al source and turn off the Ga source, and grow the first AlN layer 232 with a certain thickness. As Figure 15 For T3, turn off the Al source and turn on the Ga source, and grow the first GaN transition layer 233. As Figure 15 For T4, turn on the Al source and the Ga source synchronously, and grow the AlGaN layer 234. As Figure 15 For T5, turn off the Al source and keep the Ga source on, and grow the second GaN transition layer 235. As Figure 15 For T6, turn off the Ga source and turn on the Al source, and grow the second AlN layer 236. As Figure 15 For T7, turn off the Al source and turn on the Ga source, and grow the second GaN layer 237.

[0143] During the above processes of T1 to T7, the pressure and temperature can be maintained constant, and the undoped state can be maintained.

[0144] See Figure 16 , which is a schematic diagram when growing the second light-emitting segment 22. In this example, the quantum barrier layer 201 of the second light-emitting segment 22 includes GaN material, and the quantum well layer 202 also uses InGaN material. Figure 16 (a) shows the relative height of the potential energy (schematically shown as the longitudinal height in the figure), Figure 16 (b) The longitudinal height reflects the relative level of its doping concentration.

[0145] As Figure 16 For T1, turn on the Ga source and the Si source, and grow the quantum barrier layer 201 of GaN material with a certain doping concentration.

[0146] As Figure 16 For T2, turn on the Ga source and the In source simultaneously and turn off the Si source, and grow the undoped quantum well layer 202 of InGaN material, where the In component content is different from that of the quantum well layer 202 in the first light-emitting segment 21.

[0147] The above Figure 16 processes of T1 to T2 realize the growth of a single period of the quantum barrier layer 201 and the quantum well layer 202 in the second light-emitting segment 22. Repeat 2 to 5 cycles to complete the fabrication of the entire second light-emitting segment 22. In this example, the tail end of the second light-emitting segment 22 can end with GaN material.

[0148] S408, See Figure 13 (h) of, and grow the hole-accumulating layer 31 on the active layer 2. In this example, the hole-accumulating layer 31 includes GaN material, and the set thickness range can be 35 nanometers to 60 nanometers, such as 40 nanometers, 45 nanometers, 50 nanometers, 55 nanometers, etc.; the hole-accumulating layer 31 is doped with a P-type doping source. In this example, Mg is used as the P-type doping source, and its doping concentration is greater than 1E19 per cubic centimeter of atoms, for example, it can be 2E 19 per cubic centimeter of atoms, 3E 19 per cubic centimeter of atoms, 4E 19 per cubic centimeter of atoms, etc.

[0149] S409. Refer to Figure 13 (i) of, grow another P-type doped GaN layer 32 on the hole accumulation layer 31. In this example, Mg is used as the P-type doping source for GaN, and its doping concentration range can be 1E 19 per cubic centimeter of atoms to 3E 19 per cubic centimeter of atoms. For example, it can be 1.5E 19 per cubic centimeter of atoms, 2E 19 per cubic centimeter of atoms, 2.5E 19 per cubic centimeter of atoms, etc. The thickness range of the P-type doped GaN layer 32 can be 60 nm to 100 nm, for example, 70 nm, 80 nm, 90 nm, etc.

[0150] S410. Refer to Figure 13 (j) of, grow a P-type doped ohmic contact layer 33 on the P-type doped GaN layer 32. Its material includes GaN, and Mg is used as the P-type doping source, and the doping concentration is greater than 1E 20 per cubic centimeter of atoms. For example, it can be 2E 20 per cubic centimeter of atoms, 3E 20 per cubic centimeter of atoms, 4E 20 per cubic centimeter of atoms, etc. A higher doping concentration can achieve better ohmic contact. Its thickness range can be 10 nm to 20 nm, for example, 12 nm, 14 nm, 16 nm, 18 nm, etc.

[0151] As another example, growing the electron deceleration layer 11 on the N-type doped GaN layer 14 in the above step S404 can also include successively growing the first GaN sub-layer 111, the first AlGaN sub-layer 112, the AlN sub-layer 113, the second AlGaN sub-layer 114, and the second GaN sub-layer 115. The range of the number of growth cycles of each sub-layer can be 10 to 20. In this example, the total thickness range of the electron deceleration layer 11 is controlled to be 80 nm to 100 nm, for example, 85 nm, 90 nm, 95 nm, etc. In this example, the electron deceleration layer 11 is configured to have sub-layers with more cycles, which can strongly weaken the kinetic energy of electrons and enhance the quantum-confined Stark effect of the active layer 2. At the same time, when setting multiple cycles in this example, the total thickness is controlled not to be too high to avoid significantly increasing the total thickness of the epitaxial layer of the light-emitting chip and facilitating the production in the subsequent process.

[0152] Another specific structure of the electron deceleration layer 11 and its manufacturing process are also exemplified below, and the process includes but is not limited to:

[0153] S601. Grow the first GaN sublayer 111. The growth temperature range can be 1020 °C to 1100 °C, such as 1050 °C, 1080 °C, etc.; the growth pressure range can be 300 mbar to 600 mbar, such as 400 mbar, 450 mbar, 500 mbar, 550 mbar, etc.; as exemplified in the foregoing examples of this embodiment, the thickness range can be 0.5 nanometers to 2 nanometers, and the doping concentration range is 1E 18 atoms per cubic centimeter to 8E 18 atoms per cubic centimeter. When growing a gallium-containing structure such as the first GaN sublayer 111, trimethylgallium (TMGa) can be used as the gallium source, but it is not limited thereto.

[0154] S602. Grow the first AlGaN sublayer 112. Its growth temperature can remain the same as that of the foregoing first GaN sublayer 111, and the growth pressure is switched to the range of 100 mbar to 400 mbar, such as 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar, etc.; as exemplified in the foregoing examples of this embodiment, the thickness range can be 0.5 nanometers to 2 nanometers, and the doping concentration range is 1E 17 atoms per cubic centimeter to 8E 17 atoms per cubic centimeter, and the Al component content range can be configured to be 3% to 20%. The growth sources of the first AlGaN sublayer 112 can include trimethylgallium (TMGa) and trimethylaluminum (TMAl), but it is not limited thereto.

[0155] S603. Grow the AlN sublayer 113. Its growth temperature can continue to remain unchanged, and the growth pressure is switched to the range of 30 mbar to 100 mbar, such as 40 mbar, 50 mbar, 60 mbar, 70 mbar, 80 mbar, 90 mbar, etc.; as exemplified in the foregoing examples of this embodiment, the thickness range can be 0.1 nanometers to 1 nanometer, and the initial doping concentration range is 1E 17 atoms per cubic centimeter to 8E 17 atoms per cubic centimeter. The growth source of the AlN sublayer 113 can include trimethylaluminum (TMAl), but it is not limited thereto. In this example, during the growth of the AlN sublayer 113, the doping concentration gradually decreases from the initial concentration to 0 atoms per cubic centimeter, and then gradually increases from 0 atoms per cubic centimeter to the initial concentration.

[0156] S604. Grow the second AlGaN sub-layer 114. Its growth temperature can continue to remain unchanged. The growth pressure is switched back to the range of 100 mbar to 400 mbar, such as 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar, etc.; as in the foregoing examples of this embodiment, the thickness can be 0.3 nanometers to 1.8 nanometers, and the doping concentration range is 1E 17 atoms per cubic centimeter to 8E 17 atoms per cubic centimeter, and the Al component content range can be configured to be 3% to 20%. The growth sources of the second AlGaN sub-layer 114 can include trimethylgallium (TMGa) and trimethylaluminum (TMAl), but are not limited thereto.

[0157] S605. Grow the second GaN sub-layer 115. Its growth temperature can continue to remain unchanged; the growth pressure is switched to the range of 300 mbar to 600 mbar, such as 400 mbar, 450 mbar, 500 mbar, 550 mbar, etc.; as in the foregoing examples of this embodiment, the thickness range can be 0.5 nanometers to 2 nanometers, and the doping concentration range is 1E 18 atoms per cubic centimeter to 8E 18 atoms per cubic centimeter. The growth sources of the second GaN sub-layer 115 can include trimethylgallium (TMGa), but are not limited thereto.

[0158] The above steps S601 to S605 illustrate the production of one cycle. By repeating the above steps 10 to 20 times, all cycles are produced.

[0159] The epitaxial layer of the light-emitting chip in the above example reduces the kinetic energy of electrons through the electron deceleration layer 11, and uses the wavelength control layer 23 to gather the electrons with weakened kinetic energy in the first light-emitting segment 21 when the current is small, so that the active layer 2 emits green light; when the current is large, the two-dimensional potential well structure 2DEG in the wavelength control layer 23 undergoes avalanche breakdown, and a large number of electrons migrate to the second light-emitting segment 22, so that the active layer 2 emits blue light; this enables the light-emitting chip to present different light-emitting colors only by being configured with different driving currents, without the need for complex design in the subsequent process, making the production of dual-color integrated display products simpler. Moreover, structures such as the stress release layer 15 and the hole accumulation layer 31 also ensure the quality during the production of the epitaxial layer of the light-emitting chip.

[0160] It should be understood that the application of this application is not limited to the above examples. For those of ordinary skill in the art, improvements or transformations can be made according to the above description, and all such improvements and transformations should fall within the protection scope of the appended claims of this application.

Claims

1. A light-emitting chip epitaxial layer, characterized in that, Comprising: A first semiconductor layer; An active layer disposed on the first semiconductor layer, the active layer including a first light-emitting segment corresponding to a first emission wavelength, a second light-emitting segment corresponding to a second emission wavelength, and a wavelength control layer disposed between the first light-emitting segment and the second light-emitting segment; the wavelength control layer is configured to control electron-hole pairs on different sides of the wavelength control layer under different currents, so that the emission wavelength of the active layer has a transition exceeding 60 nanometers; A second semiconductor layer disposed on the active layer; Wherein, the first semiconductor layer is an N-type semiconductor layer or a P-type semiconductor layer, and the second semiconductor layer has a different conductivity type from the first semiconductor layer; the first light-emitting segment is close to the N-type semiconductor layer, and the second light-emitting segment is close to the P-type semiconductor layer.

2. The epitaxial layer of the light-emitting chip according to claim 1, wherein The wavelength control layer includes a two-dimensional potential well structure and an electron blocking layer cooperating with the two-dimensional potential well structure; When the current is lower than the threshold current, electrons are enriched at the two-dimensional potential well structure, and the electron blocking layer hinders the continued migration of the electrons enriched at the two-dimensional potential well structure to confine the electron-hole pairs to the first light-emitting segment; When the current is higher than the threshold current, the two-dimensional potential well structure is electron-breakdown, and the electrons enriched at the two-dimensional potential well structure pass through the electron blocking layer to control the electron-hole pairs in the second light-emitting segment.

3. The epitaxial layer of the light-emitting chip according to claim 2, wherein, The wavelength control layer includes two of the two-dimensional potential well structures, respectively located on both sides of the electron blocking layer.

4. The epitaxial layer of the light-emitting chip according to claim 2 or 3, characterized in that, The two-dimensional potential well structure includes a GaN layer and an AlN layer disposed adjacent to the GaN layer; the material of the electron blocking layer includes AlGaN.

5. The epitaxial layer of the light-emitting chip according to claim 4, wherein The wavelength control layer further includes: a GaN transition layer disposed between the two-dimensional potential well structure and the electron blocking layer.

6. The epitaxial layer of the light-emitting chip according to claim 1, wherein, The first emission wavelength is greater than the second emission wavelength.

7. The epitaxial layer of the light-emitting chip according to claim 5, wherein The first emission wavelength corresponds to green, and the second emission wavelength corresponds to blue.

8. The epitaxial layer of the light-emitting chip according to claim 1, characterized in that The first light-emitting segment and the second light-emitting segment include a plurality of periods of quantum barrier layers and quantum well layers arranged alternately, and the number of periods of the quantum barrier layers and quantum well layers in the first light-emitting segment is greater than the number of periods of the quantum barrier layers and quantum well layers in the second light-emitting segment.

9. The epitaxial layer of the light-emitting chip according to claim 8, characterized in that The number of periods of the quantum barrier layers and quantum well layers in the first light-emitting segment ranges from 15 to 20, and the number of periods of the quantum barrier layers and quantum well layers in the second light-emitting segment ranges from 2 to 5.

10. The epitaxial layer of the light-emitting chip according to claim 1, wherein The light-emitting chip epitaxial layer further includes at least one of the following: The N-type semiconductor layer further includes an electron deceleration layer, and the electron deceleration layer is configured to reduce the migration rate of electrons; The N-type semiconductor layer further includes a stress release layer adjacent to the active layer; The P-type semiconductor layer further includes a hole aggregation layer disposed on the active layer.

11. A method for fabricating an epitaxial layer of a light-emitting chip, characterized in that, Comprising: Disposing a first semiconductor layer on a substrate; An active layer is disposed on the first semiconductor layer. The active layer includes a first light-emitting segment corresponding to a first emission wavelength, a second light-emitting segment corresponding to a second emission wavelength, and a wavelength control layer disposed between the first light-emitting segment and the second light-emitting segment. The wavelength control layer is configured to control electron-hole pairs on different sides of the wavelength control layer under different currents, so that the active layer has different emission wavelengths. And A second semiconductor layer is disposed on the active layer. Wherein, the first semiconductor layer is an N-type semiconductor layer or a P-type semiconductor layer, and the second semiconductor layer has a different conductivity type from the first semiconductor layer. The first light-emitting segment is close to the N-type semiconductor layer, and the second light-emitting segment is close to the P-type semiconductor layer.

12. The manufacturing method of the light-emitting chip epitaxial layer according to claim 11, characterized in that, The steps of setting the wavelength control layer include: Setting a two-dimensional potential well structure; Setting an electron blocking layer that cooperates with the two-dimensional potential well structure; When the current is lower than the threshold current, electrons are enriched at the two-dimensional potential well structure, and the electron blocking layer hinders the electrons enriched at the two-dimensional potential well structure from continuing to migrate, so as to confine the electron-hole pairs to the first light-emitting segment; When the current is higher than the threshold current, the two-dimensional potential well structure is broken down by electrons, and the electrons enriched at the two-dimensional potential well structure pass through the electron blocking layer, so as to control the electron-hole pairs at the second light-emitting segment.

13. The manufacturing method of the light-emitting chip epitaxial layer according to claim 12, wherein The pressure range during the setting of the wavelength control layer is 50 mbar to 150 mbar, and the temperature range is 800 °C to 860 °C. The steps during the setting of the wavelength control layer sequentially include: Growing a first GaN layer; Growing a first AlN layer to cooperate with the first GaN layer to form the two-dimensional potential well structure; Growing a first GaN transition layer; Growing an AlGaN layer as the electron blocking layer; Growing a second GaN transition layer; Growing a second AlN layer; Growing a first GaN transition layer to cooperate with the second AlN layer to form the two-dimensional potential well structure.

14. A light-emitting chip, characterized in that, Including: The light-emitting chip epitaxial layer according to any one of claims 1-10; A first electrode connected to the first semiconductor layer; And A second electrode connected to the second semiconductor layer.

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