Power semiconductor module and inverter having the same
By introducing auxiliary emitter taps into the power semiconductor module, the problem of asymmetric current distribution in short circuit situations is solved, the stability and reliability of the module are improved, and the production waste rate is reduced.
Patent Information
- Application Number
- CN202380080587.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-11-23
- Filing Date
- 2023-11-21
- Publication Date
- 2025-07-08
AI Technical Summary
There is asymmetric current distribution in the case of short circuit in existing power semiconductor modules, resulting in unstable short circuit behavior of semiconductor switches, especially high short circuit currents may occur at low threshold voltages, affecting the reliability of the module.
The auxiliary emitter tap is introduced in the power semiconductor module, located on the current path of the low-side semiconductor switch, and arranged between the last low-side semiconductor switch and the HV-terminal in the main extension direction of the current path to cancel the parasitic leakage inductance and achieve symmetric current distribution.
By introducing the auxiliary emitter tap, the asymmetric current distribution of the semiconductor switch in the short circuit situation is reduced, the module is robust and the scrap rate in production is reduced.
Smart Images

Figure CN120283305A_ABST
Abstract
Description
Field of the Invention
[0001] The present invention relates to a power semiconductor module, which includes a half-bridge circuit, such as a triple or multiple half-bridge circuit having three or more high-side semiconductor switches and three or more low-side semiconductor switches arranged on a substrate. Such a power semiconductor module can be used, for example, especially as part of an inverter in an electric drive vehicle. In addition, the present invention relates to an inverter having one or more of the above power semiconductor modules, which is used, for example, in an electric drive vehicle. Background Art
[0002] Such a power semiconductor module typically has an auxiliary emitter as a reference point or for measurement purposes not only on the high side but also on the low side. The current flow in the metallized contact surfaces of the substrates on the high side and the low side is different and is related to the respective geometries of the contact terminal surfaces as well as to the arrangement of the semiconductor switches and their contacts. If the installed semiconductor switches have fluctuations in the threshold voltage, this may affect the short-circuit behavior of the semiconductor switches; especially in the case of a relatively low threshold voltage, a relatively high short-circuit current may occur at the relevant semiconductor switch. To avoid this and distribute the load as evenly as possible among the individual semiconductor switches, currently, problematic substrates are sorted out during short-circuit tests. Summary of the Invention
[0003] The object of the present invention is to describe a design for a power semiconductor module, by means of which an as-symmetrical as possible current distribution to the semiconductor switches is achieved in the case of a short circuit.
[0004] This object is solved by the subject matter of the independent patent claims. Embodiments and improvements are the subject matter of the dependent claims.
[0005] According to a first aspect of the present invention, a power semiconductor module is described, which has a half-bridge circuit having a plurality (such as three or six or nine) high-side semiconductor switches and a plurality (such as three or six or nine) low-side semiconductor switches arranged on a substrate. The substrate has electrical contact terminal surfaces on its upper side where the semiconductor switches are arranged, and the electrical contact terminal surfaces are electrically contacted by the electrical contact surfaces of the semiconductor switches (or the semiconductor switches are placed on or electrically contacted with the electrical contact terminal surfaces via their respective upper-side electrical contact surfaces), and the electrical contact terminal surfaces are connected or electrically connected to the external terminals of the power semiconductor module. The power semiconductor module has an HV - connection and an HV + terminal and a plurality (for example, three) phase terminals as external terminals.
[0006] Here, HV -The terminals are arranged close to (and in particular directly) side by side or close to each other, in particular closer to each other than the low-side semiconductor switches.
[0007] The low-side semiconductor switches are arranged along the current path or in the main extension direction of the current path, the current path extending from the emitter terminal of the first low-side semiconductor switch furthest away from the HV - terminal up to the HV - terminal for the supply voltage, wherein the last low-side semiconductor switch is arranged closest to the HV - terminal along the current path or in the main extension direction of the current path, and the first low-side semiconductor switch is arranged furthest away from the HV - terminal. Here, for example in the case of a triple half-bridge module, in the case of three low-side semiconductor switches, the third semiconductor switch is referred to as the last semiconductor switch, while the second low-side semiconductor switch is arranged between the first low-side semiconductor switch and the last (and thus the third in this case) low-side semiconductor switch.
[0008] The power semiconductor module has at least one auxiliary emitter tap for the low side or the low-side semiconductor switches, wherein the auxiliary emitter tap is arranged at the current path and in the main extension direction of the current path between on the one hand the last or third low-side semiconductor switch and on the other hand the HV - terminal.
[0009] The current path is in particular understood as the perpendicular line to the equipotential line on the contact terminal surface of the substrate, on which the low-side semiconductor switches are arranged and are physically and electrically connected to the contact terminal surface, and the contact terminal surface in particular forms the (common) low-side emitter terminal of all low-side semiconductor switches. In the case of a short circuit, the voltage potential between the (common) low-side emitter terminal and the respective gate terminal of the low-side semiconductor switch is decisive. If, for example, an excessively high load current flows through the semiconductor switch due to an electrical short circuit, damage to the corresponding component or semiconductor switch may occur.
[0010] However, in the case of a short circuit or an excessively high load current, the parasitic leakage inductance at each semiconductor switch cancels out the short circuit or the excessively high load current. Compared with the last low-side semiconductor switch closest to the HV - terminal or another low-side semiconductor switch closer to the HV - terminal, the leakage inductance is greater for the first low-side semiconductor switch furthest away from the HV - terminal or another low-side semiconductor switch far away from the HV - terminal. By arranging the auxiliary emitter tap essentially at the same distance from the HV -When the gate terminal of the last low-side semiconductor switch is at the same potential, in practice no leakage inductance occurs for the last low-side semiconductor switch at all.
[0011] However, by arranging the auxiliary emitter tap at the current path between the last low-side semiconductor switch and the HV - terminal, relevant leakage inductance also occurs for the last low-side semiconductor switch, and thus in the case of a short circuit, a current distribution with at least less asymmetry between the individual low-side semiconductor switches is obtained.
[0012] The above-mentioned power semiconductor module has the following advantages, namely that the power semiconductor module is more robust and produces fewer rejects in production. This is achieved solely by laying the auxiliary emitter tap along the current path in the direction of the HV - terminal. For this purpose, no costly redesign of the substrate is required, since the bonding connection for the auxiliary emitter tap can be bonded to the originally large-area emitter contact terminal surface, and thus no own pads are required.
[0013] Especially during the short-circuit test, the auxiliary emitter tap especially serves as a reference point for testing or checking the state of the power semiconductor module or the semiconductor switch. By positioning the auxiliary emitter tap at the low-side current path and, seen in the main direction of the low-side current path, positioned on the one hand closest to the HV - terminal of the last low-side semiconductor switch and on the other hand between the HV - terminal, in the case of an electrical short circuit or an excessive load current, the asymmetric current distribution is changed. In this case, a parasitic leakage inductance that did not exist previously occurs. This (targetedly generated) leakage inductance counteracts the short circuit or the high load current, and thus prevents possible defects of the semiconductor switch during testing, especially during the short-circuit test.
[0014] As has been proven, the rejects in production can be significantly reduced in this way.
[0015] According to one embodiment, the external emitter contact of the low-side or low-side semiconductor switch is arranged in the first edge region of the substrate or the power semiconductor module, and the HV - terminal is arranged in the second edge region of the substrate or the power semiconductor module opposite to the first edge region, where the distance a of the auxiliary emitter tap from the second edge region is at most half of the distance A between the gate contact surface of the last low-side semiconductor switch and the second edge region, preferably, a is at most 0.33*A, preferably a is at most 0.25*A.
[0016] In other words: The external emitter contact of the low-side or low-side semiconductor switch is arranged at the first edge of the substrate or the power semiconductor module in the first edge region, and the HV- The terminals are arranged at the second edge region or the second edge of the substrate or the power semiconductor module that is opposite to and thus relative to the first edge region and the first edge. The distance a between the auxiliary emitter tap and the second edge region or the second edge is at most half of the distance A between the gate contact surface of the last low-side semiconductor switch and the second edge region or the second edge. Preferably, it is applicable that a is at most 0.33*A, and preferably a is at most 0.25*A. Therefore, from the same second edge, the distance between the gate contact surface of the last low-side semiconductor switch closest to the second edge and the second edge is more than twice the distance between the auxiliary emitter tap and the same second edge.
[0017] According to one embodiment, the auxiliary emitter tap is connected to the common emitter terminal of the low-side semiconductor switch by means of a bonding wire.
[0018] In other words: The auxiliary emitter tap is formed, for example, by means of a bonding wire that electrically connects the common, usually large-area formed emitter terminal of the low-side semiconductor switch to the external terminal of the low-side emitter. Therefore, the auxiliary emitter tap forms part of a low-inductance contact of the common emitter terminal of the low side.
[0019] In particular, the semiconductor switches can each have an IGBT (abbreviated in English as "Insulated-Gate Bipolar Transistor"), and the semiconductor switches typically additionally include freewheeling diodes.
[0020] The substrate can in particular be configured as a DCB (abbreviated in English as "Direct Copper Bonded") substrate. The DCB substrate is constructed of ceramics with contact terminal surfaces made of copper and is particularly used for power semiconductor modules due to its good heat dissipation.
[0021] The power semiconductor module can be configured as a triple or multiple half-bridge module and respectively has at least three high-side semiconductor switches and at least three low-side semiconductor switches.
[0022] The power semiconductor module can also have another auxiliary emitter tap for the high-side semiconductor switches, and the other auxiliary emitter tap is arranged at the high-side current path between the high-side semiconductor switch closest to the HV + terminal on one hand and the HV + terminal on the other hand. Here, the high-side semiconductor switches are arranged along the high-side current path in a manner similar to the high-side semiconductor switches, and the high-side current path extends from the emitter terminal of the high-side semiconductor switch farthest from the HV + terminal to the HV - terminal for the supply voltage.
[0023] According to a second aspect of the present invention, an inverter, especially for an electric drive vehicle, is described, which inverter has at least one of the aforementioned power semiconductor modules. The inverter further has a housing, in which the power semiconductor module is arranged. Description of the Drawings
[0024] Embodiments of the present invention will be described below exemplarily with reference to the schematic drawings.
[0025] Figure 1 A power semiconductor module 1 according to an embodiment of the present invention is shown. In this embodiment, the power semiconductor module 1 is configured as a triple bridge module and can be used, for example, as a DC converter in an electric drive vehicle. Detailed Description of the Embodiment
[0026] The power semiconductor module 1 has three high-side semiconductor switches 13, 14, 15 and three low-side semiconductor switches 16, 17, 18. Each semiconductor switch 13, 14, 15, 16, 17, 18 has an IGBT 4 and a freewheeling diode 5 herein. For clarity, most of the terminals of the IGBT 4 and the freewheeling diode 5 are not shown.
[0027] The semiconductor switches 13, 14, 15, 16, 17, 18 include a first semiconductor switch 13 on the high side, a second semiconductor switch 14 on the high side, a third semiconductor switch 15 on the high side, a first semiconductor switch 16 on the low side, a second semiconductor switch 17 on the low side, and a third semiconductor switch 18 on the low side. They are arranged on a substrate 2, which in the shown embodiment is configured as a DCB substrate and has a contact terminal surface made of copper on the upper side of the substrate.
[0028] The high-side semiconductor switches 13 to 15 are arranged on the collector contact terminal surface 6 with their back contacts. The IGBT 4 has an emitter contact surface 7 (not shown in detail) on its upper side, and the emitter contact surface is connected to a common contact terminal surface 8 by a bonding connection shown only schematically. In addition, the IGBT 4 also has a gate contact surface 9 on its upper side, and the gate contact surface is also connected to the gate contact terminal surface 10 of the substrate 2 by a schematically shown bonding connection. The high-side gate contact terminal surfaces 10 are connected to each other by a bonding connection and are connected to a gate contact surface 19, which can be contacted by an external terminal 28.
[0029] The collector contact terminal surface 6 can be contacted by an external terminal 26. The contact terminal surface 8 can be contacted by an external terminal 27 on the high side and an external terminal 29 on the low side. The contact terminal surfaces are at the emitter potential on the high side and the collector potential on the low side.
[0030] The semiconductor switches 16, 17, 18 on the low side similarly have back contacts like the semiconductor switches on the high side, and the semiconductor switches on the low side are arranged on the contact terminal surface 8 by means of the back contacts. The semiconductor switches 16, 17, 18 on the low side have emitter contact surfaces 7 on their upper sides, and the emitter contact surfaces are connected to the common emitter contact terminal surface 11 on the substrate 2 by means of a bonding connection which is only schematically shown. In addition, the semiconductor switches on the low side also have gate contact surfaces 9, and the gate contact surfaces 9 are connected to the gate contact terminal surface 10 by means of a bonding connection. The gate contact terminal surfaces 10 on the low side are also connected to each other by means of a bonding connection, and are also connected to the gate contact surface 19 by means of this bonding connection, and the gate contact surface 19 can be contacted through the external contact 31.
[0031] The power semiconductor module 1 further has external terminals 23 and 24 for the supply voltage (such as that of a vehicle battery), and has external terminal 25 as a phase terminal. In addition, the power semiconductor module 1 may have other external terminals, especially signal terminals, which are not shown here for the sake of clarity.
[0032] The power semiconductor module 1 further has an auxiliary emitter tap 20 on the low side. An auxiliary emitter tap may also be provided on the high side, which is not shown then. The auxiliary emitter tap 20 is formed by means of a bonding wire 22 which contacts the contact terminal surface 12 via a contact pad 21 insulated from the emitter contact terminal surface 11, and the contact terminal surface 12 is connected to the external terminal 30 of the emitter on the low side. Therefore, the auxiliary emitter tap 20 is a low-inductance contact of the emitter contact terminal surface 11 on the low side.
[0033] In the case of the power semiconductor module 1, an auxiliary emitter tap is also provided on the high side, which is not shown for the sake of clarity.
[0034] The semiconductor switches 16, 17, 18 on the low side are arranged along the current path indicated by the dashed line 32, where the current path extends from the emitter terminal 33 of the first semiconductor switch 16 to the HV - external terminal 24. Here, the first semiconductor switch 16 on the low side is arranged farthest from the HV - external terminal 24, and the third semiconductor switch 18 is arranged closest to the HV - external terminal 24, and the second semiconductor switch 17 is arranged between the first semiconductor switch 16 and the third semiconductor switch 18. The potential decreases along the current path in the direction of the external terminal 24. In particular, the current path may extend perpendicular to the equipotential lines of the emitter contact terminal surface 11.
[0035] The auxiliary emitter tap 20 is arranged between the third semiconductor switch 18 or its emitter terminal 34 and the external terminal 24. Thus, the auxiliary emitter tap is at a lower potential than the emitter terminal 34 of the third semiconductor switch 18. In the case of a short circuit, this results in the following aspects:
[0036] The current path in the DCB causes a leakage inductance that accumulates along the current path. Due to the long section of the current path between the first low-side semiconductor switch 16 and the HV - terminal 24, the first low-side semiconductor switch 16 "sees" a relatively large leakage inductance, which cancels the short-circuit current, while the leakage inductance is smaller for the second semiconductor switch 17 and even smaller for the third semiconductor switch 18. However, since the auxiliary emitter tap 20 has been moved relatively far along the current path in the direction of the HV - terminal 24, in the case of a short circuit, the (although relatively small) leakage inductance acts on the third semiconductor switch 18, and the current distribution results in less asymmetry compared to the case of hitherto known power semiconductor modules.
[0037] For this purpose, the auxiliary emitter tap 20 has been moved closer to the edge region of the substrate 2, where the HV - terminal is also located. The emitter external contact 30 on the low side is arranged at the first edge region 35 of the power semiconductor module 1, while the HV - terminal 24 is arranged at the second edge region 36 opposite the first edge region 35. The auxiliary emitter tap 20 is also arranged near the second edge region 36, where the distance a between the auxiliary emitter tap 20 and the second edge region 36 is at most half of the distance A between the gate contact surface 9 of the third low-side semiconductor switch 18 and the second edge region 36. Preferably, a is at most 0.33*A, and preferably a is at most 0.25*A.
[0038] List of reference numerals
[0039] 1 Power semiconductor module
[0040] 2 Substrate
[0041] 4 IGBT
[0042] 5 Freewheeling diode
[0043] 6 Collector contact terminal surface (high side)
[0044] 7 Emitter contact surface (high side)
[0045] 8 Contact terminal surface
[0046] 9 Gate contact surface
[0047] 10 Gate contact terminal surface
[0048] 11 Emitter contact terminal surface (low side)
[0049] 12 Contact terminal surface
[0050] 13 First semiconductor switch (high side)
[0051] 14 Second semiconductor switch (high side)
[0052] 15 Third semiconductor switch (high side)
[0053] 16 First semiconductor switch (low side)
[0054] 17 Second semiconductor switch (low side)
[0055] 18 Third semiconductor switch (low side)
[0056] 19 Gate contact surface
[0057] 20 Auxiliary emitter tap
[0058] 21 Contact pad
[0059] 22 Bonding wire
[0060] 23 External terminal (supply voltage)
[0061] 24 External terminal (supply voltage)
[0062] 25 External terminal (phase)
[0063] 26 External terminal
[0064] 27 External terminal
[0065] 28 External terminal
[0066] 29 External terminal
[0067] 30 External terminal
[0068] 31 External terminal
[0069] 32 Dashed line, current path
[0070] 33 Emitter terminal
[0071] 34 Emitter terminal
[0072] 35 First edge region
[0073] 36 Second edge region.
Claims
1. A power semiconductor module (1) having a half-bridge circuit, the half-bridge circuit having a plurality of high-side semiconductor switches (13, 14, 15) and a plurality of low-side semiconductor switches (16, 17, 18) arranged on a substrate (2). - Wherein the substrate (2) has contact terminal surfaces (6, 8, 10, 11, 12, 19), the contact terminal surfaces are contacted by contact surfaces (7, 9) of the semiconductor switches (13, 14, 15, 16, 17, 18), and the contact terminal surfaces are connected to external terminals (23, 24, 25) of the power semiconductor module (1). - wherein the power semiconductor module (1) has an HV terminal (24) for the supply voltage and an HV terminal (23) and phase terminals (25) as external terminals - + - wherein the low-side semiconductor switches (16, 17, 18) are arranged along a current path (32) extending from the emitter terminal (33) of the first low-side semiconductor switch (16) up to the HV - terminal (24) for the supply voltage, wherein the last low-side semiconductor switch (18) is arranged closest to the HV - terminal (24) along the current path (32), and the first low-side semiconductor switch (16) is arranged furthest from the HV - terminal (24); - wherein the power semiconductor module (1) has at least one auxiliary emitter tap (20) for the low-side semiconductor switches (16, 17, 18), the auxiliary emitter tap being arranged at the current path (32) between on the one hand the last low-side semiconductor switch (18) and on the other hand the HV - terminal (24).
2. The power semiconductor module (1) according to claim 1, wherein the emitter external contact (30) on the low side is arranged at a first edge region (35) of the substrate (2), and the HV - terminal (24) is arranged at a second edge region (36) of the substrate (2) opposite to the first edge region (35), Wherein the distance a between the auxiliary emitter tap (20) and the second edge region (36) is at most half of the distance A between the gate contact surface (9) of the last low-side semiconductor switch (18) and the second edge region (36).
3. The power semiconductor module (1) according to claim 1 or 2, wherein the auxiliary emitter tap (20) is connected to a common emitter terminal (11) of the low-side semiconductor switches (16, 17, 18) by means of a bonding wire (22).
4. The power semiconductor module (1) according to any one of claims 1 to 3, wherein the semiconductor switches (13, 14, 15, 16, 17, 18) each have an IGBT (4).
5. The power semiconductor module (1) according to any one of claims 1 to 4, wherein the substrate (2) is configured as a DCB substrate.
6. The power semiconductor module (1) according to any one of claims 1 to 5, the power semiconductor module being configured as a triple or multiple half-bridge module and having at least three high-side semiconductor switches (13, 14, 15) and at least three low-side semiconductor switches (16, 17, 18) respectively.
7. An inverter, comprising: - A housing, - At least one power semiconductor module (1) according to any one of the preceding claims, the power semiconductor module (1) being arranged in the housing.