Flat panel detector, detection method and device, electronic equipment and detection system

Abstract

The invention discloses a flat panel detector, a detection method and device, electronic equipment and a detection system.The flat panel detector comprises a plurality of detection units, and each detection unit comprises a photoelectric conversion unit, a first switch unit, a storage capacitor and a second switch unit, the photoelectric conversion unit is used for converting the received preset light from the to-be-detected object into an electric signal; the first switch unit is used for being switched on under the control of a first control signal, so that an electric signal is transmitted to the storage capacitor through the first switch unit and stored; the second switch unit is used for being switched on under the control of a second control signal, so that the reading data line reads the electric signal through the second switch unit; the time periods generated by the first control signal and the second control signal do not overlap. A double-switch structure is arranged on the detector, and the first switch unit and the second switch unit are controlled to be turned on and turned off, so that accurate control on signal acquisition is realized, and the flexibility and efficiency of data processing are improved.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular, to a flat panel detector, a detection method and device, an electronic device, and a detection system. Background Art

[0002] Currently, detectors are mainly used in security inspections, medical applications, and industrial flaw detection. In addition to conducting standard appearance design inspections, traditional detection methods also measure the heat insulation performance of the object to be tested after encapsulation to identify and reject products that do not meet the standards. However, this approach often leads to losses of materials such as core materials, barrier films, and getters. For example, in the production process, if immediate detection cannot be implemented, unnecessary losses of materials may occur. Therefore, the application of existing detectors mainly relies on heat insulation coefficient detection, which has certain limitations. Summary of the Invention

[0003] The main objective of the present invention is to provide a flat panel detector, a detection method and device, an electronic device, and a detection system. By providing a dual-switch structure on the detector and controlling the opening and closing of the first switch unit and the second switch unit, precise control of signal acquisition is achieved, and the flexibility and efficiency of data processing are improved.

[0004] To achieve the above objective, the embodiments of the present application provide the following technical solutions:

[0005] According to a first aspect of the embodiments of the present application, there is provided a flat panel detector, including a plurality of detection units. The detection unit includes: a photoelectric conversion unit, a first switch unit, a storage capacitor, and a second switch unit. A first end of the photoelectric conversion unit is coupled to a first power line, a second end of the photoelectric conversion unit is coupled to a first end of the first switch unit, a control end of the first switch unit is coupled to a first control signal, a second end of the first switch unit is coupled to a first electrode plate of the storage capacitor 5, and a second electrode plate of the storage capacitor 5 is coupled to a reference electrode 6; a first end of the second switch unit 7 is coupled to the first electrode plate of the storage capacitor 5, a control end of the second switch unit 7 is coupled to a second control signal, and a second end of the second switch unit 7 is coupled to a read data line 8;

[0006] The photoelectric conversion unit 3 is configured to convert received preset light from a to-be-detected object into an electrical signal; the first switch unit 4 is configured to conduct under the control of the first control signal, so that the electrical signal is transmitted to the storage capacitor 5 through the first switch unit 4 and stored; the second switch unit 7 is configured to conduct under the control of the second control signal, so that the read data line 8 reads the electrical signal through the second switch unit 7;

[0007] The time periods during which the first control signal and the second control signal are generated do not overlap.

[0008] Optionally, the control terminals of the first switching unit 4 and the control terminals of the second switching unit 7 are both coupled to the scan line 1, and the scan line 1 is configured to provide the first control signal and the second control signal respectively during two different time periods, and the first control signal and the second control signal are different in signal.

[0009] Optionally, the photoelectric conversion unit 3 includes a photodiode.

[0010] Optionally, one of the first switching unit 4 and the second switching unit 7 includes an NMOS transistor, and the other includes a PMOS transistor.

[0011] Optionally, the first switching unit 4 includes an NMOS transistor, the second switching unit 7 includes a PMOS transistor, the first control signal is a high-level signal, and the second control signal is a low-level signal; or, the first switching unit 4 includes a PMOS transistor, the second switching unit 7 includes an NMOS transistor, the first control signal is a low-level signal, and the second control signal is a high-level signal.

[0012] Optionally, the multiple detection units are arranged in an array, and the control terminals of the first switching unit 4 and the second switching unit 7 of the detection units in the same row are both coupled to the same scan line 1, and the second ends of the second switching unit 7 of the detection units in the same column are both coupled to the same read data line 8;

[0013] The multiple scan lines 1 are configured to sequentially provide scan signals, the scan signals include the first control signal and the second control signal in different time periods, and the read data line 8 is used to sequentially read the electrical signals output by multiple detection units in the same column according to the second control signals sequentially provided by the multiple scan lines 1.

[0014] Optionally, it includes a substrate layer, a detection structure layer, and a light conversion layer arranged in a stacked manner in sequence, the detection structure layer includes the multiple detection units, and the light conversion layer is used to convert the detection light from the object to be detected into the preset light.

[0015] Optionally, the detection structure layer includes a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, a second semiconductor layer, a second insulating layer, and a third metal layer sequentially stacked on one side of the substrate layer; the detection structure layer includes a first transistor and a second transistor;

[0016] The first metal layer includes the first gate of the first transistor and the second gate of the second transistor;

[0017] The first semiconductor layer includes the active layer of the first transistor and the first pole of the photodiode;

[0018] The second metal layer includes the first and second poles of the first transistor and the first and second poles of the second transistor. The first pole of the first transistor is coupled to the first pole of the photodiode, and the second pole of the first transistor is coupled to the first pole of the second transistor;

[0019] The second semiconductor layer includes the second pole of the photodiode and the active layer of the second transistor;

[0020] The third metal layer includes the first power line 2, the first electrode plate of the storage capacitor 5, and the read data line 8;

[0021] The second electrode plate of the storage capacitor 5 is located in the first metal layer; alternatively, the detection structure layer further includes a third insulating layer and a fourth metal layer sequentially stacked on a side of the third metal layer away from the substrate layer, and the fourth metal layer includes the second substrate of the storage capacitor 5;

[0022] The photoelectric conversion unit 3 includes the photodiode, the first switch unit 4 includes the first transistor, and the second switch unit 7 includes the second transistor.

[0023] Optionally, the read data line 8 is used to transmit the electrical signal to the data processing chip, so that the data processing chip generates a detection image according to the electrical signal and outputs a detection result according to the detection image.

[0024] According to a second aspect of the embodiments of the present application, a detection method is provided, which is applied to the flat panel detector described in the first aspect. The method includes:

[0025] Providing a first control signal to the control end of the first switch unit, so that the first switch unit is turned on, and the electrical signal generated by the photoelectric conversion unit is transmitted to the storage capacitor through the first switch unit and stored;

[0026] Providing a second control signal to the control end of the second switch unit, so that the second switch unit is turned on, and the read data line reads the electrical signal through the second switch unit.

[0027] Optionally, the multiple detection units are arranged in an array. The control ends of the first switch units and the control ends of the second switch units of the detection units in the same row are both coupled to the same scan line, and the second ends of the second switch units of the detection units in the same column are both coupled to the same read data line. The method further includes:

[0028] A scanning signal is sequentially provided to a plurality of scanning lines. The scanning signal includes the first control signal and the second control signal located in different time periods. The read data line sequentially reads the electrical signals output by a plurality of detection units in the same column according to the second control signal sequentially provided by the plurality of scanning lines.

[0029] According to the third aspect of the embodiments of the present application, a detection device is provided, which is applied to the flat panel detector described in the first aspect, and the detection device is used to implement the method described in the second aspect.

[0030] According to the fourth aspect of the embodiments of the present application, an electronic device is provided, including: a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor runs the computer program, it is configured to implement the method described in the first aspect above.

[0031] According to the fifth aspect of the embodiments of the present application, a detection system is provided, including the flat panel detector described in the first aspect, and further including the detection device described in the third aspect or the electronic device described in the fourth aspect.

[0032] According to the sixth aspect of the embodiments of the present application, a computer-readable storage medium is provided, on which computer-readable instructions are stored. The computer-readable instructions can be executed by a processor to implement the method described in the first aspect above.

[0033] In the technical solution of the embodiments of the present disclosure, in the detection unit of the flat panel detector, a first switch unit is provided between the photoelectric conversion unit and the storage capacitor, and a second switch unit is provided between the storage capacitor and the read data line. The first switch unit is turned on under the control of the first control signal, so that the electrical signal generated by the photoelectric conversion unit can be transmitted to the storage capacitor through the first switch unit and stored; the second switch unit is turned on under the control of the second control signal, so that the read data line reads the electrical signal through the second switch unit, and then the detection result of the object to be detected can be determined according to the electrical signal.

[0034] In the solution of the present disclosure, by setting a first control signal and a second control signal, and the time periods generated by the two control signals do not overlap. Thus, during detection, the first control signal can be provided without providing the second control signal. Further, the first switch unit is turned on, while the second switch unit is in the off state, enabling the electrical signal generated by the photoelectric conversion unit to be transmitted through the first switch unit to the storage capacitor and stored. And when the first control signal is not provided, the first switch unit is turned off, avoiding the dark current or other noises in the photoelectric conversion unit from entering the storage capacitor and causing signal distortion. Moreover, since the time periods of the first control signal and the second control signal do not overlap, the electrical signal can be completely stored in the storage capacitor, improving the stability of the stored electrical signal. During the reading stage, the second control signal is provided without providing the first control signal, which enables the read data line to read a stable electrical signal from the storage capacitor, ensuring the accuracy of detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on the structures shown in these drawings.

[0036] The structures, ratios, sizes, etc. depicted in this specification are only used to cooperate with the content disclosed in the specification for those familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention. Therefore, they do not have technical essence. Any modification of the structure, change of the ratio relationship, or adjustment of the size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope covered by the technical content disclosed in the present invention.

[0037] Figure 1 It is a schematic structural diagram of a flat panel detector provided by an embodiment of the present application;

[0038] Figure 2 It is a detection application flow chart provided by an embodiment of the present application;

[0039] Figure 3 It is a basic structural diagram of a detection substrate provided by an embodiment of the present application;

[0040] Figure 4 It is another basic structural diagram of a detection substrate provided by an embodiment of the present application;

[0041] Figure 5 It is another basic structural diagram of a detection substrate provided by an embodiment of the present application;

[0042] Figure 6Schematic diagram of the detection substrate of the flat panel detector provided by the embodiment of the present application;

[0043] Figure 7 Schematic diagram of the detection stage principle of the detector provided by the embodiment of the present application;

[0044] Figure 8 Schematic diagram of the reading stage principle of the detector provided by the embodiment of the present application;

[0045] Figure 9 Signal cycle diagram of key devices provided by the embodiment of the present application;

[0046] Figure 10 Schematic diagram of the detection stage principle of another detector provided by the embodiment of the present application;

[0047] Figure 11 Schematic diagram of the reading stage principle of another detector provided by the embodiment of the present application;

[0048] Figure 12 Signal cycle diagram of another key device provided by the embodiment of the present application;

[0049] Figure 13 Flowchart of the detection method of the flat panel detector provided by the embodiment of the present application;

[0050] Figure 14 Shows the structural diagram of an electronic device provided by the embodiment of the present application;

[0051] Figure 15 Shows the diagram of a computer-readable storage medium provided by the embodiment of the present application;

[0052] In Figure 1 1 is the scanning line, 2 is the first power supply line, 3 is the photoelectric conversion unit, 4 is the first switch unit, 5 is the storage capacitor, 6 is the reference electrode, 7 is the second switch unit, and 8 is the read data line;

[0053] The realization, functional characteristics and advantages of the object of the present invention will be further described with reference to the embodiments and the accompanying drawings. Detailed implementation manners

[0054] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0055] It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiments of the present invention are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the attached drawings). If the specific posture changes, the directional indications will also change accordingly.

[0056] In addition, in the present invention, descriptions such as "first" and "second" are only for descriptive purposes and should not be construed as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0057] In the present invention, unless otherwise clearly specified and defined, terms such as "connection" and "fixation" should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements or the interaction relationship between two elements, unless otherwise clearly defined. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0058] In addition, the technical solutions between various embodiments of the present invention can be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions conflicts with each other or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present invention.

[0059] The main principle of the flat panel detector is to irradiate the product to be measured with X-rays, use a scintillator to convert the X-ray signal into a visible light, and then a photodiode converts the light signal into an electrical signal, and then processes it into a digital image to complete non-destructive detection. Therefore, its high resolution mainly depends on the minimum unit size and accuracy of each part, which are determined by the design size and processing accuracy. In addition to improving the design and processing resolution, the contrast and noise can also be achieved by optimizing the circuit and structure, improving the fidelity level of low-level signals, and then meeting the requirements of low noise and high contrast.

[0060] Figure 1A flat panel detector provided by an embodiment of the present application is shown, which includes a plurality of detection units. The detection unit includes: a photoelectric conversion unit 3, a first switch unit 4, a storage capacitor 5, and a second switch unit 7. The first end of the photoelectric conversion unit 3 is coupled to a first power line 2, the second end of the photoelectric conversion unit 3 is coupled to the first end of the first switch unit 4, the control end of the first switch unit 4 is coupled to a first control signal, the second end of the first switch unit 4 is coupled to the first electrode plate of the storage capacitor 5, and the second electrode plate of the storage capacitor 5 is coupled to a reference electrode 6; the first end of the second switch unit 7 is coupled to the first electrode plate of the storage capacitor 5, the control end of the second switch unit 7 is coupled to a second control signal, and the second end of the second switch unit 7 is coupled to a read data line 8;

[0061] The photoelectric conversion unit 3 is configured to convert the received preset light from the object to be detected into an electrical signal; the first switch unit 4 is configured to conduct under the control of the first control signal, so that the electrical signal is transmitted to the storage capacitor 5 through the first switch unit 4 and stored; the second switch unit 7 is configured to conduct under the control of the second control signal, so that the read data line 8 reads the electrical signal through the second switch unit 7; the time periods generated by the first control signal and the second control signal do not overlap.

[0062] In the technical solution of the embodiment of the present disclosure, in the detection unit of the flat panel detector, a first switch unit is arranged between the photoelectric conversion unit and the storage capacitor, and a second switch unit is arranged between the storage capacitor and the read data line. The first switch unit conducts under the control of the first control line number, so that the electrical signal generated by the photoelectric conversion unit can be transmitted to the storage capacitor through the first switch unit and stored; the second switch unit conducts under the control of the second control signal, so that the read data line reads the electrical signal through the second switch unit, and then the detection result of the object to be detected can be determined according to the electrical signal.

[0063] In the solution of the present disclosure, by setting the first control signal and the second control signal, and the time periods generated by the two control signals do not overlap. Thus, during detection, the first control signal can be provided without providing the second control signal. Further, the first switch unit is turned on, while the second switch unit is in the off state, enabling the electrical signal generated by the photoelectric conversion unit to be transmitted to the storage capacitor through the first switch unit and stored. And when the first control signal is not provided, the first switch unit is turned off, avoiding the dark current or other noises in the photoelectric conversion unit from entering the storage capacitor and causing signal distortion. Moreover, since the time periods of the first control signal and the second control signal do not overlap, the electrical signal can be completely stored in the storage capacitor, improving the stability of the stored electrical signal. During the reading stage, the second control signal is provided without providing the first control signal, which enables the read data line to read a stable electrical signal from the storage capacitor, ensuring the accuracy of detection.

[0064] In the present disclosure, the first control signal and the second control signal respectively control the conduction of the first switch unit 4 and the second switch unit 7. The non - overlapping of their generated time periods means that at any given time by the user, only one switch unit is conducting, avoiding signal interference and conflict. This enables the flat panel detector to store and read signals at different time points respectively, thus realizing efficient data acquisition and processing.

[0065] In a possible implementation manner, the control ends of the first switch unit 4 and the second switch unit 7 are both coupled to the scan line 1. The scan line 1 is configured to provide the first control signal and the second control signal respectively in two different time periods, and the first control signal and the second control signal are different in signal. In this way, both the first control signal and the second control signal are provided by the scan line, reducing the number of signal lines, facilitating the wiring of the flat panel detector, and reducing costs.

[0066] In other embodiments, two signal lines can be set. One signal line provides the first control signal, and the other signal line provides the second control signal, and the solution of the present disclosure can also be implemented.

[0067] The first control signal is used to control the first switch unit 4 to conduct at an appropriate time, allowing the electrical signal to be transmitted from the photoelectric conversion unit 3 to the storage capacitor 5. The second control signal is used to control the second switch unit 7 to conduct at an appropriate time, allowing the read data line 8 to read the electrical signal stored in the storage capacitor 5. These two signals are different, and they have different levels or characteristics to ensure that the switch units can respond correctly.

[0068] In a possible implementation, the photoelectric conversion unit 3 includes a photodiode. A photodiode is a semiconductor device that can convert light energy into electrical energy. When light irradiates the photodiode, it generates a current, which is an electrical signal and can be processed by subsequent circuits.

[0069] In a possible implementation, one of the first switch unit 4 and the second switch unit 7 includes an NMOS transistor, and the other includes a PMOS transistor.

[0070] In a possible implementation, the first switch unit 4 includes an NMOS transistor, the second switch unit 7 includes a PMOS transistor, the first control signal is a high-level signal, and the second control signal is a low-level signal; or, the first switch unit 4 includes a PMOS transistor, the second switch unit 7 includes an NMOS transistor, the first control signal is a low-level signal, and the second control signal is a high-level signal.

[0071] In the implementation of the flat panel detector, the first switch unit 4 and the second switch unit 7 can respectively adopt NMOS (N-type metal oxide semiconductor) and PMOS (P-type metal oxide semiconductor) transistors. This design utilizes the characteristics of NMOS and PMOS to achieve efficient signal control. The NMOS transistor usually conducts when the gate voltage is higher than the source voltage (VGS > Vt) and is suitable for low-end driving, that is, controlling the conduction between the ground. The PMOS transistor, on the other hand, conducts when the gate voltage is lower than the source voltage (VGS < Vt) and is suitable for high-end driving, that is, controlling the conduction between the power supply.

[0072] In this design, the first control signal is a high-level signal, which is used to control the first switch unit 4 of the NMOS transistor to conduct during the high-level period, allowing the electrical signal to flow to the storage capacitor 5. The second control signal is a low-level signal, which is used to control the second switch unit 7 of the PMOS transistor to conduct during the low-level period, allowing the read data line 8 to read the stored electrical signal. Conversely, if the first switch unit 4 uses a PMOS transistor and the second switch unit 7 uses an NMOS transistor, the first control signal will be a low-level signal and the second control signal will be a high-level signal.

[0073] These NMOS and PMOS transistors can work complementarily, so that the periods of the control signals do not overlap, thus avoiding signal conflicts and interference and ensuring the accurate reading and storage of signals. The flat panel detector can efficiently perform the conversion, storage, and reading of photoelectric signals and is suitable for high-speed imaging and detection applications.

[0074] In a possible implementation, the multiple detection unit arrays are arranged in rows and columns. The control terminals of the first switch units 4 and the control terminals of the second switch units 7 of the detection units in the same row are both coupled to the same scan line 1, and the second ends of the second switch units 7 of the detection units in the same column are all coupled to the same read data line 8;

[0075] The multiple scan lines 1 are configured to sequentially provide scan signals, the scan signals including the first control signal and the second control signal in different time periods, and the read data line 8 is used to sequentially read the electrical signals output by the multiple detection units in the same column according to the second control signals sequentially provided by the multiple scan lines 1.

[0076] Each scan line 1 is coupled to the control terminals of the first switch units 4 and the second switch units 7 of all the detection units in the same row. The scan line can provide a control signal for the detection units of the entire row. The control terminals of the detection units in the same row are coupled to the same scan line. When the scan line 1 provides a control signal, it can simultaneously control the switching states of all the detection units in a row. Each read data line 8 is coupled to the second ends of the second switch units 7 of all the detection units in the same column. The read data line can receive the electrical signals output by all the detection units in the same column. The scan signal is provided by the scan line 1 and includes the first control signal and the second control signal, and these two signals appear in different time periods. The purpose of the scan signal is to sequentially activate the detection units in the row so as to read data according to a specific time sequence. The read data line 8 sequentially reads the electrical signals from the multiple detection units in the same column according to the second control signals sequentially provided by the scan line 1.

[0077] The flat panel detector efficiently reads data in a row and column manner. By controlling the signals on the scan line 1, it can ensure that only the data in one row is read each time, while the read data line 8 is responsible for collecting this data from each column. This can ensure the orderly reading of data, and can reduce noise and interference, improving the imaging quality.

[0078] In a possible implementation, it includes a substrate layer, a detection structure layer, and a light conversion layer that are sequentially stacked. The detection structure layer includes the multiple detection units, and the light conversion layer is used to convert the detection light from the object to be detected into the preset light.

[0079] In a possible implementation, the detection structure layer includes a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, a second semiconductor layer, a second insulating layer and a third metal layer stacked in sequence on one side of the substrate layer; the detection structure layer includes a first transistor and a second transistor; the first metal layer includes a first gate of the first transistor and a second gate of the second transistor; the first semiconductor layer includes an active layer of the first transistor and a first electrode of a photodiode; the second metal layer includes a first electrode and a second electrode of the first transistor and a first electrode and a second electrode of the second transistor, the first electrode of the first transistor is coupled to the first electrode of the photodiode, and the first transistor is connected to the first electrode of the photodiode. The second electrode of the tube is coupled to the first electrode of the second transistor; the second semiconductor layer includes the second electrode of the photodiode and the active layer of the second transistor; the third metal layer includes the first power line 2, the first plate of the storage capacitor 5 and the read data line 8; the second plate of the storage capacitor 5 is located in the first metal layer; or, the detection structure layer also includes a third insulating layer and a fourth metal layer stacked in sequence on the side of the third metal layer away from the substrate layer, and the fourth metal layer includes the second substrate of the storage capacitor 5; the photoelectric conversion unit 3 includes the photodiode, the first switch unit 4 includes the first transistor, and the second switch unit 7 includes the second transistor.

[0080] In a possible implementation, the data read line 8 is used to transmit the electrical signal to a data processing chip, so that the data processing chip generates a detection image according to the electrical signal and outputs a detection result according to the detection image.

[0081] The data reading line 8 transmits the electrical signals output by the detection unit to the data processing chip. These electrical signals are converted by the detection unit and represent relevant information of the object to be detected. The data processing chip analyzes the electrical signals received from the data reading line 8 and reconstructs the detection image. This process may include steps such as signal amplification, filtering, analog-to-digital conversion, and image reconstruction algorithms (such as back-projection algorithms). After the detection images are generated, the data processing chip will further analyze these images to determine the characteristics or status of the object to be detected. Based on these analysis chips, the detection results can be output, which may be in the form of images or quantitative data that has been further processed. The detection results can be used for a variety of purposes, such as quality control, medical diagnosis, scientific research, or other industrial applications. In the field of medical imaging, these results can help doctors diagnose diseases, evaluate treatment effects, or plan surgeries.

[0082] The flat panel detector provided in the embodiment of the present application is described below with reference to the accompanying drawings.

[0083] The VIP board is a new type of energy-saving and highly efficient thermal insulation material. Due to its excellent performance, it is increasingly being applied in industries such as refrigeration appliances, cold chain transportation, and building insulation. Taking the detection of the internal structure of the VIP board as an example, Figure 2 is a typical detection application method of the flat panel detector involved in the present invention. The VIP board to be detected is placed in the box to be detected and sent to the detection platform in sequence through the transmission mechanism. Above the detection platform is the X-ray emitter, and below is the flat panel detector involved in the present invention. The X-rays emitted by the emitter pass through the VIP board on the detection platform, and the flat panel detector receives the transmitted X-ray signal below and converts the X-ray signal into an electrical signal through the scintillator and the optoelectronic circuit. The computer receives this electrical signal, processes it into image data, and gives the quality grade according to the set evaluation criteria. The sorting system then puts the unqualified products into the unqualified box according to the quality grade and standard, and the qualified VIPs are put into the qualified box and continue to flow to the subsequent process.

[0084] The following combines the cross-section attachment Figure 3 to further illustrate the basic structure of the detection substrate. It should be particularly noted that the attached drawing only includes the single detection unit area composed of photodiodes, TFTs, and storage capacitors, etc., not the entire substrate structure, nor other wiring areas such as scan lines and data lines.

[0085] 010 is the base material, which serves as the foundation of the substrate and can be materials such as glass, polyimide film (PI), polyethylene terephthalate film (PET), etc. They provide mechanical support and electrical insulation.

[0086] The first metal layer, which can also be called the gate metal layer for example. 021 and 022 are the gate metal layers, and the gate material is one or several of materials such as metal aluminum, copper, molybdenum, etc., and is used to form the gate of the transistor to control the flow of electrons.

[0087] The first insulating layer, which can also be called the gate insulating layer 030 for example, is used to isolate the gate metal layer from the semiconductor layer below to prevent current leakage. The material is generally silicon nitride hydride (SiNx:H), and the present invention does not limit its material and film-forming method.

[0088] The first semiconductor layer, for example, the first semiconductor layer can be an N-type semiconductor layer and is used to form the electron flow channel. Specifically, it includes the N-type layer 041 of the photodiode and the active layer 042 of the N-TFT (n-type thin film transistor). The material is generally α-Si or p-Si and is doped with N-type (V group elements such as phosphorus), or other N-type semiconductors.

[0089] The second metal layer, which can also be called the source-drain metal layer for example, is used to connect the transistor and the external circuit. Specifically, it includes the source 051 and drain 052 of the N-TFT, and the source 053 and drain 054 of the P-TFT. The material is similar to that of the gate layer and will not be elaborated here.

[0090] The second semiconductor layer, for example, the second semiconductor layer can be a P-type semiconductor layer, which is used to form a flow channel for holes. Specifically, it includes the P-type layer 061 of the photodiode and the active layer 062 of the P-TFT (p-type thin film transistor). The material is generally α-Si or p-Si and is doped with P-type dopants (such as germanium, indium gallium arsenide, etc.), or other P-type semiconductor materials.

[0091] The second insulating layer, for example, can also be called the planarization layer 070. The material can be the same as that of the gate insulating layer. Its purpose is to provide insulation protection and reduce the step difference, facilitating the fabrication of subsequent film layers. It is used to protect the underlying structure and reduce the unevenness between layers, and at the same time form a via structure to connect different layers. Specifically, a via structure needs to be formed on the planarization layer through a patterning process, including via 0701 and via 0702. The former connects the bias signal line and the photodiode, and the latter connects the storage capacitor and the TFT metal line.

[0092] The third metal layer specifically includes a bias signal line 081 and a storage capacitor electrode 082, which are used to transmit signals and store charges.

[0093] The insulating protection layer 090 is used to protect the metal layer. The material and deposition method are similar to those of the gate insulating layer, which will not be elaborated here.

[0094] The common electrode layer is used to store the charges received from the photodiode. It mainly includes the storage capacitor electrode 100 (common electrode), which can be made of a metal material or a transparent metal oxide material according to needs. If an opaque material is used, it is necessary to avoid the area of the photodiode.

[0095] The insulating planarization layer 110 can have the same material as other insulating layers, but the adhesion to the subsequent scintillator material layer needs to be considered and may be adjusted.

[0096] The light conversion layer, for example, can also be called the scintillator layer 120. The function of the scintillator layer is to convert the X-ray signal into a visible light signal. The material is generally one or several of cesium iodide (CsI), gadolinium oxysulfide (GOS), tungstate, and alkali metal halide.

[0097] In a possible implementation, Figure 4 Another basic structure of the detection substrate is shown. The positions of the P-TFT and the N-TFT are swapped, and the signal logic is reversed. When the scan line is at a low potential, the capacitor is charged and data is sampled; when the scan line is at a high potential, the capacitor is discharged and the signal is read.

[0098] In a possible implementation, Figure 5Another basic structure of the detection substrate is shown. The common electrode can also be made in the gate layer, which can save two film-forming and patterning steps, but it is necessary to avoid TFT-related metal lines and pay attention to the design of storage capacitance. For example, 023 is made at the same time as 021 and 022, saving the production process of two layers 100 and 110. The metal routing (frame area) between 052 and 053 needs to be staggered in circuit design to prevent signal interference.

[0099] Figure 6 The detection substrate structure of the flat panel detector is shown, wherein 1 is a scan line, which controls each first switch unit 4 and second switch unit 7 row by row through a timing signal, allowing an electrical signal to be written to a specific detection subunit or read from the subunit. 2 is a bias signal line, which is used to maintain the positive terminal voltage of the photodiode 3. The bias voltage ensures that the photodiode can generate current when receiving a light signal emitted by the scintillator. 3 is a photodiode, which is used to convert a visible light signal emitted by a scintillator (usually used to convert X-rays into visible light) into an electrical signal. 5 is a storage capacitor, and 6 is a common electrode, which is used to temporarily store electrical signals.

[0100] In the detection phase, the electrical signal detected by the photodiode is transmitted to the storage capacitor, which temporarily stores the detected electrical signal. In the reading phase, the electrical signal in the storage capacitor is transmitted to the data line and then transmitted to the data processing chip, which analyzes the electrical signal and finally generates a detection image.

[0101] If 4 is an N-TFT switch, 7 is a P-TFT switch. The N-TFT switch is turned on during the detection phase, so that the electrical signal detected by the photodiode 3 is transmitted to the storage capacitor 5. It is in a closed state at other times to prevent the dark current or other noise signals in the photodiode 3 from entering the storage capacitor and causing signal distortion. The P-TFT switch is turned on during the reading phase, and the electrical signal in the storage capacitor is transmitted to the data line 8, and then further fed into the data processing chip to finally obtain the detection image.

[0102] If 4 is a P-TFT switch, 7 is an N-TFT switch. The P-TFT switch is turned on during the detection phase, so that the electrical signal detected by the photodiode 3 is transmitted to the storage capacitor 5. It is in a closed state at other times to prevent the dark current or other noise signals in the photodiode 3 from entering the storage capacitor and causing signal distortion. The N-TFT switch is turned on during the reading phase, and the electrical signal in the storage capacitor is transmitted to the data line 8, and then further fed into the data processing chip to finally obtain the detection image.

[0103] Whether it is an N-TFT or a P-TFT, it is in the off state when no signal needs to be transmitted to avoid dark current or noise signal interference, thus ensuring the accuracy of the signal and the image quality. The TFT switch is ensured to be turned on or off at the correct time through a timing control signal.

[0104] Figure 7 and Figure 8 shows the detection principle of a detector based on Figure 3 structure. Figure 7 Fig. shows a schematic diagram of the detection stage. In the t1 detection stage, the photodiode receives the visible light signal from the scintillator and converts it into current. At this time, the scan line outputs a high potential, and the source and drain of the N-TFT are conducting (i.e., the N-TFT is turned on), and the charge flows into the storage capacitor to charge the capacitor. At the same time, because the gate is at a high potential, the P-TFT is turned off, and the charge in the capacitor cannot flow out.

[0105] The storage of the capacitor is completed in the detection stage. The sign that the storage capacitor is fully charged is generally that the charging current drops to the threshold value, and it can also be judged by time. Specifically, it needs to be calculated according to the voltage, the resistance of the circuit, and the designed capacitance of the capacitor. Here are some reference values: storage capacitor 5pF, driving voltage 5V, current threshold 10nA, charging time 1us. In actual operation, the detection stage will be longer than the charging time of a single capacitor. The capacitor will be quickly filled and then wait to be read. The leakage current and noise during this period will cause signal distortion. Therefore, the duration set for the detection stage should not be too long, but not too short to avoid incomplete charging and also cause signal distortion.

[0106] The electrical signal converted from the optical signal has been stored. Figure 8 Fig. shows a schematic diagram of the reading stage. In the t2 reading stage, the electrical signal data in each row starts to be read in sequence. Specifically, a low potential is provided to the scan line of the row to be read, the P-TFT is turned on, and the charge in the capacitor flows into the right data line and finally converges into the processing chip. In the reading stage, due to the low potential of the scan line, the N-TFT is turned off, and the dark current of the photodiode and other noise currents cannot flow into the capacitor, thereby protecting the electrical signal in the capacitor from being affected by noise signals.

[0107] Figure 9 is the key device signal cycle diagram corresponding to the two stages of a detector based on Figure 3 structure. In the t1 time period, the scan line signal is at a high potential, and the potential of the storage capacitor gradually increases. In the t2 stage, the scan line signal is at a low potential, and the potential of the storage capacitor gradually decreases, providing the data line signal.

[0108] During the imaging process, X-rays irradiate the scintillator layer, generating visible light signals, which are received by photodiodes and converted into current. At stage t1, the scan line outputs a high potential, enabling the N-TFT to conduct, and the charge flows into the storage capacitor. At stage t2, the scan line outputs a low potential, the P-TFT conducts, and the stored charge is transmitted through the data line to the processing chip for reading. The design of this structure aims to improve the imaging quality, reduce noise, and ensure the accurate transmission of signals.

[0109] Figure 10 and Figure 11 shows the detection principle of a detector based on Figure 4 structure. After the P-TFT and N-TFT are swapped, the signal logic is reversed. When the scan line is at a low potential, the capacitor is charged and data is sampled; when the scan line is at a high potential, the capacitor discharges and the signal is read.

[0110] At the t1 detection stage, the photodiode receives the visible light signal from the scintillator and converts it into current. At this time, the scan line outputs a low potential, and the source and drain of the P-TFT conduct (i.e., the P-TFT is turned on), and the charge flows into the storage capacitor to charge the capacitor. At the same time, because the gate is at a low potential, the N-TFT is turned off, and the charge in the capacitor cannot flow out.

[0111] The electrical signal converted from the optical signal is stored. At the t2 reading stage, the system starts to read the electrical signal data in each row in sequence. Specifically, a high potential is provided to the scan line of the row to be read, the N-TFT is turned on, and the charge in the capacitor flows into the right data line and finally converges into the processing chip. At the reading stage, due to the high potential of the scan line, the P-TFT is turned off, and the dark current of the photodiode and other noise currents cannot flow into the capacitor, thereby protecting the electrical signal in the capacitor from being affected by noise signals.

[0112] Figure 12 is the key device signal cycle diagram corresponding to two stages of a detector based on Figure 4 structure. At the t1 period, the scan line signal provides a low level, and the potential of the storage capacitor gradually increases. At the t2 stage, the scan line signal is at a high level, the potential of the storage capacitor gradually decreases, and the data line signal is provided.

[0113] Based on the same technical concept, the embodiment of the present application also provides a detection method for a flat panel detector, as Figure 13 shown, the method includes:

[0114] Step 1301: Provide a first control signal to the control end of the first switch unit, so that the first switch unit conducts, and the electrical signal generated by the photoelectric conversion unit is transmitted through the first switch unit to the storage capacitor and stored;

[0115] Step 1302: Provide a second control signal to the control terminal of the second switching unit to turn on the second switching unit, and the read data line reads the electrical signal through the second switching unit.

[0116] The detection method may include two stages: a detection stage and a reading stage. In the detection stage, a first control signal is provided to the control terminal of the first switching unit to store the electrical signal; in the reading stage, a second control signal is provided to the control terminal of the second switching unit to read the electrical signal.

[0117] In a possible implementation, the multiple detection units are arranged in an array. The control terminals of the first switching units and the control terminals of the second switching units of the detection units in the same row are both coupled to the same scanning line, and the second ends of the second switching units of the detection units in the same column are both coupled to the same read data line. The method further includes: sequentially providing scanning signals to multiple scanning lines, where the scanning signals include the first control signal and the second control signal at different time periods, and the read data line sequentially reads the electrical signals output by multiple detection units in the same column according to the second control signals sequentially provided by the multiple scanning lines.

[0118] The embodiments of the present application also provide an electronic device corresponding to the method provided in the foregoing embodiments. Please refer to Figure 14 which shows a diagram of an electronic device provided in some embodiments of the present application. The electronic device 140 may include: a processor 1400, a memory 1401, a bus 1402, and a communication interface 1403. The processor 1400, the communication interface 1403, and the memory 1401 are connected through the bus 1402; a computer program that can run on the processor 1400 is stored in the memory 1401, and when the processor 1400 runs the computer program, it executes the method provided in any of the foregoing embodiments of the present application.

[0119] Among them, the memory 1401 may include a high-speed random access memory (RAM: Random Access Memory), and may also include a non-volatile memory, such as at least one disk memory. The communication connection between the system network element and at least one other network element is realized through at least one physical port (which can be wired or wireless), and the Internet, wide area network, local area network, metropolitan area network, etc. can be used.

[0120] The bus 1402 can be an ISA bus, a PCI bus, an EISA bus, or the like. The bus can be divided into an address bus, a data bus, a control bus, and the like. Among them, the memory 1401 is used to store programs. After receiving an execution instruction, the processor 1400 executes the program. Any implementation manner of the method disclosed in any embodiment of the present application can be applied to or implemented by the processor 1400.

[0121] The processor 1400 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit in the hardware of the processor 1400 or by instructions in software form. The above-mentioned processor 1400 can be a general-purpose processor, including a central processing unit (CPU for short), a network processor (NP for short), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute each method, step, and logic block diagram disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as being executed and completed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. This storage medium is located in the memory 1401, and the processor 1400 reads the information in the memory 1401 and combines its hardware to complete the steps of the above method.

[0122] The electronic device provided by the embodiments of the present application and the method provided by the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the method adopted, run, or implemented by it.

[0123] The embodiments of the present application also provide a computer-readable storage medium corresponding to the method provided by the foregoing embodiments. Please refer to Figure 15 which shows that the computer-readable storage medium is an optical disc 1500, on which a computer program (i.e., a program product) is stored. When the computer program is run by a processor, it will execute the method provided by any of the foregoing embodiments.

[0124] It should be noted that examples of the computer-readable storage medium may further include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory, or other optical or magnetic storage media, which will not be elaborated here one by one.

[0125] The computer-readable storage medium provided by the above embodiments of the present application and the method provided by the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented by the application programs stored therein.

[0126] It should be noted that the above embodiments illustrate the present application rather than limit the present application, and those skilled in the art can design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present application can be implemented by means of hardware including several different elements and by means of a suitably programmed computer. In the unit claims listing several devices, several of these devices may be embodied by the same item of hardware. The use of the words first, second, and third, etc. does not denote any order. These words can be interpreted as names.

[0127] The above is only a preferred specific embodiment of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

[0128] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. Any equivalent structural transformations made by using the specification and drawings of the present invention under the concept of the present invention, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A flat panel detector, characterized in that, It includes a plurality of detection units, and each detection unit includes: a photoelectric conversion unit (3), a first switch unit (4), a storage capacitor (5), and a second switch unit (7). The first end of the photoelectric conversion unit (3) is coupled to a first power line (2), the second end of the photoelectric conversion unit (3) is coupled to the first end of the first switch unit (4), the control end of the first switch unit (4) is coupled to a first control signal, the second end of the first switch unit (4) is coupled to the first electrode plate of the storage capacitor (5), and the second electrode plate of the storage capacitor (5) is coupled to a reference electrode (6); the first end of the second switch unit (7) is coupled to the first electrode plate of the storage capacitor (5), the control end of the second switch unit (7) is coupled to a second control signal, and the second end of the second switch unit (7) is coupled to a read data line (8). The photoelectric conversion unit (3) is configured to convert the received preset light from a to-be-detected object into an electrical signal; the first switch unit (4) is configured to be turned on under the control of the first control signal, so that the electrical signal is transmitted to the storage capacitor (5) through the first switch unit (4) and stored; the second switch unit (7) is configured to be turned on under the control of the second control signal, so that the read data line (8) reads the electrical signal through the second switch unit (7). The time periods during which the first control signal and the second control signal are generated do not overlap.

2. The flat panel detector according to claim 1, wherein, The control ends of the first switch unit (4) and the second switch unit (7) are both coupled to a scan line (1), and the scan line (1) is configured to provide the first control signal and the second control signal respectively in two different time periods, and the signals of the first control signal and the second control signal are different.

3. The flat panel detector according to claim 1, wherein, The photoelectric conversion unit (3) includes a photodiode.

4. The flat panel detector according to claim 1, characterized in that One of the first switch unit (4) and the second switch unit (7) includes an NMOS transistor, and the other includes a PMOS transistor.

5. The flat panel detector according to claim 4, characterized in that, The first switch unit (4) includes an NMOS transistor, the second switch unit (7) includes a PMOS transistor, the first control signal is a high-level signal, and the second control signal is a low-level signal; or, the first switch unit (4) includes a PMOS transistor, the second switch unit (7) includes an NMOS transistor, the first control signal is a low-level signal, and the second control signal is a high-level signal.

6. The flat panel detector according to claim 2, wherein The plurality of detection units are arranged in an array. The control ends of the first switch units (4) and the second switch units (7) of the detection units in the same row are both coupled to the same scan line (1), and the second ends of the second switch units (7) of the detection units in the same column are all coupled to the same read data line (8). The plurality of scanning lines (1) are configured to sequentially provide scanning signals, wherein the scanning signals include the first control signal and the second control signal in different time periods, and the read data line (8) is used to sequentially read the electrical signals output by the plurality of detection units in the same column according to the second control signals sequentially provided by the plurality of scanning lines (1).

7. The flat panel detector according to any one of claims 1-6, characterized in that, It comprises a substrate layer, a detection structure layer and a light conversion layer which are stacked in sequence, wherein the detection structure layer comprises the plurality of detection units, and the light conversion layer is used for converting the detection light from the object to be detected into the preset light.

8. The flat panel detector according to claim 7, wherein, The detection structure layer includes a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, a second semiconductor layer, a second insulating layer and a third metal layer stacked in sequence on one side of the substrate layer; the detection structure layer includes a first transistor and a second transistor; The first metal layer includes a first gate of the first transistor and a second gate of the second transistor; The first semiconductor layer includes an active layer of the first transistor and a first electrode of the photodiode; The second metal layer includes a first electrode and a second electrode of the first transistor and a first electrode and a second electrode of the second transistor, the first electrode of the first transistor is coupled to the first electrode of the photodiode, and the second electrode of the first transistor is coupled to the first electrode of the second transistor; The second semiconductor layer includes a second electrode of the photodiode and an active layer of the second transistor; The third metal layer comprises the first power line (2), the first electrode plate of the storage capacitor (5) and the read data line (8); The second electrode plate of the storage capacitor (5) is located on the first metal layer; or the detection structure layer further comprises a third insulating layer and a fourth metal layer stacked in sequence on a side of the third metal layer away from the substrate layer, and the fourth metal layer comprises the second substrate of the storage capacitor (5); The photoelectric conversion unit (3) includes the photodiode, the first switch unit (4) includes the first transistor, and the second switch unit (7) includes the second transistor.

9. The flat panel detector according to claim 1, characterized in that, The read data line (8) is used to transmit the electrical signal to the data processing chip, so that the data processing chip generates a detection image according to the electrical signal and outputs a detection result according to the detection image.

10. A detection method, characterized in that, Applied to the flat panel detector according to any one of claims 1 to 9, the method comprising: Providing a first control signal to the control terminal of the first switch unit, so that the first switch unit is turned on, and the electrical signal generated by the photoelectric conversion unit is transmitted to the storage capacitor through the first switch unit and stored; A second control signal is provided to the control terminal of the second switch unit, so that the second switch unit is turned on, and the read data line reads the electrical signal through the second switch unit.

11. The detection method according to claim 10, wherein The multiple detection unit arrays are arranged in an array, the control ends of the first switching units of the detection units in the same row and the control ends of the second switching units are both coupled to the same scanning line, and the second ends of the second switching units of the detection units in the same column are both coupled to the same read data line. The method further includes: Successively providing scanning signals to a plurality of scanning lines, the scanning signals including the first control signal and the second control signal in different time periods, and the read data line successively reads the electrical signals output by a plurality of detection units in the same column according to the second control signals successively provided by the plurality of scanning lines.

12. A detection device, characterized in that, Applied to the flat panel detector according to any one of claims 1-9, the detection device is used to implement the method according to claim 10 or 11.

13. An electronic device, comprising: A memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor executes the computer program to implement the method according to claim 10 or 11.

14. A detection system, characterized in that, Comprising the flat panel detector according to any one of claims 1-9, further comprising the detection device according to claim 12 or the electronic device according to claim 13.

15. A computer-readable storage medium, characterized in that, Stored thereon are computer-readable instructions, and the computer-readable instructions can be executed by a processor to implement the method according to claim 10 or 11.

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