Desktop joint debugging test method and system of normal satellite, medium and computer equipment
By connecting satellite components and stand-alone devices into a dispersed state, obtaining preset verification entries and performing automated tests, the use cases rely on success signals, solving the problem of insufficient systematicity and standardization of existing satellite testing methods, and improving testing efficiency and accuracy.
Patent Information
- Application Number
- CN202510195715.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-21
- Publication Date
- 2025-07-11
AI Technical Summary
The existing satellite testing methods lack systematicity and standardization, resulting in the testing efficiency and accuracy depend on the experience of the staff, and are costly once problems are located and difficult to solve.
By connecting the positive component and the stand-alone device into a scattered state of the test, obtaining preset check entries and performing automated desktop joint debugging tests, the use case relies on the success signal of the previous test to ensure the continuity and reliability of the test.
Improve testing efficiency and accuracy, quickly locate and rectify faulty areas, reduce the demand for backtracking test cases, and reduce the testing cost.
Smart Images
Figure CN120295852A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of satellite testing, and particularly to a desktop joint debugging test method and system, a storage medium, and a computer device for a flight model satellite. Background Art
[0002] In the process of satellite research and development, the integration and testing of a flight model satellite are key links to ensure the complete function, qualified performance, and stable operation of the satellite. As the final product form in the satellite research and development cycle, each component (including sub-components and single devices) of the flight model satellite needs to undergo strict screening, integration, and testing to ensure that they can work together to meet the design requirements and mission needs.
[0003] Traditional satellite testing methods are usually carried out after the overall assembly of the satellite. This method not only has a long testing cycle, but also is relatively difficult to locate and solve problems once they are found, with high costs. To improve testing efficiency, reduce testing costs, and be able to detect and solve potential problems at an early stage, the desktop joint debugging test method has emerged. Desktop joint debugging test refers to the individual and modular testing of each component (flight model sub-components and single devices) of the satellite before the overall assembly of the satellite, as well as the testing of the interfaces and collaborative work between them.
[0004] However, existing desktop joint debugging test methods often lack systematicness and standardization. During the testing process, the staff is in the dominant position, resulting in the testing experience of the staff directly affecting the final testing efficiency and accuracy of the flight model satellite. Summary of the Invention
[0005] In view of this, this application provides a desktop joint debugging test method and system, a storage medium, and a computer device for a flight model satellite. The flight model sub-components and flight model single devices of the target satellite are connected into a to-be-tested flight model satellite in a dispersed state, and desktop joint debugging tests are carried out through the to-be-tested flight model satellite in a dispersed state, which can ensure the smooth execution of the desktop joint debugging test. At the same time, when it is found that the test fails, the fault location of the to-be-tested flight model satellite in a dispersed state can be quickly located and rectified, improving the location and rectification efficiency; automatically obtaining the preset verification items corresponding to the target satellite and executing them can ensure the smooth development of subsequent desktop joint debugging tests; the triggering of the subsequent desktop joint debugging test case depends on the success signal of the previous desktop joint debugging test case. This dependency ensures the continuity and reliability of the test. Only on the basis of the success of the previous test will the next test be carried out. In this way, once a certain desktop joint debugging test case fails, the problem can be quickly located without having to trace back all desktop joint debugging test cases, thus accelerating the speed of problem solving; the whole process is automated, which can greatly improve the testing efficiency and accuracy of the to-be-tested flight model satellite.
[0006] According to one aspect of the present application, a desktop joint debugging and testing method for a flight model satellite is provided, including:
[0007] Obtain the flight model group components and flight model single equipment corresponding to the target satellite, and based on the overall design scheme corresponding to the target satellite, connect the flight model group components and the flight model single equipment through flight model cables to obtain the to-be-tested flight model satellite in a dispersed state;
[0008] Obtain the preset verification items corresponding to the target satellite, and based on the preset verification items, determine whether the to-be-tested flight model satellite meets the desktop joint debugging and testing conditions;
[0009] When the to-be-tested flight model satellite meets the desktop joint debugging and testing conditions, sequentially call each desktop joint debugging and testing case corresponding to the target satellite, and perform desktop joint debugging and testing on the to-be-tested flight model satellite based on the called desktop joint debugging and testing case, wherein the call signal of the latter desktop joint debugging and testing case is generated based on the test success signal of the previous desktop joint debugging and testing case.
[0010] According to another aspect of the present application, a desktop joint debugging and testing system for a flight model satellite is provided, including:
[0011] A connection device, configured to obtain the flight model group components and flight model single equipment corresponding to the target satellite, and based on the overall design scheme corresponding to the target satellite, connect the flight model group components and the flight model single equipment through flight model cables to obtain the to-be-tested flight model satellite in a dispersed state;
[0012] A verification device, configured to obtain the preset verification items corresponding to the target satellite, and based on the preset verification items, determine whether the to-be-tested flight model satellite meets the desktop joint debugging and testing conditions;
[0013] A testing device, configured to, when the to-be-tested flight model satellite meets the desktop joint debugging and testing conditions, sequentially call each desktop joint debugging and testing case corresponding to the target satellite, and perform desktop joint debugging and testing on the to-be-tested flight model satellite based on the called desktop joint debugging and testing case, wherein the call signal of the latter desktop joint debugging and testing case is generated based on the test success signal of the previous desktop joint debugging and testing case.
[0014] According to yet another aspect of the present application, a storage medium is provided, on which a computer program is stored, and when the program is executed by a processor, the above-mentioned desktop joint debugging and testing method for a flight model satellite is implemented.
[0015] According to still another aspect of the present application, a computer device is provided, including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, and when the processor executes the program, the above-mentioned desktop joint debugging and testing method for a flight model satellite is implemented.
[0016] With the above technical solutions, a desktop joint debugging test method and system, a storage medium, and a computer device for a flight model satellite provided by the present application. First, all flight model group components and single-unit devices corresponding to the target satellite can be obtained. Then, based on the overall design scheme of the target satellite, these flight model group components and single-unit devices are connected using flight model cables to obtain a flight model satellite to be tested in a dispersed state. Before formally conducting the desktop joint debugging test, it is necessary to obtain the preset verification items corresponding to the target satellite. Further, based on the obtained preset verification items, inspections can be carried out on the test environment of the flight model satellite to be tested, etc. When all preset verification items are met, it is considered to have the conditions for conducting the desktop joint debugging test. After meeting the conditions for the desktop joint debugging test, start calling the desktop joint debugging test cases corresponding to the target satellite. The execution of the desktop joint debugging test cases can be carried out in a certain logical order. Specifically, the calling signal of the subsequent desktop joint debugging test case is generated based on the test success signal of the previous desktop joint debugging test case. That is, only after the previous desktop joint debugging test case is successfully executed and returns a success signal, will the execution of the next desktop joint debugging test case be triggered. In the embodiments of the present application, the flight model group components and flight model single-unit devices of the target satellite are connected into a flight model satellite to be tested in a dispersed state, and the desktop joint debugging test is carried out through the flight model satellite to be tested in a dispersed state, which can ensure the smooth execution of the desktop joint debugging test. At the same time, when it is found that the test fails, the fault location of the flight model satellite to be tested in a dispersed state can be quickly located and rectified, improving the positioning and rectification efficiency; automatically obtaining the preset verification items corresponding to the target satellite and executing them can ensure the smooth progress of the subsequent desktop joint debugging test; the triggering of the subsequent desktop joint debugging test case depends on the success signal of the previous desktop joint debugging test case. This dependency relationship ensures the continuity and reliability of the test. Only on the basis of the success of the previous test will the next test be carried out. In this way, once a certain desktop joint debugging test case fails, the problem can be quickly located without having to trace back all desktop joint debugging test cases, thus accelerating the speed of problem solving; the entire process is automated, which can greatly improve the test efficiency and accuracy of the flight model satellite to be tested.
[0017] The above description is only an overview of the technical solutions of the present application. In order to be able to understand the technical means of the present application more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of the present application more obvious and understandable, the following specific embodiments of the present application are specifically given. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation to the present application. In the drawings:
[0019] Figure 1 Shows a schematic flowchart of a desktop joint debugging test method for a flight model satellite provided by an embodiment of the present application;
[0020] Figure 2 Shows a schematic flowchart of another desktop joint debugging test method for a flight model satellite provided by an embodiment of the present application;
[0021] Figure 3 Shows a schematic structural diagram of a desktop joint debugging test system for a flight model satellite provided by an embodiment of the present application;
[0022] Figure 4 Shows a schematic structural diagram of a device of a computer device provided by an embodiment of the present application. Detailed implementation manners
[0023] The present application will be described in detail below with reference to the accompanying drawings and in conjunction with embodiments. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments may be combined with each other.
[0024] In this embodiment, a desktop joint debugging test method for a flight model satellite is provided. As Figure 1 shown, the method includes:
[0025] Step 101, obtain the flight model group components and flight model single devices corresponding to the target satellite, and based on the overall design scheme corresponding to the target satellite, connect the flight model group components and the flight model single devices through flight model cables to obtain a to-be-tested flight model satellite in a dispersed state.
[0026] A desktop joint debugging test method for a flight model satellite provided by an embodiment of the present application can ensure that before the overall assembly of the flight model satellite, its various components (flight model group components and flight model single devices) can work together according to the design requirements, and at the same time discover and solve potential problems, improving the accuracy and efficiency of the test. First, all the flight model group components and single devices corresponding to the target satellite can be obtained. Here, the target satellite refers to the satellite that needs to be subjected to desktop joint debugging test. The flight model refers to the formal prototype provided after the completion of the preliminary model development stage, which is used to comprehensively test the performance of the satellite. The flight model group components and single devices of the target satellite are the basis for composing the satellite.
[0027] Next, based on the overall design scheme of the target satellite, use the flight model cables to connect these flight model sub-assemblies and single-unit devices. Here, the flight model cables refer to high-reliability and high-performance cables specifically used to connect various components and devices inside the satellite, ensuring the accuracy and stability of signal transmission. After the connection is completed, a flight model satellite to be tested in a dispersed state is obtained, that is, although the various flight model sub-assemblies and flight model devices are already connected, they have not been assembled into a complete satellite form. Since the bench joint debugging test does not impose constraints on the structural installation of the satellite, during the bench joint debugging test, there is no need to impose an overall assembly constraint on the satellite, as long as it can meet the requirements of the bench joint debugging test after connection. Therefore, it can be in a dispersed state after connection.
[0028] Step 102: Obtain the preset verification items corresponding to the target satellite, and based on the preset verification items, determine whether the flight model satellite to be tested meets the bench joint debugging test conditions.
[0029] In this embodiment, before the formal bench joint debugging test, it is necessary to obtain the preset verification items corresponding to the target satellite. These verification items are formulated according to the design requirements, performance indicators, and test specifications of the satellite, and are used to check whether the test environment where the flight model satellite to be tested is located meets the basic conditions for the bench joint debugging test. Further, based on the obtained preset verification items, the test environment where the flight model satellite to be tested is located can be checked. These checks can include whether the test environment meets the requirements, whether the test files meet the requirements, etc. Only when all the preset verification items are met can it be considered that it has the conditions for the bench joint debugging test.
[0030] Step 103: When the flight model satellite to be tested meets the bench joint debugging test conditions, sequentially call each bench joint debugging test case corresponding to the target satellite, and based on the called bench joint debugging test case, conduct a bench joint debugging test on the flight model satellite to be tested, where the call signal of the subsequent bench joint debugging test case is generated based on the test success signal of the previous bench joint debugging test case.
[0031] In this embodiment, after the desktop joint debugging test conditions are met, the desktop joint debugging test cases corresponding to the target satellite are started to be called. These desktop joint debugging test cases are designed according to the satellite's functional requirements, performance indicators, and potential failure modes, aiming to comprehensively cover all functions and performance points of the satellite. For example, the desktop joint debugging test cases can include the subsystem function test cases and the overall satellite function test cases of the satellite to be tested in the flight model. Among them, the subsystem function test cases are used to test whether each subsystem of the overall satellite works properly and whether the functions meet the design requirements; the overall satellite function test cases are used to test whether the overall satellite function status meets the design requirements. The execution of the desktop joint debugging test cases can be carried out in a certain logical order. Specifically, the call signal of the subsequent desktop joint debugging test case is generated based on the test success signal of the previous desktop joint debugging test case. That is, only after the previous desktop joint debugging test case is successfully executed and returns a success signal, will the execution of the next desktop joint debugging test case be triggered. This sequential execution method helps to ensure that each desktop joint debugging test case can be carried out under the correct preconditions, thereby improving the accuracy and efficiency of the test. The desktop joint debugging test cases can be obtained by querying according to the model of the target satellite and can be pre-written.
[0032] By applying the technical solution of this embodiment, first, all the flight model components and single-unit devices corresponding to the target satellite can be obtained. Then, based on the overall design scheme of the target satellite, these flight model components and single-unit devices are connected using flight model cables to obtain the flight model satellite to be tested in a decentralized state. Before officially conducting the desktop joint debugging test, it is necessary to obtain the preset verification items corresponding to the target satellite. Further, based on the obtained preset verification items, inspections can be carried out on the test environment of the flight model satellite to be tested, etc. When all the preset verification items are met, it is considered to have the conditions for conducting the desktop joint debugging test. After meeting the conditions for the desktop joint debugging test, start to call the desktop joint debugging test cases corresponding to the target satellite. The execution of the desktop joint debugging test cases can be carried out in a certain logical order. Specifically, the calling signal of the latter desktop joint debugging test case is generated based on the test success signal of the previous desktop joint debugging test case. That is, only after the previous desktop joint debugging test case is successfully executed and returns a success signal, will the execution of the next desktop joint debugging test case be triggered. In the embodiment of the present application, the flight model components and flight model single-unit devices of the target satellite are connected into a flight model satellite to be tested in a decentralized state. Through the desktop joint debugging test of the flight model satellite to be tested in a decentralized state, the smooth execution of the desktop joint debugging test can be ensured. At the same time, when it is found that the test fails, the fault location of the flight model satellite to be tested in a decentralized state can be quickly located and rectified, improving the positioning and rectification efficiency; automatically obtaining and executing the preset verification items corresponding to the target satellite can ensure the smooth progress of the subsequent desktop joint debugging test; the triggering of the latter desktop joint debugging test case depends on the success signal of the previous desktop joint debugging test case. This dependency ensures the continuity and reliability of the test. Only on the basis of the success of the previous test will the next test be carried out. In this way, once a certain desktop joint debugging test case fails, the problem can be quickly located without having to trace back all the desktop joint debugging test cases, thus accelerating the speed of problem solving; the entire process is automated, which can greatly improve the test efficiency and accuracy of the flight model satellite to be tested.
[0033] In the embodiment of the present application, optionally, the preset verification items include a first verification item and a second verification item. The first verification item is used to detect whether the test preparation work meets the preset preparation requirements, and the second verification item is used to detect whether the flight model satellite to be tested meets the preset connection requirements; as Figure 2 shown, step 102 includes:
[0034] Step 102-1, based on the satellite model corresponding to the target satellite, determine the first verification item and the second verification item that match the satellite model from the preset verification items. Among them, the first verification item includes a test environment verification item and a test file verification item, and the second verification item includes an appearance verification item, a mechanical interface verification item, an electrical interface verification item, and an insulation verification item.
[0035] Step 102-2: Based on the test environment verification entries, obtain the environmental parameters corresponding to the desktop joint debugging test area through a preset environment detection device, and obtain an environment verification result according to the environmental parameters.
[0036] Step 102-3: Based on the test file verification entries, query whether the preset file library contains all the files indicated by the test file verification entries, and obtain a test file verification result based on the query result.
[0037] Step 102-4: Determine whether the first verification entry meets the preset preparation requirements according to the environment verification result and the test file verification result.
[0038] Step 102-5: When the first verification entry meets the preset preparation requirements, sequentially display the verification interfaces corresponding to the appearance verification entry, mechanical interface verification entry, electrical interface verification entry, and insulation verification entry, and when the to-be-filled areas corresponding to each verification interface are all filled, determine whether the second verification entry meets the preset connection requirements based on the filled content corresponding to each verification interface.
[0039] Step 102-6: When the second verification entry meets the preset connection requirements, determine that the to-be-tested flight model satellite meets the desktop joint debugging test conditions.
[0040] In this embodiment, before performing the desktop joint debugging test on the to-be-tested flight model satellite, the to-be-tested flight model satellite can be pre-tested before the test to ensure the smooth progress of the subsequent desktop joint debugging test. Specifically, the preset verification entries corresponding to the target satellite can be screened out from the preset verification entry library according to the model of the target satellite. Here, the preset verification entries can be the verification entries set in advance according to different satellite models and used to verify whether the to-be-tested flight model satellite under different models can perform the desktop joint debugging test. Specifically, the preset verification entries corresponding to the target satellite can include a first verification entry and a second verification entry. Among them, the first verification entry is used to detect whether the test preparation work meets the preset preparation requirements; the second verification entry is used to detect whether the to-be-tested flight model satellite meets the preset connection requirements. In one embodiment, the first verification entry can include a test environment verification entry and a test file verification entry, and the second verification entry can include an appearance verification entry, a mechanical interface verification entry, an electrical interface verification entry, and an insulation verification entry.
[0041] After determining the first verification entry and the second verification entry, further, the first verification entry and the second verification entry can be executed respectively. Specifically, a preset environment detection device (such as a thermometer hygrometer, an electromagnetic interference detector, etc.) can be used to obtain the environmental parameters (such as temperature, humidity, electromagnetic interference level, etc.) of the desktop joint debugging test area. By comparing these environmental parameters with the preset standards, an environmental verification result can be obtained. The preset environmental verification entry can also include an electrostatic protection verification entry. At this time, the preset environment detection device can also include a camera. The image of the desktop joint debugging test area is collected by the camera, and then the verification device analyzes the image collected by the camera to identify whether it includes electrostatic protection measures. If it is identified, it is determined that the electrostatic protection verification entry is satisfied; otherwise, it is determined that the electrostatic protection verification entry is not satisfied.
[0042] In addition, the preset file library can also be queried to determine whether all the files indicated by the test file verification entry are included in the preset file library. It should be noted that the preset file library is specially prepared for the satellite to be tested in the formal sample. It stores all the test documents, manuals, drawings, etc. required for the test corresponding to the satellite to be tested in the formal sample. For example, the interface data sheet, communication protocol, instruction manual, factory test rules, product matching table, development summary report, factory test report, etc. corresponding to each formal sample group component or formal sample single machine device. Specifically, the files in the preset file library can be automatically matched from the database according to the model of the target satellite, or manually moved in, or the files under the storage path are automatically added to the preset file library after selecting the storage path. The storage path can be generated based on the models of different satellites. According to the preset file library and the test file verification entry, a test file verification result can be obtained.
[0043] After obtaining the environmental verification result and the test file verification result, if both meet the preset standards, it is determined that the first verification entry meets the preset preparation requirements.
[0044] When the first verification item meets the preset preparation requirements, the verification of the second verification item begins. Specifically, the display page can be controlled to display the verification interfaces corresponding to the appearance verification, mechanical interface verification, electrical interface verification and insulation verification in sequence. These interfaces contain areas to be filled in, which are used to record or confirm observations or test results during the verification process. When the areas to be filled in corresponding to all verification interfaces are filled in, it is determined whether the second verification item meets the preset connection requirements based on the content filled in the areas to be filled in. Here, each verification interface has an automatic detection function, which is used to detect whether the content filled in the area to be filled in meets the preset numerical range, or whether it matches the preset answer. Among them, the appearance verification and mechanical interface verification are used to check whether the current subsystems and components of the positive sample group, the appearance and mechanical interface of the positive sample standby equipment match the design requirements and meet the integration conditions. For example, appearance verification includes: the product appearance is intact, the structure is intact, and there are no burrs or spikes on the product surface; the electrical connector housing and pins are not damaged, deformed, loose, or rusted, and there are no excess materials; the product surface should be treated with glue and three-proof paint (except for RF boards); the surface should be free of scratches, cracks, pollution, and shedding; the interface components / electrical connectors are not damaged, peeled, cracked, or perforated; the interface components / connectors are installed accurately without misalignment or offset. Mechanical interface verification includes: the installation interface is intact, the structure is intact, and there are no burrs or spikes on the surface; the mechanical interface must not be contaminated by solder; the mechanical interface should not be treated with glue or three-proof paint; the mechanical interface should not have cracks or shedding. Electrical interface verification is used to check whether the electrical interfaces of the current subsystems, the components of the sample group, and the sample standby equipment match the design requirements and meet the integration conditions. For example, the electrical interface verification includes: the electrical interface should be consistent with the marking on the product IDS (Identification System); the connectors of the electrical interface are complete and not damaged; the electrical interface (pin) is not bent or broken; the electrical interface (jack) is free of pollution and excess. Insulation verification is used to check whether the insulation characteristics of the current subsystems and the positive sample components and the positive sample standby equipment to the ground meet the integration requirements. For example, insulation verification includes that the impedance between the power supply and the power ground pin should be >1KΩ; the board power ground and the shell ground (assembly hole) should be conductive; the board power ground and the shell ground (assembly hole) are not conductive (other boards). The positive sample components and positive sample stand-alone equipment of the positive sample satellite to be tested can include cable networks, deployment devices, solar wings, etc., and the various subsystems can include power subsystems, satellite service subsystems, attitude and orbit control subsystems, thermal control subsystems, communication subsystems, and camera subsystems.Among them, the power supply subsystem may include a power supply main control board, a power distribution board, a solar array, a battery pack, a power divider / combiner, etc.; the satellite service subsystem may include an on-board computer IOBC (Integrated OnBorad Computer) board card, etc.; the attitude and orbit control subsystem may include a GNSS (Global Navigation Satellite System) and its antenna, a magnetic torque actuator, a magnetometer, a momentum wheel, a gyroscope, a sun sensor, a star sensor, a propulsion assembly, etc.; the thermal control subsystem may include a single-bus digital temperature measurement chip, etc.; the communication subsystem may include an X communication machine, a data transmission antenna, a conical spiral antenna, a dipole antenna, etc.; the camera subsystem may include a camera, etc.
[0045] If the first verification entry meets the preset preparation requirements and the second verification entry meets the preset connection requirements, then it can be determined that the to-be-tested flight model satellite meets the desktop joint debugging test conditions, and at this time, the subsequent desktop joint debugging test link can be carried out. In the embodiments of the present application, through the first verification entry and the second verification entry, it is ensured that before the desktop joint debugging test, both the test preparation work and the state of the satellite itself meet the requirements, thereby improving the accuracy and safety of the desktop joint debugging test; each step of verification has clear goals and judgment criteria, making the entire verification process systematic, standardized, and automated.
[0046] In the embodiments of the present application, optionally, when executing the desktop joint debugging test cases, the method further includes: when a test interruption is detected, recording the currently executing desktop joint debugging test case; correspondingly, the method further includes: when a test resume is detected, obtaining the recorded desktop joint debugging test case, and determining whether all the test entries corresponding to the recorded desktop joint debugging test case are covered in the test results corresponding to the to-be-tested flight model satellite; when all the test entries corresponding to the recorded desktop joint debugging test case are covered, calling the next desktop joint debugging test case of the recorded desktop joint debugging test case and executing it, otherwise, calling the recorded desktop joint debugging test case again and re-executing it.
[0047] In this embodiment, during the execution of the desktop joint debugging test cases, it may be detected that certain situations cause the test to be unable to continue, such as power failure, equipment failure, manual pause by the tester, etc. When these interruption situations are detected, the currently executing desktop joint debugging test case can be immediately stopped, and the information of the currently executing desktop joint debugging test case can be recorded. This information may include the identification, name, etc. of the desktop joint debugging test case. The purpose of recording this information is to accurately roll back to the interruption point when the test resumes and continue to execute the desktop joint debugging test cases that need to be executed.
[0048] When the problem causing the test interruption is resolved, the test recovery operation can be detected. When the test recovery is detected, the information of the currently executing desktop joint debugging test case previously recorded is obtained. These information will be used to determine where to continue the test execution. Then, it is judged whether all the test items corresponding to the recorded desktop joint debugging test case have been covered in the test result corresponding to the satellite to be tested. Specifically, the test result database or the log file can be checked to determine which test items have been executed and produced results, and which test items have not been executed yet. If the judgment result shows that all the test items corresponding to the recorded desktop joint debugging test case have been covered, then the next desktop joint debugging test case of the recorded desktop joint debugging test case can be called and executed; if the judgment result shows that not all the test items have been covered (for example, some test items fail to be executed due to interruption, or the execution result is lost), then the recorded desktop joint debugging test case needs to be called again, and the test items in this desktop joint debugging test case are re - executed.
[0049] In the embodiment of the present application, by recording the information of the current desktop joint debugging test case at the time of test interruption and continuing to execute the required desktop joint debugging test case according to this information when the test is resumed, the continuity and integrity of the desktop joint debugging test are ensured. At the same time, by judging the coverage of the test results, it can be intelligently decided whether to continue executing the next test case or re - execute the current test case, thereby improving the efficiency and accuracy of the test.
[0050] In the embodiment of the present application, optionally, after the "when the test recovery is detected", the method further includes: if a structure update instruction of the satellite to be tested is received, obtaining the update object corresponding to the structure update instruction and the replacement object corresponding to the update object; identifying the target verification entry corresponding to the replacement object from the preset verification entries, and identifying the target test case corresponding to the replacement object from the desktop joint debugging test cases, taking the target verification entry and the target test case as the tasks to be executed; and executing the tasks to be executed.
[0051] In this embodiment, after the test was interrupted due to certain reasons (such as equipment failure, power interruption, etc.) before, when the problem is solved and the test environment is ready to continue, the recovery of the test can be detected. After the test is resumed, if a structure update instruction for the satellite to be tested is received, it means that some parts of the satellite (such as the flight model group components, flight model single-machine equipment, etc.) have been updated or replaced. Analyze the structure update instruction and extract the updated objects (i.e., the update objects) from it. These objects can be a certain flight model group component or a certain flight model single-machine equipment on the satellite. In addition to the update objects, the replacement objects corresponding to these update objects can also be obtained from the structure update instruction. The replacement object refers to the flight model group component or flight model single-machine equipment used to replace the update object. Then, according to the replacement object, identify the verification entries related to the replacement object (i.e., the target verification entries) from the preset verification entries determined before. Similarly, the test cases related to the replacement object (i.e., the target test cases) can be identified from the desktop joint debugging test cases determined before. Subsequently, the identified target verification entries and target test cases are used as tasks to be executed. These tasks will be organized according to their order or priority in the original test process for subsequent execution. Finally, execute these tasks to be executed in the execution order to verify whether the satellite to be tested can meet the desktop joint debugging test conditions and pass the desktop joint debugging test cases after the update object replaces the replacement object.
[0052] In the embodiment of the present application, by receiving the structure update instruction, identifying the relevant target verification entries and target test cases, and executing these target verification entries and target test cases again, it is ensured that the satellite to be tested can still be accurately and comprehensively tested after the structure update. At the same time, the parts irrelevant to the replacement object can continue to use the previous test results, and meaningless repeated verification and testing can be avoided. This helps to ensure the quality and reliability of the satellite, and also helps to timely discover and solve the problems that may be introduced due to the update.
[0053] In the embodiment of the present application, optionally, when executing the desktop joint debugging test case, the method further includes: if there is a test entry that fails to pass in the currently executed desktop joint debugging test case, based on the test entry that fails to pass, determine the target test record corresponding to the test entry that fails to pass from the historical test records, identify the record that fails to pass from the target test record, obtain the description text corresponding to the record that fails to pass, and display the description text.
[0054] In this embodiment, during the execution of the desktop joint debugging test cases, the results of each test item can be automatically checked. If it is found that a certain test item fails (for example, the actual result does not match the expected result), then the historical test records related to this test item can be searched from the historical test records as the target test records. The target test records can include all the records of the previous execution of this test item, including the passed and failed cases. Further, the failed records can be filtered out from the target test records, and the corresponding explanatory text for each failed record can be obtained. The explanatory text can be added by the tester when recording the test results to explain the reason for the test failure or the observed abnormal phenomenon, or it can be an error code automatically generated by the system. Based on the error code, the reason for the test failure can be known, or it can be text generated through other means to explain the reason for the failure. Finally, the collected explanatory text is displayed to the tester or relevant personnel to help the tester quickly understand the possible reasons for the currently failed test item, thus saving time and improving the efficiency of problem location and solution. In the embodiment of the present application, by automatically searching and displaying the explanatory text in the historical test records, the time for the tester to manually search and analyze the problem reasons is reduced, which helps to quickly locate the fault; through more comprehensive historical test records and explanatory text, the transparency and traceability of the test process can be ensured, thereby improving the overall test quality.
[0055] In the embodiment of the present application, optionally, the method further includes: after calling the desktop joint debugging test case, identifying the test nodes in the desktop joint debugging test case, generating a test flow chart corresponding to the desktop joint debugging test case based on the test nodes, and displaying the test flow chart; correspondingly, after "displaying the test flow chart", the method further includes: highlighting the icon corresponding to the current test node in the test flow chart based on the current test node.
[0056] In this embodiment, after invoking the desktop joint debugging test case, each test node in the desktop joint debugging test case can be identified. Here, a test node can be understood as a key step or operation point in the test case. Each test node represents an independent link in the test process, which can be a function test, a performance test, a compatibility test, etc. Identifying these test nodes is the basis for generating a test flow chart. Then, based on the identified test nodes, a test flow chart is automatically generated. A test flow chart is a graphical representation that shows the entire process of the desktop joint debugging test case from start to end, as well as the logical relationships (such as sequence, conditional branches, loops, etc.) between each test node. This flow chart not only helps testers intuitively understand the structure of the test case, but also helps them identify potential test paths and test coverage points. The generated test flow chart is then displayed to the user. After the test flow chart is displayed to the user, the icon corresponding to the current test node in the test flow chart can also be highlighted according to the current test progress. For example, this can be achieved by changing the color, size, border or other visual attributes of the icon. The purpose of doing this is to enable the user to quickly locate the currently executing test step, thereby making it easier to track the test progress and understand the test process. Especially in complex test cases, which may contain multiple branches and loops, making the test process difficult to track. By highlighting the current test node, the user can always maintain a clear understanding of the test process, which helps improve the test efficiency and accuracy. The embodiment of this application greatly enhances the visualization and interactivity of the desktop joint debugging test by introducing the generation and display of the test flow chart, as well as the highlighting function based on the current test node, making the test process more intuitive and understandable.
[0057] In addition, each test node in the test flow chart can also have an interactive function. The user can click on the icon corresponding to any test node. After the user clicks on the icon corresponding to any test node, the expansion page corresponding to the test node can pop up, wherein the expansion page can include the detailed test content corresponding to the test node, including the purpose of the investigation, test conditions, test time, etc., and can also include a call icon for a large model. After the user clicks on the call icon for the large model, the target large model corresponding to the test node can be called to answer any questions of the user about the test node based on the target large model. It should be noted that the large model corresponding to each test node is trained based on different data sets. For example, the large model corresponding to test node a can be trained based on the data set matching test node a under different satellite models, and the large model corresponding to test node b can be trained based on the data set matching test node b under different satellite models. In this way, each large model can better answer the user's questions in a targeted manner, and the large model of the same test node under different satellite models can be reused, which improves the reuse rate of the large model. The embodiment of the present application sets up a large model for each test node, so that when the user has any questions, he can directly ask the large model, and the entire desktop joint debugging test can be better completed through the answer of the large model combined with his own experience.
[0058] Further, as Figure 1 The specific implementation of the method, the embodiment of the present application provides a desktop joint debugging test system for a sample satellite, such as Figure 3 As shown, the system includes:
[0059] A connecting device is used to obtain a positive sample group component and a positive sample stand-alone device corresponding to the target satellite, and based on the overall design scheme corresponding to the target satellite, connect the positive sample group component and the positive sample stand-alone device through a positive sample cable to obtain a positive sample satellite to be tested in a dispersed state;
[0060] A verification device, used for obtaining a preset verification item corresponding to the target satellite, and determining whether the sample satellite to be tested meets the desktop joint debugging test conditions based on the preset verification item;
[0061] The testing device is used to call each desktop joint debugging test case corresponding to the target satellite in sequence when the tested sample satellite meets the desktop joint debugging test condition, and perform a desktop joint debugging test on the tested sample satellite based on the called desktop joint debugging test case, wherein the calling signal of the latter desktop joint debugging test case is generated based on the test success signal of the former desktop joint debugging test case.
[0062] Optionally, the preset verification entries include a first verification entry and a second verification entry. The first verification entry is used to detect whether the test preparation work meets the preset preparation requirements, and the second verification entry is used to detect whether the to-be-tested flight model satellite meets the preset connection requirements;
[0063] The verification device is configured to:
[0064] Based on the satellite model corresponding to the target satellite, determine a first verification entry and a second verification entry that match the satellite model from the preset verification entries. Among them, the first verification entry includes a test environment verification entry and a test file verification entry, and the second verification entry includes an appearance verification entry, a mechanical interface verification entry, an electrical interface verification entry, and an insulation verification entry;
[0065] Based on the test environment verification entry, obtain the environmental parameters corresponding to the desktop joint debugging test area through a preset environment detection device, and obtain an environment verification result according to the environmental parameters;
[0066] Based on the test file verification entry, query whether the preset file library contains all the files indicated by the test file verification entry, and obtain a test file verification result based on the query result;
[0067] According to the environment verification result and the test file verification result, determine whether the first verification entry meets the preset preparation requirements;
[0068] When the first verification entry meets the preset preparation requirements, sequentially display the verification interfaces corresponding to the appearance verification entry, the mechanical interface verification entry, the electrical interface verification entry, and the insulation verification entry. And when all the to-be-filled areas corresponding to each verification interface are filled out, determine whether the second verification entry meets the preset connection requirements based on the filled content corresponding to each verification interface;
[0069] When the second verification entry meets the preset connection requirements, determine that the to-be-tested flight model satellite meets the desktop joint debugging test conditions.
[0070] Optionally, the system further includes a recording device; the recording device is configured to:
[0071] When detecting a test interruption during the execution of the desktop joint debugging test case, record the currently executing desktop joint debugging test case;
[0072] Correspondingly, the system further includes a judgment device; the judgment device is configured to:
[0073] When test recovery is detected, obtain the recorded desktop joint debugging test cases, and determine whether all test items corresponding to the recorded desktop joint debugging test cases are covered in the test results corresponding to the to-be-tested flight model satellite;
[0074] When all test items corresponding to the recorded desktop joint debugging test cases are covered, call the next desktop joint debugging test case of the recorded desktop joint debugging test cases and execute it. Otherwise, call the recorded desktop joint debugging test cases again and execute them again.
[0075] Optionally, the system further includes a task execution device; the task execution device is used for:
[0076] After test recovery is detected, if a structure update instruction for the to-be-tested flight model satellite is received, obtain the update object corresponding to the structure update instruction and the replacement object corresponding to the update object;
[0077] Identify the target verification item corresponding to the replacement object from the preset verification items, and identify the target test case corresponding to the replacement object from the desktop joint debugging test cases, and use the target verification item and the target test case as the to-be-executed tasks;
[0078] Execute the to-be-executed tasks.
[0079] Optionally, the system further includes a record query device; the record query device is used for:
[0080] When executing the desktop joint debugging test cases, if there are unpassed test items in the currently executed desktop joint debugging test cases, based on the unpassed test items, determine the target test record corresponding to the unpassed test items from the historical test records, identify the unpassed records from the target test records, obtain the description text corresponding to the unpassed records, and display the description text.
[0081] Optionally, the system further includes a flowchart generation device; the flowchart generation device is used for:
[0082] After calling the desktop joint debugging test cases, identify the test nodes in the desktop joint debugging test cases, and generate a test flowchart corresponding to the desktop joint debugging test cases based on the test nodes, and display the test flowchart;
[0083] Correspondingly, the flowchart generation device is further used for:
[0084] After displaying the test flowchart, based on the current test node, highlight the icon corresponding to the current test node in the test flowchart.
[0085] Optionally, the desktop joint debugging test cases include the subsystem function test cases and the overall satellite function test cases of the to-be-tested flight model satellite.
[0086] It should be noted that for other corresponding descriptions of the various functional units involved in the desktop joint debugging test system of a flight model satellite provided in the embodiments of the present application, reference can be made to Figures 1 to 2 the corresponding descriptions in the method, which will not be elaborated herein.
[0087] The embodiments of the present application also provide a computer device, which can specifically be a personal computer, a server, a network device, etc. As Figure 4 shown, the computer device includes a bus, a processor, a memory, and a communication interface, and may further include an input / output interface and a display device. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store location information. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the steps in the method embodiments are implemented.
[0088] Those skilled in the art can understand that Figure 4 the structure shown in
[0089] is only a block diagram of some structures related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0090] In one embodiment, a computer-readable storage medium is provided. The computer-readable storage medium can be non-volatile or volatile, and stores a computer program. When the computer program is executed by a processor, the steps in the above method embodiments are implemented.
[0091] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present application are all information and data that have been authorized by the user or fully authorized by all parties.
[0092] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memories. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in the present application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in the present application can be general-purpose processors, central processors, graphics processors, digital signal processors, programmable logic devices, data processing logics based on quantum computing, etc., without limitation.
[0093] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.
[0094] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation to the scope of the patent of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.
Claims
1. A desktop joint debugging and testing method for a flight model satellite, characterized in that, Including: Obtain the flight model sub-components and flight model single equipment corresponding to the target satellite, and based on the overall design scheme corresponding to the target satellite, connect the flight model sub-components and the flight model single equipment through flight model cables to obtain the to-be-tested flight model satellite in a dispersed state; Obtain the preset verification items corresponding to the target satellite, and based on the preset verification items, determine whether the to-be-tested flight model satellite meets the desktop joint debugging test conditions; When the to-be-tested flight model satellite meets the desktop joint debugging test conditions, sequentially call each desktop joint debugging test case corresponding to the target satellite, and based on the called desktop joint debugging test case, conduct desktop joint debugging tests on the to-be-tested flight model satellite, wherein the call signal of the latter desktop joint debugging test case is generated based on the test success signal of the previous desktop joint debugging test case.
2. The method according to claim 1, characterized in that, The preset verification items include a first verification item and a second verification item. The first verification item is used to detect whether the test preparation work meets the preset preparation requirements, and the second verification item is used to detect whether the to-be-tested flight model satellite meets the preset connection requirements; The obtaining the preset verification items corresponding to the target satellite, and based on the preset verification items, determining whether the to-be-tested flight model satellite meets the desktop joint debugging test conditions includes: Based on the satellite model corresponding to the target satellite, determine the first verification item and the second verification item that match the satellite model from the preset verification items. The first verification item includes a test environment verification item and a test file verification item, and the second verification item includes an appearance verification item, a mechanical interface verification item, an electrical interface verification item, and an insulation verification item; Based on the test environment verification item, obtain the environmental parameters corresponding to the desktop joint debugging test area through a preset environment detection device, and based on the environmental parameters, obtain an environmental verification result; Based on the test file verification item, query whether the preset file library contains all the files indicated by the test file verification item, and based on the query result, obtain a test file verification result; Based on the environmental verification result and the test file verification result, determine whether the first verification item meets the preset preparation requirements; When the first verification item meets the preset preparation requirements, sequentially display the verification interfaces corresponding to the appearance verification item, the mechanical interface verification item, the electrical interface verification item, and the insulation verification item, and when the to-be-filled areas corresponding to each verification interface are all filled, based on the filled content corresponding to each verification interface, determine whether the second verification item meets the preset connection requirements; When the second verification item meets the preset connection requirements, determine that the to-be-tested flight model satellite meets the desktop joint debugging test conditions.
3. The method according to claim 1, characterized in that When executing the desktop joint debugging test case, the method further includes: When a test interruption is detected, record the currently executing desktop joint debugging test case; Correspondingly, the method further includes: When a test recovery is detected, obtain the recorded desktop joint debugging test case, and determine whether all the test items corresponding to the recorded desktop joint debugging test case are covered in the test result corresponding to the to-be-tested flight model satellite; When all the test items corresponding to the recorded desktop joint debugging test cases are covered, call the next desktop joint debugging test case of the recorded desktop joint debugging test cases and execute it. Otherwise, call the recorded desktop joint debugging test case again and execute it again.
4. The method according to claim 3, wherein After the test recovery is detected, the method further includes: If a structure update instruction for the to-be-tested flight model satellite is received, obtain the update object corresponding to the structure update instruction and the replacement object corresponding to the update object; Identify the target verification entry corresponding to the replacement object from the preset verification entries, and identify the target test case corresponding to the replacement object from the desktop joint debugging test cases, and use the target verification entry and the target test case as the tasks to be executed; Execute the tasks to be executed.
5. The method according to claim 1, wherein When executing the desktop joint debugging test cases, the method further includes: If there are unpassed test items in the currently executed desktop joint debugging test cases, based on the unpassed test items, determine the target test record corresponding to the unpassed test items from the historical test records, identify the unpassed records from the target test records, obtain the description text corresponding to the unpassed records, and display the description text.
6. The method according to any one of claims 1 to 5, characterized in that, The method further includes: After calling the desktop joint debugging test cases, identify the test nodes in the desktop joint debugging test cases, and based on the test nodes, generate a test flow chart corresponding to the desktop joint debugging test cases, and display the test flow chart; Correspondingly, after displaying the test flow chart, the method further includes: Based on the current test node, highlight the icon corresponding to the current test node in the test flow chart.
7. The method according to claim 6, wherein The desktop joint debugging test cases include the subsystem function test cases and the overall satellite function test cases of the to-be-tested flight model satellite.
8. A desktop joint debugging and testing system for a flight model satellite, characterized in that, It includes: A connection device, configured to obtain the flight model group components and flight model single devices corresponding to the target satellite, and based on the overall design scheme corresponding to the target satellite, connect the flight model group components and the flight model single devices through flight model cables to obtain the to-be-tested flight model satellite in a dispersed state; A verification device, configured to obtain the preset verification entries corresponding to the target satellite, and based on the preset verification entries, determine whether the to-be-tested flight model satellite meets the desktop joint debugging test conditions; A test device, configured to, when the to-be-tested flight model satellite meets the desktop joint debugging test conditions, sequentially call each desktop joint debugging test case corresponding to the target satellite, and perform desktop joint debugging tests on the to-be-tested flight model satellite based on the called desktop joint debugging test cases, wherein the call signal of the subsequent desktop joint debugging test case is generated based on the test success signal of the previous desktop joint debugging test case.
9. A storage medium, on which a computer program is stored, characterized in that, When the computer program is executed by a processor, it implements the method according to any one of claims 1 to 7.
10. A computer device, comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method according to any one of claims 1 to 7.