Method and related device for data interaction between application program and FPGA (Field Programmable Gate Array)

Abstract

The invention discloses a method and a related device for data interaction between an application program and an FPGA (Field Programmable Gate Array), and relates to the technical field of embedded systems. Comprising the steps that after it is determined that initialization configuration of target parameters of an application program is completed, a preset hardware script is burnt to an FPGA board card by calling a TCL script, and communication between a JTAG signal and a BRAM in an FPGA is achieved; after the simulation task is executed and the simulation data is generated, the TCL script is triggered through the handshake signal to obtain the simulation data, and real-time monitoring and debugging of the internal state of the FPGA are achieved. Thus, through the method in the application, the real-time performance and reliability of data interaction are improved, the application range of the JTAG interface is expanded, and finally the purpose of realizing data interaction between the application program and the FPGA based on the JTAG interface is achieved.

Description

Technical Field

[0001] This application relates to the technical field of embedded systems, and particularly to a method and related device for data interaction between an application program and an FPGA. Background Art

[0002] In the interaction process between an application program and an FPGA (Field-Programmable Gate Array), data interaction is usually implemented through interfaces such as serial ports, network ports, and Peripheral Component Interconnect Express. However, in some application scenarios with limited hardware resources, the above interfaces may not meet the requirements. The JTAG interface (Joint Test Action Group Boundary Scan Interface) is a standard debugging interface for FPGAs, mainly used for debugging and testing the internal state of hardware, and its real-time data interaction between the application program and the FPGA has not been used. How to implement data interaction between the application program and the FPGA based on the JTAG interface has become one of the technical problems to be solved urgently in the technical field of embedded systems. Summary of the Invention

[0003] Based on the above problems, this application provides a method for data interaction between an application program and an FPGA, which is used to implement data interaction between the application program and the FPGA based on the JTAG interface, and solve the problem that traditional interfaces cannot meet the usage requirements in application scenarios with limited hardware resources.

[0004] The embodiments of this application disclose the following technical solutions:

[0005] The first aspect of this application provides a method for data interaction between an application program and an FPGA, including:

[0006] Initialize and configure the target parameters of the application program;

[0007] After determining that the initialization configuration is completed, perform hardware initialization operations by calling a TCL script; the hardware initialization operations include burning a preset hardware script onto the FPGA board; the preset hardware script is used to implement data communication between the JTAG interface signal and the Block RAM module inside the FPGA configuration;

[0008] After determining that the hardware initialization operation is completed, perform a simulation task on the FPGA based on the application program and the hardware script, and generate simulation data;

[0009] Based on a first handshake signal, obtain the simulation data by calling the TCL script; the first handshake signal indicates that the simulation data has been generated.

[0010] In an alternative implementation, after generating the simulation data, the following steps are further included:

[0011] Write the simulation data into an intermediate data file;

[0012] Obtaining the simulation data by calling the TCL script based on the first handshake signal includes:

[0013] Based on the second handshake signal, obtaining the simulation data written into the intermediate data file by calling the TCL script; the second handshake signal indicates that the simulation data has been written into the intermediate data file.

[0014] In an alternative implementation, the hardware script is specifically used to convert the JTAG signal into an AXI signal through the JTAG-AXI core, communicate with the Block RAM module through the AXI signal, and monitor the signal data in the FPGA through Systen ILA.

[0015] In an alternative implementation, the step of calling the TCL script includes:

[0016] Start the integrated development environment through the batch script command line;

[0017] Call the TCL script through the source execution parameter in the integrated development environment.

[0018] In an alternative implementation, the TCL script is a script pre-encapsulated in the code file of the application program.

[0019] In an alternative implementation, the TCL script is used to monitor the intermediate data file, read the simulation data written into the intermediate data file, write the read simulation data into the target document, and burn the preset hardware script into the FPGA board.

[0020] A second aspect of the present application provides a device for data interaction between an application program and an FPGA, including:

[0021] A first initialization configuration module for initializing and configuring the target parameters of the application program;

[0022] A second initialization configuration module for, after determining that the initialization configuration is completed, performing a hardware initialization operation by calling a TCL script; the hardware initialization operation includes burning a preset hardware script onto the FPGA board; the preset hardware script is used to implement data communication between the JTAG interface signal and the Block RAM module internally configured in the FPGA;

[0023] A simulation task execution module, configured to, after determining that the hardware initialization operation is completed, execute a simulation task on the FPGA based on the application program and the hardware script, and generate simulation data;

[0024] A simulation data monitoring module, configured to obtain the simulation data by calling the TCL script based on a first handshake signal; the first handshake signal indicates that the simulation data has been generated.

[0025] In an optional implementation manner, the device further includes:

[0026] A simulation data storage module, configured to write the simulation data into an intermediate data file;

[0027] A stored data monitoring module, configured to obtain the simulation data written into the intermediate data file by calling the TCL script based on a second handshake signal; the second handshake signal indicates that the simulation data has been written into the intermediate data file.

[0028] A third aspect of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the steps of the method described in any implementation manner of the first aspect are implemented.

[0029] A fourth aspect of the present application provides an electronic device, including:

[0030] A memory, on which a computer program is stored;

[0031] A processor, configured to execute the computer program in the memory to implement the steps of the method described in any implementation manner of the first aspect.

[0032] Compared with the prior art, the present application has the following beneficial effects:

[0033] The present application discloses a method for data interaction between an application program and an FPGA, including: after determining that the target parameters of the application program are initialized and configured, burning a preset hardware script onto the FPGA board by calling a TCL script to implement communication between the JTAG signal and the internal BRAM of the FPGA; after the simulation task is executed and simulation data is generated, triggering the TCL script to obtain the simulation data through a handshake signal, realizing real-time monitoring and debugging of the internal state of the FPGA. In this way, the method in the present application not only improves the real-time performance and reliability of data interaction, but also expands the application range of the JTAG interface, and finally achieves the goal of data interaction between the application program and the FPGA based on the JTAG interface. Description of the Drawings

[0034] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0035] Figure 1 A flowchart of a method for data interaction between an application and an FPGA provided in an embodiment of the present application;

[0036] Figure 2 A schematic diagram of the structure of a hardware script provided in an embodiment of the present application;

[0037] Figure 3 A flowchart of another method for data interaction between an application and an FPGA provided in an embodiment of the present application;

[0038] Figure 4 A flowchart of data interaction between an application and an FPGA provided in an embodiment of the present application;

[0039] Figure 5 A schematic diagram of a device for data interaction between an application and an FPGA provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] In the process of interaction between application and FPGA (Field-Programmable Gate Array), data interaction is usually achieved through interfaces such as serial port, network port, and peripheral component fast channel. However, in some application scenarios with limited hardware resources, the above interfaces may not meet the requirements. The JTAG interface (Joint Test Action Group Boundary Scan Interface) is a standard debugging interface for FPGA, which is mainly used for debugging and testing the internal state of hardware. Its real-time data interaction between application and FPGA has not been used. How to realize data interaction between application and FPGA based on JTAG interface has become one of the technical problems to be solved in the field of embedded system technology.

[0041] The present application discloses a method for data interaction between an application program and an FPGA, including: after determining that the target parameters of the application program are initialized and configured, burning a preset hardware script onto the FPGA board by calling a TCL script to implement communication between the JTAG signal and the internal BRAM of the FPGA; after the simulation task is executed and simulation data is generated, triggering the TCL script by a handshake signal to obtain the simulation data, thereby realizing real-time monitoring and debugging of the internal state of the FPGA. In this way, the method in the present application not only improves the real-time performance and reliability of data interaction, but also expands the application scope of the JTAG interface, and finally achieves the goal of realizing data interaction between the application program and the FPGA based on the JTAG interface.

[0042] To facilitate the understanding of the technical solution in the present application, the technical data in the present application will be introduced first.

[0043] FPGA is a general-purpose reconfigurable integrated circuit, which consists of programmable logic units, programmable interconnection resources, embedded block RAMs, digital signal processor blocks, input / output blocks, etc. It has programmability, allowing users to customize and optimize according to specific application requirements. It has parallel processing capabilities and can execute multiple operations simultaneously. It is widely used in many fields such as communication, image processing, and industrial automation.

[0044] TCL (Tool Command Language) is a dynamic, interpreted programming language; it is used to drive various tools and applications. A TCL script is a script file compiled in the TCL language.

[0045] The JTAG-AXI core is a customizable core that can convert the JTAG interface into an AXI (Advanced eXtensible Interface) interface, thereby realizing access and control of the internal resources of the FPGA.

[0046] Block RAM (BRAM) is a dedicated RAM resource inside the FPGA, which is fixedly distributed at a specific location inside the FPGA; it is composed of a certain number of storage blocks of a fixed size; the advantage of using BLOCK RAM is that it does not occupy additional logic resources and has a fast running speed.

[0047] AXI BRAM Controller is an AMD soft IP core, which can communicate with both the Embedded Development Kit (EDK) and Vivado TMIt can be used together with the IP Integrator (IPI) and can also be provided as a stand-alone core in the Vivado IP catalog. This core is designed as an AXI endpoint IP, capable of integrating with AXI interconnect devices and system master devices, enabling communication with local BRAM. It supports single-beat and burst transactions for BRAM and is optimized for performance.

[0048] AXI signals are signals transmitted in the AXI (Advanced eXtensible Interface) protocol.

[0049] The AXI protocol is a standard interface in the ARM (Advanced RISC Machine) architecture. When used with ARM processors, it ensures the efficient operation of the entire system.

[0050] System ILA (System Integrated Logic Analyzer) is a logic analyzer used to monitor internal signals and interfaces of a design.

[0051] The batch script command line is an environment in the Windows operating system for executing a series of command-line instructions through a batch file (usually with the extensions.bat or.cmd). A batch file is a simple script file that contains commands arranged in sequence and these commands are executed at the command prompt (cmd.exe).

[0052] The source execution parameter, namely "-source", is a command-line parameter used to load and execute a specified script file when starting certain programs (such as the Tcl interpreter).

[0053] To enable those skilled in the art to better understand the solution of this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of this application.

[0054] Figure 1 It is a flowchart of a method for data interaction between an application program and an FPGA provided for the embodiments of this application. In combination with Figure 1 As shown, the process of the method for data interaction between the application program and the FPGA disclosed in this application includes:

[0055] S101, initialize and configure the target parameters of the application program.

[0056] In an alternative implementation, the target parameters in the present application include the ready signal indicating the completion of hardware initialization (the done signal for hardware initialization completion) and the handshake signal during the data interaction process.

[0057] After starting the application, the target parameters of the application can be initialized and configured. The advantage of this is that it can ensure that the system starts running from a known and consistent state, thereby improving the stability, predictability, and maintainability of the system.

[0058] S102, after determining that the initialization configuration is completed, perform hardware initialization operations by calling a TCL script.

[0059] After determining that the target parameters of the application are initialized and configured, a TCL script encapsulated in the code file of the application can be called to perform hardware initialization operations, or a TCL script can be created in the programming interface of the application, and the TCL instructions to be executed by the hardware are written into it, and then the created TCL script is called.

[0060] In the present application, the TCL script is called in the following manner, specifically:

[0061] Through the batch script command line, start the integrated development environment; in the integrated development environment, call the TCL script through the source execution parameter (i.e., -source) to start the work on the hardware side. After starting, output the corresponding print information to the corresponding log file.

[0062] The code file for calling the TCL script through batch is specifically:

[0063]

[0064]

[0065] The hardware initialization operation in the present application includes burning a preset hardware script onto the FPGA board; the preset hardware script is used to implement data communication between the JTAG interface signal and the Block RAM module configured inside the FPGA. Figure 2 It is a schematic diagram of the structure of a hardware script provided for an embodiment of the present application.

[0066] Combined with Figure 2As shown in the figure, the specific functions of the hardware script in this application are as follows: convert JTAG signals into AXI signals through the JTAG-AXI core; communicate with the Block RAM module through AXI signals; monitor signal data in the FPGA through Systen ILA. That is, the hardware script in this application converts the incoming addresses and data, as well as the corresponding read and write requests, into the format of the AXI protocol through the JTAG-AXI core; and then writes to or reads the memory at the specified address of the BRAM through the AXI BRAM core, thereby realizing the in-loop interaction of the interface; at the same time, capture the write and read behaviors through Systen ILA to verify the correctness of the system.

[0067] S103, after determining that the hardware initialization operation is completed, based on the application program and the hardware script, execute a simulation task on the FPGA and generate simulation data.

[0068] S104, based on the first handshake signal, obtain the simulation data by calling the TCL script.

[0069] After the hardware initialization operation is completed, execute a simulation task on the FPGA through the application program and the hardware script to generate simulation data in real time. That is, during the running of the application program, the data file will be updated in real time according to the simulation input, and the situation of the first handshake signal will be updated. Subsequently, the return result is obtained as the input of this simulation module, that is, simulation data is generated.

[0070] After the simulation data is generated, the state of the corresponding first handshake signal will change. During the running of the application program, the TCL script will periodically monitor the change of data. Once the first handshake signal appears, the simulation data is obtained. Among them, the first handshake signal is a signal indicating that the simulation data has been generated.

[0071] Figure 3 It is a flowchart of another method for data interaction between the application program and the FPGA provided by the embodiments of this application. Combining Figure 3 As shown in the figure, the process of another method for data interaction between the application program and the FPGA provided by this application includes:

[0072] S301, initialize and configure the target parameters of the application program.

[0073] In an optional implementation manner, the target parameters in this application include the ready signal for the completion of hardware initialization (the done signal for the completion of hardware initialization), the handshake signal during the data interaction process, and the data format of the intermediate data file

[0074] The code file for initializing and configuring the target parameters of the application program is specifically:

[0075] / / Initialize global variables

[0076] global_cnt = 0; / / Initialize the global variable named global_cnt with an initial value of 0

[0077] output_value = 0; / / Initialize the global variable named output_value with an initial value of 0

[0078] vivado_init_done = 0; / / Initialize the global variable named vivado_init_done with an initial value of 0

[0079] recv_cnt = 0; / / Initialize a global variable named recv_cnt with an initial value of 0

[0080] / / Initialize the data file write_data.txt

[0081] FILE* file = fopen("write_data.txt", "w");

[0082] fprintf(file, "0x00000000 0x00000000 0\n");

[0083] fclose(file);

[0084] As described above, after starting the application, the target parameters of the application can be initialized and configured. The advantage of this is that it can ensure that the system starts running from a known and consistent state, thereby improving the stability, predictability, and maintainability of the system.

[0085] S302, after determining that the initialization configuration is completed, perform hardware initialization operations by calling the TCL script.

[0086] Referring to the content in S102, after determining that the target parameters of the application are initialized and configured, the TCL script encapsulated in the code file of the application can be called to perform hardware initialization operations; or a TCL script can be created in the programming interface of the application, and the TCL instructions to be executed by the hardware are written into it, and then the above-created TCL script is called.

[0087] Exemplarily, in this application, a code file for creating a TCL script in the programming interface of the application is given. This TCL script mainly implements hardware initialization operations, monitoring of intermediate data files, and writing and reading of data.

[0088] The code file for creating a TCL script in the programming interface of the application is specifically as follows:

[0089]

[0090]

[0091]

[0092]

[0093] After obtaining the TCL script, the TCL script can be called in the manner shown in S102, that is, by using the batch script command line to start the integrated development environment; in the integrated development environment, the TCL script is called through the source execution parameter (i.e., -source) to start the work on the hardware side. For detailed content, refer to the introduction in S102 and will not be elaborated here.

[0094] S303, after determining that the hardware initialization operation is completed, based on the application program and the hardware script, execute a simulation task on the FPGA, generate simulation data, and write the simulation data into an intermediate data file.

[0095] S304, based on the second handshake signal, obtain the simulation data written into the intermediate data file by calling the TCL script.

[0096] After completing the hardware initialization operation, execute a simulation task on the FPGA through the application program and the hardware script, generate simulation data in real time, and write the simulation data into an intermediate data file. That is, during the running process of the application program, the data file will be updated in real time according to the simulation input and the situation of the first handshake signal will be updated, and then the return result will be obtained as the input of this simulation module, that is, generate simulation data and write the simulation data into the intermediate data file.

[0097] The corresponding code file for this process is as follows:

[0098]

[0099]

[0100] During the running process of the application program, the TCL script will periodically monitor the changes in the intermediate data file. Once the change of the second handshake signal is detected, the writing and reading process will start, and the read result will be returned, waiting for the next handshake. Among them, the second handshake signal indicates that the simulation data has been written into the intermediate data file.

[0101] The corresponding code file for this process is:

[0102]

[0103] The above code describes the LoopWriteFromFile procedure defined in a TCL script. This procedure reads data in a loop by periodically checking a file and writes this data to a hardware register. It first defines a procedure that takes a file name and the counter value of the previous processing as parameters. Then, it uses the ReadAndWriteFromFile command to update the counter value and sets a 5 - second timer to call itself periodically. In the main program, it decides whether to perform write and read operations by comparing the current and previous counter values. If new data needs to be processed, it calls the WriteReg and ReadReg procedures to write to and read from the register and outputs the results. Finally, it updates the counter value for the next loop, thus implementing a continuous loop mechanism until external conditions change.

[0104] Figure 3 Writing simulation data to an intermediate data file, the advantage of the TCL script reading simulation data from the intermediate data file is: solving the problem that it is difficult to match the interfaces of the current application program and the FPGA, reducing the complexity of interface compatibility, improving the flexibility and efficiency of data transmission, and enabling convenient and fast data interaction between the application program and the FPGA.

[0105] Figure 3 The TCL script involved is used to monitor the intermediate data file, read the simulation data written to the intermediate data file, write the read simulation data to the target document, and burn the preset hardware script to the FPGA board.

[0106] To further understand the technical solution of this application, this application provides a usage flowchart of a technical solution. Figure 4 It is a usage flowchart of data interaction between an application program and an FPGA provided by an embodiment of this application. Combining Figure 4 as shown, the usage process of the technical solution in this application is specifically as follows:

[0107] After the program starts, initialize the target parameters of the application program; after the initialization operation is completed, start the IDE (Integrated Development Environment) thread and the simulation thread simultaneously. In the IDE thread, create a TCL script using the method in S302 and call the TCL script to perform hardware initialization (the hardware initialization operation includes burning a preset hardware script onto the FPGA board); after the hardware initialization operation (referred to as hardware initialization) is completed, the software thread starts real-time simulation, writes the generated simulation data into an intermediate data file, and reads and outputs it (refer to the content in S303); after the hardware initialization operation is completed, the TCL script monitors the changes in the intermediate data file, and after detecting the change in the second handshake signal, obtains the simulation data from the intermediate data file.

[0108] Exemplarily, the application program in this application can be a graphical modeling and simulation tool, GCKontrol. The specific type of the application program is not limited in this application.

[0109] In summary, this application discloses a method for data interaction between an application program and an FPGA, including: after determining that the initialization configuration of the target parameters of the application program is completed, burning a preset hardware script onto the FPGA board by calling a TCL script to implement communication between the JTAG signal and the internal BRAM of the FPGA; after the simulation task is executed and simulation data is generated, triggering the TCL script to obtain the simulation data through a handshake signal, realizing real-time monitoring and debugging of the internal state of the FPGA. In this way, the method in this application not only improves the real-time performance and reliability of data interaction, but also expands the application scope of the JTAG interface, and finally achieves the goal of data interaction between the application program and the FPGA based on the JTAG interface.

[0110] From the above content, it can be seen that the method for data interaction between the application program and the FPGA disclosed in this application has the following advantages:

[0111] First, in this application, real-time data interaction between software and hardware is achieved through the JTAG interface, which can dynamically debug and transmit data during the operation of the FPGA and has real-time response capabilities.

[0112] Second, the technical solution of this application proposes a synchronization mechanism and a handshake mechanism, which ensure the order and status of data exchange coordination between hardware and software, solve problems such as communication delay and data out-of-order that may occur in traditional methods, and ensure the efficiency and stability of data transmission.

[0113] Third, traditional data interaction often requires more system resources. The solution in this application can not only achieve low-power data exchange, but also does not occupy the main system resources, enabling the system to execute other computing tasks more efficiently.

[0114] Fourth, based on the technical solution in this application, software engineers can jointly debug and optimize the system without deeply understanding the FPGA, achieving more efficient collaboration.

[0115] Fifth, through the design of the JTAG interface, it can flexibly adapt to different debugging requirements and data interaction modes without changing the hardware platform, facilitating rapid migration and application on different projects or different hardware platforms.

[0116] Based on the method for data interaction between an application program and an FPGA disclosed in the foregoing embodiments. This application also provides a device for data interaction between an application program and an FPGA. Figure 5 It is a schematic diagram of a device for data interaction between an application program and an FPGA provided by an embodiment of this application. In this application, the device for data interaction between an application program and an FPGA is simply referred to as an interaction device. Combining Figure 5 As shown, the interaction device 500 in this application includes:

[0117] A first initialization configuration module 501, configured to perform initialization configuration on the target parameters of the application program;

[0118] A second initialization configuration module 502, configured to, after determining that the initialization configuration is completed, perform hardware initialization operations by calling a TCL script; the hardware initialization operations include burning a preset hardware script onto the FPGA board; the preset hardware script is used to implement data communication between the JTAG interface signal and the internal configured Block RAM module of the FPGA;

[0119] A simulation task execution module 503, configured to, after determining that the hardware initialization operation is completed, execute a simulation task on the FPGA based on the application program and the hardware script, and generate simulation data;

[0120] A simulation data monitoring module 504, configured to obtain the simulation data by calling the TCL script based on a first handshake signal; the first handshake signal indicates that the simulation data has been generated.

[0121] In an optional implementation manner, the interaction device 500 further includes:

[0122] A simulation data storage module, configured to write the simulation data into an intermediate data file;

[0123] A stored data monitoring module, configured to obtain simulation data written into the intermediate data file by calling the TCL script based on a second handshake signal; the second handshake signal indicates that the simulation data has been written into the intermediate data file.

[0124] In an alternative implementation, the second initialization configuration module 502 includes:

[0125] A first script calling unit, configured to start an integrated development environment through a batch script command line;

[0126] A second script calling unit, configured to call the TCL script through source execution parameters in the integrated development environment.

[0127] Based on the method and apparatus for data interaction between an application program and an FPGA provided in the foregoing embodiments, correspondingly, the present application further provides a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, some or all of the steps in the method for data interaction between the application program and the FPGA mentioned above are implemented.

[0128] Based on the method and apparatus for data interaction between an application program and an FPGA provided in the foregoing embodiments, the present application further provides an electronic device, including:

[0129] A memory, on which a computer program is stored;

[0130] A processor, configured to execute the computer program in the memory to implement some or all of the steps in the method for data interaction between the application program and the FPGA provided in the foregoing embodiments.

[0131] It should be noted that the embodiments in this specification are all described in a progressive manner. The same or similar parts between the embodiments can be referred to each other, and the key points of each embodiment are the differences from other embodiments. In particular, for the apparatus embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiments. The apparatus embodiments described above are only illustrative. The units described as separate components may or may not be physically separated, and the components described as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative efforts.

[0132] As described above, it is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method for data interaction between an application program and an FPGA, characterized in that Including: Initialize and configure the target parameters of the application; After determining that the initialization configuration is completed, perform hardware initialization operations by calling the TCL script; The hardware initialization operation includes burning a preset hardware script onto the FPGA board; the preset hardware script is used to implement data communication between the JTAG interface signal and the Block RAM module configured inside the FPGA; After determining that the hardware initialization operation is completed, based on the application and the hardware script, execute a simulation task on the FPGA and generate simulation data; Based on the first handshake signal, obtain the simulation data by calling the TCL script; The first handshake signal indicates that the simulation data has been generated.

2. The method according to claim 1, wherein After generating the simulation data, it further includes: Write the simulation data into an intermediate data file; The obtaining the simulation data based on the first handshake signal by calling the TCL script includes: Based on the second handshake signal, obtain the simulation data written into the intermediate data file by calling the TCL script; the second handshake signal indicates that the simulation data has been written into the intermediate data file.

3. The method according to claim 1, wherein The hardware script is specifically used to convert the JTAG signal into an AXI signal through the JTAG-AXI core, communicate with the Block RAM module through the AXI signal, and monitor the signal data in the FPGA through SystenILA.

4. The method according to claim 1, wherein The step of calling the TCL script includes: Start the integrated development environment through the batch script command line; Call the TCL script through the source execution parameter in the integrated development environment.

5. The method according to any one of claims 1-4, characterized in that, The TCL script is a script pre-encapsulated in the code file of the application.

6. The method according to claim 2, wherein The TCL script is used to monitor the intermediate data file, read the simulation data written into the intermediate data file, write the read simulation data into the target document, and burn the preset hardware script into the FPGA board.

7. A device for data interaction between an application program and an FPGA, characterized in that, The device includes: A first initialization configuration module, used to initialize and configure the target parameters of the application; A second initialization configuration module, used to perform hardware initialization operations by calling the TCL script after determining that the initialization configuration is completed; the hardware initialization operation includes burning a preset hardware script onto the FPGA board; the preset hardware script is used to implement data communication between the JTAG interface signal and the Block RAM module configured inside the FPGA; A simulation task execution module, used to execute a simulation task on the FPGA and generate simulation data based on the application and the hardware script after determining that the hardware initialization operation is completed; A simulation data monitoring module, used to obtain the simulation data by calling the TCL script based on the first handshake signal; the first handshake signal indicates that the simulation data has been generated.

8. The device according to claim 7, characterized in that The device further includes: A simulation data storage module, used to write the simulation data into an intermediate data file; A stored data monitoring module, configured to obtain simulation data written into the intermediate data file by invoking the TCL script based on a second handshake signal; the second handshake signal indicates that the simulation data has been written into the intermediate data file.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the program implements the steps of the method according to any one of claims 1-6.

10. An electronic device, characterized in that, Comprising: A memory storing a computer program thereon; A processor, configured to execute the computer program in the memory to implement the steps of the method according to any one of claims 1-6.

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