Reduction processing method and device of artificial intelligence chip, equipment, storage medium and program product

Abstract

The invention relates to a reduction processing method and device for an artificial intelligence chip, equipment, a storage medium and a program product, and relates to the technical field of artificial intelligence chips. The processing performance of the artificial intelligence chip can be improved under the condition that it is guaranteed that the reduction operation of the to-be-reduced data is processed. The method comprises the steps of obtaining data parameters and hardware parameters of to-be-reduced data, judging whether the to-be-reduced data is suitable for an optimized reduction processing mode or not according to the data parameters and the hardware parameters, and if yes, performing reduction processing on the to-be-reduced data by applying a target reduction processing mode in the optimized reduction processing mode, and if not, performing reduction processing on the to-be-reduced data according to a universal reduction processing mode.

Description

Technical Field

[0001] The present application relates to the technical field of artificial intelligence chips, and particularly to a reduction processing method, apparatus, computer device, computer-readable storage medium, and computer program product for an artificial intelligence chip. Background Art

[0002] With the development of artificial intelligence technology, application scenarios such as image recognition and natural language processing have high demands for computing power, and tasks in these scenarios usually need to be executed on artificial intelligence chips.

[0003] Among them, artificial intelligence chips are hardware chips specifically designed and optimized for artificial intelligence tasks, including but not limited to GPUs (Graphics Processing Units), NPUs (Neural Network Processing Units), and GPGPUs (General-Purpose computing on Graphics Processing Units).

[0004] Artificial intelligence chips can be applied to distributed computing, deep learning training, scientific computing, and streaming data processing, etc., involving reduction operations such as summation, maximum value, average value, etc. on large-scale data sets, and their performance directly affects the throughput and response time of the overall system.

[0005] Currently, the reduction processing methods in the art limit the processing performance of artificial intelligence chips to a certain extent. Summary of the Invention

[0006] Based on this, it is necessary to provide a reduction processing method, apparatus, computer device, computer-readable storage medium, and computer program product for an artificial intelligence chip to solve the above technical problems.

[0007] In a first aspect, the present application provides a reduction processing method for an artificial intelligence chip, including:

[0008] Obtaining data parameters and hardware parameters of the data to be reduced; the data parameters are the parameters of the data to be reduced under preset data parameter items; the hardware parameters are the parameters of the data to be reduced under preset hardware parameter items;

[0009] Judging whether the data to be reduced is applicable to an optimized reduction processing method according to the data parameters and the hardware parameters; wherein, the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip;

[0010] If so, perform reduction processing on the data to be reduced using the target reduction processing method in the optimized reduction processing method; the target reduction processing method is a reduction processing method adapted to the data to be reduced;

[0011] If not, perform reduction processing on the data to be reduced according to the general reduction processing method.

[0012] In a second aspect, the present application also provides a reduction processing device for an artificial intelligence chip, including:

[0013] A parameter acquisition module, configured to acquire the data parameters and hardware parameters of the data to be reduced; the data parameters are the parameters of the data to be reduced under the preset data parameter items; the hardware parameters are the parameters of the data to be reduced under the preset hardware parameter items;

[0014] An optimization judgment module, configured to judge whether the data to be reduced is applicable to the optimized reduction processing method according to the data parameters and the hardware parameters; wherein, the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip;

[0015] An optimization processing module, configured to, if so, perform reduction processing on the data to be reduced using the target reduction processing method in the optimized reduction processing method; the target reduction processing method is a reduction processing method adapted to the data to be reduced;

[0016] A general processing module, configured to, if not, perform reduction processing on the data to be reduced according to the general reduction processing method.

[0017] In a third aspect, the present application also provides a computer device, including a memory and a processor, the memory stores a computer program, and when the processor executes the computer program, the steps of the above method are implemented.

[0018] In a fourth aspect, the present application also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above method are implemented.

[0019] In a fifth aspect, the present application also provides a computer program product, including a computer program, and when the computer program is executed by a processor, the steps of the above method are implemented.

[0020] In the above reduction processing method, device, computer equipment, computer-readable storage medium and computer program product of the artificial intelligence chip, it is possible to first determine whether it is applicable to the optimized reduction processing method according to the data parameters and hardware parameters of the data to be reduced. The optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip. If it is applicable to the optimized reduction processing method, the target reduction processing method in the optimized reduction processing method is used to perform reduction processing on the data to be reduced. If it is not applicable to the optimized reduction processing method, the general reduction processing method can be used to perform reduction processing on the data to be reduced. Thus, through the selection of the adaptive reduction processing method, the optimized reduction processing method can be preferentially used to perform reduction processing on the data to be reduced, improving the processing performance of the artificial intelligence chip. When the data to be reduced is not applicable to the optimized reduction processing method, the general reduction processing method can be selected to perform reduction processing on the data to be reduced, ensuring that the reduction operation of the data to be reduced is processed. Therefore, the processing performance of the artificial intelligence chip can be improved while ensuring that the reduction operation of the data to be reduced is processed. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments of the present application or related technologies. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0022] Figure 1 FIG. is an application environment diagram of the reduction processing method of the artificial intelligence chip in an embodiment;

[0023] Figure 2 FIG. is a flowchart of the reduction processing method of the artificial intelligence chip in an embodiment;

[0024] Figure 3 FIG. is a flowchart of the reduction processing method of the artificial intelligence chip in another embodiment;

[0025] Figure 4 FIG. is a structural block diagram of the reduction processing device of the artificial intelligence chip in an embodiment;

[0026] Figure 5 FIG. is an internal structure diagram of a computer device in an embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0027] In order to make the objectives, technical solutions, and advantages of the present application more clearly understood, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0028] It should be noted that the terms "first", "second", etc. used in the present application can be used to describe various objects, but these objects are not limited by these terms. The term "including" used in the present application and any variations thereof are intended to cover non-exclusive inclusion. The term "plurality" used in the present application refers to two or more.

[0029] The reduction processing method of the artificial intelligence chip provided by the embodiments of the present application can be applied to an application environment as Figure 1 shown. The application environment may include a server, and the server may include a host and a device connected to each other. The host of the server may include a CPU (Central Processing Unit), and the device of the server may include an artificial intelligence device, which is a hardware device or system capable of performing artificial intelligence tasks. Among them, the artificial intelligence device may include one or more artificial intelligence chips. The multiple artificial intelligence chips may be exactly the same, partially the same, or completely different. Among them, the artificial intelligence chip includes, but is not limited to, a GPU (Graphics Processing Unit), an NPU (Neural Network Processing Unit), and a GPGPU (General-Purpose computing on Graphics Processing Unit). The reduction processing method of the artificial intelligence chip provided by the embodiments of the present application can be executed by the artificial intelligence device.

[0030] In the current technology, the inputs of the reduction operation generally include: input tensor data, reduction dimensions, and reduction modes. There are two types of reduction operations in the current parallel computing architecture: one is to perform reduction on a certain dimension (SingDimReduce), and the other is to reduce the input to a single number (AllReduce).

[0031] Among them, for reduction in a certain dimension: In the reduction operation of the current parallel computing architecture, usually according to the dimension of reduction, data is merged in different dimensions, and the input data for reduction will be divided into: [data blocks lower than the dimension of reduction, data blocks currently belonging to the dimension to be reduced, data blocks higher than the dimension of reduction]. The parallel computing architecture usually splits data in non-reduced dimensions. Among them, for reducing a number as input: The parallel computing architecture directly regards it as a dimension and directly splits data in this dimension. Sometimes, it is necessary to apply for temporary space (Workspace).

[0032] In this regard, if all kinds of artificial intelligence chips directly follow the above writing method of the parallel computing architecture, it will be difficult to utilize the hardware characteristics of the artificial intelligence chips and unable to optimize their processing performance. As an example, in deep learning training, the input data has a layout of [N (batch size), C (number of channels), H (height), W (width)]. It is very common to perform reduction together in the NHW direction. In Graph Mode, sometimes multiple reduction operations are fused, and thus the need for simultaneous reduction of multiple dimensions will occur. If directly following the strategy of calling the parallel computing architecture, reducing the input of [N, C, H, W] to [C] requires repeatedly calling the application programming interface (API) of "reducing in a certain dimension" 3 times. Repeatedly calling operators like this will cause multiple input / output (IO), and data cannot stay on the chip, resulting in poor performance.

[0033] In this regard, the reduction processing method of the artificial intelligence chip provided in the embodiments of this application can preferentially select an optimized reduction processing method to perform reduction processing on the data to be reduced through the selection of an adaptive reduction processing method, improving the processing performance of the artificial intelligence chip. When the data to be reduced is not suitable for the optimized reduction processing method, a general reduction processing method can be selected to perform reduction processing on the data to be reduced, ensuring that the reduction operation of the data to be reduced is processed. Thus, it is possible to improve the processing performance of the artificial intelligence chip while ensuring that the reduction operation of the data to be reduced is processed.

[0034] In an exemplary embodiment, as Figure 2 shown, a reduction processing method for an artificial intelligence chip is provided. This method can be applied to an artificial intelligence device, and the method may include the following steps:

[0035] Step S201, obtain the data parameters and hardware parameters of the data to be reduced.

[0036] In this step, the data to be reduced is the data to be subjected to reduction processing, and the data to be reduced can be tensor data. In some embodiments, according to the dimensions and modes of the reduction operation, the data to be reduced can be split into [data blocks with dimensions lower than the reduction dimension, data blocks belonging to the dimension that needs to be reduced currently, and data blocks with dimensions higher than the reduction dimension]. This is beneficial for splitting data on different hardware resources and can merge some different input situations.

[0037] In this step, the data parameters of the data to be reduced are the parameters of the data to be reduced under preset data parameter items. Among them, the preset data parameter items refer to the parameter items that need to be preset for the data in the reduction process, and the number of data parameter items is usually multiple. As an example, the preset data parameter items can include: the type of the input data, the type of the output data (in, for example, mixed-precision training, it may be different from the type of the input data), the number of elements in the parameters of the dimension that needs to be reduced (which can be derived from the dimensions of the input and output), the size of the dimension that needs to be reduced (if this size is 0, it can indicate that all the input data is reduced to 1 number), the dimension of the input data (such as [11, 13, 15], its dimension is 3), the consistency of the input and output dimensions (which can be a boolean value, 1 represents true, indicating that the input and output dimensions are required to be the same. For example, changing the input of [N, C, H, N] to [1, 1, C, 1]. If it is 0, then reducing the input of [N, C, H, W] to [C], and the parts with dimension 1 inside will be directly discarded), whether it is full reduction, etc. In practical applications, the corresponding data parameter items can be set according to the reduction process.

[0038] In this step, the hardware parameters of the data to be reduced are the parameters of the data to be reduced under preset hardware parameter items. Among them, the preset hardware parameter items refer to the parameter items that the reduction process requires for the hardware of the artificial intelligence chip, and the number of hardware parameter items is usually multiple. As an example, the preset hardware parameter items can include: the layout of the input data (activation layer tensor layout, column-major tensor layout, etc.), the memory architecture of the input (non-uniform memory access architecture NUMA, uniform memory access architecture UMA), the memory architecture of the output (non-uniform memory access architecture NUMA, uniform memory access architecture UMA. Among them, in the graph mode, the memory architecture of the output and the input sometimes may be different), etc. In practical applications, the corresponding hardware parameter items can be set according to the reduction process.

[0039] Step S202: Determine whether the data to be reduced is applicable to the optimized reduction processing method according to the data parameters and the hardware parameters.

[0040] In this step, it is possible to determine whether the data to be reduced is suitable for the optimized reduction processing method based on the data parameters and hardware parameters. Among them, the optimized reduction processing method refers to the reduction processing method obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip. Among them, the optimized reduction processing method may include the reduction processing method obtained by fusing (Fuse) multiple reduction processing methods based on the hardware characteristics of the artificial intelligence chip, and may include the reduction processing method obtained by optimizing the performance of one or more reduction processing methods based on the hardware layout of the artificial intelligence chip.

[0041] Among them, for the reduction processing method obtained by fusion (Fuse), it can reduce the performance overhead of starting the kernel of the operator, because in the current technology, each call of "performing reduction for a certain dimension" has a performance overhead of starting the kernel. It can also keep the input and output data in the chip as much as possible instead of interacting with the high-bandwidth memory (HBM), because the data transmission efficiency of the hardware is higher when the data is transmitted inside the chip. The data slicing can be merged in multiple dimensions to increase the flexibility of the data slicing of the warp and thread. For example, when the input of the reduction [N, C, H, W] becomes [C], when setting the optimized reduction processing method, the H dimension and the W dimension can be merged and regarded as dimensions lower than the C dimension. In this way, for the data of the H dimension and the W dimension, the slicing can be more uniform, so that the data can be better evenly distributed to the hardware, which is beneficial to data parallelism and thus improves the performance.

[0042] Among them, for the reduction processing method obtained by optimizing the performance of one or more reduction processing methods based on the hardware layout of the artificial intelligence chip, in some artificial intelligence chips, if the reduction processing method optimized according to the hardware layout characteristics is not adopted, but like the parallel computing architecture, it will lead to poor performance and the full characteristics and performance of the hardware cannot be exerted. For example, in some artificial intelligence chips, there are specific data layouts for the convolutional weights (conv weight) and specific data layouts for the BF16 data type. Then, the reduction operation can be directly performed according to the specific data layout, which can reduce the conversion process from the normal data layout to the specific data layout of the artificial intelligence chip, thereby improving the performance. Another example is that there are specific hardware instructions in some artificial intelligence chips, and there is no such hardware instruction in the parallel computing architecture. Then, the optimized reduction processing method can be set to directly call this hardware instruction.

[0043] In some other examples, in mixed-precision training, sometimes there is a reduction operation where the input is of the BF16 data type but the output is of the FP32 data type. At this time, the optimized reduction processing method can also be set to implement and improve the processing performance.

[0044] In some other examples, in graph mode, sometimes to reduce data reordering, there may be a memory architecture input of a non-uniform memory access architecture and a memory architecture output of a uniform memory access architecture. At this time, an optimized reduction processing method can also be set for implementation to improve processing performance.

[0045] In this step, the optimized reduction processing method can include multiple optimized reduction processing methods. Each reduction processing method can correspondingly require data parameters and hardware parameters. Thus, according to the data parameters and hardware parameters of the data to be reduced, it can be judged whether they meet the data parameters and hardware parameters required by the reduction processing method in the optimized reduction processing method, so as to judge whether the data to be reduced is applicable to the optimized reduction processing method.

[0046] Step S203, if so, apply the target reduction processing method in the optimized reduction processing method to perform reduction processing on the data to be reduced. The target reduction processing method is a reduction processing method adapted to the data to be reduced.

[0047] Step S204, if not, perform reduction processing on the data to be reduced according to the general reduction processing method.

[0048] The above steps S203 and S204 are respectively the processing flows for the data to be reduced being applicable and not applicable to the optimized reduction processing method. In step S203, if the data to be reduced is applicable to the optimized reduction processing method, it means that there is a target reduction processing method in the optimized reduction processing method that is adapted to the data to be reduced, and this target reduction processing method can be applied to perform reduction processing on the data to be reduced, achieving the effect of improving the processing performance of the artificial intelligence chip. In step S204, if the data to be reduced is not applicable to the optimized reduction processing method, then the data to be reduced can be processed according to the general reduction processing method to ensure that the reduction operation of the data to be reduced can be processed. Among them, the general reduction processing method can be a reduction processing method applicable to various artificial intelligence chips, and one kernel can support multiple different reduction modes (such as sum, avg, norm, etc.).

[0049] For the optimized reduction processing method and the general reduction processing method, adopting the optimized reduction processing method is conducive to better targeted optimization, while the general reduction processing method focuses on generalization. By adaptively selecting the reduction processing method, users do not need to perceive the details of hardware optimization, and while ensuring that the reduction operation of the data to be reduced is processed, the processing performance of the artificial intelligence chip is improved.

[0050] The reduction processing method of the artificial intelligence chip in this embodiment can first determine whether it is applicable to the optimized reduction processing method according to the data parameters and hardware parameters of the data to be reduced. The optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip. If it is applicable to the optimized reduction processing method, the target reduction processing method in the optimized reduction processing method is used to perform reduction processing on the data to be reduced. If it is not applicable to the optimized reduction processing method, the general reduction processing method can be used to perform reduction processing on the data to be reduced. Thus, through the selection of the adaptive reduction processing method, the optimized reduction processing method can be preferentially used to perform reduction processing on the data to be reduced, improving the processing performance of the artificial intelligence chip. When the data to be reduced is not applicable to the optimized reduction processing method, the general reduction processing method can be selected to perform reduction processing on the data to be reduced, ensuring that the reduction operation of the data to be reduced is processed. Therefore, the processing performance of the artificial intelligence chip can be improved while ensuring that the reduction operation of the data to be reduced is processed.

[0051] In an exemplary embodiment, the data parameter item includes a first part of data parameter items; the hardware parameter item includes a first part of hardware parameter items; the first part of data parameter items is a part of the data parameter item; the first part of hardware parameter items is a part of the hardware parameter item. According to the data parameters and hardware parameters in step S202, determining whether the data to be reduced is applicable to the optimized reduction processing method may include:

[0052] Determining whether the data to be reduced is applicable to the optimized reduction processing method according to the first part of data parameters and the first part of hardware parameters.

[0053] In this embodiment, a part of the data parameter items and a part of the hardware parameter items can be taken to determine whether the data to be reduced is applicable to the optimized reduction processing method. This part of the data parameter items is denoted as the first part of data parameter items, and this part of the hardware parameter items is denoted as the first part of hardware parameter items. Correspondingly, the parameters of the data to be reduced under the first part of data parameter items are denoted as the first part of data parameters, and the parameters of the data to be reduced under the first part of hardware parameter items are denoted as the first part of hardware parameters.

[0054] In this embodiment, it is possible to determine whether the data to be reduced is suitable for the optimized reduction processing method based on the first part of data parameters and the first part of hardware parameters. Among them, if both the first part of data parameters and the first part of hardware parameters meet the requirements of the data parameters and hardware parameters in the optimized reduction processing method, it can be determined that the data to be reduced is suitable for the optimized reduction processing method. If either the first part of data parameters or the first part of hardware parameters does not meet the corresponding requirements of the data parameters or hardware parameters, it can be determined that the data to be reduced is not suitable for the optimized reduction processing method. In practical applications, the first part of data parameter items may include: the type of input data, the type of output data, the number of parameters in the dimension to be reduced, the size of the dimension to be reduced, the dimension of the input data, and the consistency between the input and output dimensions. The first part of hardware parameter items may include: the layout of the input data, the memory architecture of the input, and the memory architecture of the output. The parameters of each first part of data parameter item should meet the requirements of the data parameters in the optimized reduction processing method, and the parameters of each first part of hardware parameter item should meet the requirements of the hardware parameters in the optimized reduction processing method.

[0055] In an exemplary embodiment, the above-mentioned determination of whether the data to be reduced is suitable for the optimized reduction processing method based on the first part of data parameters and the first part of hardware parameters may further include:

[0056] Obtain the first standard data parameters and the first standard hardware parameters of each reduction processing method in the optimized reduction processing method. Determine whether the data to be reduced is suitable for the optimized reduction processing method based on the consistency between the first part of data parameters and the first standard data parameters, and the consistency between the first part of hardware parameters and the first standard hardware parameters.

[0057] In this embodiment, each reduction processing method in the optimized reduction processing method is correspondingly provided with first standard data parameters and first standard hardware parameters. The first standard data parameters are the parameters corresponding to the first part of data parameter items in the reduction processing method in the optimized reduction processing method, and the first standard hardware parameters are the parameters corresponding to the first part of hardware parameters in the reduction processing method in the optimized reduction processing method. The first standard data parameters and the first standard hardware parameters can be used to represent the requirements of the reduction processing method in the optimized reduction processing method for data parameters and hardware parameters.

[0058] In this embodiment, it is possible to determine whether the data to be reduced is suitable for the optimized reduction processing method based on the consistency between each first part of data parameter and the corresponding first standard data parameter, and the consistency between each first part of hardware parameter and the corresponding first standard hardware parameter. Thus, it is possible to accurately determine whether the data to be reduced is suitable for the optimized reduction processing method.

[0059] In an exemplary embodiment, judging whether the data to be reduced is applicable to the optimized reduction processing method according to the consistency between the first part of data parameters and the first standard data parameters and the consistency between the first part of hardware parameters and the first standard hardware parameters may further include:

[0060] If there is a reduction processing method in the optimized reduction processing method where the first standard data parameters are consistent with the first part of data parameters and the first standard hardware parameters are consistent with the first part of hardware parameters, it is determined that the data to be reduced is applicable to the optimized reduction processing method, and the reduction processing method is determined as the target reduction processing method; if there is no reduction processing method in the optimized reduction processing method where the first standard data parameters are consistent with the first part of data parameters and the first standard hardware parameters are consistent with the first part of hardware parameters, it is determined that the data to be reduced is not applicable to the optimized reduction processing method.

[0061] In this embodiment, each first part of hardware parameters can be compared with the corresponding first standard hardware parameters, and the first part of hardware parameters can be consistent or inconsistent with the first standard hardware parameters. Each first part of hardware parameters is also compared with the corresponding first standard hardware parameters, and the first part of hardware parameters can be consistent or inconsistent with the first standard hardware parameters. In this regard, if in the optimized reduction processing method, there is a reduction processing method where the first standard data parameters are consistent with the first part of data parameters and the first standard hardware parameters are consistent with the first part of hardware parameters, it indicates that the data to be reduced is applicable to the optimized reduction processing method, and the reduction processing method where the first standard data parameters are consistent with the first part of data parameters and the first standard hardware parameters are consistent with the first part of hardware parameters is confirmed as the target reduction processing method in the optimized reduction processing method, that is, a reduction processing method in the optimized reduction processing method that is adapted to the data to be reduced. On the contrary, if there is no reduction processing method in the optimized reduction processing method where the first standard data parameters are consistent with the first part of data parameters and the first standard hardware parameters are consistent with the first part of hardware parameters, it indicates that the data to be reduced is not applicable to the optimized reduction processing method, and the data to be reduced needs to be reduced according to the general reduction processing method. Thus, it can accurately judge whether the data to be reduced is applicable to the optimized reduction processing method and determine the target reduction processing method in the optimized reduction processing method.

[0062] In an exemplary embodiment, the data parameter items include second - part data parameter items; the hardware parameter items include second - part hardware parameter items; the second - part data parameter items are part of the data parameter items; the second - part hardware parameter items are part of the hardware parameter items; wherein, the sum of the number of items of the second - part data parameter items and the second - part hardware parameter items is less than the sum of the number of items of the first - part data parameter items and the first - part hardware parameter items. The reduction processing of the data to be reduced in step S204 according to the general reduction processing method may include:

[0063] Judging whether the data to be reduced is applicable to the general reduction processing method according to the second - part data parameter of the second - part data parameter items and the second - part hardware parameter of the second - part hardware parameter items; if not, an error is reported for the reduction processing of the data to be reduced; if so, the target reduction processing method in the general reduction processing method is applied to perform reduction processing on the data to be reduced.

[0064] In this embodiment, for the general reduction processing method, some data parameter items and some hardware parameter items can be taken to judge whether the data to be reduced is applicable to the general reduction processing method. Among them, the part of the data parameter items is denoted as the second - part data parameter items, and the part of the hardware parameter items is denoted as the second - part hardware parameter items. Correspondingly, the parameter of the data to be reduced under the second - part data parameter items is denoted as the second - part data parameter, and the parameter of the data to be reduced under the second - part hardware parameter items is denoted as the second - part hardware parameter. Wherein, the sum of the number of items of the second - part data parameter items and the second - part hardware parameter items is less than the sum of the number of items of the first - part data parameter items and the first - part hardware parameter items. That is to say, compared with the number of parameter items used for the applicability judgment of the optimized reduction processing method, the number of parameter items used for the applicability judgment of the general reduction processing method is less, which reflects that for the optimized reduction processing method, more parameter items need to be judged. The more parameter items there are, the more extreme the optimization of the processing performance of the artificial intelligence chip will be, while the general reduction processing method requires fewer parameter items to be judged and is more general - purpose.

[0065] In this embodiment, according to the second part of data parameters and the second part of hardware parameters, it is determined whether the data to be reduced is suitable for a general reduction processing method. When both the second part of data parameters and the second part of hardware parameters meet the requirements of the reduction processing method for data parameters and hardware parameters in the general reduction processing method, it is determined that the data to be reduced is suitable for the general reduction processing method; otherwise, it is not suitable for the general reduction processing method. In practical applications, the second part of data parameter items may include: the type of input data, the type of output data, the consistency of input and output dimensions, and whether it is a full reduction. The second part of hardware parameter items may include: the layout of input data and the memory architecture of the input. The parameters of each second part of data parameter item should conform to the requirements of the reduction processing method for data parameters in the optimized reduction processing method, and the parameters of each second part of hardware parameter item should conform to the requirements of the reduction processing method for hardware parameters in the optimized reduction processing method.

[0066] In this embodiment, if the data to be reduced is not suitable for the general reduction processing method, anti-fool error reporting is required so that the user can proofread and correct the relevant data parameters and hardware parameters. If the data to be reduced is suitable for the general reduction processing method, the target reduction processing method in the general reduction processing method can be applied to perform reduction processing on the data to be reduced, and the target reduction processing method is a reduction processing method in the general reduction processing method that is adapted to the data to be reduced.

[0067] In an exemplary embodiment, the above determination of whether the data to be reduced is suitable for the general reduction processing method according to the second part of data parameters of the second part of data parameter items and the second part of hardware parameters of the second part of hardware parameter items may further include:

[0068] If there is a reduction processing method in the general reduction processing method where the second standard data parameters are consistent with the second part of data parameters and the second standard hardware parameters are consistent with the second part of hardware parameters, it is determined that the data to be reduced is suitable for the general reduction processing method, and the reduction processing method is determined as the target reduction processing method. If there is no reduction processing method in the general reduction processing method where the second standard data parameters are consistent with the second part of data parameters and the second standard hardware parameters are consistent with the second part of hardware parameters, it is determined that the data to be reduced is not suitable for the general reduction processing method.

[0069] In this embodiment, each reduction processing method in the general reduction processing method is correspondingly provided with a second standard data parameter and a second standard hardware parameter. The second standard data parameter is the parameter corresponding to the reduction processing method in the general reduction processing method in the second part of the data parameter items, and the second standard hardware parameter is the parameter corresponding to the reduction processing method in the general reduction processing method in the second part of the hardware parameter items. The second standard data parameter and the second standard hardware parameter can be used to represent the requirements of the reduction processing method in the general reduction processing method for the data parameter and the hardware parameter.

[0070] In this embodiment, each second part of the hardware parameter can be compared with the corresponding second standard hardware parameter, and the second part of the hardware parameter can be consistent or inconsistent with the second standard hardware parameter. Each second part of the hardware parameter is also compared with the corresponding second standard hardware parameter, and the second part of the hardware parameter can be consistent or inconsistent with the second standard hardware parameter. In this regard, in the general reduction processing method, if there is a reduction processing method in which the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, it indicates that the data to be reduced is applicable to the general reduction processing method. The reduction processing method in which the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter is confirmed as the target reduction processing method in the general reduction processing method, that is, a reduction processing method in the general reduction processing method that is adapted to the data to be reduced. Conversely, if the target reduction processing method does not exist in the general reduction processing method, it indicates that the data to be reduced is not applicable to the general reduction processing method, and an anti-fooling error reporting process can be performed. Thus, it can accurately determine whether the data to be reduced is applicable to the general reduction processing method and determine the target reduction processing method in the general reduction processing method, and can also perform anti-fooling error reporting to improve the reliability of the reduction processing.

[0071] In an exemplary embodiment, as Figure 3 shown, a reduction processing method for an artificial intelligence chip is provided, and the method may include the following steps:

[0072] Step S301, obtain the data parameter and the hardware parameter of the data to be reduced.

[0073] Step S302, if there is a reduction processing method in the optimized reduction processing method in which the first standard data parameter is consistent with the first part of the data parameter and the first standard hardware parameter is consistent with the first part of the hardware parameter, determine that the data to be reduced is applicable to the optimized reduction processing method, and determine the reduction processing method as the target reduction processing method.

[0074] Step S303, apply the target reduction processing method in the optimized reduction processing method to perform reduction processing on the data to be reduced.

[0075] Step S304, if there is no reduction processing method in the optimized reduction processing method where the first standard data parameter is consistent with the first part of the data parameter and the first standard hardware parameter is consistent with the first part of the hardware parameter, it is determined that the data to be reduced is not applicable to the optimized reduction processing method.

[0076] Step S305, if there is a reduction processing method in the general reduction processing method where the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, it is determined that the data to be reduced is applicable to the general reduction processing method, and the reduction processing method is determined as the target reduction processing method.

[0077] Step S306, apply the target reduction processing method in the general reduction processing method to perform reduction processing on the data to be reduced.

[0078] Step S307, if there is no reduction processing method in the general reduction processing method where the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, it is determined that the data to be reduced is not applicable to the general reduction processing method.

[0079] Step S308, report an error for the reduction processing of the data to be reduced.

[0080] In practical applications, the embodiments of the present application can focus on the efficient execution optimization of reduction operators. By designing an optimized reduction processing method, it is possible to achieve the resource adaptive allocation of computing task units in the cross-stream processor cluster (Stream Processing Cluster, SPC), compute unit (Compute Unit, CU), and execution unit (Execution Unit, EU) in the artificial intelligence chip, so as to improve the computing efficiency, reduce the latency and improve the performance. Fully considering the reduction processing and hardware characteristics, sinking the hardware optimization details into the operator internal, enabling some hardware parameters of the artificial intelligence chip to be passed into the optimized reduction processing method, resulting in a significant performance improvement for some operators of some deep learning networks (such as the FACENET network, GPT network, Swin-transformer network, Conformer network, Retinanet network, testCNN network, ssd300 network, etc., all have a performance improvement of more than 30%). It combines function generalization and performance optimization, and also makes the upper-layer framework users unaware of the hardware optimization details.

[0081] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are sequentially shown according to the indications of the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear description in this article, there is no strict order limit for the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same moment, but can be executed at different moments. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or steps or stages in other steps. It can be understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by the combination fall within the scope of protection of this application.

[0082] Based on the same inventive concept, an embodiment of the present application further provides a reduction processing device for an artificial intelligence chip for implementing the reduction processing method of the artificial intelligence chip involved above. The solution provided by this device for solving problems is similar to the solution recorded in the above method. Therefore, the specific limitations in one or more embodiments of the reduction processing device for an artificial intelligence chip provided below can refer to the limitations on the reduction processing method of the artificial intelligence chip in the above text, and will not be repeated here.

[0083] In an exemplary embodiment, as Figure 4 shown, a reduction processing device for an artificial intelligence chip is provided. The device 400 may include:

[0084] A parameter acquisition module 401, configured to acquire data parameters and hardware parameters of data to be reduced; the data parameters are parameters of the data to be reduced under a preset data parameter item; the hardware parameters are parameters of the data to be reduced under a preset hardware parameter item;

[0085] An optimization judgment module 402, configured to judge whether the data to be reduced is suitable for an optimized reduction processing method according to the data parameters and the hardware parameters; wherein, the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip;

[0086] An optimization processing module 403, configured to, if so, perform reduction processing on the data to be reduced by using a target reduction processing method in the optimized reduction processing method; the target reduction processing method is a reduction processing method adapted to the data to be reduced;

[0087] A general processing module 404, configured to, if not, perform reduction processing on the data to be reduced according to a general reduction processing method.

[0088] In an exemplary embodiment, the data parameter items include first - part data parameter items; the hardware parameter items include first - part hardware parameter items; the first - part data parameter items are part of the data parameter items; the first - part hardware parameter items are part of the hardware parameter items; an optimization judgment module 402, configured to judge whether the data to be reduced is applicable to an optimized reduction processing method according to the first - part data parameters and the first - part hardware parameters; wherein, the first - part data parameters are the parameters of the data to be reduced under the first - part data parameter items; and the first - part hardware parameters are the parameters of the data to be reduced under the first - part hardware parameter items.

[0089] In an exemplary embodiment, the optimization judgment module 402 is configured to obtain first - standard data parameters and first - standard hardware parameters of each reduction processing method in the optimized reduction processing method; wherein, the first - standard data parameters are the parameters corresponding to the reduction processing method under the first - part data parameter items; the first - standard hardware parameters are the parameters corresponding to the reduction processing method under the first - part hardware parameters; and judge whether the data to be reduced is applicable to the optimized reduction processing method according to the consistency between the first - part data parameters and the first - standard data parameters and the consistency between the first - part hardware parameters and the first - standard hardware parameters.

[0090] In an exemplary embodiment, the optimization judgment module 402 is configured to, if there is a reduction processing method in the optimized reduction processing method where the first - standard data parameters are consistent with the first - part data parameters and the first - standard hardware parameters are consistent with the first - part hardware parameters, then judge that the data to be reduced is applicable to the optimized reduction processing method, and determine the reduction processing method as the target reduction processing method; if there is no reduction processing method in the optimized reduction processing method where the first - standard data parameters are consistent with the first - part data parameters and the first - standard hardware parameters are consistent with the first - part hardware parameters, then judge that the data to be reduced is not applicable to the optimized reduction processing method.

[0091] In an exemplary embodiment, the data parameter items include second - part data parameter items; the hardware parameter items include second - part hardware parameter items; the second - part data parameter items are part of the data parameter items; the second - part hardware parameter items are part of the hardware parameter items; wherein, the sum of the number of items of the second - part data parameter items and the second - part hardware parameter items is less than the sum of the number of items of the first - part data parameter items and the first - part hardware parameter items; the general - purpose processing module 404 is configured to determine whether the data to be reduced is applicable to the general reduction processing method according to the second - part data parameters of the second - part data parameter items and the second - part hardware parameters of the second - part hardware parameter items; if not, an error is reported for the reduction processing of the data to be reduced; if so, the target reduction processing method in the general reduction processing method is applied to perform reduction processing on the data to be reduced.

[0092] In an exemplary embodiment, the general - purpose processing module 404 is configured to, if there is a reduction processing method in the general reduction processing method in which the second - standard data parameters are consistent with the second - part data parameters and the second - standard hardware parameters are consistent with the second - part hardware parameters, determine that the data to be reduced is applicable to the general reduction processing method, and determine the reduction processing method as the target reduction processing method; wherein, the second - standard data parameters are the parameters corresponding to the reduction processing method in the second - part data parameter items in the general reduction processing method; the second - standard hardware parameters are the parameters corresponding to the reduction processing method in the second - part hardware parameter items in the general reduction processing method; if there is no reduction processing method in the general reduction processing method in which the second - standard data parameters are consistent with the second - part data parameters and the second - standard hardware parameters are consistent with the second - part hardware parameters, it is determined that the data to be reduced is not applicable to the general reduction processing method.

[0093] Each module in the reduction processing device of the above - mentioned artificial intelligence chip can be implemented in whole or in part by software, hardware, and their combination. The above - mentioned modules can be embedded in the processor in the computer device in hardware form or be independent of the processor, or can be stored in the memory in the computer device in software form, so that the processor can call and execute the operations corresponding to the above - mentioned modules.

[0094] In an exemplary embodiment, a computer device is provided. The computer device can be a server or a terminal, and its internal structure diagram can be as Figure 5As shown in the figure. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O), and a communication interface. Among them, the processor, the memory, and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with external devices through a network connection. When the computer program is executed by the processor, it implements a reduction processing method for an artificial intelligence chip.

[0095] Those skilled in the art can understand that Figure 5 The structure shown in the figure is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have a different component layout.

[0096] In one embodiment, a computer device is provided, including a memory and a processor. A computer program is stored in the memory, and when the processor executes the computer program, the steps in the above method embodiments are implemented.

[0097] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by the processor, the steps in the above method embodiments are implemented.

[0098] In one embodiment, a computer program product is provided, including a computer program. When the computer program is executed by the processor, the steps in the above method embodiments are implemented.

[0099] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use, and processing of relevant data need to comply with relevant regulations.

[0100] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in the present application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in the present application can be general-purpose processors, central processing units, graphics processors, digital signal processors, programmable logic devices, data processing logics based on quantum computing, artificial intelligence (AI) processors, etc., without limitation.

[0101] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope recorded in the present application.

[0102] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims

1. A reduction processing method for an artificial intelligence chip, characterized in that, The method includes: Obtaining data parameters and hardware parameters of the data to be reduced; the data parameters are the parameters of the data to be reduced under preset data parameter items; the hardware parameters are the parameters of the data to be reduced under preset hardware parameter items; Judging whether the data to be reduced is applicable to an optimized reduction processing method according to the data parameters and the hardware parameters; wherein, the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of an artificial intelligence chip; If so, performing reduction processing on the data to be reduced by using a target reduction processing method in the optimized reduction processing method; the target reduction processing method is a reduction processing method adapted to the data to be reduced; If not, performing reduction processing on the data to be reduced according to a general reduction processing method.

2. The method according to claim 1, wherein The data parameter items include first - part data parameter items; the hardware parameter items include first - part hardware parameter items; the first - part data parameter items are part of the data parameter items; The first - part hardware parameter items are part of the hardware parameter items; The judging whether the data to be reduced is applicable to an optimized reduction processing method according to the data parameters and the hardware parameters includes: Judging whether the data to be reduced is applicable to an optimized reduction processing method according to first - part data parameters and first - part hardware parameters; Wherein, the first - part data parameters are the parameters of the data to be reduced under the first - part data parameter items; the first - part hardware parameters are the parameters of the data to be reduced under the first - part hardware parameter items.

3. The method according to claim 2, wherein The judging whether the data to be reduced is applicable to an optimized reduction processing method according to first - part data parameters and first - part hardware parameters includes: Obtaining first - standard data parameters and first - standard hardware parameters of each reduction processing method in the optimized reduction processing method; wherein, the first - standard data parameters are the parameters corresponding to the reduction processing method under the first - part data parameter items; the first - standard hardware parameters are the parameters corresponding to the reduction processing method under the first - part hardware parameters; Judging whether the data to be reduced is applicable to the optimized reduction processing method according to the consistency between the first - part data parameters and the first - standard data parameters and the consistency between the first - part hardware parameters and the first - standard hardware parameters.

4. The method according to claim 3, characterized in that, The judging whether the data to be reduced is applicable to the optimized reduction processing method according to the consistency between the first - part data parameters and the first - standard data parameters and the consistency between the first - part hardware parameters and the first - standard hardware parameters includes: If there is a reduction processing method in the optimized reduction processing method where the first - standard data parameters are consistent with the first - part data parameters and the first - standard hardware parameters are consistent with the first - part hardware parameters, then judging that the data to be reduced is applicable to the optimized reduction processing method and determining the reduction processing method as the target reduction processing method; If there is no reduction processing method in the optimized reduction processing method where the first standard data parameter is consistent with the first part of the data parameter and the first standard hardware parameter is consistent with the first part of the hardware parameter, it is determined that the data to be reduced is not applicable to the optimized reduction processing method.

5. The method according to any one of claims 1 to 4, characterized in that, The data parameter item includes a second part of the data parameter item; the hardware parameter item includes a second part of the hardware parameter item; the second part of the data parameter item is a part of the data parameter item; the second part of the hardware parameter item is a part of the hardware parameter item; wherein, the sum of the number of items of the second part of the data parameter item and the second part of the hardware parameter item is less than the sum of the number of items of the first part of the data parameter item and the first part of the hardware parameter item; The reducing the data to be reduced according to the general reduction processing method includes: Judging whether the data to be reduced is applicable to the general reduction processing method according to the second part of the data parameter of the second part of the data parameter item and the second part of the hardware parameter of the second part of the hardware parameter item; If not, an error is reported for the reduction processing of the data to be reduced; If so, the target reduction processing method in the general reduction processing method is applied to reduce the data to be reduced.

6. The method according to claim 5, characterized in that, The judging whether the data to be reduced is applicable to the general reduction processing method according to the second part of the data parameter of the second part of the data parameter item and the second part of the hardware parameter of the second part of the hardware parameter item includes: If there is a reduction processing method in the general reduction processing method where the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, it is determined that the data to be reduced is applicable to the general reduction processing method, and the reduction processing method is determined as the target reduction processing method; wherein, the second standard data parameter is the parameter corresponding to the reduction processing method in the general reduction processing method in the second part of the data parameter item; the second standard hardware parameter is the parameter corresponding to the reduction processing method in the general reduction processing method in the second part of the hardware parameter item; If there is no reduction processing method in the general reduction processing method where the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, it is determined that the data to be reduced is not applicable to the general reduction processing method.

7. A reduction processing device for an artificial intelligence chip, characterized in that, The device includes: A parameter acquisition module, configured to acquire the data parameter and the hardware parameter of the data to be reduced; the data parameter is the parameter of the data to be reduced under a preset data parameter item; the hardware parameter is the parameter of the data to be reduced under a preset hardware parameter item; An optimization judgment module, configured to judge whether the data to be reduced is applicable to an optimized reduction processing method according to the data parameter and the hardware parameter; wherein, the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of an artificial intelligence chip; An optimization processing module, configured to, if so, perform reduction processing on the data to be reduced by using a target reduction processing method in the optimized reduction processing methods; the target reduction processing method is a reduction processing method adapted to the data to be reduced. A general processing module, configured to, if not, perform reduction processing on the data to be reduced according to a general reduction processing method.

8. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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