Reduction processing method, device, equipment, storage medium and program product for artificial intelligence chip

Abstract

The present application relates to a reduction processing method, apparatus, device, storage medium, and program product for an artificial intelligence chip, and relates to the field of artificial intelligence chip technology. The present application can improve the processing performance of an artificial intelligence chip while ensuring that the reduction operation of the data to be reduced is processed. The method includes: obtaining data parameters and hardware parameters of the data to be reduced, determining whether the data to be reduced is suitable for an optimized reduction processing method based on the data parameters and hardware parameters, and if so, applying the target reduction processing method in the optimized reduction processing method to reduce the data to be reduced; otherwise, reducing the data to be reduced according to a general reduction processing method.

Description

Technical Field

[0001] The present application relates to the field of artificial intelligence chip technology, and in particular to a reduction processing method, apparatus, computer equipment, computer-readable storage medium, and computer program product for an artificial intelligence chip. Background Art

[0002] With the development of artificial intelligence technology, application scenarios such as image recognition and natural language processing have placed high demands on computing power. Tasks in these scenarios usually need to be executed on artificial intelligence chips.

[0003] Among them, artificial intelligence chips are hardware chips specially designed and optimized for artificial intelligence tasks, including but not limited to GPU (Graphics Processing Unit), NPU (Neural Network Processing Unit), and GPGPU (General-Purpose computing on Graphics Processing Unit).

[0004] Artificial intelligence chips can be applied to distributed computing, deep learning training, scientific computing, and streaming data processing, involving reduction operations such as summation, maximum value, and average value on large-scale data sets. Their performance directly affects the throughput and response time of the overall system.

[0005] The reduction processing method in current technology limits the processing performance of artificial intelligence chips to a certain extent. Summary of the Invention

[0006] Based on this, it is necessary to provide a reduction processing method, device, computer equipment, computer-readable storage medium and computer program product for an artificial intelligence chip to address the above technical problems.

[0007] In a first aspect, the present application provides a reduction processing method for an artificial intelligence chip, comprising:

[0008] Acquire data parameters and hardware parameters of the data to be reduced; the data parameters are parameters of the data to be reduced under a preset data parameter item; the hardware parameters are parameters of the data to be reduced under a preset hardware parameter item;

[0009] Determining whether the data to be reduced is suitable for an optimized reduction processing method based on the data parameters and the hardware parameters; wherein the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip;

[0010] If so, applying a target reduction processing method in the optimized reduction processing method to reduce the data to be reduced; the target reduction processing method is a reduction processing method adapted to the data to be reduced;

[0011] If not, the data to be reduced is reduced according to a general reduction processing method.

[0012] In a second aspect, the present application further provides a reduction processing device for an artificial intelligence chip, comprising:

[0013] a parameter acquisition module, configured to acquire data parameters and hardware parameters of the data to be reduced; the data parameters are parameters of the data to be reduced under a preset data parameter item; the hardware parameters are parameters of the data to be reduced under a preset hardware parameter item;

[0014] an optimization judgment module, configured to judge whether the data to be reduced is suitable for an optimized reduction processing method based on the data parameters and the hardware parameters; wherein the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip;

[0015] an optimization processing module, configured to, if yes, apply a target reduction processing method in the optimized reduction processing method to perform reduction processing on the data to be reduced; the target reduction processing method is a reduction processing method adapted to the data to be reduced;

[0016] The general processing module is configured to, if not, perform reduction processing on the data to be reduced according to a general reduction processing method.

[0017] In a third aspect, the present application further provides a computer device comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above method when executing the computer program.

[0018] In a fourth aspect, the present application also provides a computer-readable storage medium having a computer program stored thereon, which implements the steps of the above method when executed by a processor.

[0019] In a fifth aspect, the present application also provides a computer program product, comprising a computer program, which implements the steps of the above method when executed by a processor.

[0020] In the reduction processing method, apparatus, computer equipment, computer-readable storage medium, and computer program product of the above-mentioned artificial intelligence chip, it can be first determined whether an optimized reduction processing method is applicable based on the data parameters and hardware parameters of the data to be reduced. The optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip. If the optimized reduction processing method is applicable, the target reduction processing method in the optimized reduction processing method is applied to the data to be reduced. If the optimized reduction processing method is not applicable, the data to be reduced can be reduced according to a general reduction processing method. Thus, through the selection of an adaptive reduction processing method, the optimized reduction processing method can be preferentially used to reduce the data to be reduced, thereby improving the processing performance of the artificial intelligence chip. When the data to be reduced is not applicable to the optimized reduction processing method, the general reduction processing method can be selected to reduce the data to be reduced, ensuring that the reduction operation of the data to be reduced is processed, thereby improving the processing performance of the artificial intelligence chip while ensuring that the reduction operation of the data to be reduced is processed. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments of the present application or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 This is a diagram illustrating an application environment of a reduction processing method for an artificial intelligence chip in one embodiment;

[0023] Figure 2 1 is a flow chart of a reduction processing method for an artificial intelligence chip in one embodiment;

[0024] Figure 3 1 is a flow chart of a reduction processing method for an artificial intelligence chip in another embodiment;

[0025] Figure 4 This is a structural block diagram of a reduction processing device of an artificial intelligence chip in one embodiment;

[0026] Figure 5 FIG. 1 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0028] It should be noted that the terms "first" and "second" used in this application may be used to describe various objects, but these objects are not limited by these terms. The terms "including" and any variations used in this application are intended to cover non-exclusive inclusions. The term "plurality" used in this application refers to two or more.

[0029] The reduction processing method of the artificial intelligence chip provided in the embodiment of the present application can be applied to Figure 1 In the application environment shown, the application environment may include a server, and the server may include a host and a device connected to each other. The host of the server may include a CPU (Central Processing Unit), and the device of the server may include an artificial intelligence device, which is a hardware device or system capable of performing artificial intelligence tasks. Among them, the artificial intelligence device may include one or more artificial intelligence chips. The multiple artificial intelligence chips may be completely identical, partially identical, or completely different. Among them, artificial intelligence chips include but are not limited to GPUs (Graphics Processing Units), NPUs (Neural Network Processing Units), and GPGPUs (General-Purpose computing on Graphics Processing Units). The reduction processing method of the artificial intelligence chip provided in the embodiment of the present application can be executed by an artificial intelligence device.

[0030] In current technology, the input of a reduction operation generally includes: input tensor data, reduction dimension, and reduction mode. There are two types of reduction operations in the current parallel computing architecture: one is to reduce a certain dimension (SingDimReduce), and the other is to reduce the input to a number (AllReduce).

[0031] Reduction operations on a specific dimension: Current parallel computing architectures typically combine data across different dimensions based on the reduction dimension, dividing the input data into: [data blocks lower than the reduction dimension, data blocks belonging to the dimension currently being reduced, and data blocks higher than the reduction dimension]. Parallel computing architectures typically split data along non-reducible dimensions. When reducing a single number in the input, the parallel computing architecture treats it as a dimension and performs data splitting directly along that dimension, sometimes requiring the allocation of temporary workspace.

[0032] Therefore, if all AI chips were directly written according to the aforementioned parallel computing architecture, it would be difficult to utilize the hardware characteristics of the AI ​​chips and achieve optimal processing performance. For example, in deep learning training, the input data is arranged in the [N (batch size), C (number of channels), H (height), W (width)] layout. It is common to perform reductions in the N, H, and W directions simultaneously. In graph mode, multiple reduction operations are sometimes combined, which creates the need for simultaneous reductions in multiple dimensions. If the parallel computing architecture strategy is directly used to reduce the input [N, C, H, W] to [C], the "reduce on a specific dimension" application programming interface (API) must be repeatedly called three times. This repeated operator call results in multiple input and output (IO) operations, preventing data from being stored on-chip, resulting in poor performance.

[0033] In this regard, the reduction processing method of the artificial intelligence chip provided in the embodiment of the present application can give priority to the optimized reduction processing method for reducing the data to be reduced through the selection of an adaptive reduction processing method, thereby improving the processing performance of the artificial intelligence chip. When the data to be reduced is not suitable for the optimized reduction processing method, a general reduction processing method can be selected to reduce the data to be reduced, ensuring that the reduction operation of the data to be reduced is processed, thereby improving the processing performance of the artificial intelligence chip while ensuring that the reduction operation of the data to be reduced is processed.

[0034] In an exemplary embodiment, Figure 2 As shown, a reduction processing method for an artificial intelligence chip is provided. The method can be applied to an artificial intelligence device and may include the following steps:

[0035] Step S201: Acquire data parameters and hardware parameters of the data to be reduced.

[0036] In this step, the data to be reduced is the data to be reduced, and the data to be reduced can be tensor data. In some embodiments, the data to be reduced can be divided into [data blocks with a lower dimension than the reduction, data blocks belonging to the dimension currently to be reduced, and data blocks with a higher dimension than the reduction] based on the dimension and mode of the reduction operation. This facilitates data segmentation across different hardware resources and can merge different input scenarios.

[0037] In this step, the data parameters of the data to be reduced are the parameters of the data to be reduced under the preset data parameter items. Preset data parameter items refer to the pre-set parameter items required for the data reduction process, and there are usually multiple data parameter items. As an example, the preset data parameter items may include: the type of input data, the type of output data (which may be different from the input data type in mixed-precision training, for example), the number of parameters in the dimension to be reduced (which can be derived from the input and output dimensions), the size of the dimension to be reduced (if this size is 0, it means that all input data is reduced to a number of 1), the dimension of the input data (such as [11, 13, 15], which has a dimension of 3), the consistency of the input and output dimensions (which can be a Boolean value, 1 indicates true, indicating that the input and output dimensions are required to be the same, for example, the input of [N, C, H, N] is reduced to [1, 1, C, 1]; if it is 0, the input of [N, C, H, W] is reduced to [C], and the part with a dimension of 1 is directly discarded), whether the reduction is a full reduction, etc. In practical applications, corresponding data parameter items can be set according to the reduction process.

[0038] In this step, the hardware parameters of the data to be reduced are the parameters of the data to be reduced under the preset hardware parameter items. Among them, the preset hardware parameter items refer to the parameter items required for the hardware of the artificial intelligence chip for the reduction processing, and the number of hardware parameter items is usually multiple. As an example, the preset hardware parameter items may include: the layout of the input data (activation layer tensor layout, column-major tensor layout, etc.), the input memory architecture (non-uniform memory access architecture NUMA, uniform memory access architecture UMA), the output memory architecture (non-uniform memory access architecture NUMA, uniform memory access architecture UMA, wherein, in graph mode, the output memory architecture and the input memory architecture are sometimes different), etc. In actual applications, the corresponding hardware parameter items can be set according to the reduction processing.

[0039] Step S202 : judging whether the data to be reduced is suitable for the optimized reduction processing method according to the data parameters and the hardware parameters.

[0040] In this step, the suitability of the data to be reduced for an optimized reduction processing method can be determined based on data parameters and hardware parameters. An optimized reduction processing method refers to a reduction processing method obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the AI ​​chip. This optimized reduction processing method may include a reduction processing method obtained by fusing multiple reduction processing methods based on the hardware characteristics of the AI ​​chip, or a reduction processing method obtained by optimizing the performance of one or more reduction processing methods based on the hardware layout of the AI ​​chip.

[0041] The fused reduction processing method can reduce the kernel launch performance overhead of operators. In current technology, each call to "reduce on a specific dimension" incurs a kernel launch performance overhead. It also allows input and output data to reside on-chip as much as possible, rather than interacting with high-bandwidth memory (HBM). Because data is transmitted within the chip, hardware transmission efficiency is higher. Data partitioning can be merged across multiple dimensions, increasing the flexibility of warp and thread data partitioning. For example, if the input of a reduction [N, C, H, W] becomes [C], when setting the optimized reduction processing method, the H and W dimensions can be merged and treated as lower dimensions than the C dimension. This allows for more even data partitioning in the H and W dimensions, allowing for better data distribution across the hardware, facilitating data parallelism, and ultimately improving performance.

[0042] Specifically, for some AI chips, if the reduction processing method optimized for the hardware layout characteristics of one or more reduction processing methods is not used, similar to the parallel computing architecture, this will lead to poor performance and fail to fully utilize the hardware characteristics and performance. For example, some AI chips have a specific data layout for convolution weights and a specific data layout for the BF16 data type. In this case, reduction operations can be performed directly according to these specific data layouts, reducing the conversion process from the normal data layout to the AI ​​chip's specific data layout, thereby improving performance. For another example, some AI chips have specific hardware instructions that are not available in the parallel computing architecture. In this case, an optimized reduction processing method can be set to directly call these hardware instructions.

[0043] In other examples, during mixed-precision training, reduction operations may occur where the input is a BF16 data type but the output is an FP32 data type. In this case, an optimized reduction processing method can be set to improve processing performance.

[0044] In other examples, in graph mode, to reduce data reordering, a non-uniform memory access architecture may be used as input and a uniform memory access architecture may be used as output. In this case, an optimized reduction processing method can be set to improve processing performance.

[0045] In this step, the optimized reduction processing method may include multiple optimized reduction processing methods, each of which may have corresponding requirements for data parameters and hardware parameters. Therefore, based on the data parameters and hardware parameters of the data to be reduced, it can be determined whether it meets the data parameters and hardware parameters required by the reduction processing method in the optimized reduction processing method, thereby determining whether the data to be reduced is suitable for the optimized reduction processing method.

[0046] Step S203: If yes, then the target reduction processing method in the optimized reduction processing method is applied to reduce the data to be reduced. The target reduction processing method is a reduction processing method adapted to the data to be reduced.

[0047] Step S204: If not, the data to be reduced is reduced according to a general reduction processing method.

[0048] The above steps S203 and S204 are processing flows for the data to be reduced that are suitable for the optimized reduction processing method and the data to be reduced that are not suitable for the optimized reduction processing method, respectively. In step S203, if the data to be reduced is suitable for the optimized reduction processing method, it means that there is a target reduction processing method adapted to the data to be reduced in the optimized reduction processing method, and the target reduction processing method can be applied to reduce the data to be reduced, thereby improving the processing performance of the artificial intelligence chip. In step S204, if the data to be reduced is not suitable for the optimized reduction processing method, the data to be reduced can be reduced according to the general reduction processing method to ensure that the reduction operation of the data to be reduced can be processed. Among them, the general reduction processing method can be a reduction processing method that can be applied to various artificial intelligence chips, and a kernel can be used to support multiple different reduction modes (such as sum, average (avg), norm (norm), etc.).

[0049] Regarding the optimized reduction processing method and the general reduction processing method, the optimized reduction processing method is conducive to better targeted optimization, while the general reduction processing method focuses on generalization. By adaptively selecting the reduction processing method, users do not need to be aware of the hardware optimization details. While ensuring that the reduction operations of the data to be reduced are processed, the processing performance of the artificial intelligence chip is improved.

[0050] The reduction processing method of the artificial intelligence chip of this embodiment can first determine whether an optimized reduction processing method is applicable based on data parameters and hardware parameters of the data to be reduced. The optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip. If the optimized reduction processing method is applicable, the target reduction processing method in the optimized reduction processing method is applied to reduce the data to be reduced. If the optimized reduction processing method is not applicable, the reduction processing method is applied to the data to be reduced according to a general reduction processing method. Therefore, through the adaptive selection of the reduction processing method, the optimized reduction processing method can be preferentially used to reduce the data to be reduced, thereby improving the processing performance of the artificial intelligence chip. When the data to be reduced is not applicable to the optimized reduction processing method, the general reduction processing method can be selected to reduce the data to be reduced, ensuring that the reduction operation of the data to be reduced is processed. In this way, the processing performance of the artificial intelligence chip can be improved while ensuring that the reduction operation of the data to be reduced is processed.

[0051] In an exemplary embodiment, the data parameter items include a first portion of data parameter items; the hardware parameter items include a first portion of hardware parameter items; the first portion of data parameter items is part of the data parameter items; and the first portion of hardware parameter items is part of the hardware parameter items. Step S202 of determining whether the data to be reduced is suitable for the optimized reduction processing method based on the data parameters and the hardware parameters may include:

[0052] According to the first part of data parameters and the first part of hardware parameters, it is determined whether the data to be reduced is suitable for the optimized reduction processing method.

[0053] In this embodiment, a portion of the data parameter items and a portion of the hardware parameter items can be used to determine whether the data to be reduced is suitable for the optimized reduction processing method. This portion of the data parameter items is recorded as the first portion of the data parameter items, and this portion of the hardware parameter items is recorded as the first portion of the hardware parameter items. Accordingly, the parameters of the data to be reduced under the first portion of the data parameter items are recorded as the first portion of the data parameters, and the parameters of the data to be reduced under the first portion of the hardware parameter items are recorded as the first portion of the hardware parameters.

[0054] In this embodiment, the first part of the data parameters and the first part of the hardware parameters can be used to determine whether the data to be reduced is suitable for the optimized reduction processing method. If both the first part of the data parameters and the first part of the hardware parameters meet the requirements of the reduction processing method for data parameters and hardware parameters in the optimized reduction processing method, the data to be reduced can be determined to be suitable for the optimized reduction processing method. If the first part of the data parameters or the first part of the hardware parameters do not meet the corresponding data parameter or hardware parameter requirements, the data to be reduced can be determined to be unsuitable for the optimized reduction processing method. In practical applications, the first part of the data parameter items may include: the type of input data, the type of output data, the number of parameters in the dimension to be reduced, the size of the dimension to be reduced, the dimension of the input data, and the consistency of the input and output dimensions. The first part of the hardware parameter items may include: the layout of the input data, the memory architecture of the input, and the memory architecture of the output. The parameters of each of the first part of the data parameter items must meet the requirements of the reduction processing method for data parameters in the optimized reduction processing method, and the parameters of each of the first part of the hardware parameter items must meet the requirements of the reduction processing method for hardware parameters in the optimized reduction processing method.

[0055] In an exemplary embodiment, the above-mentioned determining whether the data to be reduced is suitable for the optimized reduction processing method based on the first part of data parameters and the first part of hardware parameters may further include:

[0056] Obtaining first standard data parameters and first standard hardware parameters for each of the optimized reduction processing modes. Determining whether the data to be reduced is suitable for the optimized reduction processing mode based on consistency between the first portion of data parameters and the first standard data parameters, and consistency between the first portion of hardware parameters and the first standard hardware parameters.

[0057] In this embodiment, each reduction processing method in the optimized reduction processing method is provided with a first standard data parameter and a first standard hardware parameter. The first standard data parameter is the parameter corresponding to the first portion of the data parameter item for the reduction processing method in the optimized reduction processing method, and the first standard hardware parameter is the parameter corresponding to the first portion of the hardware parameter item for the reduction processing method in the optimized reduction processing method. The first standard data parameter and the first standard hardware parameter can be used to indicate the requirements of the reduction processing method in the optimized reduction processing method for data parameters and hardware parameters.

[0058] In this embodiment, whether the data to be reduced is suitable for the optimized reduction processing method can be determined based on the consistency between each first part of data parameters and the corresponding first standard data parameters, as well as the consistency between each first part of hardware parameters and the corresponding first standard hardware parameters. This allows accurate determination of whether the data to be reduced is suitable for the optimized reduction processing method.

[0059] In an exemplary embodiment, the above-mentioned determining whether the data to be reduced is suitable for the optimized reduction processing method based on the consistency between the first part of the data parameters and the first standard data parameters and the consistency between the first part of the hardware parameters and the first standard hardware parameters may further include:

[0060] If the optimized reduction processing method includes a reduction processing method in which the first standard data parameter is consistent with the first part of the data parameters and the first standard hardware parameter is consistent with the first part of the hardware parameters, then it is determined that the data to be reduced is suitable for the optimized reduction processing method, and the reduction processing method is determined as the target reduction processing method; if the optimized reduction processing method does not include a reduction processing method in which the first standard data parameter is consistent with the first part of the data parameters and the first standard hardware parameter is consistent with the first part of the hardware parameters, then it is determined that the data to be reduced is not suitable for the optimized reduction processing method.

[0061] In this embodiment, each first-part data parameter can be compared with the corresponding first standard data parameter, and the first-part data parameter can be consistent with or inconsistent with the first standard data parameter. Each first-part hardware parameter can also be compared with the corresponding first standard hardware parameter, and the first-part hardware parameter can be consistent with or inconsistent with the first standard hardware parameter. In this regard, if, in the optimized reduction processing method, there is a reduction processing method in which the first standard data parameter is consistent with the first-part data parameter and the first standard hardware parameter is consistent with the first-part hardware parameter, it means that the data to be reduced is suitable for the optimized reduction processing method, and the reduction processing method in which the first standard data parameter is consistent with the first-part data parameter and the first standard hardware parameter is consistent with the first-part hardware parameter is confirmed as the target reduction processing method in the optimized reduction processing method, that is, a reduction processing method in the optimized reduction processing method that is suitable for the data to be reduced. On the other hand, if the optimized reduction processing method does not contain a reduction processing method in which the first standard data parameter is consistent with the first part of the data parameters and the first standard hardware parameter is consistent with the first part of the hardware parameters, it means that the data to be reduced is not suitable for the optimized reduction processing method and needs to be reduced according to the general reduction processing method. In this way, it is possible to accurately determine whether the data to be reduced is suitable for the optimized reduction processing method and determine the target reduction processing method in the optimized reduction processing method.

[0062] In an exemplary embodiment, the data parameter items include a second portion of data parameter items; the hardware parameter items include a second portion of hardware parameter items; the second portion of data parameter items is a portion of the data parameter items; the second portion of hardware parameter items is a portion of the hardware parameter items; wherein the sum of the number of items in the second portion of data parameter items and the second portion of hardware parameter items is less than the sum of the number of items in the first portion of data parameter items and the first portion of hardware parameter items. The reduction processing of the data to be reduced according to a general reduction processing method in step S204 may include:

[0063] Based on the second data parameters of the second data parameter item and the second hardware parameters of the second hardware parameter item, it is determined whether the data to be reduced is applicable to the general reduction processing method; if not, an error is reported for the reduction processing of the data to be reduced; if so, a target reduction processing method in the general reduction processing method is applied to reduce the data to be reduced.

[0064] In this embodiment, for a general reduction processing method, a portion of the data parameter items and a portion of the hardware parameter items can be used to determine whether the data to be reduced is applicable to the general reduction processing method. The data parameter items in this portion are recorded as the second portion of data parameter items, and the hardware parameter items in this portion are recorded as the second portion of hardware parameter items. Accordingly, the parameters of the data to be reduced under the second portion of data parameter items are recorded as the second portion of data parameters, and the parameters of the data to be reduced under the second portion of hardware parameter items are recorded as the second portion of hardware parameters. The sum of the number of items in the second portion of data parameter items and the second portion of hardware parameter items is less than the sum of the number of items in the first portion of data parameter items and the first portion of hardware parameter items. That is, compared to the number of parameter items used to determine the applicability of the optimized reduction processing method, the general reduction processing method requires fewer parameter items to determine the applicability. This reflects that the optimized reduction processing method requires more parameter items to be determined. The more parameter items, the more extreme the optimization of the processing performance of the artificial intelligence chip will be. The general reduction processing method requires fewer parameter items to be determined and is more versatile.

[0065] In this embodiment, based on the second part of the data parameters and the second part of the hardware parameters, it is determined whether the data to be reduced is applicable to the general reduction processing method. When both the second part of the data parameters and the second part of the hardware parameters meet the requirements of the reduction processing method in the general reduction processing method for data parameters and hardware parameters, it can be determined that the data to be reduced is applicable to the general reduction processing method; otherwise, it is not applicable to the general reduction processing method. In practical applications, the second part of the data parameter items may include: the type of input data, the type of output data, the consistency of input and output dimensions, and whether it is a full reduction. The second part of the hardware parameter items may include: the layout of the input data and the input memory architecture. The parameters of each of the second part of the data parameter items must meet the requirements of the reduction processing method in the optimized reduction processing method for data parameters, and the parameters of each of the second part of the hardware parameter items must meet the requirements of the reduction processing method in the optimized reduction processing method for hardware parameters.

[0066] In this embodiment, if the data to be reduced is not applicable to the general reduction processing method, an error message is required to be displayed so that the user can check and correct the relevant data parameters and hardware parameters. If the data to be reduced is applicable to the general reduction processing method, the target reduction processing method in the general reduction processing method can be applied to reduce the data to be reduced. The target reduction processing method is a reduction processing method in the general reduction processing method that is suitable for the data to be reduced.

[0067] In an exemplary embodiment, the determining whether the data to be reduced is applicable to the general reduction processing method based on the second data parameter of the second data parameter item and the second hardware parameter of the second hardware parameter item may further include:

[0068] If a reduction processing method exists among the general reduction processing methods in which the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, then it is determined that the data to be reduced is applicable to the general reduction processing method, and the reduction processing method is determined as the target reduction processing method. If a reduction processing method does not exist among the general reduction processing methods in which the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, then it is determined that the data to be reduced is not applicable to the general reduction processing method.

[0069] In this embodiment, each reduction processing method in the universal reduction processing method is correspondingly provided with a second standard data parameter and a second standard hardware parameter. The second standard data parameter is a parameter corresponding to the second portion of the data parameter items of the reduction processing method in the universal reduction processing method, and the second standard hardware parameter is a parameter corresponding to the second portion of the hardware parameter items of the reduction processing method in the universal reduction processing method. The second standard data parameter and the second standard hardware parameter can be used to indicate the data parameter and hardware parameter requirements of the reduction processing method in the universal reduction processing method.

[0070] In this embodiment, each second-part data parameter can be compared with the corresponding second standard data parameter, and the second-part data parameter can be consistent with or inconsistent with the second standard data parameter. Each second-part hardware parameter can also be compared with the corresponding second standard hardware parameter, and the second-part hardware parameter can be consistent with or inconsistent with the second standard hardware parameter. In this regard, if there is a reduction processing method in the general reduction processing method in which the second standard data parameter is consistent with the second-part data parameter and the second standard hardware parameter is consistent with the second-part hardware parameter, it means that the data to be reduced is applicable to the general reduction processing method, and the reduction processing method in which the second standard data parameter is consistent with the second-part data parameter and the second standard hardware parameter is consistent with the second-part hardware parameter is confirmed as the target reduction processing method in the general reduction processing method, that is, a reduction processing method in the general reduction processing method that is suitable for the data to be reduced. On the contrary, if the general reduction processing method does not have the target reduction processing method, it means that the data to be reduced is not applicable to the general reduction processing method, and a foolproof error reporting process can be performed. In this way, it is possible to accurately judge whether the data to be reduced is suitable for the general reduction processing method and determine the target reduction processing method among the general reduction processing methods. It is also possible to perform error prevention and improve the reliability of the reduction processing.

[0071] In an exemplary embodiment, Figure 3 As shown, a reduction processing method for an artificial intelligence chip is provided, which may include the following steps:

[0072] Step S301: Acquire data parameters and hardware parameters of the data to be reduced.

[0073] In step S302 , if the optimized reduction processing method includes a reduction processing method in which the first standard data parameter is consistent with the first part of the data parameter and the first standard hardware parameter is consistent with the first part of the hardware parameter, it is determined that the data to be reduced is suitable for the optimized reduction processing method, and the reduction processing method is determined as the target reduction processing method.

[0074] Step S303 : Apply the target reduction processing method in the optimized reduction processing method to perform reduction processing on the data to be reduced.

[0075] Step S304 : If there is no reduction processing method in the optimized reduction processing method in which the first standard data parameter is consistent with the first part of the data parameters and the first standard hardware parameter is consistent with the first part of the hardware parameters, it is determined that the data to be reduced is not suitable for the optimized reduction processing method.

[0076] In step S305 , if there is a reduction processing method in the universal reduction processing method in which the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, it is determined that the data to be reduced is applicable to the universal reduction processing method, and the reduction processing method is determined as the target reduction processing method.

[0077] Step S306 , applying a target reduction processing method in a general reduction processing method to perform reduction processing on the data to be reduced.

[0078] Step S307 : If there is no reduction processing method in the general reduction processing method in which the second standard data parameter is consistent with the second part of the data parameters and the second standard hardware parameter is consistent with the second part of the hardware parameters, it is determined that the data to be reduced is not applicable to the general reduction processing method.

[0079] Step S308: Report an error for the reduction process of the data to be reduced.

[0080] In practical applications, the embodiments of the present application can focus on the efficient execution optimization of the reduction operator. By designing an optimized reduction processing method, the adaptive allocation of resources across the stream processing cluster (SPC), computing unit (CU), and execution unit (EU) computing task units in the artificial intelligence chip can be achieved to improve computing efficiency, reduce latency and improve performance. The reduction processing and hardware characteristics are fully considered, and the hardware optimization details are embedded in the operator, so that some hardware parameters of the artificial intelligence chip are passed into the optimized reduction processing method, resulting in a significant performance improvement for some operators of some deep learning networks (such as FACENET network, GPT network, Swin-transformer network, Conformer network, Retinanet network, testCNN network, ssd300 network, etc., all have a performance improvement of more than 30%). It combines functional generalization and performance optimization, and also makes the upper-level framework users unaware of the hardware optimization details.

[0081] It should be understood that, although the various steps in the flowcharts involved in the various embodiments described above are displayed in sequence according to the instructions of the arrows, these steps are not necessarily performed in sequence in the order indicated by the arrows. Unless clearly stated herein, the execution of these steps is not strictly limited in order, and these steps can be performed in other orders. Moreover, at least a portion of the steps in the flowcharts involved in the various embodiments described above may include multiple steps or multiple stages, and these steps or stages are not necessarily performed at the same time, but can be performed at different times, and the execution order of these steps or stages is not necessarily performed in sequence, but can be performed in turn or alternately with at least a portion of the steps or stages in other steps or other steps. It is understandable that the various steps in different embodiments can be freely combined as needed, and the various non-contradictory schemes formed by the combination all fall within the scope of protection of this application.

[0082] Based on the same inventive concept, embodiments of the present application also provide an artificial intelligence chip reduction processing device for implementing the aforementioned artificial intelligence chip reduction processing method. The implementation solution provided by this device is similar to the implementation solution described in the aforementioned method. Therefore, the specific limitations of the reduction processing device embodiments of one or more artificial intelligence chips provided below can be found in the above-mentioned limitations of the artificial intelligence chip reduction processing method, and will not be repeated here.

[0083] In an exemplary embodiment, Figure 4 As shown, a reduction processing device for an artificial intelligence chip is provided. The device 400 may include:

[0084] The parameter acquisition module 401 is used to acquire data parameters and hardware parameters of the data to be reduced; the data parameters are parameters of the data to be reduced under the preset data parameter items; the hardware parameters are parameters of the data to be reduced under the preset hardware parameter items;

[0085] An optimization judgment module 402 is configured to determine whether the data to be reduced is suitable for an optimized reduction processing method based on the data parameters and the hardware parameters; wherein the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip;

[0086] an optimization processing module 403 configured to, if yes, apply a target reduction processing method in the optimized reduction processing method to reduce the data to be reduced; the target reduction processing method is a reduction processing method adapted to the data to be reduced;

[0087] The general processing module 404 is configured to, if not, perform reduction processing on the data to be reduced according to a general reduction processing method.

[0088] In an exemplary embodiment, the data parameter items include a first part of data parameter items; the hardware parameter items include a first part of hardware parameter items; the first part of data parameter items is part of the data parameter items; the first part of hardware parameter items is part of the hardware parameter items; the optimization judgment module 402 is used to judge whether the data to be reduced is suitable for the optimized reduction processing method based on the first part of data parameters and the first part of hardware parameters; wherein the first part of data parameters is the parameters of the data to be reduced under the first part of data parameter items; the first part of hardware parameters is the parameters of the data to be reduced under the first part of hardware parameter items.

[0089] In an exemplary embodiment, the optimization judgment module 402 is configured to obtain a first standard data parameter and a first standard hardware parameter for each reduction processing method in the optimized reduction processing method; wherein the first standard data parameter is a parameter corresponding to the first part of the data parameter item of the reduction processing method; and the first standard hardware parameter is a parameter corresponding to the first part of the hardware parameter of the reduction processing method; and determine whether the data to be reduced is suitable for the optimized reduction processing method based on consistency between the first part of the data parameters and the first standard data parameters, and consistency between the first part of the hardware parameters and the first standard hardware parameters.

[0090] In an exemplary embodiment, the optimization judgment module 402 is configured to, if a reduction processing method exists among the optimized reduction processing methods in which the first standard data parameters are consistent with the first part of data parameters and the first standard hardware parameters are consistent with the first part of hardware parameters, determine that the data to be reduced is applicable to the optimized reduction processing method, and determine the reduction processing method as the target reduction processing method; if a reduction processing method does not exist among the optimized reduction processing methods in which the first standard data parameters are consistent with the first part of data parameters and the first standard hardware parameters are consistent with the first part of hardware parameters, determine that the data to be reduced is not applicable to the optimized reduction processing method.

[0091] In an exemplary embodiment, the data parameter items include a second portion of data parameter items; the hardware parameter items include a second portion of hardware parameter items; the second portion of data parameter items is part of the data parameter items; the second portion of hardware parameter items is part of the hardware parameter items; wherein the sum of the number of items in the second portion of data parameter items and the second portion of hardware parameter items is less than the sum of the number of items in the first portion of data parameter items and the first portion of hardware parameter items; the general processing module 404 is configured to determine whether the data to be reduced is applicable to the general reduction processing method based on the second portion of data parameters of the second portion of data parameter items and the second portion of hardware parameters of the second portion of hardware parameter items; if not, reporting an error for the reduction processing of the data to be reduced; if so, applying the target reduction processing method in the general reduction processing method to reduce the data to be reduced.

[0092] In an exemplary embodiment, the general processing module 404 is configured to, if a reduction processing method exists in the general reduction processing method and the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, determine that the data to be reduced is applicable to the general reduction processing method, and determine the reduction processing method as the target reduction processing method; wherein the second standard data parameter is a parameter corresponding to the reduction processing method in the general reduction processing method in the second part of the data parameter item; and the second standard hardware parameter is a parameter corresponding to the reduction processing method in the general reduction processing method in the second part of the hardware parameter item; if a reduction processing method does not exist in the general reduction processing method and the second standard data parameter is consistent with the second part of the data parameter and the second standard hardware parameter is consistent with the second part of the hardware parameter, determine that the data to be reduced is not applicable to the general reduction processing method.

[0093] Each module in the reduction processing device of the aforementioned artificial intelligence chip can be implemented in whole or in part through software, hardware, or a combination thereof. Each of the aforementioned modules can be embedded in or independent of a processor in a computer device in hardware form, or can be stored in a memory in a computer device in software form, so that the processor can call and execute the corresponding operations of each of the aforementioned modules.

[0094] In an exemplary embodiment, a computer device is provided. The computer device may be a server or a terminal. The internal structure diagram thereof may be as follows: Figure 5As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O) and a communication interface. The processor, memory and input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external device through a network connection. When the computer program is executed by the processor, a reduction processing method of an artificial intelligence chip is implemented.

[0095] Those skilled in the art will understand that Figure 5 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0096] In one embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor implements the steps in the above method embodiments when executing the computer program.

[0097] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0098] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.

[0099] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0100] Those skilled in the art will understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. In particular, any reference to memory, database, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The databases involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the various embodiments provided herein may be, but are not limited to, general-purpose processors, central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), programmable logic devices (PLDs), quantum computing-based data processing logic devices, artificial intelligence (AI) processors, and the like.

[0101] The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0102] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A reduction processing method for an artificial intelligence chip, characterized in that: The method comprises: Obtaining data parameters and hardware parameters of the data to be reduced; the data parameters are parameters of the data to be reduced under preset data parameter items; the hardware parameters are parameters of the data to be reduced under preset hardware parameter items; wherein the preset data parameter items refer to pre-set parameter items required for the reduction processing of the data; the preset hardware parameter items refer to parameter items required for the hardware of the artificial intelligence chip for the reduction processing; Determining whether the data to be reduced is suitable for an optimized reduction processing method based on the data parameters and the hardware parameters; wherein the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip; If so, applying a target reduction processing method in the optimized reduction processing method to reduce the data to be reduced; the target reduction processing method is a reduction processing method adapted to the data to be reduced; If not, the data to be reduced is reduced according to a general reduction processing method.

2. The method according to claim 1, characterized in that The data parameter item includes a first part of the data parameter item; the hardware parameter item includes a first part of the hardware parameter item; the first part of the data parameter item is part of the data parameter item; The first part of the hardware parameter items is part of the hardware parameter items; The determining, based on the data parameters and the hardware parameters, whether the data to be reduced is suitable for the optimized reduction processing method includes: Determining whether the data to be reduced is suitable for an optimized reduction processing method according to the first part of data parameters and the first part of hardware parameters; The first part of the data parameters is the parameters of the data to be reduced under the first part of the data parameter item; the first part of the hardware parameters is the parameters of the data to be reduced under the first part of the hardware parameter item.

3. The method according to claim 2, characterized in that The determining, based on the first part of the data parameters and the first part of the hardware parameters, whether the data to be reduced is suitable for the optimized reduction processing method includes: Obtaining a first standard data parameter and a first standard hardware parameter of each reduction processing method in the optimized reduction processing method; wherein the first standard data parameter is a parameter corresponding to the first part of data parameter items of the reduction processing method; and the first standard hardware parameter is a parameter corresponding to the first part of hardware parameters of the reduction processing method; Whether the data to be reduced is suitable for an optimized reduction processing method is determined based on consistency between the first part of data parameters and the first standard data parameters, and consistency between the first part of hardware parameters and the first standard hardware parameters.

4. The method according to claim 3, characterized in that The determining, based on consistency between the first part of the data parameters and the first standard data parameters and consistency between the first part of the hardware parameters and the first standard hardware parameters, whether the data to be reduced is suitable for the optimized reduction processing method includes: If there is a reduction processing method in the optimized reduction processing method in which the first standard data parameter is consistent with the first part of data parameters and the first standard hardware parameter is consistent with the first part of hardware parameters, determining that the data to be reduced is applicable to the optimized reduction processing method, and determining the reduction processing method as the target reduction processing method; If there is no reduction processing method in the optimized reduction processing method in which the first standard data parameter is consistent with the first part of data parameters and the first standard hardware parameter is consistent with the first part of hardware parameters, it is determined that the data to be reduced is not applicable to the optimized reduction processing method.

5. The method according to any one of claims 1 to 4, characterized in that The data parameter items include a second portion of data parameter items; the hardware parameter items include a second portion of hardware parameter items; the second portion of data parameter items is part of the data parameter items; the second portion of hardware parameter items is part of the hardware parameter items; wherein the sum of the number of items in the second portion of data parameter items and the second portion of hardware parameter items is less than the sum of the number of items in the first portion of data parameter items and the first portion of hardware parameter items; The reducing process on the data to be reduced according to a general reduction process method includes: determining, according to the second part of data parameters of the second part of data parameter items and the second part of hardware parameters of the second part of hardware parameter items, whether the data to be reduced is applicable to the general reduction processing method; If not, reporting an error for the reduction process of the data to be reduced; If so, the target reduction processing method in the general reduction processing method is applied to reduce the data to be reduced.

6. The method according to claim 5, characterized in that The determining, based on the second part of the data parameters of the second part of the data parameter items and the second part of the hardware parameters of the second part of the hardware parameter items, whether the data to be reduced is applicable to the general reduction processing method includes: If there is a reduction processing method in the general reduction processing method whose second standard data parameter is consistent with the second part of data parameters and whose second standard hardware parameter is consistent with the second part of hardware parameters, then it is determined that the data to be reduced is applicable to the general reduction processing method, and the reduction processing method is determined as the target reduction processing method; wherein the second standard data parameter is a parameter corresponding to the reduction processing method in the general reduction processing method in the second part of data parameter items; and the second standard hardware parameter is a parameter corresponding to the reduction processing method in the general reduction processing method in the second part of hardware parameter items; If there is no reduction processing method in the general reduction processing method in which the second standard data parameter is consistent with the second part of data parameters and the second standard hardware parameter is consistent with the second part of hardware parameters, it is determined that the data to be reduced is not applicable to the general reduction processing method.

7. A reduction processing device for an artificial intelligence chip, characterized in that: The device comprises: A parameter acquisition module, configured to acquire data parameters and hardware parameters of the data to be reduced; the data parameters are parameters of the data to be reduced under preset data parameter items; the hardware parameters are parameters of the data to be reduced under preset hardware parameter items; wherein the preset data parameter items are pre-set parameter items required for the reduction process on the data; and the preset hardware parameter items are parameter items required for the hardware of the artificial intelligence chip for the reduction process; an optimization judgment module, configured to judge whether the data to be reduced is suitable for an optimized reduction processing method based on the data parameters and the hardware parameters; wherein the optimized reduction processing method is obtained by optimizing the performance of one or more reduction processing methods based on the hardware characteristics of the artificial intelligence chip; an optimization processing module, configured to, if yes, apply a target reduction processing method in the optimized reduction processing method to perform reduction processing on the data to be reduced; the target reduction processing method is a reduction processing method adapted to the data to be reduced; The general processing module is configured to, if not, perform reduction processing on the data to be reduced according to a general reduction processing method.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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