Totally-enclosed ruggedized computer PCB component layout optimization method

Abstract

The invention discloses a fully-enclosed ruggedized computer PCB component layout optimization method. The method comprises the following steps: constructing a multi-objective optimization model of components on a computer PCB; wherein the multi-objective optimization model is used for optimizing component layout and heat dissipation performance of the computer PCB; and obtaining an optimal solution set of the multi-objective optimization model according to a Pareto multi-objective optimization method in combination with an ant colony algorithm, so that the optimal solution set achieves optimal balance among thermal management, vibration impact and mechanical stability of the computer PCB. According to the multi-objective optimization model provided by the invention, layout optimization of the components on the computer PCB can be realized on the basis of comprehensively considering factors in multiple aspects, the optimal solution set is searched by combining the ant colony algorithm with the Pareto multi-objective optimization method, and a corresponding layout scheme is adopted, so that heat management and mechanical stability can be balanced.

Description

Technical Field

[0001] The present invention belongs to the field of hardware design, and particularly relates to a method for optimizing the layout of PCB components in a fully enclosed and reinforced computer. Background Art

[0002] With the rapid development of information technology, fully enclosed and reinforced computer systems, as key hardware facilities, are widely used in extreme environment fields such as military, aerospace, and industrial automation. Under these harsh conditions, traditional computers cannot meet the requirements of equipment for high-strength earthquake resistance, compression resistance, dust prevention, waterproofing, and high-temperature resistance. A fully enclosed and reinforced computer needs to operate stably for a long time in a special environment to ensure the high reliability and high performance of the system. This requires its design to not only have the functions required by a conventional computer system but also operate without failure under harsh conditions to ensure that it is not interfered by the external environment.

[0003] In a fully enclosed and reinforced computer, the printed circuit board (PCB), as one of the core electronic components, undertakes a crucial signal transmission task. However, due to its application in a special environment, the components on the PCB board not only need to withstand the tests of multiple environmental factors such as extreme temperature changes and severe vibration shocks but also must effectively manage heat and improve mechanical stability to ensure long-term stable operation in a harsh environment. Against this background, how to rationally layout and optimize the design of PCB components to ensure both the efficiency of heat management and the improvement of mechanical stability has become the core problem that urgently needs to be solved in the design of fully enclosed and reinforced computers.

[0004] Most of the existing methods for optimizing the layout of PCB components focus on a single goal, such as only optimizing heat management or mechanical performance, while ignoring the complex interactions between these factors. In the extreme application scenarios of fully enclosed and reinforced computers, single optimization methods often cannot take into account the requirements of multiple aspects such as heat management and mechanical stability, resulting in problems such as uneven heat distribution, poor heat dissipation of components, and insufficient mechanical stability in the system, thus affecting the long-term stable operation of fully enclosed and reinforced computers in extreme environments. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a method for optimizing the layout of PCB components in a fully enclosed and reinforced computer.

[0006] The technical problems to be solved by the present invention are realized through the following technical solutions:

[0007] In a first aspect, the present invention provides a method for optimizing the layout of PCB components in a fully enclosed and reinforced computer, the method comprising:

[0008] Build a multi-objective optimization model for components on a computer PCB; wherein, the multi-objective optimization model is used to optimize the component layout and heat dissipation performance of the computer PCB;

[0009] Obtain the optimal solution set of the multi-objective optimization model according to the Pareto multi-objective optimization method combined with the ant colony algorithm, so that the optimal solution set achieves an optimal balance among the thermal management, vibration shock and mechanical stability of the computer PCB.

[0010] Optionally, the building of the multi-objective optimization model for components on a computer PCB includes:

[0011] Build a board-level circuit temperature distribution model according to the components on the computer PCB;

[0012] Build a board-level circuit vibration shock model according to the components on the computer PCB;

[0013] Obtain the multi-objective optimization model according to the board-level circuit temperature distribution mathematical model and the board-level circuit vibration shock model.

[0014] Optionally, the building of the board-level circuit temperature distribution mathematical model according to the components on the computer PCB includes:

[0015] Perform mesh division on the computer PCB according to the size of the computer PCB and the minimum size of the components to obtain a plurality of different unit nodes;

[0016] Encode the plurality of different unit nodes to obtain the component numbers located at different unit nodes;

[0017] Build the board-level circuit temperature distribution mathematical model according to the computer PCB, the components and the component numbers.

[0018] Optionally, the building of the board-level circuit temperature distribution mathematical model according to the computer PCB, the components and the component numbers includes:

[0019] Derive the heat transfer of each unit node in the internal area of the computer PCB to obtain the heat balance equation of the internal area of the computer PCB;

[0020] Derive the heat transfer of each unit node in the boundary area of the computer PCB to obtain the heat balance equation of the boundary area of the computer PCB;

[0021] Derive the heat transfer of the four corner unit nodes of the computer PCB to obtain the heat balance equation of the corner unit nodes of the computer PCB;

[0022] Construct the mathematical model of the temperature distribution of the board-level circuit according to the internal region heat balance equation, the boundary region heat balance equation, and the heat balance equation of the corner unit nodes.

[0023] Optionally, the internal region heat balance equation is expressed as follows:

[0024]

[0025] Where, Δy represents the length in the y direction of the unit node (i,j) in the computer PCB board after grid division, Δx represents the length in the x direction of the unit node (i,j) in the computer PCB board after grid division, h represents the height of the unit node (i,j), and λ pcb is the equivalent thermal conductivity of the computer PCB board, T i,j represents the temperature of the unit node (i,j), T i+1,j represents the temperature of the unit node (i+1,j), T i-1,j represents the temperature of the unit node (i-1,j), T i,j+1 represents the temperature of the unit node (i,j+1), T i,j-1 represents the temperature of the unit node (i,j-1), Q dev is the power of the component, α dev is the convective heat transfer coefficient of the component, A dev is the total convective heat transfer area of the component, T o represents the ambient temperature, R c represents the thermal resistance of the conduction path from the component to the unit node (i,j), ω is the conditional decision variable, A i,j is the total area of contact between the unit node (i,j) and the air, α pcb is the convective heat transfer coefficient of the computer PCB board.

[0026] Optionally, the boundary region heat balance equation is expressed as follows:

[0027]

[0028] Optionally, the heat balance equation of the corner unit nodes is expressed as follows:

[0029]

[0030] Optionally, constructing the board-level circuit vibration and shock model based on the components on the computer PCB board includes:

[0031] Obtain the first vibration and shock equation according to the mass matrix, stiffness matrix, and damping matrix of the unconstrained unit nodes among the multiple different unit nodes;

[0032] Based on the mass matrix, stiffness matrix, and damping matrix of the fixed constraint unit nodes among the multiple different unit nodes, a second vibration and shock equation is obtained;

[0033] Based on the first vibration and shock equation and the second vibration and shock equation, the vibration and shock model of the board-level circuit is constructed.

[0034] Optionally, obtaining the optimal solution set of the multi-objective optimization model according to the Pareto multi-objective optimization method combined with the ant colony algorithm includes:

[0035] When calculating the optimal solution set of the multi-objective optimization model according to the ant colony algorithm, in each round of iteration, calculate the objective function value corresponding to each layout scheme; wherein, the layout scheme is the component layout of the computer PCB board; the objective function values include the highest temperature of the components, the maximum difference degree of the computer PCB board, and the maximum displacement.

[0036] When the objective function value corresponding to the current layout scheme meets the optimization objective of the Pareto multi-objective optimization method, take the current layout scheme as the optimal solution set.

[0037] The technical solutions provided by the embodiments of the present invention may include the following beneficial effects:

[0038] In the above technical solution, the present invention constructs a multi-objective optimization model that focuses on thermal management and mechanical stability. Thermal management is achieved by optimizing component layout and heat dissipation performance; mechanical stability is also achieved by optimizing component layout to reduce the impact of vibration and shock; this model can achieve the layout optimization of components on the computer PCB board on the basis of comprehensively considering various factors, and through the ant colony algorithm combined with the multi-objective optimization idea of the Pareto front, gradually update the pheromone to guide the ants to find the optimal solution among multiple objectives. In each round of iteration, calculate the objective function value corresponding to each layout scheme, find the optimal solution set, and adopt the corresponding layout scheme, which can achieve a balance between thermal management and mechanical stability.

[0039] The following will further elaborate on the present invention in detail with reference to the drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a flowchart of a method for optimizing the layout of components on a fully enclosed and reinforced computer PCB provided by an embodiment of the present invention;

[0041] Figure 2 is a schematic diagram of component coding on a PCB board provided by an embodiment of the present invention;

[0042] Figure 3It is a schematic flow chart for obtaining an optimal solution set provided by an embodiment of the present invention;

[0043] Figure 4 It is a schematic diagram of a three-dimensional Pareto front provided by an embodiment of the present invention;

[0044] Figure 5a It is a schematic layout diagram before optimization provided by an embodiment of the present invention;

[0045] Figure 5b It is a schematic layout diagram after optimization provided by an embodiment of the present invention;

[0046] Figure 6a It is a schematic PCB structure diagram of a board-level circuit before optimization provided by an embodiment of the present invention;

[0047] Figure 6b It is a schematic PCB structure diagram of a board-level circuit after optimization provided by an embodiment of the present invention;

[0048] Figure 7a It is a cloud chart of temperature distribution before layout optimization provided by an embodiment of the present invention;

[0049] Figure 7b It is a cloud chart of temperature distribution after layout optimization provided by an embodiment of the present invention;

[0050] Figure 8a It is a curve graph of the average temperature change of the PCB before layout optimization provided by an embodiment of the present invention;

[0051] Figure 8b It is a curve graph of the average temperature change of the PCB after layout optimization provided by an embodiment of the present invention;

[0052] Figure 9a It is a directional deformation diagram under random vibration before layout optimization provided by an embodiment of the present invention;

[0053] Figure 9b It is a directional deformation diagram under random vibration after layout optimization provided by an embodiment of the present invention;

[0054] Figure 10a It is an equivalent stress diagram under random vibration before layout optimization provided by an embodiment of the present invention;

[0055] Figure 10b It is an equivalent stress diagram under random vibration after layout optimization provided by an embodiment of the present invention;

[0056] Figure 11a It is a directional deformation diagram under transient shock before layout optimization provided by an embodiment of the present invention;

[0057] Figure 11bIt is a directional deformation diagram under transient impact with optimized layout provided by an embodiment of the present invention;

[0058] Figure 12a It is an equivalent stress diagram under transient impact before layout optimization provided by an embodiment of the present invention;

[0059] Figure 12b It is an equivalent stress diagram under transient impact with optimized layout provided by an embodiment of the present invention. Specific embodiments

[0060] The following further describes the present invention in detail with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0061] Figure 1 It is a flowchart of a method for optimizing the layout of components on a fully enclosed and reinforced computer PCB provided by an embodiment of the present invention. As Figure 1 shown, the method may include the following steps:

[0062] S101. Construct a multi-objective optimization model for components on the computer PCB; wherein, the multi-objective optimization model is used to optimize the component layout and heat dissipation performance of the computer PCB.

[0063] Optionally, S101 may include:

[0064] Construct a board-level circuit temperature distribution model according to the components on the computer PCB;

[0065] Construct a board-level circuit vibration and shock model according to the components on the computer PCB;

[0066] Obtain the multi-objective optimization model based on the board-level circuit temperature distribution mathematical model and the board-level circuit vibration and shock model.

[0067] Optionally, constructing a board-level circuit temperature distribution mathematical model according to the components on the computer PCB includes:

[0068] Perform grid division on the computer PCB according to the size of the computer PCB and the minimum size of the components to obtain a plurality of different unit nodes;

[0069] Encode the plurality of different unit nodes to obtain the component numbers located at different unit nodes;

[0070] Construct a board-level circuit temperature distribution mathematical model according to the computer PCB, the components, and the component numbers.

[0071] It is understandable that according to the size of the computer PCB board and the minimum size of the components, a grid division is carried out, which can be divided into M*N different unit nodes. The divided small unit nodes are encoded, and the center point coordinates (i, j) of each unit node are used as the encoding method. For components, the center point coordinates of the unit node closest to the center position of the component are used as the component number.

[0072] Exemplarily, Figure 2 is a schematic diagram of the encoding of PCB board components provided by an embodiment of the present invention. Refer to Figure 2 , and the specific component number positions are shown in Table 1.

[0073] Table 1

[0074] Device Designation Q1 Q2 Q3 Q4 D1 D2 D3 D4 Position Coordinates (23,13) (18,13) (9,13) (11,22) (30,8) (32,8) (34,8) (36,8) Device Designation D5 D6 D7 D8 D9 D10 D11 D12 Position Number (38,8) (40,8) (42,11) (42,13) (42,15) (42,17) (42,19) (42,23) Device Designation D13 D14 D15 D16 U1 U2 Position Number (40,23) (38,23) (36,23) (34,23) (36,16) (20,19)

[0075] Among them, Q1 and Q2 are low-power devices 0a200, Q3 and Q4 are low-power devices UPD, D1-D16 are DDR4 memories, U1 is a CPU, and U2 is a bridge chip.

[0076] It is worth mentioning that in a fully enclosed and ruggedized computer, due to the limited internal space of the ruggedized chassis, the heat transfer amount of thermal radiation can be ignored in the enclosed environment. The components on the board-level circuit inside the computer mainly dissipate heat through heat conduction and convection. Considering factors such as the size of the PCB board, the thermal conductivity, the sizes of different components, the power consumption, the thermal conductivity, the convective heat transfer coefficient, and the thermal resistance of heat conduction, a mathematical model of the circuit board temperature field applicable to the fully enclosed and ruggedized computer without radiative heat transfer is constructed.

[0077] For the circuit board inside the fully enclosed and ruggedized computer, its heat dissipation path mainly passes through heat conduction and heat convection. The components attached to the PCB board conduct heat to each other through heat conduction on their contact surfaces, and the non-contact surfaces of the PCB and the components exchange heat convection with the air.

[0078] According to the law of conservation of energy, after the system is stable, the total heat flowing into each unit node is equal to the total heat flowing out. That is to say, for the (i, j) unit node, the sum of the heat flowing into it from its surrounding unit nodes (i+1, j), (i-1, j), (i, j+1) and (i, j-1), the heat conducted by the components it contacts, and the heat exchanged by convection with the air is 0; specifically, the heat transfer process can be deduced for different parts (i.e., the conduction of surrounding nodes, the conduction of components, and the convection exchange with the air) and different regions (i.e., the unit nodes in the internal region of the PCB board, the boundary region of the PCB board, and the four corner unit nodes of the PCB board).

[0079] Optionally, a mathematical model of the temperature distribution of the board-level circuit is constructed according to the computer PCB board, the components, and the component numbers, including:

[0080] Derive the heat transfer of each unit node in the internal area of the computer PCB board to obtain the heat balance equation of the internal area of the computer PCB board;

[0081] Derive the heat transfer of each unit node in the boundary area of the computer PCB board to obtain the heat balance equation of the boundary area of the computer PCB board;

[0082] Derive the heat transfer of the four corner unit nodes of the computer PCB board to obtain the heat balance equation of the corner unit nodes of the computer PCB board;

[0083] Construct a mathematical model of the board-level circuit temperature distribution based on the heat balance equation of the internal area, the heat balance equation of the boundary area, and the heat balance equation of the corner unit nodes.

[0084] It can be understood that first, the heat transfer of the internal area units of the PCB board is derived:

[0085] 1) For the surrounding unit nodes:

[0086] For two nodes in the x direction in the computer PCB board after grid division, their thermal conductances are respectively expressed as follows:

[0087]

[0088] For two nodes in the y direction, their thermal conductances are respectively expressed as follows:

[0089]

[0090] Then the heat conducted from the surrounding unit nodes to the unit node (i,j) can be expressed as:

[0091]

[0092]

[0093] Among them, ΔT is the temperature difference between different media.

[0094] 2) For the heat conduction when the unit node (i,j) is in contact with components:

[0095] Here, it can be considered in two parts. The first case is that there is exactly a component above the unit node (i,j), so directly consider the heat generated by the component itself conducting to the PCB unit node (i,j). The second case is that there is no component above the unit node (i,j), that is, it is in contact with air. Then the heat conducted to the unit node (i,j) is actually the heat convection heat transfer between the unit node (i,j) and the air.

[0096] Case 1: If there is a component on the unit node (i, j), then the heat transfer between the sum of the heat generated by the component itself and the convective heat transfer of the component itself and the unit node (i, j) needs to be considered. The specific heat transfer derivation process is as follows:

[0097] The heat conducted between the component and the unit node (i, j) is the sum of the heat generated by the component itself and the heat convected through the air by the component itself, which is expressed as follows:

[0098] Q dev-c = Q dev + Q air-dev = Q dev + α dev A dev (t i,j - T o );

[0099] Among them, Q air-dev is the heat of convective exchange of the component, t i,j is the temperature of the component;

[0100] The effective heat transfer between the component and the unit node (i, j) is:

[0101] Q dev-ceff = ηQ dev ;

[0102]

[0103] Among them, Q dev-ceff is the heat effectively conducted from the component to the unit node (i, j), η is the conduction coefficient, δ dev is the thickness of the component, λ dev is the thermal conductivity of the component, δ air is the thickness of the air gap between the component and the unit node (i, j), λ air is the thermal conductivity of the air, δ air is the distance between the component and the PCB unit module. Here, it is assumed that the component is in close contact with the unit node, so δ air is 0.

[0104] Case 2: If there is no component above the unit node (i, j), then the derivation process of its convective heat transfer with the air is expressed as follows:

[0105] Q air-pcb = α pcb A i,j (T i,j - T o );

[0106] Among them, Q air-pcbis the convective heat exchange amount between the unit node (i, j) and the air; taking the layout position of the components as the constraint condition, the PCB component layout optimization problem is as follows

[0107] The heat conducted from the component (or there may be no component) above the unit node to the unit node (i, j) can be expressed as:

[0108] Q c = ωQ dev-ceff +(1 - ω)Q air-pcb ;

[0109] where ω is used to represent whether there is a component. If there is, it is 1; otherwise, it is 0.

[0110] 3) Derivation of the heat exchanged between the unit node (i, j) and the air:

[0111] For the derivation of the heat exchanged between the unit node (i, j) and the air, specifically:

[0112] Q air-pcb = α pcb A i,j (T i,j - T o );

[0113] Therefore, for the unit in the internal area of the PCB board, the specific heat balance equation is:

[0114] Q i+1,j + Q i-1,j + Q i,j+1 + Q i,j-1 + Q c + Q air = 0;

[0115] After specific expansion, the internal area heat balance equation is expressed as follows:

[0116]

[0117] where Δy represents the y - direction length of the unit node (i, j) in the computer - PCB board after grid division, Δx represents the x - direction length of the unit node (i, j) in the computer - PCB board after grid division, h represents the height of the unit node (i, j), λ pcb is the equivalent thermal conductivity of the computer - PCB board, T i,j represents the temperature of the unit node (i, j), T i+1,j represents the temperature of the unit node (i + 1, j), T i-1,j represents the temperature of the unit node (i - 1, j), T i,j+1 represents the temperature of the unit node (i, j + 1), T i,j-1Represents the temperature of the unit node (i, j - 1), Q dev Is the power of the component, α dev Is the convective heat transfer coefficient of the component, A dev Is the total convective heat transfer area of the component, T o Represents the ambient temperature, R c Represents the thermal resistance of the conduction path from the component to the unit node (i, j), ω is the conditional decision variable, A i,j Is the total area of contact between the unit node (i, j) and the air, α pcb Is the convective heat transfer coefficient of the computer PCB board.

[0118] It is worth mentioning that for the PCB board, since the PCB is composed of a multi - layer FR4 board and multi - layer copper layers, it needs to be simplified into an isotropic block structure here, and its equivalent thermal conductivity can be equivalent through the following calculation formula, using λ pcb To represent.

[0119]

[0120] Among them, λ pcb Represents the equivalent thermal conductivity of the computer PCB board in the plane, N represents the number of different material layers in the computer PCB board, K i Represents the thermal conductivity of the material of the i - th layer, t i Represents the thickness of the i - th layer of material. Since the sizes of each component are different and the power consumptions are also different, all components can be equivalent to unit modules with equal sizes, and their powers are also equivalently corresponding. Specifically, the equivalent power consumption can be reasonably equivalent according to the formula that the equivalent power consumption is equal to the equivalent volume multiplied by its heat flux density, and Q is used in the formula dev To represent.

[0121] Secondly, the heat transfer derivation of the unit in the boundary area of the computer PCB board is carried out:

[0122] The calculation formula for the heat transferred from the surrounding unit nodes to the unit node (i, j) is the same as that of the heat transfer in the internal area unit. The difference is that at the left boundary, right boundary, upper boundary and lower boundary of the PCB board, one less node is used for heat transfer respectively. Specifically: Q i-1,j Q i+1,j Q i,j+1 Q i,j-1 . Instead, the unit node exchanges convective heat with the air. Since the heat transfer areas in the horizontal and vertical directions of the unit node are different, it is specifically divided into two - direction convective heat transfer in the horizontal and vertical directions of the unit node.

[0123] When the unit node is in the horizontal direction, the convective heat transfer amount between the unit node (i, j) and the air can be expressed as:

[0124] Qair-pcb-x = α pcb hΔy(T i,j - T o );

[0125] When the unit node is in the vertical direction, the convective heat exchange heat between the unit node (i, j) and the air can be expressed as:

[0126] Q air-pcb-y = α pcb hΔx(T i,j - T o );

[0127] When the unit node (i, j) is in contact with the component, the heat conduction formula and the convective heat exchange heat formula between the unit node (i, j) and the air below are the same as the internal derivation. Then the heat balance equation in the boundary region is expressed as follows:

[0128]

[0129] When the unit node is at the corner of the computer PCB board, only two adjacent nodes conduct heat, and the other two boundaries conduct convective heat exchange with the air. When the unit node (i, j) is in contact with the component, the heat conduction formula and the convective heat exchange heat formula between the unit node (i, j) and the air below are also the same as the internal derivation. Then the heat balance equation of the corner unit node is expressed as follows:

[0130]

[0131] By deriving the heat transfer process for different parts (i.e., conduction of surrounding unit nodes, conduction of components, and convective exchange with air) and different regions (i.e., unit in the internal region of the PCB board, boundary region of the PCB board, and four corner units of the PCB board), a mathematical model of the temperature field of the internal board-level circuit applicable to fully ruggedized computers can be constructed. The equations established above are all linear equations, and the Gauss-Seidel iteration method can be used to solve the PCB temperature matrix and the temperature matrices of each device under steady state according to this system of linear equations.

[0132] Optionally, a board-level circuit vibration and shock model is constructed according to the components on the computer PCB board, including:

[0133] Obtain the first vibration and shock equation according to the mass matrix, stiffness matrix, and damping matrix of the unconstrained unit nodes among multiple different unit nodes;

[0134] Obtain the second vibration and shock equation according to the mass matrix, stiffness matrix, and damping matrix of the fixed constraint unit nodes among multiple different unit nodes;

[0135] Construct a vibration and shock model for the board-level circuit according to the first vibration and shock equation and the second vibration and shock equation.

[0136] It can be understood that the vibration and shock model for the board-level circuit also needs to utilize the computer PCB board after mesh division; different from the mathematical model of the board-level circuit temperature distribution, the vibration and shock model for the board-level circuit needs to pay attention to whether the element nodes are unconstrained element nodes.

[0137] 1) For unconstrained element nodes, their vibration responses are determined by their own mass, stiffness, and damping characteristics or by adding the mass, stiffness, and damping of the components to the mass, stiffness, and damping matrices of each element node respectively. Through the finite element method or theoretical derivation, the mass matrix, stiffness matrix, and damping matrix can be calculated for each element node, which are expressed as follows:

[0138] The mass matrix of element node (i,j) can be expressed as follows:

[0139]

[0140] where ρ pcb is the PCB density, V i,j is the volume of element node (i,j), ω is the decision variable, ρ dev is the component density, and V dev is the component volume;

[0141] The stiffness is determined by the geometric shape of the element and the elastic modulus of the material. The stiffness matrix of element node (i,j) can be expressed as follows:

[0142]

[0143] where E pcb is the Young's modulus of the computer PCB board, h is the thickness of the computer PCB board, v pcb is the Poisson's ratio of the computer PCB board, E dev is the Young's modulus of the component, δ dev is the component thickness, and v dev is the Poisson's ratio of the component;

[0144] Assume that the damping is proportional damping and is proportional to the mass and stiffness matrices. The damping matrix of element node (i,j) can be expressed as follows:

[0145]

[0146] where α and β are damping coefficients.

[0147] Therefore, the first vibration and shock equation is:

[0148]

[0149] where u i,j (t) represents the displacement of the element node (i, j), represents the acceleration of the element node (i, j), represents the velocity of the element node (i, j), is the external force action.

[0150] 2) For the fixed constraint element node, the fixed constraint means that the displacement of the element node is zero on the boundary connected to the support, rather than free vibration.

[0151] The mass matrix describes the inertial characteristics of the structure and is usually determined by the geometry of the element and the material density. The mass matrix of the fixed constraint element is the same as that of other elements. The mass matrix of the element node (i, j) can be expressed as follows:

[0152]

[0153] where: is the volume of the fixed element node (i, j);

[0154] The stiffness matrix describes the deformation behavior of the fixed constraint element under external loads. Since the element is located on the boundary and is subject to fixed constraints, the stiffness matrix is usually high. The stiffness matrix of the element node (i, j) can be expressed as follows:

[0155]

[0156] The damping matrix describes the energy dissipation process and is usually assumed to be proportional damping, that is, a linear combination of mass and stiffness. For the fixed constraint element, the damping matrix of the element node (i, j) can be expressed as follows:

[0157]

[0158] The vibration shock equation of the fixed constraint element describes its response under external forces based on the mass matrix, stiffness matrix, and damping matrix. The second vibration shock equation can be expressed as:

[0159]

[0160] According to the above vibration shock models of different elements, the vibration shock equation of the entire computer PCB board is finally constructed. The vibration shock equation of the entire computer PCB board can be obtained by superimposing the vibration shock equations of each element:

[0161]

[0162] Among them, M i,j is the total mass matrix, which contains the mass contributions of all element nodes, and C i,j is the total damping matrix, which contains the damping contributions of all element nodes; K i,j is the total stiffness matrix, which contains the stiffness contributions of all element nodes, u(t) represents the displacements of all element nodes, represents the velocities of all element nodes, represents the accelerations of all element nodes, and F i,j (t) is the external force vector. According to the vibration and shock equations of the entire computer PCB board, a board-level circuit vibration and shock model is obtained.

[0163] For external forces, if they are periodic or continuous excitation forces, such as sine wave excitation, constant external forces, etc. These excitation forces cause the system to vibrate at its natural frequency, usually describing a stable vibration state. If it is an instantaneous pulse excitation, it is usually represented as an impact force acting within a short time, usually showing a very short peak and quickly decaying.

[0164] For the vibration model, taking the sine wave as an example, its mathematical model is:

[0165]

[0166] For the shock model, taking the Dirac pulse function (unit impulse) as an example, its mathematical model is:

[0167]

[0168] Among them, F0 is the constant force, and δ(t) is the Dirac impulse function, indicating that the external force is instantaneous in time.

[0169] This equation is a second-order ordinary differential equation used to describe the dynamic behavior of the system. By solving this equation using the Runge-Kutta method, the time-domain response of the fixed constraint elements can be obtained, that is, the displacements, velocities, accelerations, etc. of the elements under different external forces.

[0170] S102. Obtain the optimal solution set of the multi-objective optimization model according to the Pareto multi-objective optimization method combined with the ant colony algorithm, so that the optimal solution set achieves an optimal balance among the thermal management, vibration and shock, and mechanical stability of the computer PCB board.

[0171] Optionally, S102 may include:

[0172] When calculating the optimal solution set of the multi-objective optimization model according to the ant colony algorithm, in each round of iteration, calculate the objective function value corresponding to each layout scheme; among them, the layout scheme is the component layout of the computer PCB board; the objective function values include the highest temperature of the components, the maximum difference and the maximum displacement of the computer PCB board;

[0173] When the objective function value corresponding to the current layout scheme meets the optimization objective of the Pareto multi-objective optimization method, take the current layout scheme as the optimal solution set.

[0174] It can be understood that the ant colony algorithm (Ant Colony Optimization, ACO) is a heuristic optimization algorithm that simulates the foraging behavior of ants. The basic idea of this algorithm is to simulate the process of ants searching for food sources. Ants leave traces on the path through pheromones and use the concentration of pheromones to guide other ants to choose the optimal path. This algorithm can not only effectively search complex solution spaces but also adaptively find the optimal solution in multi-objective optimization problems. In the ant colony algorithm, multiple "ants" conduct collaborative searches in the solution space. Each ant selects the next path according to the pheromone concentration of the current path and at the same time leaves new pheromones on its path. The update of pheromones is carried out through two mechanisms: evaporation of pheromones: over time, the pheromone concentration gradually weakens to prevent the algorithm from prematurely converging to a local optimal solution; enhancement of pheromones: during the search process, excellent paths accumulate more pheromones, thus attracting more ants to choose these paths.

[0175] In the PCB board design of fully enclosed rugged computers, the research objectives include:

[0176] 1. Thermal management: A reasonable layout helps to evenly distribute heat, avoid the formation of hot spots, and reduce electrical failures and shortened service life caused by high temperatures.

[0177] 2. Mechanical stability: By optimizing the layout, reduce the impact of external shocks and vibrations on components, improve the vibration resistance and shock resistance of the PCB, and extend the service life.

[0178] Furthermore, the thermal management objective function measures the temperature distribution of components in the circuit board, and the goal is to minimize the temperature difference and avoid hot spots, that is, to achieve the lowest average temperature of the PCB; the vibration and shock objective function aims to minimize the displacement caused by vibration, thereby improving the vibration resistance of the circuit board.

[0179] Additionally, the Pareto multi-objective optimization method is a multi-objective optimization method based on the concept of Pareto optimal solutions, emphasizing finding an optimal balance among multiple objectives. The Pareto optimal solution refers to a set of solutions among multiple optimization objectives such that no single objective can be further improved without sacrificing other objectives. In Pareto optimization, the solution set is called the Pareto front, which refers to the set of all non-dominated solutions. A solution is said to dominate another solution if it is not inferior to the other solution in all objectives and is superior to the other solution in at least one objective. In the multi-objective optimization of PCB component layout, the goal of Pareto optimization is to find a solution set that achieves an optimal balance among multiple objectives such as thermal management, vibration shock, and mechanical stability. In Pareto optimization, each solution has different performances on multiple objective functions. Through the iterative process of the algorithm, it is hoped to find a set of Pareto optimal solutions that cannot dominate each other and can provide diverse choices to meet different design requirements.

[0180] Example, Figure 3 is a schematic flow diagram of a process for obtaining an optimal solution set provided by an embodiment of the present invention. As Figure 3 shown, the basic parameters of the ant colony (number of ants, pheromone concentration, evaporation coefficient, etc.) can be initialized first, and an initial layout plan can be generated. Then, through the iterative process, path selection, pheromone update are carried out, and it is judged whether the current solution reaches the optimization goal or meets the requirements of the Pareto front. If the conditions are met, the algorithm terminates and the optimal solution set is obtained; otherwise, path selection and pheromone update continue until a predetermined number of iterations or convergence conditions are reached, and the optimal solution set is obtained. Finally, the algorithm can output a set of non-dominated solutions, that is, the optimal solution set, which can achieve the balance among objectives such as thermal management and vibration shock. Generally speaking, the Pareto front provides the optimal solution set in multi-objective optimization, while the ant colony algorithm effectively finds these Pareto optimal solutions by simulating the search process in nature. The combination of the two can achieve the balance between thermal management and mechanical stability in the optimization of the internal board card layout of a fully enclosed rugged computer and meet the performance requirements in extreme environments.

[0181] The following defines relevant variables:

[0182] For components, retain the power chips and memory in the simulation and equivalent them to power modules with the same size as the unit size. For each power module, its equivalent power consumption is the product of its heat flux density and the equivalent module volume. Each power module is compiled into different part numbers according to the chip type difference. For example, the part number of chip 3A6000 is U1, and the part numbers of memory DDR4 are Q1 - Q16, etc. The specific position of the component on the PCB board can be determined by the number of the unit closest to the center position of the component. For known components, a component set C = {C1, C2, ……, C k} can be constructed. Each component C k is bound with its fixed basic parameters, including part number, power consumption, heat conduction coefficient, mass, etc. In addition, a position number that can be updated in the algorithm iteration, that is, coordinate information, is set as an independent attribute.

[0183] The solution space represents the set of all possible component layout configurations, including all possible arrangements of component positions, while satisfying the constraints in aspects such as thermal management, vibration, and shock.

[0184] The objective function represents the optimization of the PCB component layout for a fully enclosed and ruggedized computer. Taking the highest temperature T max of the PCB board, the maximum temperature difference ΔT between PCB boards, and the maximum deformation d max of the PCB board as the objective function, each component layout order corresponds to a layout scheme. Taking the layout position of the component as the constraint condition, the PCB circuit board component layout optimization problem is as follows:

[0185] MinT max = f1(C k , i, j);

[0186] ΔT = f2(C k , i, j);

[0187] d max = f3(C k , i, j);

[0188] where 1 ≤ i ≤ 32, 1 ≤ j ≤ 46. If C k occupies (i, j), then

[0189] These objectives can be combined into a comprehensive objective function through weights to evaluate the advantages and disadvantages of different layout schemes.

[0190] The generation of a new solution means that in the ant colony optimization algorithm, each ant generates a new solution through path selection. Specifically, according to the local pheromone concentration and heuristic information of the current layout, a suitable path is selected for layout. Usually, the layout position of each component can be determined by a probability formula:

[0191]

[0192] Among them, is the probability of selecting from the component to position i and j, τ ij is the pheromone concentration, η ij is the heuristic information (such as the thermal stability, electrical properties of the path, etc.), and α' and β' are parameters that control the influence degrees of the pheromone and the heuristic information.

[0193] The acceptance criterion indicates that if the objective function value of the new solution is better than that of the current solution, the new solution is accepted; if the objective function value of the new solution is better than that of the optimal solution among all ants, the global optimal solution is updated; in order to avoid falling into the local optimal solution, a certain randomness is introduced, allowing the acceptance of a poorer new solution with a certain probability to increase the diversity of the search space.

[0194] The termination criterion indicates reaching the maximum number of iterations; the improvement amplitude of the objective function is less than the preset threshold; the calculation time reaches the predetermined limit; the solution set remains unchanged in multiple iterations.

[0195] According to the component position numbers in Table 1, combined with the specific parameters of each component given in Table 2, and also specific parameters, Δy is 5 mm, Δx is 5 mm, h is 2 mm, λ pcb is 60 W·m-1·K-1, T o is 20 °C, ρ pcb is 1900 kg / m 3 , E pcb is 7×1010 Pa, v pcb is 0.32, ρ dev is 2330 kg / m 3 , E dev is 1.1×1010 Pa, v dev is 0.4.

[0196] Table 2

[0197] Device Q (W) L (mm) W (mm) δ (mm) <![CDATA[α (W / m 2 ·K)]]> λ (W / m·K) Q1 0.05 13 13 1.2 10 500 Q2 0.5 15 10 1.0 10 600 Q3 0.5 15 10 1.0 10 600 Q4 0.05 14 14 1.7 10 500 D1 - D14 3 11 8 1.2 10 2000 U1 38 35 35 3.0 10 2000 U2 15 31 31 3.0 10 2000

[0198] Since it mainly focuses on the thermal design of fully enclosed rugged computers, when optimizing the layout, a set of solutions can be found through the Pareto front method while ensuring the anti-vibration and shock performance. Each solution performs best on a certain objective and does not deteriorate significantly on other objectives. This optimization method can effectively balance thermal management and anti-vibration and shock performance, ensuring the stability and reliability of the circuit in extreme environments. Through the selection of the Pareto front, the most suitable layout scheme can be selected from it to improve the overall performance of the fully enclosed rugged computer. In this problem, for the optimization of the thermal management objective, specifically, it is the temperature distribution uniformity and the minimization of the high-temperature area. Therefore, those solutions that can reduce the temperature difference ΔT or minimize the average temperature of the PCB board will be preferentially selected, while ensuring that the mechanical stability and electrical performance are not significantly damaged.

[0199] The following analyzes the present invention through MATLAB. By using MATLAB to complete the code writing, set the number of ants m to 30, the pheromone weight to 1, the heuristic factor weight to 2, the evaporation rate to 0.1, and the number of iterations to 800. By performing the objective optimization of the ant colony Pareto algorithm, the Pareto front solution set and its projections on each surface can be obtained. Figure 4 It is a schematic diagram of a three-dimensional Pareto front provided by an embodiment of the present invention, as Figure 4 shown, the Pareto front solution set is set to consist of 90 Pareto optimal solutions. Figure 5a It is a schematic diagram of the layout before optimization provided by an embodiment of the present invention. Figure 5b It is a schematic diagram of the layout after optimization provided by an embodiment of the present invention. Figure 6a It is a schematic diagram of the PCB structure of the board-level circuit before optimization provided by an embodiment of the present invention. Figure 6b It is a schematic diagram of the PCB structure of the board-level circuit after optimization provided by an embodiment of the present invention. The position coding of the components after the layout optimization is shown in Table 3:

[0200] Table 3

[0201]

[0202] The comparison of the temperatures of the original layout and the optimized layout is shown in Table 4:

[0203] Table 4

[0204] Temperature (°C) Highest Temperature Lowest Temperature Maximum Temperature Difference Average PCB Temperature Original Layout 97.34 45.97 51.37 63.80 Optimized Layout 81.48 44.12 37.36 56.03 Temperature Difference 15.86 1.85 14.01 7.77

[0205] Figure 7a It is a cloud diagram of the temperature distribution before the layout optimization provided by an embodiment of the present invention. Figure 7b It is a cloud diagram of the temperature distribution after the layout optimization provided by an embodiment of the present invention. Figure 8a It is a curve graph of the change in the average temperature of the PCB before the layout optimization provided by an embodiment of the present invention.Figure 8b This is the curve graph of the average temperature change of a PCB after layout optimization provided by an embodiment of the present invention. From Table 4, Figure 7a , Figure 7b , Figure 8a and Figure 8b , it can be seen that after the layout of the board-level circuit components is optimized, compared with the original board-level layout, the highest temperature of the board-level circuit decreases from 97.34°C to 81.48°C, and the highest temperature decreases by 15.86°C; the lowest temperature of the board-level circuit decreases from 45.97°C to 44.12°C, and the lowest temperature decreases by 1.85°C; the difference between the highest temperature and the lowest temperature on the board-level circuit drops from 51.37°C to 37.36°C, and the temperature difference shrinks by 14.01°C. The average temperature of the PCB decreases from 63.80°C to 56.03°C, with an overall decrease of 7.77°C.

[0206] The most important factors affecting the thermal reliability of the board-level circuit are still the highest temperature and the temperature change range on the board-level circuit. Excessive temperature may damage components, and uneven temperature distribution and excessive thermal stress caused by too large a difference between the highest temperature and the lowest temperature may cause the PCB board to deform and warp, and the welding parts of the components to crack. The maximum temperature difference of the optimized board-level circuit decreases from 51.37°C in the original layout to 37.36°C, the temperature distribution is more uniform, and the temperature change trend is smoother. The possibility of board-level circuit failure caused by excessive thermal stress is reduced.

[0207] Analysis is carried out under different mechanical environments of random vibration and transient shock. The analysis results are shown in Table 5:

[0208]

[0209] Figure 9a This is the directional deformation diagram under random vibration before layout optimization provided by an embodiment of the present invention. Figure 9b This is the directional deformation diagram under random vibration after layout optimization provided by an embodiment of the present invention. Figure 10a This is the equivalent stress diagram under random vibration before layout optimization provided by an embodiment of the present invention. Figure 10b This is the equivalent stress diagram under random vibration after layout optimization provided by an embodiment of the present invention. Figure 11a This is the directional deformation diagram under transient shock before layout optimization provided by an embodiment of the present invention. Figure 11b This is the directional deformation diagram under transient shock after layout optimization provided by an embodiment of the present invention. Figure 12a This is the equivalent stress diagram under transient shock before layout optimization provided by an embodiment of the present invention. Figure 12bThis is an equivalent stress diagram under transient impact with an optimized layout provided by an embodiment of the present invention. As shown in Table 5 and the above-mentioned multiple schematic diagrams, according to the vibration and impact simulation results, the optimized layout shows relatively significant improvements in multiple indicators. First, under the random vibration condition, the directional deformation of the optimized layout increases by 7.69%, but the equivalent stress decreases by 3.26%, indicating that the optimized design achieves a good balance in terms of mechanical stability and stress distribution uniformity. Second, under the transient impact condition, the directional deformation of the optimized layout significantly decreases by 60%, and the equivalent stress decreases by approximately 23.64%, indicating that it has a significant improvement in impact resistance performance. The optimized layout effectively reduces the stress under impact while reducing deformation, further improving the impact resistance ability of the structure. Generally speaking, the optimized layout takes into account the design requirements in multiple aspects such as thermal management, vibration, and impact while improving the system reliability, fully reflecting the advantages of multi-objective optimization and meeting the working requirements of the fully enclosed and reinforced computer system in harsh environments.

[0210] Specifically, although the directional deformation of the optimized layout increases by 7.69% under the random vibration condition, this change indicates that the optimized design may make some compromises in certain aspects while enhancing other performances. The increase in directional deformation may stem from the comprehensive consideration of thermal management, mechanical stability, and impact resistance performance during the optimization process. When improving the impact resistance performance and stress distribution uniformity, the stiffness of the layout may be weakened, resulting in an increase in directional deformation under random vibration conditions. However, despite the increase in directional deformation, the overall design goal is still to achieve the balance of thermal distribution uniformity and mechanical stability. This result highlights the trade-off in the multi-objective optimization process. Although there is a compromise in vibration suppression, the optimized layout can still effectively improve the impact resistance performance and enhance the overall structural stability and reliability. In practical applications, a moderate increase in directional deformation may be acceptable, especially the efforts made to improve the impact resistance ability and mechanical stability during the optimization process.

[0211] In the above technical solution, the present invention constructs a multi-objective optimization model focusing on thermal management and mechanical stability. Thermal management is achieved by optimizing the component layout and heat dissipation performance; mechanical stability is also achieved by optimizing the component layout to reduce the influence of vibration and impact; this model can, on the basis of comprehensively considering various factors, realize the layout optimization of components on the computer PCB board, and through the multi-objective optimization idea of combining the ant colony algorithm with the Pareto front, gradually update the pheromone to guide the ants to find the optimal solution among multiple objectives. In each iteration, calculate the objective function values corresponding to each layout scheme, find the optimal solution set, and adopt the corresponding layout scheme, which can achieve the balance in terms of thermal management and mechanical stability.

[0212] It should be noted that the terms "first", "second", etc. are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order different from those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present invention.

[0213] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. means that the specific features or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.

[0214] Although the present invention has been described in connection with various embodiments herein, however, in the process of implementing the claimed invention, those skilled in the art can understand and implement other variations of the disclosed embodiments by viewing the drawings and the disclosure. In the description of the present invention, the term "including" does not exclude other components or steps, the term "a" or "one" does not exclude a plurality of cases, and the meaning of "a plurality" is two or more, unless otherwise specifically defined. In addition, certain measures are described in different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0215] The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. An optimization method for the layout of PCB components of a fully enclosed and reinforced computer, characterized in that, The method includes: Constructing a multi-objective optimization model for components on a computer PCB board; wherein, the multi-objective optimization model is used to optimize the component layout and heat dissipation performance of the computer PCB board; Obtaining the optimal solution set of the multi-objective optimization model according to the Pareto multi-objective optimization method combined with the ant colony algorithm, so that the optimal solution set achieves an optimal balance among the thermal management, vibration shock, and mechanical stability of the computer PCB board.

2. The fully enclosed and reinforced computer PCB component layout optimization method according to claim 1, wherein The constructing of the multi-objective optimization model for components on the computer PCB board includes: Constructing a board-level circuit temperature distribution model according to the components on the computer PCB board; Constructing a board-level circuit vibration shock model according to the components on the computer PCB board; Obtaining the multi-objective optimization model according to the board-level circuit temperature distribution mathematical model and the board-level circuit vibration shock model.

3. The method for optimizing the layout of fully enclosed and reinforced computer PCB components according to claim 2, wherein The constructing of the board-level circuit temperature distribution mathematical model according to the components on the computer PCB board includes: Performing mesh division on the computer PCB board according to the size of the computer PCB board and the minimum size of the components, to obtain a plurality of different unit nodes; Encoding the plurality of different unit nodes to obtain the component numbers located at different unit nodes; Constructing the board-level circuit temperature distribution mathematical model according to the computer PCB board, the components, and the component numbers.

4. The method for optimizing the layout of fully enclosed and reinforced computer PCB components according to claim 3, wherein The constructing of the board-level circuit temperature distribution mathematical model according to the computer PCB board, the components, and the component numbers includes: Deriving the heat transfer of each unit node in the internal area of the computer PCB board to obtain the heat balance equation of the internal area of the computer PCB board; Deriving the heat transfer of each unit node in the boundary area of the computer PCB board to obtain the heat balance equation of the boundary area of the computer PCB board; Deriving the heat transfer of the four corner unit nodes of the computer PCB board to obtain the heat balance equation of the corner unit nodes of the computer PCB board; Constructing the board-level circuit temperature distribution mathematical model according to the heat balance equation of the internal area, the heat balance equation of the boundary area, and the heat balance equation of the corner unit nodes.

5. The method for optimizing the layout of fully enclosed and reinforced computer PCB components according to claim 4, characterized in that, The heat balance equation of the internal area is expressed as follows: where, Δy represents the length in the y - direction of the unit node (i,j) in the computer PCB board after grid division, Δx represents the length in the x - direction of the unit node (i,j) in the computer PCB board after grid division, h represents the height of the unit node (i,j), λ pcb is the equivalent thermal conductivity of the computer PCB board, T i,j represents the temperature of the unit node (i,j), T i+1,j represents the temperature of the unit node (i + 1,j), T i-1,j represents the temperature of the unit node (i - 1,j), T i,j+1 represents the temperature of the unit node (i,j + 1), T i,j-1 represents the temperature of the unit node (i,j - 1), Q dev is the power of the component, α dev is the convective heat transfer coefficient of the component, A dev is the total convective heat transfer area of the component, T o represents the ambient temperature, R c represents the thermal resistance of the conduction path from the component to the unit node (i,j), ω is the conditional decision variable, A i,j is the total contact area between the unit node (i,j) and air, α pcb is the convective heat transfer coefficient of the computer PCB board.

6. The fully enclosed and reinforced computer PCB component layout optimization method according to claim 5, wherein The heat balance equation of the boundary area is expressed as follows:

7. The method for optimizing the layout of fully enclosed and reinforced computer PCB components according to claim 5, characterized in that, The heat balance equation of the corner unit nodes is expressed as follows:

8. The method for optimizing the layout of fully enclosed and reinforced computer PCB components according to claim 3, wherein The constructing of the board-level circuit vibration shock model according to the components on the computer PCB board includes: Obtaining the first vibration shock equation according to the mass matrix, stiffness matrix, and damping matrix of the unconstrained unit nodes among the plurality of different unit nodes; Obtaining the second vibration shock equation according to the mass matrix, stiffness matrix, and damping matrix of the fixed constraint unit nodes among the plurality of different unit nodes; Constructing the board-level circuit vibration shock model according to the first vibration shock equation and the second vibration shock equation.

9. The method for optimizing the layout of fully enclosed and reinforced computer PCB components according to claim 3, characterized in that, The obtaining of the optimal solution set of the multi-objective optimization model according to the Pareto multi-objective optimization method combined with the ant colony algorithm includes: When calculating the optimal solution set of the multi-objective optimization model according to the ant colony algorithm, in each round of iteration, calculate the objective function value corresponding to each layout scheme; wherein, the layout scheme is the component layout of the computer PCB board; the objective function values include the highest temperature of the components, the maximum difference degree and the maximum displacement amount of the computer PCB board. When the objective function value corresponding to the current layout scheme meets the optimization objective of the Pareto multi-objective optimization method, take the current layout scheme as the optimal solution set.

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