Method for improving back sealing defect of substrate
By forming a low-temperature oxide film layer and a polysilicon layer with a cladding structure on the back of the substrate, the performance degradation caused by the arc defect of the substrate back seal is solved, and the integrity and stability of the substrate back seal are achieved.
Patent Information
- Application Number
- CN202510295150.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-12
- Publication Date
- 2025-07-11
AI Technical Summary
When the silicon epitaxial process is implemented on the front of the substrate, the silicon falling off in the high-temperature furnace tube forms arc defects in the state of nitrogen flushing and the wafer boat rotating, resulting in a degradation of the performance of the back sealing layer on the substrate.
By depositing a low-temperature oxide film layer on the back of the substrate, the low-temperature oxide film layer and polysilicon layer in the edge area are removed, and a low-temperature oxide film layer covering the structure is formed to avoid exposure of the polysilicon layer. Low-pressure chemical vapor deposition is used to form a polysilicon layer, and a second low-temperature oxide film layer is deposited on the back of the substrate to cover the side. Finally, the oxide film layer in the edge area is removed by wet corrosion.
It effectively avoids the growth of silicon on the polysilicon layer, prevents the formation of arc defects, and ensures the integrity and performance of the back seal layer of the substrate.
Smart Images
Figure CN120299983A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and particularly to a method for improving substrate back-sealing defects. Background Art
[0002] When fabricating semiconductor device products using heavily doped substrates, in order to prevent doped substances from escaping from the back side of the substrate during the high-temperature processes of subsequent product wafer processing, which may affect the process chamber atmosphere and the doping concentration of the film layer on the front side of the substrate, an oxide film layer is usually formed on the back side of the substrate for back-sealing. To prevent the oxide film layer serving as the substrate back-sealing layer from being removed by the wet etching process in the subsequent wafer processing, a polysilicon layer is formed on the oxide film layer, or a polysilicon layer and another oxide film layer are formed in sequence.
[0003] When performing a silicon epitaxy process on the front side of the substrate, the silicon shed in the high-temperature furnace tube forms arc-shaped defects in the exposed part of the polysilicon layer in the substrate back-sealing layer under the nitrogen purge and the wafer boat rotation state, resulting in a decline in the back-sealing performance of the substrate back-sealing layer. Summary of the Invention
[0004] In view of the above-mentioned disadvantages of the prior art, the purpose of this application is to provide a method for improving substrate back-sealing defects, which is used to solve the problem of forming arc-shaped defects on the substrate back-sealing layer during the silicon epitaxy process on the front side of the substrate in the prior art.
[0005] To achieve the above purpose and other related purposes, this application provides a method for improving substrate back-sealing defects, including:
[0006] Step 1: Provide a substrate, and deposit a first low-temperature oxide film layer on the back side of the substrate;
[0007] Step 2: Remove the first low-temperature oxide film layer located in the edge area of the substrate;
[0008] Step 3: Form a polysilicon layer covering the substrate and the first low-temperature oxide film layer;
[0009] Step 4: Remove the polysilicon layer located on the front side and the edge area of the substrate through an edge polishing process;
[0010] Step 5: Deposit a second low-temperature oxide film layer on the back side of the substrate;
[0011] Step 6: Remove the second low-temperature oxide film layer located in the edge area of the substrate. The second low-temperature oxide film layer covers the side parts of the first low-temperature oxide film layer and the polysilicon layer.
[0012] Preferably, the first low-temperature oxide film layer and the second low-temperature oxide film layer are formed by a chemical vapor deposition process or a physical vapor deposition process at a low temperature.
[0013] Preferably, the polysilicon layer is formed by a low-pressure chemical vapor deposition process.
[0014] Preferably, the gas source for low-pressure chemical vapor deposition is silane, and the temperature is 600°C - 700°C.
[0015] Preferably, the second high-temperature oxide film layer, the polysilicon layer, and the first high-temperature oxide film layer have different thicknesses.
[0016] Preferably, the removal in Steps 2 and 6 is implemented by a process of chamfering first and then wet etching.
[0017] Preferably, the etching solution for wet etching is an aqueous solution of hydrogen fluoride.
[0018] Preferably, after Step 6, the formed substrate back-sealing layer is composed of a first low-temperature oxide film layer, a polysilicon layer, and a second low-temperature oxide film layer stacked in sequence, and the second low-temperature oxide film layer covers the sides of the first low-temperature oxide film layer and the polysilicon layer.
[0019] As described above, the method for improving substrate back-sealing defects provided by the present application has the following beneficial effects: The formed substrate back-sealing layer is composed of a first low-temperature oxide film layer, a polysilicon layer, and a second low-temperature oxide film layer stacked in sequence, and the second low-temperature oxide film layer covers the sides of the first low-temperature oxide film layer and the polysilicon layer. When an epitaxial layer is formed on the substrate subsequently, silicon will not grow on the polysilicon layer, avoiding the formation of arc-shaped defects. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0021] Figure 1A Shows a flowchart of forming a substrate back-sealing layer in the prior art;
[0022] Figure 1B Shows a schematic cross-sectional structure diagram of the substrate after forming a substrate back-sealing layer according to the prior art;
[0023] Figure 1C Shows an electron micrograph of arc-shaped defects formed on the substrate back-sealing layer during the silicon epitaxial process on the front side of the substrate;
[0024] Figure 2 Shows a flowchart of the method for improving substrate back-sealing defects provided by the embodiments of the present application;
[0025] Figures 3A - 3FIt shows a schematic cross-sectional structure diagram of the substrate formed after each step in the method for improving the back-end sealing defect of the substrate provided by the embodiment of the present application. Detailed implementation manners
[0026] The following uses specific specific examples to illustrate the implementation manners of the present application. Those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in this specification. The present application can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0027] Next, the technical solutions in the present application will be clearly and completely described in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.
[0028] In the description of the present application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0029] In the description of the present application, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, and can also be the communication inside two elements. It can be a wireless connection or a wired connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific situations.
[0030] In addition, the technical features involved in different implementation manners of the present application described below can be combined with each other as long as they do not conflict with each other.
[0031] As Figure 1A shown, the steps of forming the back-end sealing layer of the substrate in the prior art include:
[0032] First, after depositing the first low-temperature oxide film layer on the back of the substrate, the first low-temperature oxide film layer located in the edge area of the substrate is removed;
[0033] Next, a polysilicon layer covering the substrate and the first low-temperature oxide film layer is formed;
[0034] Next, a second low-temperature oxide film layer is deposited on the back surface of the substrate;
[0035] Next, the second low-temperature oxide film layer located in the edge region of the substrate is removed;
[0036] Finally, the polysilicon layer located on the front surface and the edge region of the substrate is removed by an edge grinding process.
[0037] As Figure 1B shown, the formed back-end encapsulation layer of the substrate is composed of a stacked first low-temperature oxide film layer, a polysilicon layer, and a second low-temperature oxide film layer. The misalignment of the edges of the first low-temperature oxide film layer, the polysilicon layer, and the second low-temperature oxide film layer results in the exposure of the polysilicon layer, and a stepped edge structure is prone to form arc-shaped defects as Figure 1C shown.
[0038] To solve this problem, the present application provides a method for improving the back-end encapsulation defects of the substrate.
[0039] Please refer to Figure 2 , which shows a flowchart of the method for improving the back-end encapsulation defects provided by the embodiments of the present application.
[0040] As Figure 2 shown, the method for improving the back-end encapsulation defects of the substrate includes the following steps:
[0041] Step 1: Provide a substrate, and deposit a first low-temperature oxide film layer on the back surface of the substrate;
[0042] Step 2: Remove the first low-temperature oxide film layer located in the edge region of the substrate;
[0043] Step 3: Form a polysilicon layer covering the substrate and the first low-temperature oxide film layer;
[0044] Step 4: Remove the polysilicon layer located on the front surface and the edge region of the substrate by an edge grinding process;
[0045] Step 5: Deposit a second low-temperature oxide film layer on the back surface of the substrate;
[0046] Step 6: Remove the second low-temperature oxide film layer located in the edge region of the substrate. The second low-temperature oxide film layer covers the sides of the first low-temperature oxide film layer and the polysilicon layer.
[0047] In Step 1, as Figure 3A shown, optionally, the substrate 300 is a silicon substrate. As an example, the first low-temperature oxide film layer 301 is deposited on the back surface of the substrate 300 by a chemical vapor deposition process or a physical vapor deposition process at a low temperature.
[0048] In Step 2, as Figure 3B shown, the first low-temperature oxide film layer 301 located in the edge region of the substrate 300 is removed by a process of chamfering first and then wet etching. The edge region of the substrate 300 includes the side portion of the substrate 300 and the region near the side portion. As an example, the etching solution for wet etching is an aqueous solution of hydrogen fluoride.
[0049] In Step 3, as Figure 3C shown, as an example, a polysilicon layer 302 covering the substrate 300 and the first low-temperature oxide film layer 301 is formed by a low-pressure chemical vapor deposition process. The gas source for low-pressure chemical vapor deposition is silane, and the temperature is 600°C - 700°C.
[0050] In Step 4, as Figure 3D shown, the polysilicon layer 302 located on the front and edge regions of the substrate 300 is removed by an edge polishing process. The edge polishing process is implemented by an edge polisher, and the specific steps are well-known to those skilled in the art and will not be elaborated here.
[0051] In Step 5, as Figure 3E shown, as an example, a second low-temperature oxide film layer 303 is deposited on the back surface of the substrate 300 by a chemical vapor deposition process or a physical vapor deposition process at a low temperature. Exemplarily, the second high-temperature oxide film layer 303, the polysilicon layer 302, and the first high-temperature oxide film layer 301 may have different thicknesses.
[0052] In Step 6, as Figure 3F shown, the second low-temperature oxide film layer 303 located in the edge region of the substrate 300 is removed by a process of chamfering first and then wet etching. As an example, the etching solution for wet etching is an aqueous solution of hydrogen fluoride.
[0053] After Step 6, the formed substrate back-sealing layer is composed of the first low-temperature oxide film layer 301, the polysilicon layer 302, and the second low-temperature oxide film layer 303 stacked in sequence. The second low-temperature oxide film layer 303 covers the side portions of the first low-temperature oxide film layer 301 and the polysilicon layer 302. When an epitaxial layer is formed on the substrate 300 subsequently, silicon will not grow on the polysilicon layer 302, avoiding the formation of arc-shaped defects as Figure 1C shown. Therefore, the present application effectively overcomes various drawbacks in the prior art and has high industrial utilization value.
[0054] The thickness of the second low-temperature oxide film layer 303 covering the sides of the first low-temperature oxide film layer 301 and the polysilicon layer 302 is such that the wet etching performed before forming the epitaxial layer does not completely deplete this part of the second low-temperature oxide film layer 303. In other embodiments, after step four, the polysilicon layer 302 covers the sides of the first low-temperature oxide film layer 301; after step six, the second low-temperature oxide film layer 303 covers the polysilicon layer 302.
[0055] It should be noted that the illustrations provided in this embodiment only schematically illustrate the basic concept of the present application. Therefore, only the components related to the present invention are shown in the drawings, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.
[0056] The above embodiments only illustratively explain the principles and effects of the present application, rather than limiting the present application. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present application.
Claims
1. A method for improving substrate backseal defects, characterized in that The method includes: Step 1: Provide a substrate, and deposit a first low-temperature oxide film layer on the back surface of the substrate; Step 2: Remove the first low-temperature oxide film layer located in the edge region of the substrate; Step 3: Form a polysilicon layer covering the substrate and the first low-temperature oxide film layer; Step 4: Remove the polysilicon layer located on the front surface and the edge region of the substrate by edge polishing; Step 5: Deposit a second low-temperature oxide film layer on the back surface of the substrate; Step 6: Remove the second low-temperature oxide film layer located in the edge region of the substrate, and the second low-temperature oxide film layer covers the sides of the first low-temperature oxide film layer and the polysilicon layer.
2. The method according to claim 1, wherein The first low-temperature oxide film layer and the second low-temperature oxide film layer are formed by chemical vapor deposition process or physical vapor deposition process at low temperature.
3. The method according to claim 1, characterized in that, The polysilicon layer is formed by low-pressure chemical vapor deposition process.
4. The method according to claim 3, characterized in that The gas source for the low-pressure chemical vapor deposition is silane, and the temperature is 600°C - 700°C.
5. The method according to claim 1, wherein The second high-temperature oxide film layer, the polysilicon layer and the first high-temperature oxide film layer have different thicknesses.
6. The method according to claim 1, wherein The removal in Step 2 and Step 6 is implemented by a process of chamfering first and then wet etching.
7. The method according to claim 6, wherein The etching solution for the wet etching is an aqueous solution of hydrogen fluoride.
8. The method according to claim 1, wherein After Step 6, the formed back-sealing layer of the substrate is composed of the first low-temperature oxide film layer, the polysilicon layer and the second low-temperature oxide film layer which are stacked in sequence, and the second low-temperature oxide film layer covers the sides of the first low-temperature oxide film layer and the polysilicon layer.