Lead frame packaging structure and packaging method thereof

Abstract

The present application discloses a leadframe package structure and a packaging method thereof, relating to the field of semiconductor technology. The leadframe package structure includes a base island and a plurality of pin bodies arranged along the periphery of the base island. A first chip is mounted on the top surface of the base island, and the first chip is connected to the pin bodies. The ends of the pin bodies are provided with slots to separate the ends of the pin bodies into a first pin and a second pin spaced apart along the mounting direction. The first pin is suspended, and the second pin is bent toward a side away from the first pin. The second pin is used to connect to a circuit board. The leadframe package structure and packaging method thereof can improve heat dissipation through the first pin, thereby ensuring the reliability of the connection between the second pin and the circuit board.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a lead frame packaging structure and a packaging method thereof. Background Art

[0002] With the rapid development of the semiconductor industry, the QFN (Quad Flat No-lead Package) structure, with its advantages of low profile and high integration, has been widely used in consumer electronics, automotive electronics, and other fields. However, in actual operating conditions, thermal management issues of QFN products have become increasingly prominent. During operation, the high heat generated by QFN products is continuously transferred to the soldering ends of the pins. The solder layer (such as tin) attached to the circuit board is repeatedly subjected to the stress impact of thermal expansion and contraction, which in turn causes microcracks to propagate in the solder layer, ultimately leading to reliability failures such as cold joints and desoldering. Summary of the Invention

[0003] The purpose of the present application is to provide a lead frame packaging structure and a packaging method thereof, which can improve the heat dissipation effect through the first pin, thereby ensuring the reliability of the connection between the second pin and the circuit board.

[0004] The embodiment of the present application is implemented as follows:

[0005] According to a first aspect of an embodiment of the present application, a lead frame packaging structure is provided, comprising a base island and a plurality of pin bodies arranged along the circumference of the base island, wherein a first chip is mounted on the top surface of the base island, the first chip is connected to the pin body, and a groove is provided at the end of the pin body to separate the end of the pin body into a first pin and a second pin arranged at intervals along the mounting direction, the first pin is arranged in a suspended manner, and the second pin is bent toward a side away from the first pin, and the second pin is used to connect to a circuit board.

[0006] As an implementation method, the first pin is parallel to the top surface of the base island; and / or the end of the second pin is parallel to the circuit board.

[0007] As an implementation method, the first chip is mounted on the base island, and the first chip is connected to the lead body through a first bonding wire; the lead frame packaging structure also includes a first plastic package, which covers the base island, the first chip and the first bonding wire.

[0008] As an implementation method, a second chip is provided on the first pin, and the second chip cover is provided outside the first plastic package.

[0009] As an implementation method, the second chip is flip-chip mounted, and the second chip is connected to the first pin via a bump; or the second chip is face-up mounted, and the second chip is connected to the first pin via a second bonding wire.

[0010] As an implementation method, the bottom surface of the second chip is fixedly connected to the top surface of the first plastic package body via a connecting adhesive layer.

[0011] As an implementation method, it also includes a third pin arranged along the peripheral side of the base island. Along the mounting direction, the pin body and the first pin have the same height, and the third pin, the first pin and the second pin have different heights. The first chip and the second chip are also respectively connected to the third pin.

[0012] As an implementation method, the pin bodies and the third pins are alternately and spaced apart along the circumference of the base island.

[0013] As an implementation method, the heights of the third pin, the first pin, and the second pin decrease in sequence.

[0014] As an implementation method, the first chip is connected to the third pin through a third bonding wire; when the second chip is in a flip-chip configuration, the second chip is connected to the third pin through a bump, or, when the second chip is in a face-up configuration, the second chip is connected to the third pin through a fourth bonding wire.

[0015] As an implementation method, it also includes a fourth pin arranged along the circumferential side of the base island, along the mounting direction, the pin body and the first pin have the same height, and the fourth pin, the first pin and the second pin have different heights, a shielding layer is provided on the fourth pin, and the shielding layer is located between the first plastic package body and the second chip, and the fourth pin is connected to the second pin through a fifth bonding wire.

[0016] As an implementation method, a second plastic package is further included, and the second plastic package covers the first pin and the second chip.

[0017] According to a second aspect of the embodiments of the present application, a packaging method for a lead frame packaging structure is provided, which is used to prepare the above-mentioned lead frame packaging structure.

[0018] The beneficial effects of the embodiments of the present application include:

[0019] The lead frame packaging structure includes a base island and a plurality of pin bodies arranged along the circumference of the base island. A first chip is mounted on the top surface of the base island, and the first chip is connected to the pin body. The end of the pin body is provided with a slot to separate the end of the pin body into a first pin and a second pin spaced apart along the mounting direction. The first pin is suspended, and the second pin is bent toward a side away from the first pin. The second pin is used to connect to the circuit board. The slot design of the pin body can make the first pin and the second pin independent of each other and connected to each other. The first pin is suspended, and the first pin is equivalent to an independent heat sink fin. The heat exchange area between the base island and the first chip and the outside world can be increased through the first pin. The second pin is equivalent to an independent terminal, and can be soldered to the circuit board through the second pin. In this way, the lead frame packaging structure not only improves the heat dissipation efficiency through the first pin, but also ensures the reliability of soldering through the second pin. It can also increase the number of pins to meet the needs of high-density integration, while reducing the use of additional heat sinks, thereby reducing the packaging cost and volume. It has the advantages of being easy to process and suitable for large-scale mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 A schematic flow chart of a method for preparing a lead frame packaging structure according to the first embodiment of the present application;

[0022] Figure 2 A schematic structural diagram of the base island provided in the first embodiment of the present application;

[0023] Figure 3 A schematic structural diagram of the pin body provided in the first embodiment of the present application;

[0024] Figure 4 A schematic structural diagram of a lead frame packaging structure provided in the first embodiment of the present application;

[0025] Figure 5 A schematic structural diagram of a lead frame packaging structure provided in a second embodiment of the present application;

[0026] Figure 6 A schematic structural diagram of a base island provided in the third embodiment of the present application;

[0027] Figure 7 A schematic structural diagram of a lead frame packaging structure provided in a third embodiment of the present application;

[0028] Figure 8 A schematic structural diagram of a base island provided in the fourth embodiment of the present application;

[0029] Figure 9 This is a schematic structural diagram of the lead frame packaging structure provided in the fourth embodiment of the present application.

[0030] Icons: 100-lead frame packaging structure; 110-base island; 120-pin body; 121-first pin; 122-second pin; 123-slot; 130-first chip; 131-first wire bonding; 132-third wire bonding; 140-first plastic package; 141-connecting glue layer; 150-second chip; 151-bump; 161-third pin; 162-fourth pin; 163-fifth wire bonding; 170-metal shielding layer; 180-second plastic package; 191-support layer; 192-connecting rib; 193-metal frame. DETAILED DESCRIPTION

[0031] The embodiments set forth below represent the information necessary to enable those skilled in the art to practice the embodiments and illustrate the best mode for practicing the embodiments. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of the present disclosure and will recognize applications of these concepts not specifically set forth herein. It should be understood that these concepts and applications fall within the scope of the present disclosure and the appended claims.

[0032] It should be understood that when an element (such as a layer, region, or substrate) is referred to as being “on” or “extending onto” another element, it can be directly on or directly extend onto the other element, or intervening elements may be present. Similarly, it should be understood that when an element (such as a layer, region, or substrate) is referred to as being “over” or “extending onto” another element, it can be directly on or extend directly over the other element, or intervening elements may be present.

[0033] The terms used herein are for the purpose of describing specific embodiments only and are not intended to limit the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms "a," "an," and "the" are intended to include the plural forms as well. It should also be understood that when used herein, the term "comprising" indicates the presence of the recited features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0034] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as those commonly understood by those skilled in the art to which this disclosure belongs. It should also be understood that the terms used herein should be interpreted as having the same meanings as those in the context of this specification and the relevant art, and should not be interpreted in an idealized or overly formal sense, unless otherwise explicitly defined herein.

[0035] In the electronics packaging field, thermal management challenges facing QFN products are becoming increasingly prominent. When QFN products are in operation, the high heat continuously generated by the chip is transferred along the pins to the solder joints, subjecting the solder layer (e.g., tin) on the circuit board to a long-term stress cycle of thermal expansion and contraction. This cyclical stress impact can cause microcracks within the solder layer to gradually propagate, ultimately leading to reliability failures such as cold joints and desoldering, posing a potential threat to the long-term stable operation of electronic equipment.

[0036] To solve the above problems, please refer to Figures 1 to 9 The present application provides a lead frame packaging structure 100 and a packaging method thereof, which separates the first pin 121 and the second pin 122 by a slot 123 and optimizes the bending design of the second pin 122, thereby separating the heat dissipation function of the first pin 121 from the electrical connection function of the second pin 122. The heat dissipation efficiency is improved by the first pin 121, and the reliability of welding is ensured by the bending of the second pin 122.

[0037] Specifically, if Figures 1 to 9 As shown, in the first aspect of an embodiment of the present application, a lead frame packaging structure 100 is provided, including a base island 110 and a plurality of pin bodies 120 arranged along the circumference of the base island 110, a first chip 130 is mounted on the top surface of the base island 110, the first chip 130 is connected to the pin body 120, and a groove 123 is provided at the end of the pin body 120 to separate the end of the pin body 120 into a first pin 121 and a second pin 122 arranged at intervals along the mounting direction, the first pin 121 is arranged in a suspended manner, and the second pin 122 is bent toward a side away from the first pin 121, and the second pin 122 is used to connect to a circuit board.

[0038] It should be noted that if Figure 1 and Figure 4 As shown, the lead frame package structure 100 includes a base island 110, on the top surface of which a first chip 130 (such as a power chip, a semiconductor device, etc.) is mounted, so that the base island 110 serves as a supporting component of the package structure. Figure 2 and Figure 3As shown, a pin body 120 is provided along the circumferential side of the base island 110, and a slot 123 is provided at the end of each pin body 120 (or the outer end of the pin body 120) to separate the end of the pin body 120 into two parts that are independent of each other and interconnected, wherein the first pin 121 is located on the side away from the circuit board along the mounting direction (i.e., the vertical direction), and the first pin 121 is suspended, mainly to improve the heat dissipation effect, and the second pin 122 is located on the side close to the circuit board along the mounting direction, and the second pin 122 is bent toward the side away from the first pin 121, or in other words, the second pin 122 is bent toward the side close to the circuit board, so that the base island 110 can be soldered on the circuit board through the second pin 122, thereby achieving electrical connection between the first chip 130 and the circuit board.

[0039] The lead frame packaging structure 100 provided in the present application, first, is provided with a groove 123 at the end of the pin body 120, so that the end of the pin body 120 is separated into a first pin 121 and a second pin 122 along a direction perpendicular to the mounting direction (i.e., the horizontal direction) through the groove 123. At this time, the first pin 121 and the second pin 122 are respectively parallel to the top surface of the base island 110 (or the surface of the circuit board), and then the second pin 122 is bent so that the second pin 122 and the first pin 121 are spatially dislocated in the vertical direction. For example, the first pin 121 remains horizontal, the second pin 122 is bent downward, and there is a height difference between the second pin 122 and the first pin 121 in the vertical direction. Preferably, the end of the bent second pin 122 can be parallel to the surface of the circuit board, so that the end of the second pin 122 can be used as a wiring terminal to weld and fix the second pin 122 to the circuit board. For example, wave soldering, reflow soldering and other processes can be used for welding. The contact area of ​​the solder joint is large, the welding reliability is high, and the risk of cold soldering or desoldering is avoided.

[0040] By designing the slot 123 of the pin body 120, the first pin 121 and the second pin 122 can be made independent of each other. Thus, the second pin 122 can be bent separately while the first pin 121 maintains a planar shape, so that there is a certain distance between the first pin 121 and the second pin 122 in the vertical direction. In this way, the first pin 121 can be directly exposed to the air or close to the heat dissipation surface of the package shell, while the second pin 122 can extend toward the side close to the circuit board; since the first pin 121 and the second pin 122 are close to the base island 110 through the pin body 120 One end (i.e., the inner end of the pin body 120) is connected to each other, so the first pin 121 and the second pin 122 are connected to the base island 110 and the first chip 130 in the electrical and thermal conduction paths respectively. The first pin 121 is suspended, and the first pin 121 is equivalent to an independent heat sink fin. The first pin 121 can increase the heat exchange area between the base island 110 and the first chip 130 and the outside world. The second pin 122 is equivalent to an independent terminal, which is soldered to the circuit board. In addition, the second pin 122 is suspended at one end close to the base island 110, which can also increase the heat dissipation performance of the packaging structure.

[0041] In this way, the heat generated by the first chip 130 can be conducted to the first pin 121 through the base island 110, and then further dissipated through convection of the air around the first pin 121 or conducted to the shell of the packaging structure. For high-current, high-power chips, the slot 123 design of the pin body 120 can reduce the use of additional heat sinks, thereby reducing packaging cost and volume. At the same time, since the slot 123 design makes the first pin 121 and the second pin 122 independent of each other, when the first chip 130 is working, the thermal expansion and contraction of the first pin 121 will not be directly transmitted to the solder joint of the second pin 122. Specifically, when the first pin 121 undergoes a slight deformation due to changes in heat dissipation temperature, the presence of the slot 123 forms an elastic buffer between the first pin 121 and the second pin 122, reducing the pulling force on the solder joint of the second pin 122, thereby preventing the solder joint of the second pin 122 from cracking. In addition, under the same package size, the lead frame package structure 100 provided in the present application can increase the number of pins to meet the requirements of high-density integration. The groove 123 of the pin body 120 and the bending of the second pin 122 can be completed at one time through a stamping die without the need for complex secondary processing, and is suitable for large-scale mass production.

[0042] As an implementable method, Figure 1 、 Figure 4 、 Figure 5 、 Figure 7 and Figure 9As shown, in the first, second, third and fourth embodiments, the first chip 130 is mounted on the base island 110 , and the first chip 130 is connected to the lead body 120 via the first bonding wire 131 .

[0043] It should be noted that the first chip 130 is mounted on the base island 110 in an "active surface facing up" manner, with the pads of the first chip 130 facing upward and exposed to the air. The first chip 130 can be mechanically fixed and electrically connected to the top surface of the base island 110 via solder (such as solder paste, silver glue, etc.). In this embodiment, metal wires (such as gold wires, copper wires, etc.) are used to connect the pads of the first chip 130 to the inner ends of the pin bodies 120 to form electrical pathways. The heat generated by the first chip 130 using a positive mounting process can be conducted outward through the base island 110. That is, the base island 110 serves as the primary heat dissipation path. Combined with the slot 123 design of the pin bodies 120, the first pins 121 can be used as an auxiliary heat dissipation path, thereby controlling the temperature of the first chip 130 within a safe range.

[0044] As an implementable method, Figure 1 、 Figure 4 、 Figure 5 、 Figure 7 and Figure 9 As shown, in the first, second, third and fourth embodiments, the lead frame package structure 100 further includes a first plastic package 140 , which covers the base island 110 , the first chip 130 and the first bonding wire 131 .

[0045] It should be noted that the first plastic package 140 can be composed of epoxy resin, curing agent, filler (such as silica), etc., and is coated on the outside of the base island 110, the first chip 130 and the first bonding wire 131 through a molding process to fill the gaps between the components, provide mechanical protection and environmental isolation, and thus form an integrated packaging structure. Specifically, the first plastic package 140 can cover the top surface of the base island 110, the active surface of the first chip 130, the first bonding wire 131 and the inner end of the pin body 120, leaving only the end portion of the pin body 120 (i.e., the first pin 121 and the second pin 122) exposed for heat dissipation and welding. In this way, the first plastic package 140 fills the gaps between the first chip 130 and the base island 110, and the first bonding wire 131 and the pin body 120, thereby reducing the air thermal resistance, so that the heat of the first chip 130 can be more smoothly conducted to the base island 110 and the first pin 121. At the same time, it can also protect the precision components inside the first plastic package 140 from mechanical damage during the assembly process, and can also prevent the intrusion of oil, water vapor, dust, etc.

[0046] As an implementable method, Figure 5 、 Figure 7 and Figure 9 As shown, in the second embodiment, the third embodiment and the fourth embodiment, a second chip 150 is provided on the first pin 121 , and the second chip 150 is covered outside the first plastic package body 140 .

[0047] It should be noted that the second chip 150 can be attached to the first pins 121 via flip-chip or wire bonding, and is located outside the first plastic package 140. The first pins 121 serve as a supporting base and electrical connection for the second chip 150. The surface of the first pins 121 can be specially treated (such as silver or gold plating) to improve soldering reliability between the first pins 121 and the second chip 150. By vertically stacking the second chip 150 on top of the first pins 121, functionality can be expanded without changing the package size. The second chip 150 connects to the circuit board via the first pins 121, eliminating the need for additional pins and reducing the number of package pins. Because the first chip 130 is connected to the lead body 120 via the first bonding wires 131, which are separated from the end of the lead body 120 by the slots 123, the electrical connection between the first chip 130 and the second chip 150 is achieved through the first bonding wires 131, the lead body 120, and the first pins 121. The heat generated by the second chip 150 can also be directly conducted to the external environment through the first pins 121 without passing through the first plastic package 140. The first pins 121 serve as a heat dissipation channel for the first chip 130 and also assume the heat dissipation function of the second chip 150.

[0048] As an implementable method, Figure 5 、 Figure 7 and Figure 9 As shown, in the second embodiment, the third embodiment and the fourth embodiment, the second chip 150 is flip-chip arranged, and the second chip 150 is connected to the first pin 121 through the bump 151; or, in other embodiments, the second chip 150 is upright arranged, and the second chip 150 is connected to the first pin 121 through the second bonding wire.

[0049] It should be noted that the second chip 150 can be electrically connected to the first pin 121 using two optional installation methods: the first method is as follows: Figure 5 、 Figure 7 and Figure 9As shown, the second chip 150 is in a flip-chip arrangement, that is, the active surface of the second chip 150 faces downward. At this time, the second chip 150 is directly connected to the first pin 121 through the bump 151. The material of the bump 151 can be selected from high-lead solder or copper pillars to form a short-path electrical interconnection, which significantly reduces parasitic inductance and capacitance and is suitable for high-frequency and high-speed signal transmission scenarios; the second type is that the second chip 150 is in a positive arrangement, that is, the active surface of the second chip 150 faces upward, and is connected to the first pin 121 through a gold wire or a copper wire. The second wire bonding process can adopt ball bonding or wedge bonding technology to form an arc-shaped connection path, which has the advantages of mature technology and low cost, and is suitable for medium and low frequency, multi-pin signal interconnection requirements. Those skilled in the art should be able to make reasonable choices and designs according to actual conditions, and no specific restrictions are made here.

[0050] Both solutions maintain the spatial layout of the second chip 150 outside the first plastic package 140, maintaining the volume and heat dissipation advantages of vertical stacking (heat is directly dissipated through the first pins 121) while providing flexibility in process selection based on the application scenario. For example, a flip-chip solution can be used for RF chips to reduce signal loss, while a wire bonding solution can be used for memory chips to reduce costs.

[0051] As an implementable method, Figure 5 and Figure 7 As shown, in the second and third embodiments, the bottom surface of the second chip 150 is fixedly connected to the top surface of the first plastic package 140 via a connecting adhesive layer 141. This allows mechanical fixation and stress buffering to be achieved through the connecting adhesive layer 141. Furthermore, heat from the first plastic package 140 can be conducted to the metal packaging layer of the second chip 150 via the connecting adhesive layer 141, forming an auxiliary heat dissipation channel. For example, the connecting adhesive layer 141 can be made of an epoxy resin material with a low elastic modulus and a high glass transition temperature, and a uniform thickness adhesive layer can be formed through a dispensing process.

[0052] As an implementable method, Figure 6 and Figure 7 As shown, in the third embodiment, the lead frame package structure 100 further includes a third pin 161 provided along the circumference of the base island 110. Along the mounting direction, the pin body 120 and the first pin 121 have the same height, and the third pin 161, the first pin 121, and the second pin 122 have different heights. The first chip 130 and the second chip 150 are also connected to the third pin 161, respectively. As an embodiment, as Figure 7 As shown, the first chip 130 is connected to the third pin 161 through the third bonding wire 132; when the second chip 150 is in a flip-chip arrangement, the second chip 150 is connected to the third pin 161 through the bump 151, or, when the second chip 150 is in a face-down arrangement, the second chip 150 is connected to the third pin 161 through the fourth bonding wire.

[0053] It should be noted that the lead frame packaging structure 100 also includes a third pin 161 arranged along the circumferential side of the base island 110. Along the mounting direction, the end of the pin body 120 and the first pin 121 are at the same height, so that the first pin 121 can maintain a planar shape, so that the second chip 150 can be stably and reliably supported by the first pin 121, which is the first wing; the third pin 161, the first pin 121 and the second pin 122 have different heights, forming a stepped layout, which is the second wing; the first chip 130 is located inside the first plastic package body 140, which is the first layer; the second chip 150 is arranged on the first pin 121 and covered on the outside of the first plastic package body 140, which is the second layer, thereby forming a double-layer and double-wing structure.

[0054] In this way, by having the third pin 161, the first pin 121 and the second pin 122 have different heights, the bonding paths of the first chip 130 and the second chip 150 can be avoided from crossing, thereby reducing the risk of short circuit. In addition, the first chip 130 is connected to the pin body 120 through the first bonding wire 131, and the first chip 130 is also connected to the inner end of the third pin 161 (i.e., the end close to the base island 110) through the third bonding wire 132 to form a dual-path electrical connection. The second chip 150 is connected to the first pin 121 through the flip-chip bump 151 or the second bonding wire, and is also connected to the outer end of the third pin 161 (i.e., the end away from the base island 110) through the fourth bonding wire, thereby realizing signal communication with the first chip 130.

[0055] As an implementable method, Figure 7 As shown, in the third embodiment, the heights of the third pin 161 , the first pin 121 , and the second pin 122 decrease in sequence.

[0056] It should be noted that the flip-chip second chip 150 is susceptible to static electricity accumulation during the packaging process due to friction (e.g., plastic compound flow) or external contact. When the static electricity voltage exceeds the breakdown threshold of the ultra-low dielectric constant layer (i.e., ELK layer) of the bump, the second chip 150 may fail. In the single-wing structure provided in the second embodiment, the potential difference between different chips may trigger electrostatic discharge (ESD), causing bond wires to blow or internal chip damage. Therefore, in the third embodiment, the leadframe package structure 100 provided in this application also uses the third pin 161 as a dedicated electrostatic discharge channel. When static electricity accumulates, the charge is preferentially directed to the ground plane through the low-impedance third pin 161. Simultaneously, the third pin 161 is electrically connected to the first pin 121 and the second pin 122 via the first bond wire 131 (i.e., electrostatic bond wire). This maintains the same potential between the two layers of chips and their respective pins, thereby eliminating the potential difference condition (e.g., -5V < potential difference < 5V) that causes electrostatic discharge.

[0057] As an implementable method, Figure 6 As shown, the pin body 120 and the third pin 161 are arranged alternately and at intervals along the circumference of the base island 110 to form a "signal-ground" pair. In this way, static electricity can be discharged simultaneously through multiple third pins 161. In addition, the third pin 161 can also be used to isolate the signal path between two adjacent pin bodies 120 to reduce crosstalk.

[0058] As an implementable method, Figure 8 and Figure 9 As shown, in the fourth embodiment, the lead frame packaging structure 100 also includes a fourth pin 162 arranged along the circumferential side of the base island 110. Along the mounting direction, the pin body 120 and the first pin 121 have the same height, and the fourth pin 162, the first pin 121 and the second pin 122 have different heights. A shielding layer is provided on the fourth pin 162, and the shielding layer is located between the first plastic package body 140 and the second chip 150. The fourth pin 162 is connected to the second pin 122 through a fifth bonding wire 163.

[0059] It should be noted that, similar to the third embodiment, in the fourth embodiment, the leadframe package structure 100 further includes fourth pins 162 disposed along the periphery of the base island 110. Along the mounting direction, the ends of the pin bodies 120 and the first pins 121 are at the same height, allowing the first pins 121 to maintain a planar configuration, thereby stably and reliably supporting the second chip 150 via the first pins 121. This is referred to as the first wing. The fourth pins 162, the first pins 121, and the second pins 122 are at different heights, forming a stepped layout, referred to as the second wing. The first chip 130 is located within the first plastic package 140, referred to as the first layer. The second chip 150 is disposed on the first pins 121 and covered by the first plastic package 140, referred to as the second layer. This creates a double-layer, double-wing structure similar to the third embodiment. For example, the pin bodies 120 and the fourth pins 162 are alternately and spaced apart along the periphery of the base island 110, with the heights of the fourth pins 162, the first pins 121, and the second pins 122 decreasing in sequence.

[0060] Different from the third embodiment described above, a metal shielding layer 170 is provided on the fourth pin 162, and the metal shielding layer 170 is located between the first plastic package 140 and the second chip 150. In this way, the radiation of the first chip 130 can be limited to the inside of the metal shielding layer 170 through the Faraday cage effect, thereby suppressing the electromagnetic coupling between the first chip 130 and the second chip 150 and reducing crosstalk; in addition, the fourth pin 162 and the second pin 122 are connected through the fifth bonding wire 163 to form a low-impedance grounding path of "fourth pin 162-fifth bonding wire 163-second pin 122-ground plane of the circuit board", which can reduce the grounding inductance of the metal shielding layer 170, thereby avoiding shielding failure at high frequencies.

[0061] As an implementable method, Figure 5 、 Figure 7 and Figure 9 As shown, in the second, third, and fourth embodiments, the leadframe package structure 100 further includes a second plastic package 180, which covers the first pin 121 and the second chip 150. Similar to the aforementioned first plastic package 140, the second plastic package 180 can fill the gaps between components, providing mechanical protection and environmental isolation to form an integrated package structure. It is worth emphasizing that in the fourth embodiment, the second plastic package 180 is wrapped around the outside of the fourth pin 162 and the metal shielding layer 170, which can further enhance the electromagnetic shielding effect, reduce the radiation intensity of the first chip 130, and simultaneously reduce the parasitic capacitance between the first chip 130 and the second chip 150, further improving crosstalk.

[0062] like Figures 1 to 4 As shown, a second aspect of the embodiment of the present application provides a packaging method of a lead frame packaging structure 100, which is used to prepare the lead frame packaging structure 100 in the first embodiment. The method includes:

[0063] S1. Provide a base island 110, wherein a plurality of pin bodies 120 are arranged along the circumference of the base island 110, and the base island 110 is connected to a metal frame 193 via connecting ribs 192;

[0064] S2. Mounting a support layer 191 on the bottom surface of the base island 110. For example, the support layer 191 may be an adhesive film or a carrier.

[0065] S3. Mount the first chip 130 on the top surface of the base island 110 and connect the first chip 130 to the lead body 120 via the first bonding wire 131. For example, the first chip 130 and the base island 110 may be bonded and fixed using an adhesive film or adhesive layer, and then the first chip 130 and the base island 110 may be fixedly connected by baking and curing. Finally, the bonding pads of the first chip 130 and the lead body 120 may be electrically connected using metal wires.

[0066] S4. Forming a first plastic packaging body 140 on the support layer 191. For example, the first plastic packaging body 140 may be formed by using a plastic packaging liquid and a pressure molding method.

[0067] S5. Use a stamping process to make a groove 123 on the end of the pin body 120 to separate the end of the pin body 120 into a first pin 121 and a second pin 122. The first pin 121 is kept horizontal and the second pin 122 is bent.

[0068] It should be noted that where the packaging method of the lead frame packaging structure 100 provided in this embodiment is the same as the specific structure of the lead frame packaging structure 100 in the foregoing text, those skilled in the art can infer the packaging method of the lead frame packaging structure 100 based on the description of the specific structure of the lead frame packaging structure 100 in the foregoing text, and this application will not repeat the description. Since the packaging method of the lead frame packaging structure 100 provided in this embodiment is used to prepare the above-mentioned lead frame packaging structure 100, the packaging method of the lead frame packaging structure 100 has the same beneficial effects as the above-mentioned lead frame packaging structure 100, and will not be repeated here. Those skilled in the art should be able to obtain the preparation method of the lead frame packaging structure 100 of the other embodiments mentioned above through reasonable deduction, and the packaging method of the lead frame packaging structure 100 of the other embodiments mentioned above has the same beneficial effects as the lead frame packaging structure 100 of the other embodiments mentioned above, and will not be repeated here.

[0069] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

[0070] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any appropriate manner unless there is any contradiction. In order to avoid unnecessary repetition, this application will not further describe various possible combinations.

Claims

1. A lead frame packaging structure, characterized in that: It includes a base island and a plurality of pin bodies arranged along the circumference of the base island, a first chip is mounted on the top surface of the base island, the first chip is connected to the pin body, and a slot is provided at the end of the pin body to separate the end of the pin body into a first pin and a second pin arranged at intervals along the mounting direction, the first pin is arranged in a suspended manner, and the second pin is bent toward a side away from the first pin, and the second pin is used to connect to the circuit board.

2. The lead frame packaging structure according to claim 1, wherein: The first pin is parallel to the top surface of the base island; and / or the end of the second pin is parallel to the circuit board.

3. The lead frame packaging structure according to claim 2, wherein: The first chip is mounted on the base island, and the first chip is connected to the lead body via a first bonding wire. The lead frame packaging structure further includes a first plastic package, which covers the base island, the first chip and the first bonding wire.

4. The lead frame packaging structure according to claim 3, wherein: A second chip is disposed on the first pin, and the second chip cover is disposed outside the first plastic package.

5. The lead frame packaging structure according to claim 4, wherein: The second chip is flip-chip mounted, and the second chip is connected to the first pin via a bump; or the second chip is face-up mounted, and the second chip is connected to the first pin via a second bonding wire.

6. The lead frame packaging structure according to claim 4, wherein: The bottom surface of the second chip is fixedly connected to the top surface of the first plastic package body through a connecting adhesive layer.

7. The lead frame packaging structure according to claim 4, wherein: It also includes a third pin arranged along the peripheral side of the base island. Along the mounting direction, the pin body and the first pin have the same height, and the third pin, the first pin and the second pin have different heights. The first chip and the second chip are also respectively connected to the third pin.

8. The lead frame packaging structure according to claim 7, wherein: The pin bodies and the third pins are alternately and spaced apart along the circumference of the base island.

9. The lead frame packaging structure according to claim 7, wherein: The heights of the third pin, the first pin, and the second pin decrease in sequence.

10. The lead frame packaging structure according to claim 7, wherein: The first chip is connected to the third pin through a third bonding wire; when the second chip is in a flip-chip arrangement, the second chip is connected to the third pin through a bump, or when the second chip is in a face-up arrangement, the second chip is connected to the third pin through a fourth bonding wire.

11. The lead frame packaging structure according to claim 4, wherein: It also includes a fourth pin arranged along the circumferential side of the base island. Along the mounting direction, the pin body and the first pin have the same height, and the fourth pin, the first pin and the second pin have different heights. A shielding layer is provided on the fourth pin, and the shielding layer is located between the first plastic package body and the second chip. The fourth pin is connected to the second pin through a fifth bonding wire.

12. The lead frame packaging structure according to any one of claims 4 to 11, characterized in that: It also includes a second plastic package, which covers the first pin and the second chip.

13. A packaging method for a lead frame packaging structure, characterized in that: Used to prepare the lead frame packaging structure according to any one of claims 1 to 12.

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