Methods and apparatus for power detection and control of 5G TDD signals

Abstract

This application discloses a method and apparatus for power detection and control of 5G TDD signals, relating to the field of wireless communication technology. The method includes amplifying and controlling a downlink radio frequency signal using a downlink radio frequency link, the downlink radio frequency link including a controllable attenuator; amplifying an uplink radio frequency signal and switching between uplink and downlink using an uplink radio frequency link; detecting and amplifying the input radio frequency signal, and converting a low duty cycle pulse signal into a continuous flat level signal using an input peak sampling and holding circuit; detecting and amplifying the output radio frequency signal to output a continuous level signal after voltage division and isolation; detecting and amplifying the reflected radio frequency signal to obtain a continuous reflected power level signal; and dynamically adjusting the controllable attenuator using a voltage division feedback loop based on the continuous level signal of the output power detection, forming a negative feedback loop for dynamically adjusting the output power of the downlink radio frequency link. This application improves the detection accuracy of low duty cycle modulated signals.

Description

Technical Field

[0001] This application relates to the field of wireless communication technology, and in particular to a method and apparatus for power detection and control of 5G TDD signals. Background Technology

[0002] In wireless communication systems, the function of a power amplifier is to amplify the modulated radio frequency signal before transmitting it. Only with sufficient power can a longer transmission distance be achieved. The radio frequency power detection circuit is responsible for detecting the power of the input, output, and reflection of the radio frequency signal, and is an important foundation for the monitoring, control, and protection of the power amplifier.

[0003] Radio frequency modulated signals can be divided into continuous frequency division (FDD) signals and discontinuous time division (TDD) signals. Discontinuous time division (TDD) signals are more difficult to detect in terms of power. Furthermore, the smaller the duty cycle of the TDD signal, the greater the difficulty. For example, 5G (fifth-generation mobile communication technology) TDD signals have a very small duty cycle, and their measured waveforms are as follows... Figure 1 As shown, the signal pulse width is about 1ms and the period is 20ms, which means the duty cycle is only 5%, a very small value, making power detection extremely difficult.

[0004] Existing power detection solutions are primarily software-based, with hardware as a secondary component. The hardware only performs simple RF detection and does not extract peak values; peak extraction is mainly done in the software. The circuit architecture is shown in the diagram. Figure 2 The requirements for the digital-to-analog converter (ADC) unit are high, and problems such as missed sampling, easy to miss, and large reading fluctuations are prone to occur, resulting in low detection accuracy for low duty cycle modulated signals. Therefore, there is room for improvement. Summary of the Invention

[0005] To improve the detection accuracy of low duty cycle modulated signals, this application provides a method and apparatus for power detection and control of 5G TDD signals.

[0006] Firstly, the objective of this invention is achieved through the following technical solution:

[0007] Methods for power detection and control of 5G TDD signals include:

[0008] A downlink RF link is used to amplify and control the downlink RF signal, and the downlink RF link includes a controllable attenuator;

[0009] An uplink RF link is used to amplify the uplink RF signal and switch between uplink and downlink. The uplink RF link includes an RF switch.

[0010] The input radio frequency signal is detected and amplified. The peak of the detected signal is captured and held by the input peak sampling and holding circuit, and the low duty cycle pulse signal is converted into a continuous flat level signal.

[0011] The output RF signal is detected and amplified. The peak value of the detected signal is captured and held by the output peak sampling and holding circuit, and the output is a continuous level signal after voltage division and isolation.

[0012] The reflected radio frequency signal is extracted from the third port of the circulator included in the downlink radio frequency link. The reflected radio frequency signal is detected and amplified. The peak of the detected signal is captured and held by the reflected peak sampling and holding circuit to obtain a continuous reflected power level signal. The continuous reflected power level signal is compared with a preset level threshold. An alarm signal is triggered when the continuous reflected power level signal exceeds the preset level threshold.

[0013] The continuous level signal for output power detection is obtained based on the continuous level signal after voltage division and isolation. Based on the continuous level signal for output power detection, the controllable attenuator in the downlink RF link is dynamically adjusted using a voltage division feedback loop to form a negative feedback loop for dynamically adjusting the output power of the downlink RF link.

[0014] The output peak sampling and holding circuit is connected to a controllable attenuator to form a negative feedback loop. The voltage divider feedback loop is equipped with a fast adjustment mode and a slow adjustment mode. When the power fluctuation of the continuous level signal detected by the output power exceeds the preset fluctuation threshold, the fast adjustment mode is activated to shorten the RC time constant of the voltage divider feedback loop. Conversely, it switches to the slow adjustment mode to reduce the loop power consumption of the voltage divider feedback loop.

[0015] By adopting the above technical solution, the low duty cycle 5G TDD RF modulation signal is directly converted into a continuous level signal, effectively avoiding the possibility of inaccurate power measurement, easy measurement voids, and large reading fluctuations in the 5G TDD RF modulation signal from the root cause, thereby improving the detection accuracy of low duty cycle modulation signals. This application provides a power detection and control method based on a hardware-based peak hold detection circuit, which can convert a narrow periodic signal with a period of 20ms before peak sampling and hold into a continuous and flat level signal after peak sampling and hold. Specifically, to achieve high-precision detection of 5G TDD low duty cycle signals, this application uses a peak sample hold circuit in both input / output / reflection power detection, converting the 5G... TDD low duty cycle pulse signals (e.g., 1ms pulse width, 20ms period) are converted into continuous flat level signals. Simultaneously, a dynamic power closed-loop control function is provided. This involves using the continuous level signal detected by the output power to adjust the controllable attenuator of the downlink RF link through a voltage divider feedback loop. This achieves automatic negative feedback control, dynamically compensating for power fluctuations (e.g., temperature changes, load mismatch), and stabilizing output power accuracy (e.g., within ±1dB). This helps avoid signal distortion or link damage caused by power surges (e.g., sudden communication) in traditional solutions. Furthermore, hardware-level closed-loop control reduces reliance on the MCU and lowers system latency. The coordinated design of the controllable attenuator and RF switch flexibly addresses peak-to-average power ratio differences in different signal standards (e.g., OFDM / QAM modulation). Real-time monitoring of VSWR by reflected power detection, combined with dynamic adjustment of the controllable attenuator, improves the system's anti-interference capability and reliability.

[0016] In a preferred embodiment of this application, the input peak sample-and-hold circuit, the output peak sample-and-hold circuit, or the reflection peak sample-and-hold circuit are implemented as follows:

[0017] Use a detector to perform envelope detection on radio frequency signals;

[0018] Peak hold function for fast charging and slow discharging is achieved through an RC passive network, which includes a charge / discharge control switch, connected capacitors and resistors;

[0019] The charge / discharge control switch is turned on during charging, and the operational amplifier outputs a large current for rapid charging;

[0020] The charge / discharge control switch is turned off during discharge, allowing the capacitor to discharge slowly through the resistor.

[0021] By adopting the above technical solution, the charge and discharge control switch includes a diode and a MOSFET. During charging, the operational amplifier provides a large current such as 10mA for fast charging. During discharging, the RC time constant is 10kΩ×10pF=0.1ms. The fast charging and slow discharging of this application is beneficial to shorten the charging time for the capacitor to reach the voltage peak during charging, and solves the signal front-end capture distortion problem caused by traditional RC networks (charging time constant>1ms).

[0022] In a preferred embodiment of this application, the voltage divider feedback loop is configured with a fast adjustment mode and a slow adjustment mode, and the method includes:

[0023] When the power fluctuation of the continuous level signal detected by the output power exceeds the preset fluctuation threshold, the fast adjustment mode is activated to shorten the RC time constant of the voltage divider feedback loop; otherwise, the slow adjustment mode is switched to reduce the loop power consumption of the voltage divider feedback loop.

[0024] Based on a preset multi-band calibration strategy, calibration parameters for different frequency bands are pre-set. When powered on, the frequency band of the current circuit is obtained, and the corresponding gain compensation coefficient is automatically loaded based on the frequency band of the current circuit.

[0025] By adopting the above technical solution, the power fluctuation threshold is set according to the actual circuit component parameters. For example, the RC time constant of the fast adjustment mode is 100ns, which is suitable for application scenarios with sudden power increases or decreases, while the RC time constant of the slow adjustment mode is 10ms, which is suitable for normal operation. The dynamic switching mechanism can reduce the overall power consumption and output power stability. Based on the multi-band calibration technology with preset calibration parameters for different frequency bands, for example, the preset multi-band calibration strategy includes 5 frequency band calibration parameters (300MHz-6GHz), with a gain compensation coefficient error of <0.3dB in each frequency band; automatic calibration time is <50ms (completed after power-on); a correction model can be established for 5G TDD characteristics (such as subcarrier spacing of 15 / 30 / 60kHz); and gain drift is corrected in real time based on PT100 sensor data, which helps to improve the consistency of calibration frequency response and reduce calibration operation time.

[0026] Secondly, the objective of this invention is achieved through the following technical solution:

[0027] A device for power detection and control of 5G TDD signals, the device comprising:

[0028] The downlink RF link is used to amplify and control the downlink RF signal. The downlink RF link includes a controllable attenuator.

[0029] The uplink RF link is used to amplify the uplink RF signal and switch between uplink and downlink. The uplink RF link includes an RF switch.

[0030] The input power detection module, connected to the downlink RF link, is used to detect and amplify the input RF signal, and to capture and hold the peak of the detected signal through the input peak sampling and holding circuit, converting the low duty cycle pulse signal into a continuous and flat level signal.

[0031] The output power detection module is connected to the downlink RF link and is used to detect and amplify the output RF signal. The output peak sampling and holding circuit captures and holds the peak of the detected signal and outputs a continuous level signal after voltage division and isolation. The output peak sampling and holding circuit is connected to a controllable attenuator to form a negative feedback loop, so as to dynamically adjust the output power of the downlink RF link.

[0032] The reflected power detection module is used to detect and amplify the reflected RF signal, and capture and hold the peak of the detected signal through a reflected peak sampling and holding circuit to obtain a continuous reflected power level signal. A voltage divider feedback loop is used to dynamically adjust the controllable attenuator in the downlink RF link. The voltage divider feedback loop is equipped with a fast adjustment mode and a slow adjustment mode. When the power fluctuation of the continuous level signal detected by the output power exceeds the preset fluctuation threshold, the fast adjustment mode is activated to shorten the RC time constant of the voltage divider feedback loop; otherwise, it switches to the slow adjustment mode to reduce the loop power consumption of the voltage divider feedback loop.

[0033] The third port of the circulator included in the downlink RF link is connected to the reflection power detection module. The detection unit in the reflection power detection module receives the reflected RF signal from the downlink RF link. The comparator of the reflection power detection module compares the continuous reflection power level signal obtained by the reflection power module with a preset level threshold. When the continuous reflection power level signal exceeds the preset level threshold, an alarm signal is triggered.

[0034] By adopting the above technical solution, a closed-loop system is formed by combining the input power detection module (forward signal), the output power detection module (downlink), and the reflected power detection module (VSWR detection). At the same time, the output power detection module also realizes dynamic negative feedback of PID closed-loop control through a controllable attenuator. After the forward-reflection dual-path detection and the analog-to-digital converter output digital signal are processed by the FPGA to generate a PWM control signal, the step size of the stepper motor of the controllable attenuator is controlled, which helps to improve the power control accuracy of the overall circuit. The uplink and downlink RF links of this application are physically isolated by RF switches, which effectively avoids crosstalk between uplink and downlink RF signals.

[0035] In a preferred embodiment of this application, the input power detection module includes:

[0036] The detection unit is used to perform envelope detection on the input radio frequency signal and output the radio frequency envelope voltage signal.

[0037] The amplification unit, connected to the detection unit, performs impedance matching and current amplification on the detected voltage signal;

[0038] The input peak sampling and holding circuit, connected to the output of the amplification unit, includes:

[0039] The fast charging branch includes a diode and a first capacitor connected in series for storing the peak voltage on the rising edge of the signal;

[0040] The slow discharge branch includes a second capacitor connected in parallel and an adjustable resistor, and the discharge rate is controlled by an RC time constant.

[0041] The voltage divider isolation unit is connected to the output of the input peak sample-and-hold circuit and the analog-to-digital converter (ADC) unit, respectively, to divide the peak voltage to the input range of the ADC unit; the ADC unit then converts the divided analog signal into a digital signal for output.

[0042] By adopting the above technical solution, the input RF signal is envelope-detected by the detection unit, and the accuracy and stability of the voltage signal are ensured by the amplification unit and the input peak sampling and holding circuit, thereby achieving accurate measurement of the input RF signal power. The design of the fast charging branch and the slow discharging branch enables the system to quickly capture the signal peak and maintain a stable output, which helps to improve the dynamic range and response speed of power detection.

[0043] In a preferred embodiment of this application, the output power detection module includes:

[0044] The detection unit performs envelope detection on the output radio frequency signal;

[0045] The amplification unit linearly amplifies the output radio frequency signal after envelope detection;

[0046] Output peak sampling and holding circuit, outputs a continuous level signal that is isolated by voltage divider;

[0047] The feedback control unit is connected to the control terminal of the controllable attenuator to form a closed loop. It converts the continuous level signal after voltage division into a control voltage and dynamically adjusts the attenuation of the controllable attenuator in combination with the PID algorithm, so that the output power of the controllable attenuator is stabilized within the preset fluctuation threshold.

[0048] By adopting the above technical solution, the amplification unit linearly amplifies the output RF signal after envelope detection, ensuring linearity in the signal processing process and reducing distortion. The feedback control unit, combined with the PID algorithm, dynamically adjusts the attenuation of the controllable attenuator to ensure the stability of the output power. The closed-loop control system can monitor and adjust the output power in real time to keep it within the preset fluctuation threshold, thereby enhancing the stability and reliability of the power detection and control system.

[0049] In a preferred embodiment of this application: the downlink radio frequency link includes a circulator; a reflection power detection module is connected to the circulator, and the reflection power detection module includes:

[0050] The detection unit receives the reflected radio frequency signal from the downlink radio frequency link, performs logarithmic detection on the reflected radio frequency signal, and outputs a voltage signal that reflects the magnitude of the reflected power.

[0051] The reflection peak sampling and holding circuit captures and holds the peak of the detected signal, and then electrically isolates and proportionally amplifies the held voltage signal through an isolation amplifier unit to obtain a continuous reflection power level signal.

[0052] The comparator compares the continuous reflected power level signal with a preset level threshold, and triggers an alarm signal when the continuous reflected power level signal exceeds the preset level threshold.

[0053] By adopting the above technical solution, the reflection power detection module monitors the reflected radio frequency signals that may occur in the downlink radio frequency link, and promptly detects and handles reflection problems; the comparator compares the continuous reflection power level signal with the preset level threshold, and triggers an alarm signal when the threshold is exceeded, which helps to provide early warning of potential problems.

[0054] In a preferred embodiment of this application, the downlink RF link further includes an input coupler, an output coupler, and a multi-stage power amplifier unit disposed between the input coupler and the output coupler. The multi-stage power amplifier unit includes a driver stage amplifier, an intermediate stage amplifier, and a final stage power amplifier connected in sequence.

[0055] The controllable attenuator is located between the driver stage amplifier and the intermediate stage amplifier; the circulator achieves physical isolation between the downlink RF signal and the uplink RF signal, and the third port of the circulator is connected to the reflection power detection module.

[0056] By adopting the above technical solutions, the circulator achieves physical isolation between the downlink and uplink RF signals, effectively preventing mutual interference between the two and improving communication quality; the multi-stage power amplifier unit (including the driver stage amplifier, intermediate stage amplifier, and final stage power amplifier) ​​provides progressively enhanced signal gain, ensuring that the final output signal has sufficient strength and clarity; the controllable attenuator set between the driver stage amplifier and the intermediate stage amplifier allows for precise fine-tuning of the signal strength.

[0057] In a preferred embodiment of this application, the uplink RF link further includes a low-noise amplifier and an RF amplifier for high-gain, low-noise amplification of the uplink RF signal.

[0058] By adopting the above technical solution, the low-noise amplifier (LNA) included in the uplink RF link can amplify the uplink RF signal with high gain without significantly increasing noise. Using an RF amplifier in the uplink can further enhance the signal strength and stability.

[0059] In a preferred embodiment of this application, the frequency range applicable to the downlink and uplink radio frequency links is the radio frequency band from 30MHz to 300GHz;

[0060] And / or,

[0061] The detection unit includes a diode detector, a logarithmic detector, or a mean square error detector.

[0062] By adopting the above technical solutions, the downlink and uplink RF links are applicable to a frequency range of 30MHz to 300GHz, covering a wide range from traditional microwave bands to millimeter wave bands. The wideband design enables the device to adapt to a variety of different application scenarios and technical requirements.

[0063] In summary, this application includes at least one of the following beneficial technical effects:

[0064] 1. This invention directly converts low-duty-cycle 5G TDD RF modulation signals into continuous level signals, effectively avoiding the potential for inaccurate power measurement, easy measurement of empty signals, and large reading fluctuations in 5G TDD RF modulation signals from the root cause, thereby improving the detection accuracy of low-duty-cycle modulation signals. This application also provides a hardware-based peak hold detection circuit for power detection and control, which can convert a narrow periodic signal (20ms) before peak sampling and hold into a continuous, flat level signal after peak sampling and hold.

[0065] 2. The input RF signal is envelope-detected by the detection unit, and the accuracy and stability of the voltage signal are ensured by the amplification unit and the input peak sampling and holding circuit, thereby achieving accurate measurement of the input RF signal power; the design of the fast charging branch and the slow discharging branch enables the system to quickly capture the signal peak and maintain a stable output. Attached Figure Description

[0066] Figure 1 This is a time-domain plot of 5G TDD debugging RF signals measured using a high-speed oscilloscope in existing technologies;

[0067] Figure 2 This is a circuit diagram of the radio frequency detection section in the existing technical solution;

[0068] Figure 3 This is a flowchart of a power detection and control method for 5G TDD signals according to an embodiment of this application;

[0069] Figure 4 This is an example diagram of a first specific implementation of a power detection and control device for 5G TDD signals in one embodiment of this application;

[0070] Figure 5 This is a schematic diagram of the input power detection signal transformation timing in a first specific embodiment of the power detection and control device for 5G TDD signals in one embodiment of this application;

[0071] Figure 6 This is a schematic diagram of the input, output, and reflected power readings of a first specific embodiment of a power detection and control device for 5G TDD signals in one embodiment of this application.

[0072] Figure 7 This is an example diagram of a second specific implementation of a power detection and control device for 5G TDD signals in one embodiment of this application;

[0073] Figure 8 This is an example diagram of another embodiment of the device for power detection and control of 5G TDD signals in one embodiment of this application.

[0074] Explanation of reference numerals in the attached figures:

[0075] 1. Downlink RF link; 11. Input coupler; 12. Output coupler; 13. Gain amplifier tube; 14. Driver amplifier tube; 15. Final stage power amplifier tube; 16. Controllable attenuator; 17. Circulator; 2. Uplink RF link; 21. RF switch; 22. Low noise amplifier; 23. RF amplifier; 3. Input power detection module; 4. Output power detection module; 5. Reflected power detection module; 6. Microprocessor; 7. Inductor. Detailed Implementation

[0076] The present application will be further described in detail below with reference to the accompanying drawings.

[0077] In one embodiment, such as Figure 1 As shown, this application discloses a method for power detection and control of 5G TDD signals, which specifically includes the following steps:

[0078] S1: The downlink RF link is used to amplify and control the downlink RF signal. The downlink RF link includes a controllable attenuator.

[0079] In this embodiment, the downlink RF link also includes a circulator; the downlink RF signal is amplified step by step through a multi-stage power amplification architecture (such as a gain amplifier, a driver amplifier, and / or a final stage power amplifier), and the output power is dynamically adjusted using a controllable attenuator to ensure that the signal strength is adapted to the antenna transmission requirements.

[0080] Specifically, the system first receives the baseband-processed IQ modulated signal, with a frequency range of 30MHz to 300GHz; then drives the final stage power amplifier tube through an input matching network (impedance matching degree >95%); during power processing, the Doherty architecture is used to optimize efficiency, achieving a peak power of 45dBm, and a 0-30dB dynamic adjustment is achieved through a step-type PIN diode attenuator with a step accuracy of 0.5dB. Finally, a circulator is used to achieve transmit and receive signal isolation (isolation degree >25dB) to prevent uplink RF signal interference.

[0081] S2: The uplink RF link is used to amplify the uplink RF signal and switch between uplink and downlink. The uplink RF link includes an RF switch.

[0082] In this embodiment, the uplink RF link also includes a low-noise amplifier and a variable gain amplifier (adjustable range 30dB). The transmit and receive channels are switched via an RF switch. The low-noise amplifier improves the sensitivity to weak uplink RF signals. The RF switch is a high-power RF switch (noise figure <2dB).

[0083] Specifically, the low-noise amplifier preamplifies the uplink RF signal, the variable gain amplifier works with the AGC circuit to maintain a constant output level, and a distributed impedance matching network (bandwidth > 100MHz) is used to optimize signal transmission efficiency.

[0084] S3: Detects and amplifies the input RF signal, and captures and holds the peak of the detected signal through the input peak sampling and holding circuit, converting the low duty cycle pulse signal into a continuous and flat level signal.

[0085] In this embodiment, the input peak sample-and-hold circuit is implemented as follows:

[0086] Use a detector to perform envelope detection on radio frequency signals;

[0087] Peak hold functionality for fast charging and slow discharging is achieved through an RC passive network. The RC passive network includes a charge / discharge control switch, a connected capacitor, and a resistor. The charge / discharge control switch is turned on during charging, allowing the operational amplifier to output a large current for rapid charging. During discharging, the charge / discharge control switch is turned off, allowing the capacitor to discharge slowly through the resistor. Similarly, the implementation methods for the output peak sample-and-hold circuit and the reflected peak sample-and-hold circuit are the same as those for the input peak sample-and-hold circuit. The RC time constant of the peak sample-and-hold circuit is calculated as τ = RC = 10MΩ × 1μF = 10s. The insertion loss formula for the circulator is IL = 10lg(Pin / Pout) (dB).

[0088] Specifically, the peak sample-and-hold circuit converts the low duty cycle pulse signal into a stable DC level: a Schottky diode (response time <1ns) is used to extract the RF signal envelope, and a transimpedance amplifier (bandwidth >2GHz) is used to convert the current signal into a voltage signal; furthermore, when latching the peak signal, for example, in the fast charging branch, a 1N5711 diode (on-state voltage drop <0.4V) + 1μF tantalum capacitor can be used, and in the slow discharge branch, a 10MΩ resistor + 100pF adjustable capacitor can be used. When performing voltage division isolation, a resistor voltage divider can be used to match the ADC input range (0-2V) with an attenuation ratio of 1:1000; based on the above components, the peak sample-and-hold circuit can achieve a signal fidelity of peak-to-average power ratio distortion <1dB (duty cycle 5% to 95%), a response speed of rise time <50ns, and anti-aliasing capability of Nyquist frequency >2 times the signal bandwidth.

[0089] S4: Detects and amplifies the output RF signal, captures and holds the peak of the detected signal through the output peak sampling and holding circuit, and outputs a continuous level signal after voltage division and isolation.

[0090] S5: Extract the reflected radio frequency signal from the third port of the circulator included in the downlink radio frequency link, detect and amplify the reflected radio frequency signal, and capture and hold the peak of the detected signal through the reflection peak sampling and holding circuit to obtain a continuous reflected power level signal; compare the continuous reflected power level signal with a preset level threshold, and trigger an alarm signal when the continuous reflected power level signal exceeds the preset level threshold.

[0091] In this embodiment, the reflected signal is separated by a circulator, and a protection alarm signal is generated after detection. For example, the reflected signal is extracted by the third port of the circulator, and the AD8318 chip is used to achieve dynamic range detection from -30 to +5dBm. The reflected signal is compared with a preset hysteresis voltage threshold by a comparator. An alarm signal is generated when the hysteresis voltage is 200mV, or an alarm is triggered when the reflection coefficient is >15dB.

[0092] S6: Based on the continuous level signal after voltage division and isolation, a continuous level signal for output power detection is obtained. Based on the continuous level signal for output power detection, a voltage divider feedback loop is used to dynamically adjust the controllable attenuator in the downlink RF link, forming a negative feedback loop for dynamically adjusting the output power of the downlink RF link. The output peak sampling and holding circuit is connected to the controllable attenuator to form a negative feedback loop. The voltage divider feedback loop is equipped with a fast adjustment mode and a slow adjustment mode. When the power fluctuation of the continuous level signal for output power detection exceeds a preset fluctuation threshold, the fast adjustment mode is activated to shorten the RC time constant of the voltage divider feedback loop. Conversely, the slow adjustment mode is switched to reduce the loop power consumption of the voltage divider feedback loop.

[0093] In this embodiment, the controllable attenuator includes a digitally controlled attenuator based on PIN diodes; the technical parameters of the low duty cycle pulse signal are a pulse width of 1ms and a period of 20ms; a voltage divider feedback loop is connected to an output power detection module for detecting the output power of the output RF signal; firstly, the continuous level signal of the output power detection module is extracted, and the difference between the set value and the feedback continuous level signal is calculated using a cloud amplifier. Then, the pulse width modulation signal is output through the DAC module to control the attenuator stepper motor, and dynamic power compensation and temperature compensation coefficient calibration are achieved through PWM signal modulation.

[0094] Specifically, the voltage divider feedback loop is equipped with a fast adjustment mode and a slow adjustment mode. When the power fluctuation of the continuous level signal detected by the output power exceeds a preset fluctuation threshold (e.g., ΔP=3dB), the fast adjustment mode is activated to shorten the RC time constant of the voltage divider feedback loop; conversely, it switches to the slow adjustment mode to reduce the loop power consumption of the voltage divider feedback loop. Based on a preset multi-band calibration strategy, calibration parameters for different frequency bands are preset. In this embodiment, the applicable frequency range for the downlink RF link and the uplink RF link is the RF band from 30MHz to 300GHz. The frequency band of the current circuit is obtained upon power-up, and the corresponding gain compensation coefficient is automatically loaded based on the frequency band of the current circuit. This application adopts a hybrid architecture of "hardware peak hold + software closed-loop control".

[0095] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0096] In one embodiment, an apparatus for power detection and control of 5G TDD signals is provided, which corresponds to the method for power detection and control of 5G TDD signals described in the above embodiments.

[0097] The device for power detection and control of 5G TDD signals includes a downlink radio frequency link, an uplink radio frequency link, an input power detection module, an output power detection module, a reflection power detection module, and a microprocessor. To facilitate the description of a specific application of the device for power detection and control of 5G TDD signals, this application provides an example of a specific implementation, such as... Figures 3 to 6 As shown, Figure 3 In this diagram, P1 is the downlink input port, P2 is the port shared by the downlink output and uplink input, and P3 is the uplink output port. Figure 3 This is the first embodiment of a power detection and control device for 5G TDD signals. Figure 4 for Figure 3 A schematic diagram of the input power detection signal transformation timing in the first embodiment; Figure 5 for Figure 3 The first embodiment shows a timing diagram of the input, output, and reflected power readings; detailed descriptions of each functional module are as follows:

[0098] like Figure 3 As shown, the downlink RF link 1 is used to amplify and control the downlink RF signal. The downlink RF link 1 includes an input coupler 11, an output coupler 12, a controllable attenuator 16, a circulator 17, and a multi-stage power amplifier unit located between the input coupler 11 and the output coupler 12. The multi-stage power amplifier unit includes a driver stage amplifier, an intermediate stage amplifier, and a final stage power amplifier connected in sequence. The controllable attenuator 16 is located between the driver stage amplifier and the intermediate stage amplifier. The circulator 17 realizes physical isolation between the downlink RF signal and the uplink RF signal. The third port of the circulator 17 is connected to the reflection power detection module 5. The driver stage amplifier is a gain amplifier tube 13, and the intermediate stage amplifier is a driver amplifier tube 14.

[0099] Uplink RF link 2 is used to amplify the uplink RF signal and switch between uplink and downlink. Uplink RF link 2 includes an RF switch 21, a low-noise amplifier 22, and an RF amplifier 23. The RF switch 21 is a high-power RF switch connected to an inductor 7. When downlink RF link 1 is on, RF switch 21 is directed to circulator 17, so that the downlink reflected power passes through circulator 17, RF switch 21, inductor 7, and then to the reflected power detection module 5 for reflected power detection. When uplink RF link 2 is on, RF switch 21 is directed to low-noise amplifier 22. The uplink input signal passes through the shared port P2 (downlink and uplink input), circulator 17, RF switch 21, low-noise amplifier 22, RF amplifier 23, and uplink output port P3 for uplink RF signal amplification and reception. Downlink RF link 1 and uplink RF link 2 are applicable to the RF band from 30MHz to 300GHz.

[0100] Input power detection module 3, connected to downlink RF link 1, is used to detect and amplify the input RF signal, and, in conjunction with the input peak sample-and-hold circuit, convert the low duty cycle pulse signal into a continuous and flat level signal. Input power detection module 3 includes a detection unit 31, amplification units 32 and 37, an input peak sample-and-hold circuit, and a voltage divider isolation unit. Specifically, detection unit 31 performs envelope detection on the input RF signal and outputs an RF envelope voltage signal. The amplification unit is connected to detection unit 31 and performs impedance matching and current amplification on the detected voltage signal. The input peak sample-and-hold circuit is connected to the output of the amplification unit and includes a fast charging branch and a fast charging line. The fast charging branch includes a diode and a first capacitor connected in series (in...). Figure 3 The diode in the signal is diode 33 and the first capacitor is capacitor 34, which are used to store the peak voltage at the rising edge of the signal.

[0101] like Figure 6 and Figure 7 As shown, Figure 6 This is a second embodiment of a power detection and control device for 5G TDD signals. Figure 7 To distinguish from Figure 3 and Figure 6 Other specific implementations; the slow discharge branch includes a second capacitor and an adjustable resistor 36 connected in parallel, and the discharge rate is controlled by an RC time constant. Figure 3 Only the adjustable resistor 36 is shown; the voltage divider isolation unit is connected to the output of the input peak sample-and-hold circuit and the analog-to-digital converter unit respectively, dividing the peak voltage to the input range of the analog-to-digital converter unit; the analog-to-digital converter unit converts the divided analog signal into a digital signal output; the analog-to-digital converter unit is analog-to-digital converter 38; diode 33 can also be replaced by the emitter junction or collector junction of a transistor; such as Figure 7As shown, capacitor 34 can also be composed of two or more capacitors connected in parallel to obtain a larger capacitance value; the voltage divider isolation unit is composed of resistors 35 and 36, but can also be composed of three or more resistors to obtain a more flexible voltage division ratio and a larger total resistance.

[0102] The output power detection module 4, connected to the downlink RF link 1, is used to detect and amplify the output RF signal, and, in conjunction with the output peak sample-and-hold circuit, output a continuous-level signal after voltage division and isolation. The output peak sample-and-hold circuit is connected to the controllable attenuator 16 to form a negative feedback loop, thereby dynamically adjusting the output power of the downlink RF link 1. Specifically, the output power detection module 4 includes a detection unit, an amplification unit, an output peak sample-and-hold circuit, and a feedback control unit. (The structure of the output power detection module 4 in the figure is shown as a detection unit 41, an amplification unit 42, and an output peak sample-and-hold circuit.) The circuit includes diode 43, capacitor 44, and resistor 46. The detection unit performs envelope detection on the output RF signal; the amplification unit linearly amplifies the output RF signal after envelope detection; the output peak sampling and holding circuit outputs a continuous level signal isolated by voltage divider; and the feedback control unit (detector unit 47 and analog-to-digital converter 48 in the figure) is connected to the control terminal of the controllable attenuator 16 to form a closed loop, converting the voltage-divided continuous level signal into a control voltage, and dynamically adjusting the attenuation of the controllable attenuator 16 in combination with the PID algorithm, so that the output power of the controllable attenuator 16 is stabilized within the preset fluctuation threshold.

[0103] The reflected power detection module 5 is used to detect and amplify the reflected radio frequency signal, and obtain a continuous reflected power level signal in conjunction with the reflected peak sample-and-hold circuit. The reflected power detection module 5 includes a detection unit, a reflected peak sample-and-hold circuit, and a comparator (not shown in the figure). (The structure of the reflected power detection module 5 in the figure is a detection unit 51, an amplification unit 52, and the output peak sample-and-hold circuit includes a diode 53, a capacitor 54, and a resistor 56; it also includes an amplification unit 57 and an analog-to-digital converter 58). The detection unit receives the reflected radio frequency signal from the downlink radio frequency link 1, performs logarithmic detection on the reflected radio frequency signal, and outputs a voltage signal reflecting the magnitude of the reflected power. The reflected peak sample-and-hold circuit is used to capture and hold the peak of the detected signal, and electrically isolates and proportionally amplifies the held voltage signal through an isolation amplification unit to obtain a continuous reflected power level signal. The comparator compares the continuous reflected power level signal with a preset level threshold, and triggers an alarm signal when the continuous reflected power level signal exceeds the preset level threshold.

[0104] Specifically, the detection unit 31 in the input power detection module 3 includes, but is not limited to, a diode detector, a logarithmic (log) detector, or a mean square error (RMS) detector; the input peak sampling and holding circuit includes a diode 33, a capacitor 34, and a resistor 36. The amplification unit, also known as the operational amplifier unit, mainly serves as impedance isolation and has a large output current capability. It can quickly charge the capacitor 34 when the voltage is positive. If the detection voltage is too low, the amplification unit can be changed to amplify the voltage, usually by 1.5 to 3 times, to ensure that the minimum voltage is greater than the threshold voltage of the diode 33 (usually 0.2 volts to 0.7 volts).

[0105] The implementation principle of the power detection and control device for 5G TDD signals in this application embodiment is as follows: When the device is charging, the diode 33 of the input peak sampling and holding circuit is turned on, and the amplification unit outputs a large current to quickly charge the capacitor C34; when discharging, the diode 33 is turned off, preventing the capacitor 34 from discharging towards the amplification unit 32, and it can only discharge through the resistor 36. Moreover, the capacitance of the capacitor 34 is relatively large (usually in the uF level) and the resistance of the resistor 36 is large (usually in the MΩ level), the discharge current is extremely small, and the discharge is extremely slow, so it is fast charging and slow discharging, and has the ability to hold peak values; the amplification unit 37 of the input peak sampling and holding circuit mainly plays the role of isolation and does not amplify; the analog-to-digital converter 38 converts the analog signal into a digital signal, which is then processed by the microprocessor 6.

[0106] The composition and principle of the output power detection module 4 and the reflection power detection module 5 are the same as those of the input power detection module 3. The difference is that the output power detection module 4 also outputs a peak value holding level signal to control the controllable attenuator 16, forming a negative feedback loop that can dynamically adjust and stabilize the output power of the downlink RF link 1.

[0107] For specific limitations on the device for power detection and control of 5G TDD signals, please refer to the limitations on the method for power detection and control of 5G TDD signals mentioned above, which will not be repeated here. Each module in the device for power detection and control of 5G TDD signals can be implemented in whole or in part by software, hardware, or a combination thereof. Each module can be embedded in the processor of the computer device in hardware form or independent of the processor, or it can be stored in the memory of the computer device in software form so that the processor can call and execute the corresponding operations of each module.

[0108] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0109] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for power detection and control of 5G TDD signals, characterized in that, include: A downlink RF link is used to amplify and control the downlink RF signal, and the downlink RF link includes a controllable attenuator; An uplink RF link is used to amplify the uplink RF signal and switch between uplink and downlink. The uplink RF link includes an RF switch. The input radio frequency signal is detected and amplified. The peak of the detected signal is captured and held by the input peak sampling and holding circuit, and the low duty cycle pulse signal is converted into a continuous flat level signal. The output RF signal is detected and amplified. The peak value of the detected signal is captured and held by the output peak sampling and holding circuit, and the output is a continuous level signal after voltage division and isolation. The reflected radio frequency signal is extracted from the third port of the circulator included in the downlink radio frequency link. The reflected radio frequency signal is detected and amplified. The peak of the detected signal is captured and held by the reflected peak sampling and holding circuit to obtain a continuous reflected power level signal. The continuous reflected power level signal is compared with a preset level threshold. An alarm signal is triggered when the continuous reflected power level signal exceeds the preset level threshold. The continuous level signal for output power detection is obtained based on the continuous level signal after voltage division and isolation. Based on the continuous level signal for output power detection, the controllable attenuator in the downlink RF link is dynamically adjusted using a voltage division feedback loop to form a negative feedback loop for dynamically adjusting the output power of the downlink RF link. The output peak sampling and holding circuit is connected to a controllable attenuator to form a negative feedback loop. The voltage divider feedback loop is equipped with a fast adjustment mode and a slow adjustment mode. When the power fluctuation of the continuous level signal detected by the output power exceeds the preset fluctuation threshold, the fast adjustment mode is activated to shorten the RC time constant of the voltage divider feedback loop. Conversely, it switches to the slow adjustment mode to reduce the loop power consumption of the voltage divider feedback loop.

2. The method for power detection and control of 5G TDD signals according to claim 1, characterized in that, The input peak sample-and-hold circuit, the output peak sample-and-hold circuit, or the reflection peak sample-and-hold circuit are implemented as follows: Use a detector to perform envelope detection on radio frequency signals; Peak hold function for fast charging and slow discharging is achieved through an RC passive network, which includes a charge / discharge control switch, a connected capacitor, and a resistor. The charge / discharge control switch is turned on during charging, and the operational amplifier outputs a large current for rapid charging. The charge / discharge control switch is turned off during discharge, and the capacitor discharges slowly through the resistor.

3. The method for power detection and control of 5G TDD signals according to claim 1, characterized in that, The voltage divider feedback loop is equipped with a fast adjustment mode and a slow adjustment mode, and the method includes: When the power fluctuation of the continuous level signal detected by the output power exceeds the preset fluctuation threshold, the fast adjustment mode is activated to shorten the RC time constant of the voltage divider feedback loop; otherwise, the slow adjustment mode is switched to reduce the loop power consumption of the voltage divider feedback loop. Based on a preset multi-band calibration strategy, calibration parameters for different frequency bands are pre-set. When powered on, the frequency band of the current circuit is obtained, and the corresponding gain compensation coefficient is automatically loaded based on the frequency band of the current circuit.

4. A device for power detection and control of 5G TDD signals, characterized in that, The device includes: Downlink RF link (1) is used to amplify and control downlink RF signals, and the downlink RF link (1) includes a controllable attenuator (16); The uplink radio frequency link (2) is used to amplify the uplink radio frequency signal and switch between the uplink and downlink. The uplink radio frequency link (2) includes a radio frequency switch (21). The input power detection module (3) is connected to the downlink RF link (1) and is used to detect and amplify the input RF signal. The input peak sampling and holding circuit captures and holds the peak of the detected signal and converts the low duty cycle pulse signal into a continuous flat level signal. The output power detection module (4) is connected to the downlink RF link (1) for detecting and amplifying the output RF signal, and capturing and holding the peak of the detected signal through the output peak sampling and holding circuit, and outputting a continuous level signal after voltage division and isolation. The output peak sampling and holding circuit is connected to the controllable attenuator (16) to form a negative feedback loop, thereby dynamically adjusting the output power of the downlink RF link (1). The reflected power detection module (5) is used to detect and amplify the reflected radio frequency signal, and capture and hold the peak of the detected signal through the reflected peak sampling and holding circuit to obtain a continuous reflected power level signal; the voltage divider feedback loop is used to dynamically adjust the controllable attenuator in the downlink radio frequency; the voltage divider feedback loop is set with fast adjustment mode and slow adjustment mode. When the power fluctuation of the continuous level signal of the output power detection exceeds the preset fluctuation threshold, the fast adjustment mode is activated to shorten the RC time constant of the voltage divider feedback loop; otherwise, it switches to the slow adjustment mode to reduce the loop power consumption of the voltage divider feedback loop. The third port of the circulator included in the downlink RF link is connected to the reflection power detection module. The detection unit in the reflection power detection module receives the reflected RF signal from the downlink RF link. The comparator of the reflection power detection module compares the continuous reflection power level signal obtained by the reflection power module with a preset level threshold. When the continuous reflection power level signal exceeds the preset level threshold, an alarm signal is triggered.

5. The device for power detection and control of 5G TDD signals according to claim 4, characterized in that, The input power detection module (3) includes: The detection unit is used to perform envelope detection on the input radio frequency signal and output the radio frequency envelope voltage signal. An amplification unit, connected to the detection unit, performs impedance matching and current amplification on the detected voltage signal; An input peak sampling and holding circuit, connected to the output of the amplification unit, includes: The fast charging branch includes a diode and a first capacitor connected in series for storing the peak voltage on the rising edge of the signal; The slow discharge branch includes a second capacitor connected in parallel and an adjustable resistor, and the discharge rate is controlled by an RC time constant. The voltage divider isolation unit is connected to the output terminal of the input peak sample-and-hold circuit and the analog-to-digital converter unit respectively, and divides the peak voltage to the input range of the analog-to-digital converter unit; the analog-to-digital converter unit converts the divided analog signal into a digital signal for output.

6. The device for power detection and control of 5G TDD signals according to claim 4, characterized in that, The output power detection module (4) includes: The detection unit performs envelope detection on the output radio frequency signal; The amplification unit linearly amplifies the output radio frequency signal after envelope detection; Output peak sampling and holding circuit, outputs a continuous level signal that is isolated by voltage divider; The feedback control unit is connected to the control terminal of the controllable attenuator (16) to form a closed loop. It converts the continuous level signal after voltage division into a control voltage and dynamically adjusts the attenuation of the controllable attenuator (16) in combination with the PID algorithm, so that the output power of the controllable attenuator (16) is stabilized within the preset fluctuation threshold.

7. The device for power detection and control of 5G TDD signals according to claim 4, characterized in that, The downlink radio frequency link (1) includes a circulator (17); the reflection power detection module (5) is connected to the circulator (17), and the reflection power detection module (5) includes: The detection unit receives the reflected radio frequency signal from the downlink radio frequency link (1), performs logarithmic detection on the reflected radio frequency signal, and outputs a voltage signal reflecting the magnitude of the reflected power. The reflection peak sampling and holding circuit captures and holds the peak of the detected signal, and then electrically isolates and proportionally amplifies the held voltage signal through an isolation amplifier unit to obtain a continuous reflection power level signal. The comparator compares the continuous reflected power level signal with a preset level threshold, and triggers an alarm signal when the continuous reflected power level signal exceeds the preset level threshold.

8. The device for power detection and control of 5G TDD signals according to claim 7, characterized in that, The downlink RF link (1) further includes an input coupler (11), an output coupler (12), and a multi-stage power amplifier unit located between the input coupler (11) and the output coupler (12). The multi-stage power amplifier unit includes a driver stage amplifier, an intermediate stage amplifier, and a final stage power amplifier connected in sequence. The controllable attenuator (16) is located between the driver stage amplifier and the intermediate stage amplifier; the circulator (17) realizes physical isolation between the downlink RF signal and the uplink RF signal, and the third port of the circulator (17) is connected to the reflection power detection module (5).

9. The device for power detection and control of 5G TDD signals according to claim 4, characterized in that, The uplink RF link (2) also includes a low-noise amplifier (22) and an RF amplifier (23) for high-gain, low-noise amplification of the uplink RF signal.

10. The apparatus for power detection and control of 5G TDD signals according to any one of claims 5 to 7, characterized in that, The downlink radio frequency link (1) and uplink radio frequency link (2) are applicable to radio frequency bands ranging from 30MHz to 300GHz; And / or, The detection unit includes a diode detector, a logarithmic detector, or a mean square error detector.

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