Semiconductor substrate and preparation method thereof, and preparation method of light-emitting substrate

Abstract

The invention provides a semiconductor substrate and a preparation method thereof, and a preparation method of a light-emitting substrate. The semiconductor substrate includes: a substrate; a plurality of light-emitting elements arranged on the substrate in an array; the light-emitting element comprises an epitaxial layer, a first electrode and a second electrode, the epitaxial layer is arranged on one side of the substrate, and the first electrode and the second electrode are arranged on the side, away from the substrate, of the epitaxial layer. Wherein a plurality of bosses distributed in an array mode are formed on the surface of one side of the substrate, and the light-emitting elements are arranged on the bosses in a one-to-one correspondence mode; isolation grooves are formed between the adjacent bosses, and the depth of the isolation grooves is larger than the thickness of the epitaxial layers in the thickness direction of the substrate, so that the epitaxial layers on the adjacent bosses are disconnected at the isolation grooves. The semiconductor substrate can prevent the ICP etching process from damaging the side wall of the light-emitting element, and improves the light-emitting efficiency of the light-emitting element.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to a semiconductor substrate, a method for preparing the same, and a method for preparing a light-emitting substrate. Background Art

[0002] With the continuous progress and development in the field of display technologies, semiconductor chips are increasingly widely used. As a new generation of semiconductor products, micro light-emitting diodes (Micro LED) have higher brightness, better luminous efficiency, and the properties of low power consumption and long lifespan compared with other light-emitting display products such as light-emitting diodes (LED), organic light-emitting diodes (OLED), and liquid crystal displays (LCD), and thus are highly favored by the market.

[0003] Currently, the preparation process of semiconductor chips usually involves epitaxially growing a whole epitaxial layer on a substrate, and then dividing the epitaxial layer into multiple parts through etching processes such as inductively coupled plasma (ICP) etching for forming multiple light-emitting elements.

[0004] However, due to the relatively high ICP etching energy, it often causes damage to the sidewalls of the light-emitting elements, resulting in a decrease in the light extraction efficiency of the light-emitting elements. Summary of the Invention

[0005] The present application provides a semiconductor substrate, a method for preparing the same, and a method for preparing a light-emitting substrate, aiming to solve the problem in the prior art that due to the relatively high ICP etching energy, the sidewalls of the light-emitting elements are easily damaged, leading to a decrease in the light extraction efficiency of the light-emitting elements.

[0006] To solve the above technical problems, the first technical solution provided by the present application is: providing a semiconductor substrate, comprising: a substrate; a plurality of light-emitting elements, arranged in an array on the substrate; the light-emitting elements include an epitaxial layer, a first electrode, and a second electrode, the epitaxial layer is disposed on one side of the substrate, and the first electrode and the second electrode are disposed on the side of the epitaxial layer away from the substrate; wherein, a plurality of bosses distributed in an array are formed on one side surface of the substrate, and the plurality of light-emitting elements are respectively disposed on the bosses; an isolation groove is provided between adjacent bosses, and in the thickness direction of the substrate, the depth of the isolation groove is greater than the thickness of the epitaxial layer, so that the epitaxial layers on adjacent bosses are disconnected at the isolation groove.

[0007] In some embodiments, the substrate includes a plurality of repeating units arranged in an array, each repeating unit including at least two protrusions with different mesa heights, and the at least two protrusions are arranged in an array.

[0008] In some embodiments, the mesa height difference between two adjacent protrusions is greater than the thickness of the epitaxial layer; the angle between the sidewall of the protrusion and the mesa of the adjacent protrusion is less than or equal to 90°; Among the light-emitting elements other than the light-emitting element on the protrusion with the highest mesa height, the heights of the first electrode and the second electrode are both higher than the highest mesa height.

[0009] To solve the above technical problems, the second technical solution provided by this application is: to provide a method for fabricating a semiconductor substrate. The method for fabricating the semiconductor substrate includes: Providing a substrate; Performing a patterning process on the substrate to form a plurality of protrusions arranged in an array on one surface of the substrate, and forming isolation grooves between adjacent protrusions; Growing an epitaxial layer on the protrusions; wherein, in the thickness direction of the substrate, the depth of the isolation groove is greater than the thickness of the epitaxial layer, so that the epitaxial layers on adjacent protrusions are disconnected at the isolation groove; Fabricating a first electrode and a second electrode on the epitaxial layer.

[0010] In some embodiments, the step of performing a patterning process on the substrate includes: Performing a stepped patterning process on the substrate to form a plurality of protrusions in a stepped shape and arranged in an array on the substrate; a plurality of repeating units arranged in an array are formed on the substrate, each repeating unit including at least two protrusions with different mesa heights, and the at least two protrusions are arranged in an array; the mesa height difference between two adjacent protrusions is greater than the thickness of the epitaxial layer; the angle between the sidewall of the protrusion and the mesa of the adjacent protrusion is less than or equal to 90°; Performing a groove patterning process on the substrate to form isolation grooves between adjacent protrusions.

[0011] In some embodiments, the epitaxial layer, the first electrode, and the second electrode form a light-emitting element; among the light-emitting elements other than the light-emitting element on the protrusion with the highest mesa height, the heights of the first electrode and the second electrode are both higher than the highest mesa height.

[0012] In some embodiments, the step of growing an epitaxial layer on the protrusions includes: Growing a first epitaxial layer on the protrusions; Fabricating a sacrificial layer in the electrode region on the first epitaxial layer; the electrode region is used to fabricate the first electrode; wherein, the material of the sacrificial layer is different from the material of the epitaxial layer; A second epitaxial layer is grown on the first epitaxial layer and the sacrificial layer; wherein, the thickness of the sacrificial layer is greater than that of the second epitaxial layer; the angle between the sidewall of the sacrificial layer and the surface of the first epitaxial layer away from the substrate is less than or equal to 90°; The sacrificial layer is peeled off to remove the sacrificial layer and the second epitaxial layer formed thereon; The steps of fabricating a first electrode and a second electrode on the epitaxial layer include: Fabricate a first electrode on the exposed first epitaxial layer; Fabricate a second electrode on the second epitaxial layer.

[0013] To solve the above technical problems, the third technical solution provided by this application is: to provide a method for preparing a light-emitting substrate. The method for preparing a light-emitting substrate includes: Provide a driving substrate and a semiconductor substrate; Align and bond the light-emitting elements on the semiconductor substrate with the driving substrate; Peel the aligned and bonded light-emitting elements from the substrate.

[0014] In some embodiments, the semiconductor substrate includes a substrate and light-emitting elements disposed on the substrate; a plurality of convex platforms are formed on one side surface of the substrate and are distributed in an array, and a plurality of light-emitting elements are disposed on the convex platforms one by one; wherein, the substrate includes a plurality of repeating units distributed in an array, each repeating unit includes at least two convex platforms with different mesa heights, and at least two convex platforms are distributed in an array; The steps of aligning and bonding the light-emitting elements on the semiconductor substrate with the driving substrate include: Taking the side of the substrate away from the light-emitting elements as the bottom, align and bond the highest light-emitting element with the driving substrate; wherein, the driving substrate includes a driving circuit layer and a plurality of electrode groups disposed on the driving circuit layer; each electrode group includes a first driving electrode and a second driving electrode, which are respectively used for aligning and bonding with the first electrode and the second electrode of the light-emitting element; the distance between any convex platform in the repeating unit and the corresponding convex platform in the adjacent repeating unit is the transfer distance, and the distance between adjacent two electrode groups is equal to the transfer distance.

[0015] In some embodiments, the method for preparing a light-emitting substrate further includes: Repeat the steps: Align and bond the highest light-emitting element with the driving substrate; Peel the aligned and bonded light-emitting elements from the substrate; The highest point of the highest light-emitting element is lower than the mesa of the highest convex platform. Before the step of aligning and bonding the highest light-emitting element with the driving substrate, it further includes: Etch the highest convex platform to reduce its height so that the highest point of the highest light-emitting element is higher than the mesa of the highest convex platform.

[0016] Advantages of the present application: Different from the prior art, the present application provides a semiconductor substrate, a preparation method thereof, and a preparation method of a light-emitting substrate. The semiconductor substrate includes a substrate and a plurality of light-emitting elements. The plurality of light-emitting elements are arranged in an array on the substrate. The light-emitting element includes an epitaxial layer, a first electrode, and a second electrode. The epitaxial layer is disposed on one side of the substrate, and the first electrode and the second electrode are disposed on the side of the epitaxial layer away from the substrate. In the present application, a plurality of bosses distributed in an array are formed on one side surface of the substrate, and an isolation groove is provided between adjacent bosses, and the depth of the isolation groove is greater than the thickness of the epitaxial layer. When epitaxial growth is performed on the substrate to form the epitaxial layer, the epitaxial layers on adjacent bosses can be naturally disconnected at the isolation groove, that is, by providing the isolation groove, the semiconductor layer can be naturally separated on the substrate to form a plurality of epitaxial layers, and there is no need to divide the semiconductor layer by an ICP etching process to form a plurality of epitaxial layers, which can effectively avoid the problem of sidewall damage of the light-emitting element caused by the high ICP etching energy, and further reduce the problem of the decrease in the light extraction efficiency of the light-emitting element. Description of the Drawings

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, without any creative effort, other drawings can also be obtained based on these drawings.

[0018] Figure 1 is a schematic cross-sectional structure diagram of a semiconductor substrate provided by the first embodiment of the present application; Figure 2 is a schematic plan view of a semiconductor substrate provided by the second embodiment of the present application; Figure 3 is Figure 2 a schematic cross-sectional structure diagram taken along the line A-A in Figure 4 is a schematic plan view of a semiconductor substrate provided by the third embodiment of the present application; Figure 5 is a schematic plan view of a semiconductor substrate provided by the fourth embodiment of the present application; Figure 6 is a schematic flow chart of a preparation method of a semiconductor substrate provided by an embodiment of the present application; Figure 7 is Figure 6 a schematic flow chart provided by an embodiment of step S20 in Figure 8 is corresponding to Figure 7 a schematic process flow chart provided by an embodiment of Figure 9 isFigure 6 A schematic flow chart provided by one embodiment of steps S30 and S40 in Figure 10 corresponding to Figure 9 A schematic process flow chart provided by one embodiment of Figure 11 A schematic flow chart of a method for manufacturing a light-emitting substrate provided by one embodiment of the present application; Figure 12 is Figure 11 A schematic flow chart provided by one embodiment of step S60 in Figure 13 corresponding to Figure 12 A schematic process flow chart provided by one embodiment of Figure 14 A schematic process flow chart of step S60 provided by another embodiment of Figure 11 ; Figure 15 A schematic structural diagram of a light-emitting substrate provided by one embodiment of the present application; Figure 16 A schematic structural diagram of a display device provided by one embodiment of the present application.

[0019] Reference numerals: 100, semiconductor substrate; 10, substrate; 20, light-emitting element; 21, epitaxial layer; 22, first electrode; 23, second electrode; 12, isolation groove; 11, boss; 30, repeating unit; 211, first epitaxial layer; 2111, first semiconductor layer; 212, second epitaxial layer; 2121, light-emitting layer; 2122, second semiconductor layer; 24, sacrificial layer; 300, light-emitting substrate; 200, driving substrate; 201, base; 202, driving circuit layer; 203, electrode group; 2031, first driving electrode; 2032, second driving electrode; X, first direction; Y, second direction; A1, first height; B1, second height; A2, third height; B2, fourth height; C1, fifth height; C2, sixth height. Detailed Description of the Embodiment

[0020] The following will describe the solutions of the embodiments of the present application in detail with reference to the accompanying drawings of the specification.

[0021] In the following description, specific details such as specific system structures, interfaces, and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the present application.

[0022] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0023] The terms "first", "second", and "third" in the present application are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", and "third" may explicitly or implicitly include at least one of such features. In the description of the present application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. All directional indications (such as up, down, left, right, front, back...) in the embodiments of the present application are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to these processes, methods, products, or devices.

[0024] Referring to "embodiment" herein means that a specific feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0025] The present application will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0026] Please refer to Figure 1 , Figure 1 which is a schematic cross-sectional structure diagram of a semiconductor substrate provided in the first embodiment of the present application. In this embodiment, a semiconductor substrate 100 is provided, and the semiconductor substrate 100 includes: a substrate 10; a plurality of light-emitting elements 20, arranged in an array on the substrate 10; the light-emitting elements 20 include an epitaxial layer 21, a first electrode 22, and a second electrode 23. The epitaxial layer 21 is disposed on one side of the substrate 10, and the first electrode 22 and the second electrode 23 are disposed on the side of the epitaxial layer 21 away from the substrate 10; On one side surface of the substrate 10, a plurality of bosses 11 distributed in an array are formed, and a plurality of light-emitting elements 20 are correspondingly arranged on the bosses 11 one by one; An isolation groove 12 is provided between adjacent bosses 11. In the thickness direction of the substrate 10, the depth of the isolation groove 12 is greater than the thickness of the epitaxial layer 21, so that the epitaxial layers 21 on adjacent bosses 11 are disconnected at the isolation groove 12.

[0027] Among them, the substrate 10 is the basic support structure of the entire substrate, providing an attachment surface for the light-emitting elements 20. In some embodiments, the material of the substrate 10 may include sapphire, and the main components of sapphire are one or more of aluminum oxide (Al2O3), silicon carbide (SiC), single crystal silicon (Si), gallium nitride (GaN), gallium arsenide (GaAs), aluminum nitride (AlN), and zinc oxide (ZnO). In other embodiments, the material of the substrate 10 may also include other materials such as gallium phosphide (GaP), etc., specifically based on the ability to grow the epitaxial layer 21 in the light-emitting element 20 on the substrate 10.

[0028] Among them, the light-emitting elements 20 are located on one side surface of the substrate 10 and are distributed in an array on the substrate 10. The light-emitting elements 20 include an epitaxial layer 21, a first electrode 22, and a second electrode 23. Among them, the epitaxial layer 21 is formed on one side surface of the substrate 10, and the material of the epitaxial layer 21 may include a P-type semiconductor material and an N-type semiconductor material, such as P-type gallium nitride (P-GaN) and N-type gallium nitride (N-GaN) materials, or may also be other materials. Among them, the first electrode 22 corresponds to the P-type semiconductor layer, and the second electrode 23 corresponds to the N-type semiconductor layer; or, the first electrode 22 corresponds to the N-type semiconductor layer, and the second electrode 23 corresponds to the P-type semiconductor layer, that is, the first electrode 22 and the second electrode 23 are respectively an anode electrode and a cathode electrode, and are arranged on the side surface of the epitaxial layer 21 away from the substrate 10.

[0029] Specifically, the first electrode 22 and the second electrode 23 can be prepared from a conductive material, and the conductive material may specifically include a metal material, a transparent conductive material, etc.; among them, the metal material is, for example, one or several of gold (Au), silver (Ag), aluminum (Al), nickel (Ni), and the transparent conductive material is, for example, one or several of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), etc. In a specific implementation, the first electrode 22 and the second electrode 23 may be a multilayer structure, such as a multilayer metal electrode of titanium / platinum / gold (Ti / Pt / Au), or a multilayer metal electrode of nickel / gold (Ni / Au), or may also be a multilayer sandwich structure electrode of ITO / metal / ITO, and can be specifically set according to actual applications.

[0030] In this embodiment, a plurality of convex platforms 11 distributed in an array are formed on one side surface of the substrate 10, and isolation grooves 12 are provided between adjacent convex platforms 11, and the depth of the isolation grooves 12 is greater than the thickness of the epitaxial layer 21. That is, one side of the substrate 10 has a plurality of convex platforms 11, the plurality of convex platforms 11 are arranged in an array, and adjacent convex platforms 11 are separated by the isolation grooves 12. The light-emitting elements 20 are correspondingly arranged on the convex platforms 11 one by one, so that the light-emitting elements 20 are arranged in an array like the convex platforms 11. Further, the depth of the isolation grooves 12 is greater than the thickness of the epitaxial layer 21, which enables the epitaxial layer 21 on adjacent convex platforms 11 to be naturally disconnected at the isolation grooves 12 during the process of forming the epitaxial layer 21 of the light-emitting element 20, that is, during the process of epitaxial growth on the substrate 10 to form the epitaxial layer 21, and a plurality of spaced-apart and array-distributed epitaxial layers 21 are naturally formed, and it is no longer necessary to divide the semiconductor layer by ICP etching process to form a plurality of independent epitaxial layers 21, thus effectively avoiding the problem of sidewall damage of the light-emitting element 20 caused by the high ICP etching energy, and thereby improving the light extraction efficiency of the light-emitting element 20.

[0031] Please refer to Figure 2 and Figure 3 , Figure 2 which is a schematic plan view of a semiconductor substrate provided by the second embodiment of the present application; Figure 3 is Figure 2 a schematic cross-sectional structure view taken along the line A-A in . In this embodiment, the substrate 10 includes a plurality of repeating units 30 distributed in an array, and each repeating unit 30 includes at least two convex platforms 11 with different mesa heights, and the at least two convex platforms 11 are distributed in an array.

[0032] Specifically, it can be understood that on one side surface of the substrate 10, every adjacent several convex platforms 11 form a repeating unit 30, and the mesa heights of the several convex platforms 11 in the repeating unit 30 are different from each other. Or it can also be understood that on one side surface of the substrate 10, among the plurality of convex platforms 11 distributed in an array, every adjacent several convex platforms 11 with different mesa heights are taken as a set of repeating units 30, and the repeating units 30 are distributed in an array along the first direction X and the second direction Y respectively. That is, the mesa heights of the convex platforms 11 on one side surface of the substrate 10 are different and are arranged periodically along the first direction X and / or the second direction Y.

[0033] Wherein, the mesa height of the convex platform 11 is defined as the distance between the surface of the convex platform 11 close to the light-emitting element 20 and the surface of the substrate 10 far from the light-emitting element 20. The first direction X and the second direction Y are parallel to the substrate 10, and the first direction X and the second direction Y intersect; in the embodiment of the present application, the first direction X is taken as the row direction of the convex platform 11 array, and the second direction Y is taken as the column direction of the convex platform 11 array as an example for illustration.

[0034] In this embodiment, by making the above settings for the bosses 11 on the substrate 10, the height setting of the light-emitting elements 20 disposed on the bosses 11 is the same as the height setting of the tabletop of the bosses 11, so that several adjacent light-emitting elements 20 are grouped into one group, and the heights of the several light-emitting elements 20 in each group are different from each other. Such a setting makes a height difference formed between the light-emitting elements 20 at different positions on the substrate 10, and the height difference changes periodically. Then, along the first direction X, in each row of light-emitting elements 20, the distance between every two adjacent light-emitting elements 20 with the same height is the same; along the second direction Y, in each column of light-emitting elements 20, the distance between every two adjacent light-emitting elements 20 with the same height is the same. In this way, when transferring the light-emitting elements 20, the light-emitting elements 20 can be transferred to the driving substrate 200 in order from high to low according to the height of the light-emitting elements 20, realizing the selective transfer of the light-emitting elements 20 on the semiconductor substrate 100, so that the density of the light-emitting elements 20 on the semiconductor substrate 100 is at least twice the sub-pixel density on the driving substrate 200, reducing the manufacturing cost of the semiconductor substrate 100.

[0035] Specifically, as Figure 2 and Figure 3 shown, in this embodiment, each repeating unit 30 includes two bosses 11 with different tabletop heights, and the two bosses 11 with different heights are arranged at intervals along the second direction Y in a periodic manner, so that the tabletop heights of each column of bosses 11 are arranged periodically with a first height A1 and a second height B1, where the first height A1 is higher than the second height B1.

[0036] By the above setting method, when transferring the light-emitting elements 20 on the semiconductor substrate 100 to the driving substrate 200, due to the height difference of the light-emitting elements 20, the light-emitting elements 20 on the bosses 11 with the first height A1 can be transferred to a driving substrate 200 first, and then the light-emitting elements 20 on the bosses 11 with the second height B1 can be transferred to another driving substrate 200 to achieve selective transfer.

[0037] Further, along the first direction X, in each row of the bosses 11, the distance between every two adjacent bosses 11 is a first distance; along the second direction Y, in each column of the bosses 11, the distance between every two adjacent bosses 11 is a second distance; the first distance and the second distance may be the same or different, and can be specifically set according to the distance between sub-pixels on the driving substrate 200 to which it needs to be transferred and the density design of the light-emitting elements 20 on the substrate 10. Taking the bosses 11 of two heights in this embodiment as an example, by setting the first distance and the second distance in this way, along the first direction X, the first distance is the same as the distance between every two adjacent sub-pixels on the driving substrate 200 in the first direction X, and along the second direction Y, the distance between the bosses 11 of the first height A1 and the bosses 11 of the first height A1 in the next period, and the distance between the bosses 11 of the second height B1 and the bosses 11 of the second height B1 in the next period are both the same as the distance between every two adjacent sub-pixels on the driving substrate 200 in the second direction Y. Therefore, when selectively transferring the light-emitting elements 20, the first electrodes 22 and the second electrodes 23 of the light-emitting elements 20 can be better aligned and bonded with the driving electrodes on the driving substrate 200, and the alignment accuracy is higher.

[0038] Please refer to Figure 4 , Figure 4 which is a schematic plan view of a semiconductor substrate provided in the third embodiment of the present application. In this embodiment, the substrate 10 includes a plurality of repeating units 30 arranged in an array, and each repeating unit 30 includes four bosses 11 with different mesa heights, and these four bosses 11 are arranged in an array.

[0039] Specifically, every four adjacent bosses 11 with different mesa heights on the substrate 10 form a repeating unit 30. In each repeating unit 30, the mesa heights of the four bosses 11 are different from each other and are arranged in a 2×2 matrix form. The mesa heights are, from high to low, the first height A1, the second height B1, the third height A2, and the fourth height B2. That is, along the first direction X and the second direction Y on the substrate 10, every four bosses 11 form a repeating unit 30 and are arranged periodically, and the mesa heights of the four bosses 11 in each period are different from each other.

[0040] In the above-mentioned semiconductor substrate 100 provided in this embodiment, when transferring the light-emitting elements 20 thereof, the light-emitting elements 20 on the bosses 11 of the first height A1, the light-emitting elements 20 on the bosses 11 of the second height B1, the light-emitting elements 20 on the bosses 11 of the third height A2, and the light-emitting elements 20 on the bosses 11 of the fourth height B2 can be transferred in sequence from high to low to their respective corresponding driving substrates 200.

[0041] Please refer to Figure 5 , Figure 5It is a schematic plan view of a semiconductor substrate provided by the fourth embodiment of the present application. In this embodiment, each repeating unit 30 includes six bosses 11 with different mesa heights, and these six bosses 11 are arranged in an array.

[0042] Specifically, every six adjacent bosses 11 with different mesa heights on the substrate 10 form a repeating unit 30. In each repeating unit 30, the mesa heights of the six bosses 11 are all different and are arranged in a 2×3 matrix form. The mesa heights from high to low are the first height A1, the second height B1, the third height A2, the fourth height B2, the fifth height C1, and the sixth height C2 respectively. That is, along the first direction X and the second direction Y on the substrate 10, every six bosses 11 form a repeating unit 30 and are arranged periodically, and the mesa heights of the six bosses 11 in each period are all different.

[0043] Similarly, for the above-mentioned semiconductor substrate 100 provided in this embodiment, when transferring the light-emitting elements 20 thereof, the light-emitting elements 20 on the bosses 11 with the first height A1, the light-emitting elements 20 on the bosses 11 with the second height B1, the light-emitting elements 20 on the bosses 11 with the third height A2, the light-emitting elements 20 on the bosses 11 with the fourth height B2, the light-emitting elements 20 on the bosses 11 with the fifth height C1, and the light-emitting elements 20 on the bosses 11 with the sixth height C2 can be transferred in sequence from high to low to be respectively transferred to their corresponding driving substrates 200.

[0044] In other embodiments, the number of bosses 11 in each repeating unit 30 can be specifically set according to the distribution density of the light-emitting elements 20 on the substrate 10 and the distribution density of the sub-pixels on the driving substrate 200, and no specific limitation is made thereto. At the same time, in each repeating unit 30, the arrangement manner of at least two bosses 11 can also be set according to the arrangement design of the sub-pixels on the driving substrate 200, and no specific limitation is made thereto.

[0045] Please continue to refer to Figure 3 , in a specific embodiment, the mesa height difference between two adjacent bosses 11 is greater than the thickness of the epitaxial layer 21; the included angle between the side wall of the boss 11 and the mesa of the adjacent boss 11 is less than or equal to 90°.

[0046] Specifically, by making the mesa height difference between two adjacent bosses 11 greater than the thickness of the epitaxial layer 21, the mesa of the boss 11 with a higher mesa height can be higher than the upper surface of the epitaxial layer 21 on the adjacent shorter boss 11, so as to further enable the epitaxial layers 21 on the adjacent bosses 11 to naturally form a fault between the bosses 11. Among them, the upper surface of the epitaxial layer 21 is the surface on the side of the epitaxial layer 21 away from the substrate 10.

[0047] Furthermore, the angle between the side wall of the boss 11 and the tabletop of the adjacent boss 11 is less than or equal to 90°. Generally, to ensure the thickness uniformity of the epitaxial layer 21 on the boss 11, the tabletop of the boss 11 is parallel to the surface of the substrate 10 away from the light-emitting element 20, the side wall of the boss 11 can be perpendicular to the tabletop of the boss 11, or the side wall of the boss 11 is inclined towards the inside of the boss 11, so that the angle between the side wall of the boss 11 and the tabletop of the adjacent boss 11 is a right angle or an acute angle, thereby further avoiding the situation that the epitaxial layer 21 grows on the side wall of the boss 11, so that the epitaxial layers 21 between the adjacent bosses 11 are disconnected and are independently formed on the bosses 11 respectively.

[0048] Specifically, in the above embodiment, the width of the isolation groove 12 between the adjacent bosses 11 can be set according to the distribution density of the light-emitting elements 20 and the pitch between the adjacent sub-pixels on the driving substrate 200 to be transferred, so that the distance between the adjacent bosses 11 with the same height is the same as the pitch between the corresponding adjacent sub-pixels on the driving substrate 200 to be transferred.

[0049] In some embodiments, among the light-emitting elements 20 other than the light-emitting elements 20 on the boss 11 with the highest tabletop height, the heights of the first electrode 22 and the second electrode 23 are both higher than the highest tabletop height.

[0050] Specifically, except for the highest boss 11, for the light-emitting elements 20 on the other bosses 11, the heights of the first electrode 22 and the second electrode 23 are both higher than the tabletop height of the highest boss 11. Among them, the height of the first electrode 22 is the distance from the end face of the end of the first electrode 22 away from the epitaxial layer 21 to the surface of the substrate 10 away from the light-emitting element 20, and the height of the second electrode 23 is the distance from the end face of the end of the second electrode 23 away from the epitaxial layer 21 to the surface of the substrate 10 away from the light-emitting element 20. That is, except for the highest boss 11, for the light-emitting elements 20 on the other bosses 11, their first electrodes 22 and second electrodes 23 protrude above the tabletop of the highest boss 11 in the direction perpendicular to the substrate 10. Through this setting method, when transferring the light-emitting elements 20 on the non-highest bosses 11, the first electrodes 22 and the second electrodes 23 of the light-emitting elements 20 can be directly aligned and bonded with the driving electrodes on the driving substrate 200, without etching the highest boss 11 to reduce the height or using an intermediate transfer substrate with a special structure to transfer the light-emitting elements 20, thereby simplifying the transfer process of the light-emitting elements 20 and improving the transfer efficiency.

[0051] Specifically, the semiconductor substrate 100 provided in the above embodiment can be prepared by the preparation method provided in the following embodiments, and the specific preparation method can refer to the relevant introduction below.

[0052] Please refer to Figure 1 andFigure 6 , Figure 6 is a schematic flow chart of a method for preparing a semiconductor substrate provided by an embodiment of the present application. In this embodiment, a method for preparing a semiconductor substrate 100 is provided. The method for preparing the semiconductor substrate 100 includes: S10: Provide a substrate 10; S20: Pattern the substrate 10 to form a plurality of protrusions 11 distributed in an array on one surface of the substrate 10, and form isolation grooves 12 between adjacent protrusions 11; S30: Grow an epitaxial layer 21 on the protrusions 11; wherein, in the thickness direction of the substrate 10, the depth of the isolation groove 12 is greater than the thickness of the epitaxial layer 21, so that the epitaxial layers 21 on adjacent protrusions 11 are disconnected at the isolation groove 12; S40: Fabricate a first electrode 22 and a second electrode 23 on the epitaxial layer 21.

[0053] Wherein, in step S20, the substrate 10 can be specifically patterned by nanoimprinting or lithography processes to form a plurality of protrusions 11 distributed in an array on one surface of the substrate 10, and isolation grooves 12 are also formed between adjacent protrusions 11. Wherein, the specific structures and functions of the protrusions 11 and the isolation grooves 12 are the same as or similar to those of the protrusions 11 and the isolation grooves 12 involved in the above embodiments, and the same technical effects can be achieved. For specific references, please refer to the relevant introduction above.

[0054] In step S30, the epitaxial layer 21 is grown on the protrusions 11 by an epitaxial process. Wherein, the epitaxial layer 21 includes a stacked first epitaxial layer 211 and a second epitaxial layer 212. The first epitaxial layer 211 includes a first semiconductor layer 2111, and the second epitaxial layer 212 includes a stacked light-emitting layer 2121 and a second semiconductor layer 2122. Specifically, the first semiconductor layer 2111 and the second semiconductor layer 2122 are an N-type semiconductor layer and a P-type semiconductor layer respectively. The light-emitting layer 2121 can be a quantum well layer, for example, it can be a multiple quantum well (MQW) layer. The material of the light-emitting layer 2121 can be specifically gallium nitride (GaN). The materials of the N-type semiconductor layer and the P-type semiconductor layer are the same as those of the N-type semiconductor layer and the P-type semiconductor layer involved in the above embodiments. For specific references, please refer to the relevant introduction above.

[0055] Specifically, in step S20, by forming isolation grooves 12 between adjacent bosses 11 and making the depth of the isolation grooves 12 greater than the thickness of the epitaxial layer 21, during the epitaxial growth process in step S30, a fault can be naturally formed between the semiconductor layer in the isolation grooves 12 and the epitaxial layer 21 on the adjacent bosses 11, so that the epitaxial layer 21 on the adjacent bosses 11 is naturally disconnected at the isolation grooves 12, and it is no longer necessary to perform a splitting process on a whole layer of semiconductor layer by adding an ICP etching process to form multiple independent epitaxial layers 21, thereby effectively avoiding the problem of sidewall damage of the light-emitting element 20 caused by the high ICP etching energy, and thus improving the light extraction efficiency of the light-emitting element 20.

[0056] In step S40, a first electrode 22 is fabricated on the exposed first semiconductor layer 2111, and a second electrode 23 is fabricated on the second semiconductor layer 2122, thereby preparing the light-emitting element 20.

[0057] Please refer to Figure 7 and Figure 8 , Figure 7 is Figure 6 a schematic flow chart provided by an embodiment of step S20 in Figure 8 is corresponding to Figure 7 a schematic process flow chart provided by an embodiment of. In this embodiment, step S20 specifically includes: S21: Perform a stepped patterning process on the substrate 10 to form a plurality of bosses 11 having a stepped shape and arranged in an array on the substrate 10; S22: Perform a groove patterning process on the substrate 10 to form isolation grooves 12 between adjacent bosses 11.

[0058] Wherein, a plurality of repeating units 30 arranged in an array are formed on the substrate 10, each repeating unit 30 includes at least two bosses 11 with different mesa heights, and at least two bosses 11 are arranged in an array; the mesa height difference between two adjacent bosses 11 is greater than the thickness of the epitaxial layer 21; the included angle between the sidewall of the boss 11 and the mesa of the adjacent boss 11 is less than or equal to 90°.

[0059] Specifically, in step S21, the surface on one side of the substrate 10 can be patterned by nanoimprinting or photolithography processes. First, a plurality of bosses 11 in the shape of steps and arranged in an array are formed on the substrate 10. Among them, the plurality of bosses 11 can be divided into a plurality of repeating units 30 arranged in an array. Each repeating unit 30 includes at least two bosses 11 with different mesa heights, and the at least two bosses 11 with different mesa heights are arranged in an array in the repeating unit 30. And the height difference between the mesas of adjacent bosses 11 is greater than the thickness of the epitaxial layer 21. The specific structure and function of the boss 11 are the same as or similar to those of the boss 11 involved in the above embodiments, and the same technical effects can be achieved. For specific details, reference can be made to the relevant introduction above.

[0060] In step S22, the surface on one side of the substrate 10 is further patterned by nanoimprinting or photolithography processes, so as to form isolation grooves 12 between adjacent bosses 11 to separate the bosses 11 from each other. Among them, the depth of the isolation grooves 12 is greater than the thickness of the epitaxial layer 21, and the angle between the side wall of the boss 11 and the mesa of the adjacent boss 11 is a right angle or an acute angle.

[0061] Through step S21 and step S22, the above-mentioned boss 11 structure and isolation groove 12 structure are formed on the surface on one side of the substrate 10. Thus, in the process of epitaxial growth on the substrate 10, a fault can be naturally formed between the semiconductor layer in the isolation groove 12 and the epitaxial layer 21 on the adjacent boss 11, so that the epitaxial layer 21 on the adjacent boss 11 is naturally disconnected at the isolation groove 12.

[0062] Specifically, the epitaxial layer 21, the first electrode 22, and the second electrode 23 on each boss 11 form a light-emitting element 20; among the light-emitting elements 20 other than the light-emitting element 20 on the boss 11 with the highest mesa height, the heights of the first electrode 22 and the second electrode 23 are both higher than the highest mesa height.

[0063] In the specific embodiment, the mesa height of the boss 11 is controlled through the above step S22, so that for the light-emitting elements 20 on the bosses 11 other than the highest boss 11, the first electrode 22 and the second electrode 23 protrude from the mesa of the highest boss 11 in the direction perpendicular to the substrate 10. For the semiconductor substrate 100 prepared by this embodiment, when transferring the light-emitting elements 20 on the non-highest bosses 11, the first electrode 22 and the second electrode 23 of the light-emitting elements 20 can be directly aligned and bonded with the driving electrodes on the driving substrate 200, without etching the highest boss 11 to reduce its height or using an intermediate transfer substrate with a special structure to transfer the light-emitting elements 20, thus simplifying the transfer process of the light-emitting elements 20 and improving the transfer efficiency.

[0064] Please refer to Figure 9 and Figure 10 , Figure 9 which Figure 6 is a process schematic diagram provided by an embodiment of steps S30 and S40 in Figure 10 and Figure 9 is a process flow schematic diagram provided by an embodiment corresponding to In this embodiment, step S30 specifically includes: S31: Grow a first epitaxial layer 211 on the boss 11; S32: Fabricate a sacrificial layer 24 in the electrode region on the first epitaxial layer 211; the electrode region is used to fabricate the first electrode 22; wherein, the material of the sacrificial layer 24 is different from that of the epitaxial layer 21; S33: Grow a second epitaxial layer 212 on the first epitaxial layer 211 and the sacrificial layer 24; wherein, the thickness of the sacrificial layer 24 is greater than that of the second epitaxial layer 212; the included angle between the side wall of the sacrificial layer 24 and the surface of the first epitaxial layer 211 away from the substrate 10 is less than or equal to 90°; S34: Strip the sacrificial layer 24 to remove the sacrificial layer 24 and the second epitaxial layer 212 formed on the sacrificial layer 24; Step S40 includes: S41: Fabricate the first electrode 22 on the exposed first epitaxial layer 211; S42: Fabricate the second electrode 23 on the second epitaxial layer 212.

[0065] Among them, the first epitaxial layer 211 obtained in step S31 may include a first semiconductor layer 2111, and the first semiconductor layer 2111 may be an N-type semiconductor layer or a P-type semiconductor layer. In step S32, a sacrificial layer 24 is fabricated in the electrode region of the first epitaxial layer 211, and the material of the sacrificial layer 24 may be a material different from that of the epitaxial layer 21, such as photoresist, polymethyl methacrylate (PMMA), silicon dioxide (SiO2), etc. The sacrificial layer 24 can be specifically fabricated by patterning processes such as lithography, and the thickness of the sacrificial layer 24 is greater than that of the second epitaxial layer 212.

[0066] In step S33, a second epitaxial layer 212 is grown on the first epitaxial layer 211 and the sacrificial layer 24. Since the thickness of the sacrificial layer 24 is greater than that of the second epitaxial layer 212, the second epitaxial layer 212 on the first epitaxial layer 211 is naturally disconnected from the second epitaxial layer 212 on the sacrificial layer 24. Thus, when the sacrificial layer 24 is peeled off in step S34, the second epitaxial layer 212 on the sacrificial layer 24 is taken away together, exposing the area of the first epitaxial layer 211 corresponding to the first electrode 22, which facilitates the fabrication of the first electrode 22 on the first epitaxial layer 211. This embodiment does not require using an ICP etching process to etch the second epitaxial layer 212 to expose the first epitaxial layer 211, thereby further avoiding the problem of sidewall damage to the light-emitting element 20 caused by the relatively high ICP etching energy and further improving the light extraction efficiency of the light-emitting element 20.

[0067] Furthermore, for the fabricated sacrificial layer 24, the angle between the sidewall of the sacrificial layer 24 and the surface of the first epitaxial layer 211 away from the substrate 10 can be a right angle or an acute angle, that is, the sacrificial layer 24 is rectangular or trapezoidal in reverse. Thus, in step S33, it is further ensured that the second epitaxial layer 212 on the first epitaxial layer 211 is naturally disconnected from the second epitaxial layer 212 on the sacrificial layer 24, reducing the need for further optimization of the second epitaxial layer 212.

[0068] Please refer to Figure 11 , Figure 11 which is a schematic flow chart of a method for preparing a light-emitting substrate provided by an embodiment of the present application. In this embodiment, a method for preparing a light-emitting substrate 300 is provided, and the preparation method includes: S50: Provide a driving substrate 200 and a semiconductor substrate 100; S60: Transfer the light-emitting element 20 on the semiconductor substrate 100 to the driving substrate 200 and perform alignment bonding with the driving substrate 200.

[0069] Among them, the semiconductor substrate 100 is the semiconductor substrate 100 provided in the above technical solution. The structure and function of this semiconductor substrate 100 are the same as or similar to those of the semiconductor substrate 100 provided in the above embodiment, and the same technical effects can be achieved. For details, reference can be made to the above detailed introduction and will not be elaborated here.

[0070] Among them, the driving substrate 200 is a circuit board for driving the light-emitting element 20 to emit light, so as to drive the light-emitting element 20 to emit light. In this embodiment, by providing the semiconductor substrate 100 provided in the above technical solution, the light-emitting element 20 on the semiconductor substrate 100 is transferred onto the driving substrate 200 and aligned and bonded with the driving substrate 200, so that the obtained light-emitting substrate 300 has a higher light extraction efficiency of the light-emitting element 20. The light-emitting substrate 300 obtained in this embodiment can be used for backlighting, light sources or display panels.

[0071] Please refer to Figure 12 and Figure 13 , Figure 12 is Figure 11 a schematic flow chart provided by an embodiment of step S60 in Figure 13 and is Figure 12 a schematic process flow chart provided by an embodiment corresponding to . In this embodiment, the semiconductor substrate 100 includes a substrate 10 and a light-emitting unit disposed on the substrate 10; a plurality of bosses 11 distributed in an array are formed on one side surface of the substrate 10, and a plurality of light-emitting elements 20 are disposed on the bosses 11 in a one-to-one correspondence; among them, the substrate 10 includes a plurality of repeating units 30 distributed in an array, each repeating unit 30 includes at least two bosses 11 with different mesa heights, and at least two bosses 11 are distributed in an array.

[0072] Step S60 includes: S61: With the side of the substrate 10 away from the light-emitting element 20 as the bottom, align and bond the highest light-emitting element 20 with the driving substrate 200; S62: Peel off the aligned and bonded light-emitting element 20 from the substrate 10; S63: Repeat step S61 and step S62.

[0073] Among them, in step S61, the driving substrate 200 includes a driving circuit layer 202 and a plurality of electrode groups disposed on the driving circuit layer 202; each electrode group includes a first driving electrode 2031 and a second driving electrode 2032, which are respectively used for aligning and bonding with the first electrode 22 and the second electrode 23 of the light-emitting element 20; the distance between any boss 11 in the repeating unit 30 and the corresponding boss 11 in the adjacent repeating unit 30 is the transfer distance, and the distance between adjacent two electrode groups is equal to the transfer distance.

[0074] Among them, the driving substrate 200 includes a substrate 201, a driving circuit layer 202, and a plurality of electrode groups 203 disposed on the driving circuit layer 202. The first driving electrode 2031 and the second driving electrode 2032 in the electrode group 203 are electrically connected to the driving circuit layer 202 for transmitting driving signals to the light-emitting element 20. Specifically, the first driving electrode 2031 and the second driving electrode 2032 are respectively used for butt-bonding with the first electrode 22 and the second electrode 23 of the light-emitting element 20, so that the driving circuit layer 202 forms an electrical connection with the light-emitting element 20 through the first driving electrode 2031 and the second driving electrode 2032. For example, bonding can be performed through solder paste or anisotropic conductive adhesive to fix the light-emitting element 20 on the driving substrate 200 and form a stable electrical connection.

[0075] Specifically, in step S61, with the side of the substrate 10 away from the light-emitting element 20 as the bottom, the first electrode 22 and the second electrode 23 of the highest light-emitting element 20 on the substrate 10 are respectively aligned with the corresponding first driving electrode 2031 and second driving electrode 2032 on the driving substrate 200, and then bonded through solder paste or anisotropic conductive adhesive to form a stable electrical connection.

[0076] Among them, the distance between any boss 11 in the repeating unit 30 and the corresponding boss 11 in the adjacent repeating unit 30 is defined as the transfer distance; the corresponding boss 11 refers to the boss 11 with the same table height in the adjacent repeating unit 30, that is, the distance between any boss 11 in the repeating unit 30 and the boss 11 with the same table height in the adjacent repeating unit 30 is the transfer distance. By making the distance between two adjacent electrode groups on the driving substrate 200 the same as the transfer distance, each of the highest light-emitting elements 20 can be aligned with the corresponding electrode group on the driving substrate 200 for bonding, improving the alignment accuracy, and thus realizing the selective transfer of the light-emitting elements 20 on the semiconductor substrate 100. It can be understood that the distance between two adjacent electrode groups here is the same as the distance between adjacent sub-pixels involved above.

[0077] In step S62, the bonded light-emitting element 20 is peeled off from the substrate 10. The specific peeling method can adopt the Laser Lift-Off (LLO) process. The substrate 10 is irradiated from the bottom side of the substrate 10 with a laser. The laser passes through the substrate 10, and the energy is absorbed at the epitaxial layer 21 / substrate 10 interface, so that thermal decomposition or gasification occurs at the epitaxial layer 21 / substrate 10 interface to separate, thereby peeling the light-emitting element 20 from the substrate 10.

[0078] Through the above steps S61 and S62, one transfer can be completed. At this time, if there are still light-emitting elements 20 on the semiconductor substrate 100 that have not been transferred, steps S61 and S62 can be repeated to transfer the highest light-emitting element 20 among the remaining light-emitting elements 20 on the semiconductor substrate 100 to another corresponding driving substrate 200 as well. It can be understood that after each transfer of the highest light-emitting element 20 and peeling from the substrate 10, the second-highest light-emitting element 20 becomes the highest light-emitting element 20 and can be transferred next time.

[0079] Please refer to Figure 14 , Figure 14 which is provided by another embodiment Figure 11 and is a process flow schematic diagram of step S60. In this embodiment, the highest point of the highest light-emitting element 20 is lower than the tabletop of the highest boss 11; before step S61, the method for preparing the light-emitting substrate 300 further includes: S64: Etch the highest boss 11 to reduce the height of the highest boss 11 so that the highest point of the highest light-emitting element 20 is higher than the tabletop of the highest boss 11.

[0080] In this embodiment, after the transfer of the light-emitting element 20 on the boss 11 with the highest tabletop height is completed, for the remaining light-emitting elements 20 on the semiconductor substrate 100, the highest point of the highest light-emitting element 20 is lower than the tabletop of the highest boss 11, that is, the end faces of the first electrode 22 and the second electrode 23 of the highest light-emitting element 20 away from the substrate 10 are lower than the tabletop of the highest boss 11.

[0081] To complete the transfer of the remaining light-emitting elements 20, before performing step S61, the highest boss 11 can be etched first. The etching method can adopt a dry etching process to reduce the damage to the light-emitting element 20. After etching the highest boss 11, the height of the highest boss 11 is reduced so that the highest point of the highest light-emitting element 20 is higher than the tabletop of the highest boss 11, and thus the selective transfer of the light-emitting element 20 can continue.

[0082] Please refer to Figure 15 , Figure 15 which is a schematic structural diagram of a light-emitting substrate provided by an embodiment of the present application. In this embodiment, a light-emitting substrate 300 is provided. The light-emitting substrate 300 includes a driving substrate 200 and a plurality of light-emitting elements 20 disposed on the driving substrate 200. The light-emitting substrate 300 can be used for a display panel, a backlight assembly, or a light-emitting panel.

[0083] Among them, the driving substrate 200 includes a substrate 201, a driving circuit layer 202, and a plurality of electrode groups 203. The specific structure and function of the driving substrate 200 are the same as or similar to those of the driving substrate 200 provided in the above embodiments, and the same technical effects can be achieved. Specifically, the substrate 201 of the driving substrate 200 can be a transparent substrate. For example, the substrate 201 can be a glass substrate or a flexible substrate. For example, the flexible substrate 201 can be made of materials such as polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer soft film. The light-emitting element 20 is the same as or similar to the light-emitting element 20 in the above embodiments, and the same technical effects can be achieved. For specific details, reference can be made to the detailed introduction above, and details will not be repeated here. The light-emitting substrate 300 can be prepared by the preparation method provided in the above embodiments. For specific preparation methods, reference can be made to the relevant introduction above.

[0084] Please refer to Figure 16 , Figure 16 which is a schematic structural diagram of a display device provided by an embodiment of the present application. In this embodiment, a display device is provided. The display device includes the light-emitting substrate 300 provided in the above technical solution.

[0085] In a specific embodiment, the light-emitting substrate 300 can be used as a display panel for displaying images.

[0086] In another specific embodiment, the light-emitting substrate 300 can also be used as a lamp board of a backlight assembly; the display device further includes a display panel, and the backlight assembly is disposed opposite to the display panel for providing a surface light source to the display panel. Among them, the display panel can be a liquid crystal display screen or other display screens that require a light source.

[0087] Among them, the display device can be: a Micro LED display panel, a Mini LED display panel, a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, or any product or component with a display function. The display device can be used to display images. The embodiments of the present disclosure do not limit the type of the display device.

[0088] The above are only the embodiments of the present application, and do not limit the patent protection scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be included in the patent protection scope of the present application by the same token.

Claims

1. A semiconductor substrate, comprising: A substrate; A plurality of light-emitting elements, arranged in an array on the substrate; the light-emitting elements include an epitaxial layer, a first electrode, and a second electrode, the epitaxial layer is disposed on one side of the substrate, and the first electrode and the second electrode are disposed on the side of the epitaxial layer away from the substrate; Characterized in that, a plurality of convex platforms distributed in an array are formed on one side surface of the substrate, and a plurality of the light-emitting elements are correspondingly arranged on the convex platforms; An isolation groove is provided between adjacent convex platforms, and in the thickness direction of the substrate, the depth of the isolation groove is greater than the thickness of the epitaxial layer, so that the epitaxial layers on adjacent convex platforms are disconnected at the isolation groove.

2. The semiconductor substrate according to claim 1, wherein The substrate includes a plurality of repeating units distributed in an array, and each repeating unit includes at least two convex platforms with different mesa heights, and at least two convex platforms are distributed in an array.

3. The semiconductor substrate according to claim 2, wherein The mesa height difference between two adjacent convex platforms is greater than the thickness of the epitaxial layer; the included angle between the side wall of the convex platform and the mesa of the adjacent convex platform is less than or equal to 90°; Among the other light-emitting elements except the light-emitting elements on the convex platform with the highest mesa height, the heights of the first electrode and the second electrode are both higher than the highest mesa height.

4. A method for preparing a semiconductor substrate, characterized in that, Including: Providing a substrate; Performing a patterning process on the substrate to form a plurality of convex platforms distributed in an array on one side surface of the substrate, and forming an isolation groove between adjacent convex platforms; Growing an epitaxial layer on the convex platform; wherein, in the thickness direction of the substrate, the depth of the isolation groove is greater than the thickness of the epitaxial layer, so that the epitaxial layers on adjacent convex platforms are disconnected at the isolation groove; Fabricating a first electrode and a second electrode on the epitaxial layer.

5. The manufacturing method of the semiconductor substrate according to claim 4, characterized in that, The step of performing a patterning process on the substrate includes: Performing a stepped patterning process on the substrate to form a plurality of convex platforms in a stepped shape and distributed in an array on the substrate; wherein, a plurality of repeating units distributed in an array are formed on the substrate, and each repeating unit includes at least two convex platforms with different mesa heights, and at least two convex platforms are distributed in an array; the mesa height difference between two adjacent convex platforms is greater than the thickness of the epitaxial layer; the included angle between the side wall of the convex platform and the mesa of the adjacent convex platform is less than or equal to 90°; Performing a groove patterning process on the substrate to form the isolation groove between adjacent convex platforms.

6. The method for preparing a semiconductor substrate according to claim 5, wherein, The epitaxial layer, the first electrode, and the second electrode form a light-emitting element; among the other light-emitting elements except the light-emitting elements on the convex platform with the highest mesa height, the heights of the first electrode and the second electrode are both higher than the highest mesa height.

7. The manufacturing method of the semiconductor substrate according to any one of claims 4-6, characterized in that, The step of growing an epitaxial layer on the convex platform includes: Growing a first epitaxial layer on the convex platform; Fabricating a sacrificial layer in the electrode region on the first epitaxial layer; the electrode region is used for fabricating the first electrode; wherein, the material of the sacrificial layer is different from the material of the epitaxial layer; A second epitaxial layer is grown on the first epitaxial layer and the sacrificial layer; wherein, the thickness of the sacrificial layer is greater than the thickness of the second epitaxial layer; the included angle between the side wall of the sacrificial layer and the surface of the first epitaxial layer away from the substrate is less than or equal to 90°; The sacrificial layer is stripped to remove the sacrificial layer and the second epitaxial layer formed on the sacrificial layer; The step of fabricating the first electrode and the second electrode on the epitaxial layer includes: Fabricating the first electrode on the exposed first epitaxial layer; Fabricating the second electrode on the second epitaxial layer.

8. A method for preparing a light-emitting substrate, characterized in that, Comprising: Providing a driving substrate and a semiconductor substrate; The semiconductor substrate is the semiconductor substrate according to any one of claims 1-3; Transferring the light-emitting elements on the semiconductor substrate to the driving substrate and performing alignment bonding with the driving substrate.

9. The method for preparing the light-emitting substrate according to claim 8, wherein The semiconductor substrate includes a substrate and a light-emitting unit disposed on the substrate; a plurality of the protrusions distributed in an array are formed on one side surface of the substrate, and the plurality of light-emitting elements are respectively disposed on the protrusions; wherein, the substrate includes a plurality of repeating units distributed in an array, each repeating unit includes at least two protrusions with different mesa heights, and at least two of the protrusions are distributed in an array; The step of transferring the light-emitting elements on the semiconductor substrate to the driving substrate and performing alignment bonding with the driving substrate includes: Using the side of the substrate away from the light-emitting elements as the bottom, aligning and bonding the highest light-emitting element with the driving substrate; wherein, the driving substrate includes a driving circuit layer and a plurality of electrode groups disposed on the driving circuit layer; each electrode group includes a first driving electrode and a second driving electrode, which are respectively used for aligning and bonding with the first electrode and the second electrode of the light-emitting element; the distance between any one of the protrusions in the repeating unit and the corresponding protrusion in the adjacent repeating unit at the corresponding position is the transfer distance, and the distance between adjacent two electrode groups is equal to the transfer distance; Peeling the aligned and bonded light-emitting element from the substrate.

10. The method for preparing the light-emitting substrate according to claim 9, wherein Further comprising: Repeating the steps: Aligning and bonding the highest light-emitting element with the driving substrate; Peeling the aligned and bonded light-emitting element from the substrate; The highest point of the highest light-emitting element is lower than the mesa of the highest protrusion. Before the step of aligning and bonding the highest light-emitting element with the driving substrate, it further includes: Performing an etching process on the highest protrusion to reduce the height of the highest protrusion, so that the highest point of the highest light-emitting element is higher than the mesa of the highest protrusion.

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