Active short circuit system and method applied to motor controller

Abstract

The invention discloses an active short-circuit system applied to a motor controller, and the system comprises a bus overvoltage detection circuit which is used for detecting whether the bus voltage is overvoltage; the driving logic circuit is connected with the bus overvoltage detection circuit and is used for directly controlling the inverter circuit to enter a lower bridge arm ASC mode when the bus is overvoltage; the fault clearing signal circuit is used for generating a fault clearing signal, and the fault clearing signal is used for controlling whether the driving logic circuit responds to the bus overvoltage signal or not; when the fault clearing signal is effective, the overvoltage fault signal is shielded, the hardware protection logic is shielded at the moment, and the software protection logic is executed; when the fault clearing signal is invalid, an overvoltage fault occurs, and hardware protection logic is directly entered; the single-chip microcomputer fault detection circuit is used for detecting whether the single-chip microcomputer breaks down or not and triggering the driving logic circuit to enter an ASC mode when the single-chip microcomputer breaks down. According to the invention, the protection capability of the motor controller under various fault conditions is enhanced, and system damage and potential safety hazards caused by faults are avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of motor control, and particularly to an active short - circuit system and method applied to a motor controller, which is applicable to occasions requiring high - safety motor control such as new energy vehicles. Background Art

[0002] With the rapid development of the new energy vehicle market, consumers' requirements for vehicle performance and safety are increasing day by day. As a core component of the power system of new energy vehicles, the reliability and safety of the motor controller are directly related to the overall performance and driving safety of the vehicle. During the operation of the motor, the system may enter an uncontrollable rectification state due to reasons such as power device failures and control algorithm failures. In this state, the permanent magnet synchronous motor will charge the support capacitor through the free - wheeling diode of the power IGBT, causing the DC - side bus voltage to rise. If the voltage reaches the over - voltage threshold, the main relay will be triggered to disconnect for protection, and the relatively high back - electromotive - force voltage may cause over - voltage damage to the power device IGBT. In addition, even if the bus voltage does not reach the threshold, long - term energy feedback will also cause deviation of the braking torque, affecting the performance of the whole vehicle system.

[0003] Existing active short - circuit protection technologies have some deficiencies. For example, CN220985551U only realizes the switching of the upper and lower bridge arms through hardware, but can only enter the lower - bridge - arm ASC mode and cannot cope with the upper - bridge - arm ASC strategy in the case of an upper - bridge - arm short - circuit. CN111106788B relies on software control to enter the ASC safety strategy, detecting faults through software and issuing control instructions. However, once the software has an anomaly or the control chip fails, the system will not be able to respond to fault handling in a timely manner, and software recovery takes time, which may lead to the out - of - control of the motor control system and pose a serious risk to the running motor. Summary of the Invention

[0004] Object of the Invention: The object of the present invention is to provide an active short - circuit system and method applied to a motor controller, enhancing the protection ability of the motor controller in the face of various fault situations, avoiding system damage and safety hazards caused by faults, and meeting the requirements of functional safety for high - safety application occasions such as new energy vehicles.

[0005] Technical Solution: An active short - circuit system applied to a motor controller includes a single - chip microcomputer, a drive chip, and further includes: a bus over - voltage detection circuit for detecting whether the bus voltage is over - voltage;

[0006] A drive logic circuit connected to the bus over - voltage detection circuit for directly controlling the inverter circuit to enter the lower - bridge - arm ASC mode when the bus is over - voltage;

[0007] A fault clearing signal circuit for generating a fault clearing signal, which is used to control whether the drive logic circuit responds to the bus overvoltage signal; when the fault clearing signal is valid, the overvoltage fault signal is masked, and at this time the hardware protection logic is masked and the software protection logic is executed; when the fault clearing signal is invalid, an overvoltage fault occurs and the hardware protection logic is directly entered;

[0008] A single-chip microcomputer fault detection circuit for detecting whether the single-chip microcomputer has a fault and triggering the drive logic circuit to enter the ASC mode when a single-chip microcomputer fault occurs.

[0009] Furthermore, the drive logic circuit includes:

[0010] An input terminal for receiving the bus overvoltage signal;

[0011] An output terminal for outputting a control signal to the lower arm of the inverter circuit;

[0012] A logic control unit that decides whether to output a control signal to turn on the lower arm according to the states of the bus overvoltage signal and the fault clearing signal.

[0013] Furthermore, the fault clearing signal circuit includes:

[0014] A signal generation unit for generating and outputting a fault clearing signal;

[0015] A signal processing unit for processing the fault clearing signal to adapt to the level requirements of the subsequent circuit.

[0016] Furthermore, the single-chip microcomputer fault detection circuit includes:

[0017] A detection unit for detecting the operating state of the single-chip microcomputer;

[0018] A trigger unit for outputting a trigger signal when a single-chip microcomputer fault is detected. If the single-chip microcomputer itself has a fault, the drive circuit directly enters the lower arm ASC.

[0019] Furthermore, the fault clearing signal circuit includes a logic control unit for implementing a specific logical relationship, and the logical relationship is as follows:

[0020] FaultClear is the fault clearing signal. When FaultClear is 1, the overvoltage fault signal is masked. When FaultClear is 0, the single-chip microcomputer sends the M_PWM_SS1 and M_PWM_SS2 signals to the drive circuit. Based on the M_PWM_SS1 and M_PWM_SS2 signals, it is judged whether the single-chip microcomputer has a fault. If the single-chip microcomputer has a fault, the drive circuit directly enters the lower-bridge ASC. If the single-chip microcomputer is working properly, it is judged whether to enter the ASC mode according to whether the bus voltage is overvoltage. If the bus voltage is overvoltage, it directly enters the lower-bridge ASC.

[0021] Furthermore, when the FaultClear signal is 0, the single-chip microcomputer sends the M_PWM_SS1 and M_PWM_SS2 signals to the drive circuit. The further logical relationship is as follows:

[0022] When both M_PWM_SS1 and M_PWM_SS2 are 1, it is judged whether to enter the ASC mode through the overcurrent or overvoltage fault signal. When an overcurrent fault occurs, the IGBT / SIC module will be directly turned off. When an overvoltage fault occurs, it enters the lower-bridge ASC.

[0023] When M_PWM_SS1 is 0 and M_PWM_SS2 is 1, it directly enters the lower-bridge ASC.

[0024] When M_PWM_SS1 is 1 and M_PWM_SS2 is 0, it directly enters the upper-bridge ASC.

[0025] Furthermore, the inverter circuit includes three-phase bridge arms. Each bridge arm includes an upper bridge arm and a lower bridge arm. The upper and lower bridge arms are connected to the output end of the drive logic circuit and are used to turn on the lower bridge arm and turn off the upper bridge arm when receiving a control signal.

[0026] An active short-circuit method applied to a motor controller includes the following steps:

[0027] Detect whether the bus voltage is overvoltage;

[0028] When the bus is overvoltage and the fault clearing signal is invalid, the drive logic circuit directly controls the inverter circuit to enter the lower-bridge ASC mode;

[0029] Detect whether the single-chip microcomputer has a fault. If a fault occurs, trigger the hardware circuit to enter the ASC mode;

[0030] Control the switching state of the inverter circuit according to the PWM signal or M_PWM_SS1 / M_PWM_SS2 signal sent by the single-chip microcomputer.

[0031] Furthermore, the step of controlling the inverter circuit to enter the lower-bridge ASC mode includes:

[0032] The driving logic circuit outputs a control signal to the lower arm of the inverter circuit to turn on the lower arm.

[0033] Ensure that the power tube of the upper arm remains in the cut-off state.

[0034] Further, the step of detecting whether the single-chip microcomputer fails includes:

[0035] Detect the operating state of the single-chip microcomputer, including deadlock and abnormal crystal oscillator signal.

[0036] When a single-chip microcomputer failure is detected, a trigger signal is output to the driving logic circuit to make the circuit enter the ASC mode.

[0037] Beneficial effects: By adding a fault clearing signal and a single-chip microcomputer fault detection circuit, the present invention combines the fast response of hardware protection with the flexibility of software protection. This enables flexible control of the IGBT / SIC switch state according to needs when the single-chip microcomputer is working properly; when the single-chip microcomputer fails, the hardware circuit can quickly take over and enter the ASC mode, effectively avoiding the problem of the motor control system getting out of control due to single-chip microcomputer failure, and enhancing the safety and reliability of the system. In addition, the present invention also realizes flexible control of the hardware entering the ASC logic after bus overvoltage through the fault clearing signal. When the fault clearing signal is valid, the hardware protection logic after bus overvoltage can be masked and the software protection logic can be executed; when the fault clearing signal is invalid, once a bus overvoltage fault occurs, the hardware can directly enter the lower-bridge ASC mode. This design increases the flexibility and controllability of the circuit, can better adapt to different working conditions and fault scenarios, and reduces the interference of unnecessary ASC actions on the system operation. Description of the Drawings

[0038] Figure 1 It is a schematic structural diagram of an active short-circuit system applied to a motor controller;

[0039] Figure 2 It is a flowchart of an active short-circuit method applied to a motor controller;

[0040] Figure 3 It is a schematic diagram of the principle of the single-chip microcomputer fault detection circuit;

[0041] Figure 4 It is a schematic diagram of the principle of the bus overvoltage detection circuit. Detailed Embodiments

[0042] The technical solution of the present invention will be further described below with reference to the drawings.

[0043] As Figure 1As shown in the figure, an active short - circuit system applied to a motor controller includes a single - chip microcomputer and a driver chip, and further includes: a bus over - voltage detection circuit for detecting whether the bus voltage is over - voltage; Figure 4 It is the schematic diagram of the bus over - voltage detection circuit;

[0044] A drive logic circuit, connected to the bus over - voltage detection circuit, is used to directly control the inverter circuit to enter the lower - arm ASC mode when the bus is over - voltage;

[0045] A fault - clearing signal circuit for generating a fault - clearing signal, which is used to control whether the drive logic circuit responds to the bus over - voltage signal; when the fault - clearing signal is valid, the over - voltage fault signal is shielded, and at this time the hardware protection logic is shielded and the software protection logic is executed; when the fault - clearing signal is invalid, an over - voltage fault occurs and directly enters the hardware protection logic;

[0046] A single - chip microcomputer fault detection circuit for detecting whether the single - chip microcomputer fails and triggering the drive logic circuit to enter the ASC mode when the single - chip microcomputer fails. Figure 3 It is the schematic diagram of the single - chip microcomputer fault detection circuit.

[0047] Furthermore, the drive logic circuit includes:

[0048] An input terminal for receiving the bus over - voltage signal;

[0049] An output terminal for outputting a control signal to the lower arm of the inverter circuit;

[0050] A logic control unit that decides whether to output a control signal to turn on the lower arm according to the states of the bus over - voltage signal and the fault - clearing signal.

[0051] Furthermore, the fault - clearing signal circuit includes:

[0052] A signal generation unit for generating and outputting a fault - clearing signal;

[0053] A signal processing unit for processing the fault - clearing signal to adapt to the level requirements of the subsequent circuit.

[0054] Furthermore, the single - chip microcomputer fault detection circuit includes:

[0055] A detection unit for detecting the operating state of the single - chip microcomputer;

[0056] A trigger unit for outputting a trigger signal when the single - chip microcomputer fault is detected. If the single - chip microcomputer itself fails, the drive circuit directly enters the lower - arm ASC.

[0057] Furthermore, the fault - clearing signal circuit includes a logic control unit for implementing a specific logical relationship, and its logical relationship is as follows:

[0058] FaultClear is the fault clearing signal. When FaultClear is 1, the overvoltage fault signal is masked; when FaultClear is 0, the single-chip microcomputer sends the M_PWM_SS1 and M_PWM_SS2 signals to the drive circuit. Combine the M_PWM_SS1 and M_PWM_SS2 signals to determine whether the single-chip microcomputer has a fault. If the single-chip microcomputer has a fault, the drive circuit directly enters the lower-bridge ASC; if the single-chip microcomputer works normally, it is determined whether to enter the ASC mode by whether the bus voltage is overvoltage. If the bus voltage is overvoltage, it directly enters the lower-bridge arm ASC.

[0059] The truth table is shown in Table 1 below:

[0060] FaultClear M_PWM_SS1_Input M_PWM_SS2_Input FaultClear_OUT 1 X X 1 X 0 0 1 X 1 0 1 X 0 1 1 0 1 1 0

[0061] Table 1

[0062] When the FaultClear signal is 1, all fault signal outputs are set to 1, and the faults are masked;

[0063] When M_PWM_SS1 and M_PWM_SS2 are not both 1 at the same time, all fault signal outputs are set to 1, and the faults are masked;

[0064] Only when: the FaultClear signal is 0, M_PWM_SS1 and M_PWM_SS2 are both 1 at the same time, the fault signal is enabled and outputs normally;

[0065] Furthermore, when the FaultClear signal is 0, the single-chip microcomputer sends the M_PWM_SS1 and M_PWM_SS2 signals to the drive circuit. The further logical relationship is as follows:

[0066] When M_PWM_SS1 and M_PWM_SS2 are both 1 at the same time, it is determined whether to enter the ASC mode through the overcurrent or overvoltage fault signal. When an overcurrent fault occurs, the IGBT / SIC module will be directly turned off. When an overvoltage fault occurs, it enters the lower-bridge arm ASC;

[0067] When M_PWM_SS1 is 0 and M_PWM_SS2 is 1, it directly enters the lower-bridge arm ASC;

[0068] When M_PWM_SS1 is 1 and M_PWM_SS2 is 0, it directly enters the upper-bridge arm ASC.

[0069] Under normal working conditions, the FaultClear signal is 0, and the M_PWM_SS1 and M_PWM_SS2 signals are both 1 at the same time. There is the following logical relationship:

[0070]

[0071] Table 2

[0072] Note: In all logics, 1 represents high level and normal signal, and 0 represents low level and fault signal.

[0073] Further, the inverter circuit includes three-phase bridge arms, each bridge arm includes an upper bridge arm and a lower bridge arm, wherein the upper and lower bridge arms are connected to the output end of the driving logic circuit, and are used to turn on the lower bridge arm and turn off the upper bridge arm when receiving a control signal.

[0074] Embodiment 2:

[0075] As Figure 2 shown, an active short-circuit method applied to a motor controller includes the following steps:

[0076] Detect whether the bus voltage is overvoltage;

[0077] When the bus is overvoltage and the fault clearing signal is invalid, the driving logic circuit directly controls the inverter circuit to enter the lower-bridge-arm ASC mode;

[0078] Detect whether the single-chip microcomputer fails. If a failure occurs, trigger the hardware circuit to enter the ASC mode;

[0079] Control the switching state of the inverter circuit according to the PWM signal or M_PWM_SS1 / M_PWM_SS2 signal sent by the single-chip microcomputer.

[0080] Further, the step of controlling the inverter circuit to enter the lower-bridge-arm ASC mode includes:

[0081] The driving logic circuit outputs a control signal to the lower bridge arm of the inverter circuit to turn on the lower bridge arm;

[0082] Ensure that the power tube of the upper bridge arm remains in the cut-off state.

[0083] Further, the step of detecting whether the single-chip microcomputer fails includes:

[0084] Detect the operating state of the single-chip microcomputer, including deadlock and abnormal crystal oscillator signal;

[0085] When a single-chip microcomputer failure is detected, output a trigger signal to the driving logic circuit to make the circuit enter the ASC mode.

Claims

1. An active short - circuit system applied to a motor controller, including a single - chip microcomputer and a driving chip, is characterized in that, It further includes: A bus overvoltage detection circuit for detecting whether the bus voltage is overvoltage; A drive logic circuit connected to the bus overvoltage detection circuit for directly controlling the inverter circuit to enter the lower-bridge-arm ASC mode when the bus is overvoltage; A fault clearing signal circuit for generating a fault clearing signal, which is used to control whether the drive logic circuit responds to the bus overvoltage signal; when the fault clearing signal is valid, the overvoltage fault signal is masked, and at this time the hardware protection logic is masked and the software protection logic is executed; when the fault clearing signal is invalid, an overvoltage fault occurs and the hardware protection logic is directly entered; A single-chip microcomputer fault detection circuit for detecting whether the single-chip microcomputer fails and triggering the drive logic circuit to enter the ASC mode when the single-chip microcomputer fails.

2. The active short-circuit system applied to a motor controller according to claim 1, wherein, The drive logic circuit includes: An input terminal for receiving the bus overvoltage signal; An output terminal for outputting a control signal to the lower bridge arm of the inverter circuit; A logic control unit that decides whether to output a control signal to turn on the lower bridge arm according to the states of the bus overvoltage signal and the fault clearing signal.

3. The active short - circuit system applied to a motor controller according to claim 1, characterized in that, The fault clearing signal circuit includes: A signal generation unit for generating and outputting a fault clearing signal; A signal processing unit for processing the fault clearing signal to adapt to the level requirements of the subsequent circuit.

4. The active short - circuit system applied to a motor controller according to claim 1, characterized in that, The single-chip microcomputer fault detection circuit includes: A detection unit for detecting the operating state of the single-chip microcomputer; A trigger unit for outputting a trigger signal when a single-chip microcomputer fault is detected. If the single-chip microcomputer itself fails, the drive circuit directly enters the lower-bridge-arm ASC.

5. The active short - circuit system applied to a motor controller according to claim 1, wherein, The fault clearing signal circuit includes a logic control unit for implementing a specific logical relationship, and the logical relationship is as follows: FaultClear is the fault clearing signal. When FaultClear is 1, the overvoltage fault signal is masked; when FaultClear is 0, the M_PWM_SS1 and M_PWM_SS2 signals are sent to the drive circuit by the single-chip microcomputer; the M_PWM_SS1 and M_PWM_SS2 signals are combined to judge whether the single-chip microcomputer fails. If the single-chip microcomputer fails, the drive circuit directly enters the lower-bridge ASC; if the single-chip microcomputer works normally, it is judged whether to enter the ASC mode according to whether the bus voltage is overvoltage. If the bus voltage is overvoltage, it directly enters the lower-bridge-arm ASC.

6. The active short - circuit system applied to a motor controller according to claim 5, characterized in that, When the FaultClear signal is 0, the M_PWM_SS1 and M_PWM_SS2 signals are sent to the drive circuit by the single-chip microcomputer; the further logical relationship is as follows: When M_PWM_SS1 and M_PWM_SS2 are both 1, it is judged whether to enter the ASC mode through the overcurrent or overvoltage fault signal. When an overcurrent fault occurs, the IGBT / SIC module will be directly turned off. When an overvoltage fault occurs, it enters the lower-bridge-arm ASC; When M_PWM_SS1 is 0 and M_PWM_SS2 is 1, it directly enters the lower-bridge-arm ASC; When M_PWM_SS1 is 1 and M_PWM_SS2 is 0, it directly enters the upper-bridge-arm ASC.

7. The active short - circuit system applied to a motor controller according to claim 1, wherein, The inverter circuit includes three-phase bridge arms, each bridge arm includes an upper bridge arm and a lower bridge arm, wherein the upper and lower bridge arms are connected to the output end of the drive logic circuit and are used to turn on the lower bridge arm and turn off the upper bridge arm when receiving a control signal.

8. An active short - circuit method applied to a motor controller, characterized in that, It includes the following steps: Detect whether the bus voltage is overvoltage; When the bus is overvoltage and the fault clearing signal is invalid, the drive logic circuit directly controls the inverter circuit to enter the lower bridge arm ASC mode; Detect whether the single-chip microcomputer fails. If a failure occurs, trigger the hardware circuit to enter the ASC mode; Control the switching state of the inverter circuit according to the PWM signal or M_PWM_SS1 / M_PWM_SS2 signal sent by the single-chip microcomputer.

9. The active short - circuit method applied to a motor controller according to claim 8, characterized in that, The steps of controlling the inverter circuit to enter the lower bridge arm ASC mode include: The drive logic circuit outputs a control signal to the lower bridge arm of the inverter circuit to turn on the lower bridge arm; Ensure that the power tube of the upper bridge arm remains in the cut-off state.

10. The active short - circuit method applied to a motor controller according to claim 8, wherein, The steps of detecting whether the single-chip microcomputer fails include: Detect the operating state of the single-chip microcomputer, including deadlock and abnormal crystal oscillator signal; When a single-chip microcomputer failure is detected, output a trigger signal to the drive logic circuit to make the circuit enter the ASC mode.

Images