Method and device for rapid equalization of interphase state of charge of high-voltage direct-mounted energy storage system

By calculating the three-phase voltage and SOC deviation dynamically adjusting the zero-sequence current injection into PCS, the phase-to-phase charge state equalization of the high-voltage direct-mounted energy storage system is achieved, which solves the problems of slow equalization speed and unstable control accuracy in the existing technology, and improves system performance and safety.

CN120320459BActive Publication Date: 2025-08-15HUNAN UNIV
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Patent Information

Application Number
CN202510816297.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-06-18
Publication Date
2025-08-15
Estimated Expiration
2045-06-18

AI Technical Summary

Technical Problem

The existing software equalization method has problems in high-voltage direct-hook chain energy storage systems with slow balance speed, unstable control accuracy, and difficulty in meeting the multi-objective optimization needs. Especially when the initial SOC is unbalanced, the adjustment capacity is insufficient, which may violate the power quality standards.

Method used

By obtaining the positive and negative sequence components of the three-phase voltage and the SOC deviation between phases, calculate the active and reactive components of the zero-sequence current, judge the conditions in real time and enter different modes, dynamically adjust the zero-sequence current injection into PCS, and achieve fast equalization of the interphase charge state.

Benefits of technology

While ensuring safe operation, it greatly improves the equilibrium speed, solves the problem of sudden zero-sequence current, ensures system stability and power quality, reduces the cost of the entire life cycle, and is suitable for energy storage systems in weak grid environments.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a method and device for rapid balancing of the inter-phase state of charge of a high-voltage direct-mounted energy storage system. The method includes: obtaining the active and reactive components of the zero-sequence current in each phase; obtaining the system's external active and reactive current command values in real time; judging whether a first condition is met; if so, entering the second mode, otherwise operating the first mode; the first condition includes that the absolute value of the maximum value of the SOC deviation between the three phases is less than or equal to a preset threshold; the first mode includes: continuously obtaining the zero-sequence current adjustment factor of each phase according to the preset phase current maximum threshold, the current command value and the active and reactive components of the zero-sequence current in each phase, and selecting the real-time minimum value of the zero-sequence current adjustment factor of each phase as the real-time adjustment factor; multiplying the real-time adjustment factor with the zero-sequence current and injecting it into the PCS; the second mode includes: multiplying the real-time adjustment factor at the moment of entering the second mode with the zero-sequence current and injecting it into the PCS; when the current command value changes, entering the first mode.
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Description

Technical Field

[0001] The present invention relates to the field of battery energy storage conversion technology, and in particular to a method and device for quickly balancing the inter-phase state of charge of a high-voltage direct-mounted energy storage system. Background Art

[0002] With the rapid development of new power systems, the grid's demand for high-performance battery energy storage is steadily increasing. Battery energy storage systems primarily consist of batteries, a battery management system, a power conversion system (PCS), and a monitoring and management system. Due to differences in switching devices between modules within the battery energy storage system, inconsistent battery cell manufacturing processes, and power imbalances, variations in the state of charge (SOC) of battery packs in each phase of the battery energy storage system can gradually increase during PCS operation, reducing the actual usable capacity of the energy storage units. Therefore, controlling the SOC balance between phases of the energy storage system is particularly important.

[0003] Existing SOC balancing technologies primarily include hardware balancing and software balancing. Hardware balancing primarily achieves energy dissipation or transfer through the addition of external hardware balancing circuits. While this method offers good balancing results, it increases system cost and size, resulting in low system efficiency. Furthermore, the control becomes more complex, reducing system reliability. Software balancing, which requires no additional hardware or cost, is widely used. It uses a control algorithm to redistribute power among the various submodule battery packs, thereby aligning the SOC of all battery packs. However, while existing software balancing methods avoid additional hardware costs, they still face significant technical limitations in practical applications. On the one hand, traditional methods, such as zero-sequence voltage injection, while simple to implement, suffer from the inherent drawback of slow balancing speed. In particular, their regulation capability is insufficient when initial SOC imbalances are large, potentially violating power quality standards in grid-connected applications. On the other hand, most existing algorithms assume the idealized uniformity of battery capacity. When inconsistent capacity decay occurs during actual battery pack operation, the balancing effect of conventional proportional coefficient control strategies is significantly degraded. These limitations mean that existing software balancing methods often need to compromise between balancing speed and control accuracy and stability when dealing with actual engineering scenarios such as large-scale energy storage systems, highly dynamic operating conditions, and battery aging, making it difficult to simultaneously meet multi-objective optimization requirements.

[0004] Therefore, a new technical solution is urgently needed to solve the technical problem of how to balance the SOC of battery packs between phases of a dynamically operating high-voltage direct-chain energy storage system. Summary of the Invention

[0005] The present invention provides a method and device for quickly balancing the state of charge between phases of a high-voltage direct-hung energy storage system, which is used to solve the technical problem of how to balance the SOC of battery packs between phases of a dynamically operating high-voltage direct-hung chain energy storage system.

[0006] To achieve the above objectives, the present invention provides a method for rapidly balancing the inter-phase state of charge of a high-voltage direct-mounted energy storage system, comprising:

[0007] The zero-sequence current active and reactive components are obtained according to the positive and negative sequence components of the three-phase voltage, the SOC deviation between the ab phase and the SOC deviation between the bc phase; the zero-sequence current is obtained according to the active and reactive components of the zero-sequence current;

[0008] Obtain the active and reactive components of the zero-sequence current in each phase based on the zero-sequence current; obtain the system's external active and reactive current command values in real time; determine in real time whether a first condition is met; if the first condition is met, enter the second mode; otherwise, operate in the first mode; the first condition includes the absolute value of the maximum SOC deviation between the three phases being less than or equal to a preset threshold;

[0009] The first mode includes: continuously obtaining the zero-sequence current adjustment factor of each phase based on the preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase, and selecting the real-time minimum value among the zero-sequence current adjustment factors of each phase as the real-time adjustment factor; multiplying the real-time adjustment factor by the zero-sequence current and injecting the resultant value into the PCS;

[0010] The second mode includes: multiplying the real-time adjustment factor at the moment of entering the second mode by the zero-sequence current and injecting the resultant into the PCS; and entering the first mode when the current command value changes.

[0011] Preferably, obtaining the zero-sequence current active and reactive components according to the positive and negative sequence components of the three-phase voltage, the SOC deviation between the ab phase and the SOC deviation between the bc phase; obtaining the zero-sequence current according to the active and reactive components of the zero-sequence current includes:

[0012] Obtain the positive and negative sequence components of the three-phase voltage and the SOC deviation between phases ab and bc; obtain the zero-sequence current active and reactive components and solve the equation group based on the positive and negative sequence components of the three-phase voltage, the zero-sequence current calculation formula, and the control target of phase SOC balance;

[0013] The equations for solving the active and reactive components of zero-sequence current include about and The expression of The expression for inter-phase SOC deviation is: It represents the active power generated by the zero-sequence current in phase x, x=ab,bc,ca; Represents the reactive component of zero-sequence current, Indicates the active component of zero-sequence current;

[0014] Solve the equations based on the active and reactive components of the zero-sequence current and the SOC deviation between the ab phase and the SOC deviation between the bc phase to obtain the reactive component of the zero-sequence current and the active component of the zero-sequence current ; According to the reactive component of zero sequence current , active component of zero-sequence current The zero-sequence current is obtained by the zero-sequence current calculation formula.

[0015] Preferably, obtaining the positive and negative sequence components of the three-phase voltage and the SOC deviation between the ab phase and the SOC deviation between the bc phase includes:

[0016] Obtain the grid voltage and filter it to get the grid voltage and ; Get the grid voltage Phase ;

[0017] According to the phase right , and Perform positive and negative sequence dq transformation to obtain the positive and negative sequence components of the three-phase voltage;

[0018] The positive and negative sequence components of the three-phase voltage include the positive sequence active voltage amplitude , positive sequence reactive voltage amplitude , negative sequence active voltage amplitude and negative sequence reactive voltage amplitude ,include:

[0019] ;

[0020] ;

[0021] in, It represents a notch filter used to filter out the double frequency component generated by the negative sequence voltage; It represents a notch filter used to filter out the double frequency component generated by the positive sequence voltage;

[0022] Obtaining the SOC deviation between the ab phase and the SOC deviation between the bc phase includes:

[0023] ;

[0024] ;

[0025] in, represents the SOC deviation between phases x; Indicates the SOC value of phase x; Represents the average value of three-phase SOC; x=ab,bc,ca.

[0026] Preferably, the zero-sequence current active and reactive components are obtained according to the three-phase voltage positive and negative sequence components, the zero-sequence current calculation formula, and the control target of inter-phase SOC balance to solve the equation group, which includes:

[0027] According to the positive and negative sequence components and phase of the three-phase voltage get , and The expression is:

[0028] ;

[0029] according to and The expression and zero sequence current calculation formula are obtained about and The expression:

[0030] ;

[0031] ;

[0032] The control target of inter-phase SOC balance is If it is zero, then there is The expression of inter-phase SOC deviation is:

[0033] ;

[0034] in, Indicates the inter-phase SOC balancing coefficient, which determines the balancing speed and takes a constant value according to the capacity; Indicates zero-sequence current.

[0035] Preferably, the zero-sequence current reactive component is obtained by solving the equations for the active and reactive components of the zero-sequence current and the SOC deviation between the ab phase and the SOC deviation between the bc phase. and the active component of the zero-sequence current ; According to the reactive component of zero sequence current , active component of zero-sequence current The zero-sequence current calculation formula includes:

[0036] Zero-sequence current reactive component and the active component of the zero-sequence current include:

[0037] ;

[0038] According to the active component of zero sequence current and the reactive component of zero-sequence current Combined with the zero-sequence current calculation formula, the zero-sequence current can be obtained .

[0039] Preferably, obtaining the active and reactive components of the zero-sequence current in each phase according to the zero-sequence current includes:

[0040] The zero sequence current Decompose in each phase to get the zero sequence current Active component in phase x and reactive components :

[0041] Zero-sequence current Components in the ab phase:

[0042] ;

[0043] Zero-sequence current Component in bc phase:

[0044] ;

[0045] Zero-sequence current Component in ca phase:

[0046] ;

[0047] in, Indicates grid voltage Phase; Indicates grid voltage phase.

[0048] Preferably, continuously obtaining the zero-sequence current adjustment factor of each phase according to the preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase includes:

[0049] The current command amplitude of each phase is obtained according to the current command value and the active and reactive components of the zero-sequence current in each phase. Regarding the expression of the zero-sequence current regulation factor; assuming that the maximum threshold of the converter phase current is preset to be ,in is the proportional coefficient used to retain the preset current safety margin. is the phase current limit value; the current command amplitude of each phase Should be less than or equal to , so establish The expression of zero-sequence current regulation factor and The inequality between them is solved by taking the equal sign to obtain the zero-sequence current regulation factor of each phase;

[0050] Continuously calculating the corresponding zero-sequence current adjustment factors, that is, continuously obtaining the zero-sequence current adjustment factors of each phase.

[0051] Preferably, the current command amplitude of each phase is obtained according to the current command value and the active and reactive components of the zero-sequence current in each phase. The expressions for the zero-sequence current regulation factor include:

[0052] The zero-sequence current regulation factor is defined as ,Will and zero sequence current After multiplication, the new zero-sequence current for injection into PCS is obtained , expressed as:

[0053] ;

[0054] in, Indicates the phase of the x-phase grid voltage;

[0055] Active component in phase x and reactive components for:

[0056] ;

[0057] but It can be expressed based on the x phase as:

[0058] ;

[0059] Total current command Expressed as:

[0060] ;

[0061] in, and They represent the external active current command value and external reactive current command value of phase x respectively.

[0062] According to the total current command and The active and reactive components of the x-phase current command amplitudes are obtained. :

[0063] ;

[0064] Preferably, establish The expression of zero sequence current regulation factor and The inequality between them is solved by taking the equal sign, and the zero-sequence current adjustment factors of each phase are obtained:

[0065] Inequalities include:

[0066] ;

[0067] The zero-sequence current adjustment factor that meets the requirements of each phase is obtained , recorded as ; If you need to make all three phases meet , The value of should be The intersection of The expression of has similarity, let Take the equal sign and calculate Two different real number solutions of and :

[0068] ;

[0069] ;

[0070] in, An intermediate amount.

[0071] The value range of is:

[0072] ;

[0073] Considering that the SOC balancing speed is positively correlated with the power of zero-sequence current transfer, the injected The larger the value, the faster the SOC balancing speed. When the maximum value allowed is reached under the current limiting constraint, the inter-phase SOC balancing speed also reaches the fastest under the current limiting constraint. At this time, the amplitude limit is equalized, which satisfies:

[0074] ;

[0075] Then the zero-sequence current regulation factor of each phase is obtained The value should be:

[0076] ;

[0077] The present invention also provides a phase-to-phase state of charge rapid equalization device for a high-voltage direct-mounted energy storage system, which is used in the method of the present invention. The device includes a first module, a second module, and a third module;

[0078] The first module is used to obtain the zero-sequence current active and reactive components according to the positive and negative sequence components of the three-phase voltage, the SOC deviation between the ab phase and the SOC deviation between the bc phase; and obtain the zero-sequence current according to the active and reactive components of the zero-sequence current;

[0079] The second module is used to obtain the active and reactive components of the zero-sequence current in each phase according to the zero-sequence current; and obtain the current command values of the system's external active and reactive power in real time;

[0080] The third module is used to determine in real time whether the first condition is met; when the first condition is met, the second mode is entered; otherwise, the first mode is operated; the first condition includes that the absolute value of the maximum value of the SOC deviation between the three phases is less than or equal to a preset threshold;

[0081] The first mode includes: continuously obtaining the zero-sequence current adjustment factor of each phase based on the preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase, and selecting the real-time minimum value among the zero-sequence current adjustment factors of each phase as the real-time adjustment factor; multiplying the real-time adjustment factor by the zero-sequence current and injecting the resultant value into the PCS;

[0082] The second mode includes: multiplying the real-time adjustment factor at the moment of entering the second mode by the zero-sequence current and injecting the resultant into the PCS; and entering the first mode when the current command value changes.

[0083] The present invention has the following beneficial effects:

[0084] The method for rapid balancing of the inter-phase state of charge of the high-voltage direct-mounted energy storage system of the present invention calculates the optimal adjustment factor value under the current limit of each phase in real time, thereby greatly improving the balancing speed while ensuring safe operation. In response to the problem of zero-sequence current mutation at the end of balancing, a smooth transition strategy is introduced in the second mode. Instead of simply pursuing the maximization of the balancing speed, the zero-sequence current is continuously reduced as the inter-phase SOC deviation is reduced. By gradually slowing down the balancing speed, frequent changes in the zero-sequence current are avoided, and a smooth transition of the zero-sequence current is achieved, thereby ensuring current limiting and system stability, which are more important indicators than the balancing speed. In this method, the first mode realizes the dynamic maximization of the SOC balancing speed. The zero-sequence current in the first mode is smoothly reduced, ensuring the stability of the system at the end of balancing.

[0085] This invention achieves active three-phase power redistribution by dynamically adjusting zero-sequence current injection. Based on an adaptive adjustment mechanism for SOC deviation, it ensures rapid interphase SOC balancing of the energy storage system under strict current limiting constraints. This invention enables rapid dynamic balancing across the full range of SOC imbalances, improving system performance and safety, significantly reducing lifecycle costs, and increasing return on investment. It can be applied to energy storage systems in weak grid environments, offering outstanding advantages such as precise current limiting, rapid balancing, excellent power quality, and robust stability.

[0086] The inter-phase state of charge rapid equalization device of the high-voltage direct-mounted energy storage system of the present invention is used in the method of the present invention and has the same beneficial effects as the method of the present invention.

[0087] In addition to the above-described objects, features and advantages, the present invention has other objects, features and advantages. The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0088] The accompanying drawings, which constitute part of the present invention, are provided to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are provided to explain the present invention and do not constitute an undue limitation of the present invention. In the accompanying drawings:

[0089] Figure 1 It is a topological diagram of a high-voltage direct-chain energy storage system according to a preferred embodiment of the present invention.

[0090] Figure 2 It is a schematic diagram of a method flow of a preferred embodiment of the present invention.

[0091] Figure 3 It is a method control block diagram of a preferred embodiment of the present invention.

[0092] Figure 4 3 is a schematic diagram of current waveform comparison between the conventional control strategy and the control strategy of the present invention when the SOC imbalance is large in a preferred embodiment of the present invention.

[0093] Figure 5 3. It is a schematic diagram of SOC comparison waveforms of the traditional control strategy and the control strategy of the present invention when the SOC imbalance is large in the preferred embodiment of the present invention.

[0094] Figure 6 3 is a schematic diagram of current waveform comparison between the traditional control strategy and the control strategy of the present invention when the SOC imbalance is small in a preferred embodiment of the present invention.

[0095] Figure 7 3 is a schematic diagram of SOC waveform comparison between the traditional control strategy and the control strategy of the present invention when the SOC imbalance degree is small in the preferred embodiment of the present invention.

[0096] Figure 8 3 is a schematic diagram of current waveform comparison before and after the control strategy of the method of the present invention is added when the three-phase current is asymmetric in a preferred embodiment of the present invention.

[0097] Figure 9 3. It is a schematic diagram of SOC comparison waveforms before and after the control strategy of the method of the present invention is added when the three-phase current is asymmetric in a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0098] The embodiments of the present invention are described in detail below with reference to the accompanying drawings. However, the present invention can be implemented in many different ways as defined and covered by the claims.

[0099] See also Figure 1The high voltage direct chain energy storage system of the present invention includes an AC filter inductor , fuses, contactors and n H-bridge power conversion units; the H-bridge power conversion unit includes a DC side inductor, an energy storage battery, a full-bridge converter and a DC side capacitor, wherein the DC side positive pole of the full-bridge converter is sequentially connected in series with the DC side inductor and the energy storage battery and then connected to the DC side negative pole of the full-bridge converter, and the DC side capacitor is connected in parallel to the DC side poles of the full-bridge converter; the AC side of the n H-bridge power conversion units is cascaded into a PCS chain link, and the PCS chain links of each phase are sequentially connected in a delta connection manner; each phase PCS chain link is connected through an AC filter inductor , fuses and contactors are connected to the medium and high voltage power grid in a conductive state.

[0100] exist Figure 1 middle, Represents the nth H-bridge power conversion unit; is the grid voltage; is the PCS link phase current;

[0101] ;

[0102] Wherein, x=ab, bc, ca, respectively represent ab phase, bc phase, ca phase; and Respectively and The amplitude of Indicates the phase of the x-phase grid voltage; Indicates the PCS link phase current relative to the grid voltage phase.

[0103] See also Figures 2 to 3 In a preferred embodiment of the present invention, a method for rapidly balancing the inter-phase state of charge of a high-voltage direct-mounted energy storage system is provided, comprising:

[0104] S1: Obtain the zero-sequence current active and reactive components based on the positive and negative sequence components of the three-phase voltage, the SOC deviation between phases a and b, and the SOC deviation between phases b and c; and obtain the zero-sequence current based on the active and reactive components of the zero-sequence current. S1 specifically includes:

[0105] The positive and negative sequence components of the three-phase voltage and the SOC deviation between the ab phase and the bc phase are obtained; the zero-sequence current active and reactive components are solved according to the control target of the three-phase voltage positive and negative sequence components, the zero-sequence current calculation formula and the phase SOC balance.

[0106] The equations for solving the active and reactive components of zero-sequence current include about and The expression of The expression for inter-phase SOC deviation is: It represents the active power generated by the zero-sequence current in phase x, x=ab,bc,ca; Represents the reactive component of zero-sequence current, Represents the active component of zero-sequence current.

[0107] In a preferred embodiment of the present invention, obtaining the positive and negative sequence components of the three-phase voltage and the SOC deviation between the ab phase and the SOC deviation between the bc phase includes:

[0108] Obtain the grid voltage and filter it to get the grid voltage and ; Get the grid voltage Phase ;

[0109] According to the phase right and Perform positive and negative sequence dq transformation to obtain the positive and negative sequence components of the three-phase voltage;

[0110] The positive and negative sequence components of the three-phase voltage include the positive sequence active voltage amplitude , positive sequence reactive voltage amplitude , negative sequence active voltage amplitude and negative sequence reactive voltage amplitude ,include:

[0111] ;

[0112] ;

[0113] in, It represents a notch filter used to filter out the double frequency component generated by the negative sequence voltage; It represents a notch filter used to filter out the double frequency component generated by the positive sequence voltage;

[0114] Obtaining the SOC deviation between the ab phase and the SOC deviation between the bc phase includes:

[0115] ;

[0116] ;

[0117] in, represents the SOC deviation between phases x; Indicates the SOC value of phase x; Represents the average value of three-phase SOC; x=ab,bc,ca.

[0118] In a preferred embodiment of the present invention, the zero-sequence current active and reactive components are obtained based on the three-phase voltage positive and negative sequence components, the zero-sequence current calculation formula, and the control target of inter-phase SOC balance to solve the equation group, including:

[0119] According to the positive and negative sequence components and phase of the three-phase voltage get and The expression is:

[0120] ;

[0121] according to and The expression and zero sequence current calculation formula are obtained about and The expression:

[0122] ;

[0123] ;

[0124] The control target of inter-phase SOC balance is If it is zero, then there is The expression of inter-phase SOC deviation is:

[0125] ;

[0126] in, Indicates the inter-phase SOC balancing coefficient, which determines the balancing speed and takes a constant value according to the capacity; Indicates zero-sequence current.

[0127] Solve the equations based on the active and reactive components of the zero-sequence current and the SOC deviation between the ab phase and the SOC deviation between the bc phase to obtain the reactive component of the zero-sequence current and the active component of the zero-sequence current ; According to the reactive component of zero sequence current , active component of zero-sequence current The zero-sequence current is obtained by the zero-sequence current calculation formula.

[0128] Zero-sequence current reactive component and the active component of the zero-sequence current Specifically include:

[0129] ;

[0130] S2. Obtain the active and reactive components of the zero-sequence current in each phase based on the zero-sequence current. S2 specifically includes:

[0131] The zero sequence current Decompose in each phase to get the zero sequence current Active component in phase x and reactive components :

[0132] Zero-sequence current Components in the ab phase:

[0133] ;

[0134] Zero-sequence current Component in bc phase:

[0135] ;

[0136] Zero-sequence current Component in ca phase:

[0137] ;

[0138] in, Indicates grid voltage Phase; Indicates grid voltage The phase information of each phase is obtained independently by a single-phase phase-locked loop.

[0139] S3. Real-time acquisition of the system's external active and reactive current command values; real-time determination of whether the first condition is met; when the first condition is met, entering the second mode, otherwise operating the first mode; the first condition includes the absolute value of the maximum value of the inter-phase SOC deviation being less than or equal to a preset threshold.

[0140] The first condition can be expressed as: .

[0141] The first mode includes: continuously obtaining the zero-sequence current adjustment factor of each phase based on the preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase, and selecting the real-time minimum value among the zero-sequence current adjustment factors of each phase as the real-time adjustment factor; multiplying the real-time adjustment factor by the zero-sequence current and injecting the resultant value into the PCS;

[0142] The second mode includes: multiplying the real-time adjustment factor at the moment of entering the second mode by the zero-sequence current and injecting the resultant into the PCS; and entering the first mode when the current command value changes.

[0143] In a preferred embodiment of the present invention, the first mode is Figure 3 The second mode is the non-equilibrium end part of Figure 3 In the second mode, i.e. the end of the equilibrium period, the pursuit of maximizing the equilibrium speed is no longer sufficient, but the zero-sequence current is made to follow the equilibrium speed. By gradually slowing down the balancing speed, frequent changes in zero-sequence current can be avoided, and a smooth transition of zero-sequence current can be achieved, thereby ensuring current limiting and system stability, which are more important indicators than the balancing speed.

[0144] In a preferred embodiment of the present invention, continuously obtaining the zero-sequence current adjustment factor of each phase according to the preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase includes:

[0145] The current command amplitude of each phase is obtained according to the current command value and the active and reactive components of the zero-sequence current in each phase. Regarding the expression of the zero-sequence current regulation factor; assuming that the maximum threshold of the converter phase current is preset to be ,in is the proportional coefficient used to retain the preset current safety margin. is the phase current limit value; the current command amplitude of each phase Should be less than or equal to , so establish The expression of zero sequence current regulation factor and The inequality between them is solved by taking the equal sign to obtain the zero-sequence current adjustment factor of each phase. Specifically including:

[0146] The zero-sequence current regulation factor is defined as ,Will and zero sequence current After multiplication, the new zero-sequence current for injection into PCS is obtained , expressed as:

[0147] ;

[0148] in, Indicates the phase of the x-phase grid voltage;

[0149] Active component in phase x and reactive components for:

[0150] ;

[0151] but It can be expressed based on the x phase as:

[0152] ;

[0153] Total current command Expressed as:

[0154] ;

[0155] in, and They represent the external active current command value and external reactive current command value of phase x respectively.

[0156] According to the total current command and The active and reactive components of the x-phase current command amplitudes are obtained. :

[0157] ;

[0158] Assume that the preset maximum threshold of the converter phase current is , each phase current command amplitude Should be less than or equal to , so establish The expression of zero sequence current regulation factor and The inequality between:

[0159] ;

[0160] The zero-sequence current adjustment factor that meets the requirements of each phase is obtained , recorded as ; If you need to make all three phases meet , The value of should be The intersection of The expression of has similarity, let Take the equal sign and calculate Two different real number solutions of and :

[0161] ;

[0162] ;

[0163] in, An intermediate amount.

[0164] The value range of is:

[0165] ;

[0166] Considering that the SOC balancing speed is positively correlated with the power of zero-sequence current transfer, the injected The larger the value, the faster the SOC balancing speed. When the maximum value allowed is reached under the current limiting constraint, the inter-phase SOC balancing speed also reaches the fastest under the current limiting constraint. At this time, the amplitude limit is equalized, which satisfies:

[0167] ;

[0168] Then the zero-sequence current regulation factor of each phase is obtained The value should be:

[0169] ;

[0170] Continuously calculating the corresponding zero-sequence current adjustment factors, that is, continuously obtaining the zero-sequence current adjustment factors of each phase.

[0171] The method for rapid balancing of the inter-phase state of charge of the high-voltage direct-mounted energy storage system of the present invention calculates the optimal adjustment factor value under the current limit of each phase in real time, thereby greatly improving the balancing speed while ensuring safe operation. In response to the problem of zero-sequence current mutation at the end of balancing, a smooth transition strategy is introduced in the second mode. Instead of simply pursuing the maximization of the balancing speed, the zero-sequence current is continuously reduced as the inter-phase SOC deviation is reduced. By gradually slowing down the balancing speed, frequent changes in the zero-sequence current are avoided, and a smooth transition of the zero-sequence current is achieved, thereby ensuring current limiting and system stability, which are more important indicators than the balancing speed. In this method, the first mode realizes the dynamic maximization of the SOC balancing speed. The zero-sequence current in the first mode is smoothly reduced, ensuring the stability of the system at the end of balancing.

[0172] This invention achieves active three-phase power redistribution by dynamically adjusting zero-sequence current injection. Based on an adaptive adjustment mechanism for SOC deviation, it ensures rapid interphase SOC balancing of the energy storage system under strict current limiting constraints. This invention enables rapid dynamic balancing across the full range of SOC imbalances, improving system performance and safety, significantly reducing lifecycle costs, and increasing return on investment. It can be applied to energy storage systems in weak grid environments, offering outstanding advantages such as precise current limiting, rapid balancing, excellent power quality, and robust stability.

[0173] The method of the present invention adjusts the power allocation coefficient in real time based on the SOC differences between the battery packs of each phase. This effectively addresses the slow balancing speed and deteriorating power quality issues of traditional methods, ensuring efficient energy balancing among the three-phase battery packs. Furthermore, the method of the present invention avoids system stability issues and grid pollution, and its control structure is simple and reliable, making it easier to implement in actual energy storage systems and achieving faster response times.

[0174] The method of the present invention introduces the zero-sequence current adjustment factor Dynamically adjust the zero-sequence current to avoid the inter-phase SOC balance coefficient The method of the present invention does not need to add power Limiting is performed to avoid the impact of limiting on the zero-sequence current phase. The internal and external current instructions and current limiting constraints are comprehensively considered, thereby solving the overcurrent problem caused by the lack of current limiting mechanism for zero-sequence current and the independence of internal and external current instructions. The zero-sequence current can also be dynamically adjusted according to the external current instruction and the current limiting value, thereby dynamically achieving the maximization of the equilibrium speed within the current limiting constraint on the basis of giving priority to the response to the external current instruction.

[0175] In a preferred embodiment of the present invention, a device for rapid equalization of interphase state of charge of a high-voltage direct-mounted energy storage system is provided, which is used in the method of the present invention, and is characterized in that the device includes a first module, a second module and a third module;

[0176] The first module is used to obtain the zero-sequence current active and reactive components according to the positive and negative sequence components of the three-phase voltage, the SOC deviation between the ab phase and the SOC deviation between the bc phase; and obtain the zero-sequence current according to the active and reactive components of the zero-sequence current;

[0177] The second module is used to obtain the active and reactive components of the zero-sequence current in each phase according to the zero-sequence current; and obtain the current command values of the system's external active and reactive power in real time;

[0178] The third module is used to determine in real time whether the first condition is met; when the first condition is met, the second mode is entered; otherwise, the first mode is operated; the first condition includes that the absolute value of the maximum value of the SOC deviation between the three phases is less than or equal to a preset threshold;

[0179] The first mode includes: continuously obtaining the zero-sequence current adjustment factor of each phase based on the preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase, and selecting the real-time minimum value among the zero-sequence current adjustment factors of each phase as the real-time adjustment factor; multiplying the real-time adjustment factor by the zero-sequence current and injecting the resultant value into the PCS;

[0180] The second mode includes: multiplying the real-time adjustment factor at the moment of entering the second mode by the zero-sequence current and injecting the resultant into the PCS; and entering the first mode when the current command value changes.

[0181] The inter-phase state of charge rapid equalization device of the high-voltage direct-mounted energy storage system of the present invention is used in the method of the present invention and has the same beneficial effects as the method of the present invention.

[0182] Verification part:

[0183] The effectiveness of the method of the present invention is verified by MATLAB / Simulink software. Control; The control strategy of the method of the present invention is based on the new zero sequence current to exercise control;

[0184] See also Figures 4 and 5, which is the comparison waveform of the traditional control strategy and the control strategy of the present invention when the SOC imbalance is large. Assume that the battery SOC of each submodule of ab, bc, and ca phases are 80%, 100%, and 60% respectively, and the inter-phase balance coefficient The system's three-phase initial output active power is 5MW. The traditional control strategy is added at 2s, and the control strategy of the present invention is switched at 2.1s. The simulation waveform is as follows: Figures 4 and 5 As shown. Figures 4 and 5 It can be seen that after adding the traditional control strategy, although the SOC balancing speed is faster (as shown by the SOC change rate), the phase current produces serious overcurrent. After switching to the control strategy of the method of the present invention, although the balancing speed is slowed down, the phase current amplitude is limited to the maximum allowable current. =140.7 A. Therefore, the control strategy of the method of the present invention can ensure that the phase current does not overflow when the inter-phase SOC imbalance is large, and maximize the zero-sequence current within the current limit constraint, thereby maximizing the SOC balancing speed under this working condition.

[0185] See also Figures 6 and 7 , which are the SOC waveforms of the traditional control strategy and the control strategy of the present invention when the SOC imbalance is small. Assume that the SOC of each submodule battery of phases ab, bc, and ca are 80%, 80.2%, and 79.8% respectively, and the rest remain unchanged. The traditional control strategy is added at 2s, and then switched to the control strategy of the present invention at 2.1s. The simulation waveform is as follows Figures 6 and 7 As shown. Figures 6 and 7 It can be seen that when the inter-phase SOC imbalance is small, the zero-sequence current injected by the traditional control strategy is small, so that the SOC change rate before and after the injection of zero-sequence current does not change significantly. At this time, the SOC balancing speed is too slow. After switching to the control strategy of the method of the present invention, the zero-sequence current is within the phase current limit. The maximum value is reached within 10000, which significantly changes the SOC change rate. Therefore, the control strategy of the method of the present invention still ensures a large SOC balancing speed when the inter-phase SOC imbalance is small.

[0186] See also Figures 8 and 9 , is the current waveform before and after the control strategy of the present invention is added when the three-phase current is asymmetric. The SOC of the submodule batteries of phases ab, bc, and ca are set to 80%, 100%, and 60% respectively. The initial output active power of the system three-phase is 5MW. At the same time, the bc phase outputs an additional 2MVar reactive power, and the ca phase outputs an additional 0.5MVar reactive power, making the three-phase output current asymmetric. The control strategy of the present invention is added at 2s. The simulation waveform is as follows Figures 8 and 9 As shown. Figures 8 and 9It can be seen that even when the three-phase current amplitude and phase are severely asymmetric, the control strategy of the method of the present invention can still ensure that each phase does not overcurrent, and the zero-sequence current reaches the maximum under the current limiting condition, thereby effectively improving the balancing speed of the SOC.

[0187] The above simulation shows that the method of the present invention has a strong adaptability to the degree of SOC imbalance, and solves the problem of the balance coefficient in the traditional balance strategy. λ It solves the problems of difficult selection, phase current exceeding the limit, and slow balancing speed, and maximizes the zero-sequence current within the current limiting constraint, so that the balancing ability reaches the limit, thereby dynamically maximizing the balancing speed.

[0188] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A method for rapidly balancing the interphase state of charge of a high-voltage direct-mounted energy storage system, characterized in that: include: The active and reactive components of the zero-sequence current are obtained according to the positive and negative sequence components of the three-phase voltage, the SOC deviation between the ab phase and the SOC deviation between the bc phase; Obtaining a zero-sequence current according to the active and reactive components of the zero-sequence current; Obtaining active and reactive components of the zero-sequence current in each phase according to the zero-sequence current; Real-time acquisition of the system's external active and reactive current command values; Determine in real time whether the first condition is met; When the first condition is met, enter the second mode, otherwise run the first mode; The first condition includes that the absolute value of the maximum value of the inter-phase SOC deviation is less than or equal to a preset threshold; The first mode includes: continuously obtaining the zero-sequence current adjustment factor of each phase according to a preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase, and selecting the real-time minimum value of the zero-sequence current adjustment factors of each phase as the real-time adjustment factor; multiplying the real-time adjustment factor by the zero-sequence current and injecting the resultant value into the PCS; The second mode includes: multiplying the real-time adjustment factor at the moment of entering the second mode by the zero-sequence current and injecting the resultant into the PCS; and entering the first mode when the current command value changes.

2. The method for rapid equalization of interphase state of charge of a high-voltage direct-mounted energy storage system according to claim 1 is characterized in that: The active and reactive components of the zero-sequence current are obtained according to the positive and negative sequence components of the three-phase voltage, the SOC deviation between the ab phase and the SOC deviation between the bc phase; Obtaining the zero-sequence current according to the active and reactive components of the zero-sequence current includes: Obtaining the positive and negative sequence components of the three-phase voltage and the SOC deviation between the ab phase and the SOC deviation between the bc phase; According to the three-phase voltage positive and negative sequence components, the zero-sequence current calculation formula and the control target of inter-phase SOC balance, the zero-sequence current active and reactive components are obtained to solve the equation group; The zero-sequence current active and reactive components solution equations include: about and The expression of The expression for inter-phase SOC deviation is: It represents the active power generated by the zero-sequence current in phase x, x=ab,bc,ca; Represents the reactive component of zero-sequence current, Indicates the active component of zero-sequence current; Solve the equations for the zero-sequence current active and reactive components and the ab phase SOC deviation and the bc phase SOC deviation to obtain the zero-sequence current reactive component. and the active component of the zero-sequence current According to the zero-sequence current reactive component , the active component of the zero-sequence current The zero-sequence current is obtained by the zero-sequence current calculation formula.

3. The method for rapid equalization of interphase state of charge of a high-voltage direct-mounted energy storage system according to claim 2, characterized in that: Solve the equations for the zero-sequence current active and reactive components and the ab phase SOC deviation and the bc phase SOC deviation to obtain the zero-sequence current reactive component. and the active component of the zero-sequence current According to the zero-sequence current reactive component , the active component of the zero-sequence current The zero-sequence current calculation formula is used to obtain the zero-sequence current, which includes: The zero-sequence current reactive component and the zero sequence current active component include: ; The zero-sequence current calculation formula includes: ; in, Indicates the positive sequence active voltage amplitude; Indicates the positive sequence reactive voltage amplitude; Indicates the negative sequence active voltage amplitude; Indicates the negative sequence reactive voltage amplitude; Indicates the SOC deviation between phases a and b; Indicates the SOC deviation between phases b and c; Indicates the inter-phase SOC balancing coefficient, which determines the balancing speed and takes a constant value according to the capacity; Indicates grid voltage Phase; According to the active component of zero sequence current and the reactive component of zero-sequence current The zero-sequence current can be obtained by combining the zero-sequence current calculation formula .

4. The method for rapid equalization of interphase state of charge of a high-voltage direct-mounted energy storage system according to claim 3 is characterized in that: The step of continuously obtaining the zero-sequence current adjustment factor of each phase according to the preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase includes: The current command amplitude of each phase is obtained according to the current command value and the active and reactive components of the zero-sequence current in each phase. The expression of zero-sequence current regulation factor is: The zero-sequence current regulation factor is defined as ,Will With the zero sequence current After multiplication, the new zero-sequence current for injection into PCS is obtained , expressed as: ; in, Indicates the phase of the x-phase grid voltage; Indicates zero sequence current Active component in phase x; Indicates zero sequence current Reactive component in phase x; Active component in phase x and reactive components for: ; but It can be expressed based on the x phase as: ; Total current command Expressed as: ; in, and They represent the external active current command value and external reactive current command value of phase x respectively; According to the total current command and The active component and reactive component of the x phase are used to obtain the current command amplitude of each phase : ; Assume that the preset converter phase current maximum threshold is ,in is the proportional coefficient used to retain the preset current safety margin. is the phase current limit value; the current command amplitude of each phase Should be less than or equal to , so establish The expression of zero-sequence current regulation factor and The inequality between them is solved by taking the equal sign to obtain the zero-sequence current regulation factor of each phase: The inequalities include: ; The zero-sequence current adjustment factor that meets the requirements of each phase is obtained , recorded as ; If you need to make all three phases meet , The value of should be The intersection of The expression of has similarity, let Take the equal sign and calculate Two different real number solutions of and : ; ; in, is the intermediate amount; The value range of is: ; Considering that the SOC balancing speed is positively correlated with the power of zero-sequence current transfer, the injected The larger the value, the faster the SOC equalization speed. When the maximum value allowed is reached under the current limiting constraint, the inter-phase SOC balancing speed also reaches the fastest under the current limiting constraint. At this time, the amplitude limit is equalized, which satisfies: ; Then the zero-sequence current regulation factor of each phase is obtained The value should be: ; Continuously calculating the corresponding zero-sequence current adjustment factors, that is, continuously obtaining the zero-sequence current adjustment factors of each phase.

5. A device for rapidly equalizing the interphase state of charge of a high-voltage direct-mounted energy storage system, used in the method according to any one of claims 1 to 4, characterized in that: The device includes a first module, a second module and a third module; The first module is used to obtain the zero-sequence current active and reactive components according to the positive and negative sequence components of the three-phase voltage, the SOC deviation between the ab phase and the SOC deviation between the bc phase; and obtain the zero-sequence current according to the zero-sequence current active and reactive components; The second module is used to obtain the active and reactive components of the zero-sequence current in each phase according to the zero-sequence current; Real-time acquisition of the system's external active and reactive current command values; The third module is used to determine in real time whether the first condition is met; when the first condition is met, the second mode is entered; otherwise, the first mode is operated; the first condition includes that the absolute value of the maximum value of the SOC deviation between the three phases is less than or equal to a preset threshold; The first mode includes: continuously obtaining the zero-sequence current adjustment factor of each phase according to a preset maximum threshold of the converter phase current, the current command value, and the active and reactive components of the zero-sequence current in each phase, and selecting the real-time minimum value of the zero-sequence current adjustment factors of each phase as the real-time adjustment factor; multiplying the real-time adjustment factor by the zero-sequence current and injecting the resultant value into the PCS; The second mode includes: multiplying the real-time adjustment factor at the moment of entering the second mode by the zero-sequence current and injecting the resultant into the PCS; and entering the first mode when the current command value changes.

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