Manufacturing method of alloy welding spot and manufacturing method of X-ray detection device

Abstract

The invention discloses a manufacturing method of an alloy welding spot (10) and a manufacturing method of an X-ray detection device with the alloy welding spot (10), and the manufacturing method of the alloy welding spot (10) comprises the following steps: a wafer providing step (S1): providing a wafer which comprises a silicon substrate (1), and a welding disc (2) and a passivation layer (3) which are formed on the surface of the silicon substrate (1), the passivation layer (3) covers the surface of the silicon substrate (1) and is provided with an opening for exposing the bonding pad (2); a seed layer forming step (S2) of forming a seed layer (4) on the surfaces of the pad (2) and the passivation layer (3); an electroplated layer forming step (S3): forming an electroplated layer by electroplating at least in a pad coverage area of the seed crystal layer (4), wherein the pad coverage area directly covers the pad (2) through the opening, and the electroplated layer at least comprises a first metal layer (7); a seed layer removal step (S4) of removing a portion of the seed layer (4) that is not covered by the plating layer; a vapor deposition layer forming step (S5) of forming a vapor deposition layer, which is a second metal layer (9), on at least the surface of the plating layer by vapor deposition; and an alloying step (S6) of alloying the first metal layer (7) and the second metal layer (9) by reflow treatment to form an alloy solder joint (10).

Description

Technical Field

[0001] The present invention relates to a manufacturing method of alloy solder joints and a manufacturing method of an X-ray detection device, and particularly relates to a manufacturing method of low-temperature alloy solder joints and a manufacturing method of an X-ray detection device having the low-temperature alloy solder joints. Background Art

[0002] In an X-ray detection device, the X-ray detector and the readout circuit need to be vertically connected through metal solder joints. When the materials of the X-ray detector and the readout circuit are both silicon-based materials, the thermal matching is good, and traditional copper pillar tin cap solder joints can be used to achieve effective welding at a temperature of about 250°C without affecting the detection performance. When the material of the X-ray detector is a non-silicon material, such as gallium arsenide, cadmium telluride (CdTe), cadmium zinc telluride (CdZnTe, abbreviated as CZT), etc., there is a large difference in the coefficient of thermal expansion between it and the corresponding silicon material of the readout circuit. In particular, crystal materials such as cadmium telluride and cadmium zinc telluride are sensitive to temperature, and high temperatures above 150°C will affect the crystal performance, thus causing degradation of the detection performance. For the encapsulation of temperature-sensitive X-ray detection materials, low-temperature solder joints are required. Solder joints based on indium (In) have been widely used in many applications due to their low melting point. The melting point of pure indium is 157°C, and the welding temperature needs to be set at about 180°C, which still exceeds the temperature requirement of less than 150°C for temperature-sensitive materials. Indium tin alloy, when in the appropriate proportion, such as In 52 Sn 48 alloy, has a melting point of only 118°C, and the corresponding welding temperature is only about 140°C, which can meet the temperature upper limit requirement of 150°C.

[0003] In the aspect of manufacturing low-temperature indium tin alloy solder joints, the current main technical solution is based on the electroplating process, electroplating tin and electroplating indium respectively, and then obtaining indium tin alloy solder joints through reflow treatment. Based on the electroplating process, it is easy to obtain a relatively high solder joint height, and electroplating tin is very mature and has a low cost, but electroplating indium is not yet mature, and the plating solution has a short life, resulting in a high cost when the production capacity utilization is not high.

[0004] In order to solve the problems of immature process and high cost existing in the current technology, the present invention proposes a manufacturing method of electroplating tin combined with indium evaporation to obtain low-temperature indium tin solder joints, which has a low cost and can meet the requirements of batch applications. Summary of the Invention

[0005] The manufacturing methods of low-temperature indium tin alloy solder joints in the prior art are all immature and costly. The purpose of the present invention is to combine the maturity and characteristics of the prior art, and use the methods of electroplating tin and indium evaporation to realize the manufacture of low-cost indium tin alloy solder joints.

[0006] According to one aspect of the present invention, there is provided a method for manufacturing an alloy solder joint, comprising the following steps: Wafer providing step (S1): providing a wafer, the wafer including a silicon substrate (1) and pads (2) and a passivation layer (3) formed on the surface of the silicon substrate (1), the passivation layer (3) covering the surface of the silicon substrate (1) and having an opening formed therein to expose the pads (2); Seed layer forming step (S2): forming a seed layer (4) on the surfaces of the pads (2) and the passivation layer (3); Electroplated layer forming step (S3): forming an electroplated layer by electroplating at least in a pad covering area of the seed layer (4) that directly covers the pads (2) via the opening, the electroplated layer including at least a first metal layer (7); Seed layer removing step (S4): removing a portion of the seed layer (4) that is not covered by the electroplated layer; Evaporated layer forming step (S5): forming an evaporated layer by evaporation at least on the surface of the electroplated layer, the evaporated layer being a second metal layer (9); and Alloying step (S6): alloying the first metal layer (7) and the second metal layer (9) by reflow treatment to form the alloy solder joint (10).

[0007] Further, the electroplated layer further includes a support layer (6), and the support layer (6) is located on a side of the first metal layer (7) facing the seed layer (4).

[0008] Further, the evaporated layer also covers the side surface of the electroplated layer and a portion of the passivation layer (3) adjacent to the electroplated layer.

[0009] Further, in the electroplated layer forming step (S3), the electroplated layer is formed by the following method: depositing a first photoresist (5) on the seed layer (4), performing photolithography on the first photoresist (5) to remove at least a portion of the first photoresist (5) covering the pad covering area, thereby forming a first opening (11) that at least exposes the pad covering area, then forming an electroplated layer in the first opening (11) by electroplating, and then removing the remaining portion of the first photoresist (5).

[0010] Further, in the evaporated layer forming step (S5), the evaporated layer is formed by the following method: depositing a second photoresist (8) on the passivation layer (3) and the electroplated layer, performing photolithography on the second photoresist (8) to remove at least a portion of the second photoresist (8) covering the electroplated layer, thereby forming a second opening (12) that at least exposes the electroplated layer, then forming an evaporated layer in the second opening (12) by evaporation, and then removing the remaining portion of the second photoresist (8).

[0011] Further, before the step of forming the evaporation layer (S5), the following steps are further included: performing a reflow process on the first metal layer (7) so that the first metal layer (7) forms a shape with a middle bulge.

[0012] Further, the first metal layer (7) is a tin layer, and the second metal layer (9) is an indium layer.

[0013] Further, the first metal layer (7) is composed of one of copper, nickel, gold, tin, and silver, and the second metal layer (9) is composed of one of indium, titanium, silver, palladium, nickel, and gold.

[0014] Further, a cross-section of the second opening (12) along a direction perpendicular to the surface of the silicon substrate (1) has an inverted trapezoidal shape, and after forming the evaporation layer, the second photoresist (8) is removed by a lift-off method.

[0015] Further, the thickness of the first metal layer (7) is 2 - 10 microns, preferably 4 - 7 microns.

[0016] Further, the thickness of the second metal layer (9) is 2 - 10 microns, preferably 2 - 5 microns.

[0017] Further, the thickness of the tin layer is 5 microns, and the thickness of the indium layer is 3 microns.

[0018] Further, the formation ratio of the tin layer and the indium layer is an alloy solder joint of In 52 Sn 48 of.

[0019] Further, the planar size of the indium layer is larger than the planar size of the tin layer.

[0020] According to another aspect of the present invention, a manufacturing method of an X-ray detection device is provided, including: providing an X-ray detector, the material of the X-ray detector being at least one of gallium arsenide, cadmium telluride, and cadmium zinc telluride; providing a wafer having an alloy solder joint (10), the alloy solder joint (10) being manufactured according to the manufacturing method of the alloy solder joint (10) described in any one of claims 1 - 14, wherein a readout circuit is formed on the silicon substrate (1), and the readout circuit is electrically connected to the pad (2); and welding the X-ray detector to the alloy solder joint (10) so that the X-ray detector and the pad (2) are electrically connected via the alloy solder joint (10), wherein the welding temperature is below 150°C.

[0021] The technical solution adopted by the present invention can achieve the following beneficial effects:

[0022] Electroplating tin bumps on wafers is a currently widely used and very mature process, with large consumption, low price, and easy availability. By combining electroplating tin and evaporating indium, mature technologies and mature supply chains can be effectively utilized to achieve the low-cost and high-yield manufacturing of indium-tin alloy solder joints, realize the effective encapsulation of temperature-sensitive X-ray detection crystals, and contribute to the development and application of high-end X-ray detection devices and X-ray imaging equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0024] Figure 1 Shows the basic method steps for manufacturing low-temperature indium-tin alloy solder joints according to the present invention.

[0025] Figure 2 Shows the process flow chart for manufacturing low-temperature indium-tin alloy solder joints according to an embodiment of the present invention.

[0026] Figure 3 Shows a cross-sectional schematic view of a wafer according to an embodiment of the present invention.

[0027] Figure 4 Shows a cross-sectional schematic view of depositing a seed layer on the surface of a wafer according to an embodiment of the present invention.

[0028] Figure 5 Shows a cross-sectional schematic view of performing the first photolithography for defining the electroplating area according to an embodiment of the present invention.

[0029] Figure 6 Shows a cross-sectional schematic view of forming an electroplated layer including a support layer and a tin layer by electroplating according to an embodiment of the present invention.

[0030] Figure 7 Shows a cross-sectional schematic view of removing the first photoresist and the seed layer after electroplating is completed according to an embodiment of the present invention.

[0031] Figure 8 Shows a cross-sectional schematic view of performing the second photolithography for defining the indium evaporation area according to an embodiment of the present invention.

[0032] Figure 9 Shows a cross-sectional schematic view of evaporating an indium layer according to an embodiment of the present invention.

[0033] Figure 10 Shows a cross-sectional schematic view of removing the second photoresist according to an embodiment of the present invention.

[0034] Figure 11Shows a cross-sectional schematic diagram of alloying an electroplated tin layer and an evaporated indium layer according to an embodiment of the present invention.

[0035] Figure 12 Shows a cross-sectional schematic diagram of reflow processing the tin layer according to an alternative embodiment of the present invention.

[0036] Figure 13 Shows a cross-sectional schematic diagram of performing a second photolithography for defining an indium evaporation region according to an alternative embodiment of the present invention.

[0037] Figure 14 Shows a cross-sectional schematic diagram of an evaporated indium layer according to an alternative embodiment of the present invention.

[0038] Figure 15 Shows a cross-sectional schematic diagram of removing the second photoresist according to an alternative embodiment of the present invention.

[0039] List of reference numerals:

[0040] 1: Silicon substrate; 2: Pad; 3: Passivation layer; 4: Seed layer; 5: First photoresist; 6: Support layer; 7: First metal layer; 8: Second photoresist; 9: Second metal layer; 10: Alloy solder joint; 11: First opening; 12: Second opening. Detailed description of the specific embodiments

[0041] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with specific embodiments of the present invention and the corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the protection scope of the present invention.

[0042] The following describes in detail the technical solutions disclosed in each embodiment of the present invention with reference to the drawings. For the sake of brevity, the reference numerals of each component are not necessarily shown in each drawing. Usually, for the purpose of emphasis, some drawings only show the reference numerals of the relevant components described in the specification with reference to that drawing, while omitting the relevant marks of other components. However, the same reference numerals for the same components are common in different drawings.

[0043] Figure 1 Shows the basic method steps of manufacturing a low-temperature indium-tin alloy solder joint according to the present invention. As Figure 1As shown, the method mainly includes the following steps: Wafer providing step S1: Provide a wafer with pads and a passivation layer formed on the surface of a silicon substrate; Seed layer forming step S2: Form a seed layer on the surfaces of the pads and the passivation layer; Electroplated layer forming step S3: Form an electroplated layer at least at a position corresponding to the pads on the seed layer; Seed layer removing step S4: Remove the portion of the seed layer not covered by the electroplated layer; Evaporated layer forming step S5: Form an evaporated layer at least on the surface of the electroplated layer by evaporation; Alloying step S6: Perform alloying by reflow treatment to form alloy solder joints. The following will be described in detail with specific embodiments.

[0044] Figure 2 FIG. shows a process flow chart of manufacturing a low-temperature indium-tin alloy solder joint according to an embodiment of the present invention. As Figure 2 shown, the method for manufacturing a low-temperature indium-tin alloy solder joint according to an embodiment of the present invention includes step 101: Provide a wafer, where the wafer has completed integrated circuit processing (i.e., circuits such as a readout circuit are formed thereon), which includes a silicon substrate 1 and pads (here, metal pads) 2 and a passivation layer 3 have been processed on the surface of the silicon substrate 1. The passivation layer 3 covers the surface of the silicon substrate 1 and has an opening exposing the pads 2. In Figure 3 it, an example is specifically shown where the passivation layer 3 covers the peripheral portion of the pads 2 and has an opening in the central portion of the pads 2. The method for manufacturing a low-temperature indium-tin alloy solder joint according to an embodiment of the present invention further sequentially includes the following steps after step 101.

[0045] Step 102: Deposit a seed layer 4 for electroplating on the surface of the silicon substrate 1. That is, form a seed layer 4 on the surfaces of the pads 2 and the passivation layer 3 as Figure 3 shown. Here, the portion of the seed layer 4 directly covering the pads 2 via the above-mentioned opening is called the pad coverage area. The seed layer 4 generally includes two layers, one is an adhesion layer and the other is a seed crystal forming layer. For a conventional electroplating process, the seed layer 4 generally selects a Ti / Cu combination (i.e., the adhesion layer is Ti and the seed crystal forming layer is Cu), and the thickness is preferably 100 nm / 300 nm (i.e., the adhesion layer is 100 nm and the seed crystal forming layer is 300 nm), as Figure 4 shown.

[0046] Step 103: Perform the first photolithography on the seed layer 4 to prepare for the subsequent electroplating process. Among them, deposit a first photoresist 5 on the surface of the seed layer 4, and perform photolithography on the first photoresist 5 to remove at least the portion of the first photoresist 5 covering the above-mentioned pad coverage area, so that the first photoresist 5 has at least a first opening 11 exposing the above-mentioned pad coverage area at the position where electroplating is to be performed. That is, form a first opening 11 defining the electroplating area through the first photoresist 5, as Figure 5 shown.

[0047] Step 104: Form an electroplated layer including a support layer 6 and a first metal layer (here a tin layer) 7 in the first opening by electroplating. The support layer 6 is an optional layer, which can provide a suitable height and a barrier layer for solder, preferably a nickel layer with a thickness preferably of 1 - 3 microns. The tin layer provides the tin component for future alloy solder joints, with a thickness preferably of 2 - 10 microns, more preferably 4 - 7 microns, as Figure 6 shown.

[0048] Step 105: After obtaining the electroplated layer with the expected thickness by electroplating, remove the first photoresist 5 that defines the electroplating area, and remove the part of the seed layer 4 that is not covered by the electroplated layer (here the support layer 6 and the tin layer) obtained by electroplating, as Figure 7 shown.

[0049] Step 106: Perform a second lithography to define the evaporation area on the surface of the structure shown in Figure 7 (i.e., the surface of the silicon substrate 1 formed with the passivation layer 3 and the electroplated layer), and this second lithography is a lift-off lithography. Deposit a second photoresist 8 on the surface of the structure shown in Figure 7 . Perform lithography on the second photoresist 8 to remove at least the part of the second photoresist 8 covering the electroplated layer, so that the second photoresist 8 has a second opening 12 that at least exposes the electroplated layer at the position where evaporation is to be performed, that is, form a second opening 12 that defines the evaporation area through the second photoresist 8, as Figure 8 shown. As Figure 8 shown, the cross-sectional shape of the second opening 12 (i.e., the shape of the cross-section along the direction perpendicular to the surface of the silicon substrate 1) is an inverted trapezoid, that is, the bottom size of the second opening is larger than the top size of the opening. Here, the top and bottom respectively refer to the directions above and below the paper surface of Figure 7 .

[0050] Step 107: Form an evaporation layer at least on the surface of the electroplated layer by evaporation. Specifically, form an evaporation layer as the second metal layer (here an indium layer) 9 on the surface of the structure shown in Figure 8 by evaporation. As Figure 9 shown, the indium layer is formed on the surface of the second photoresist 8, the surface and sides of the electroplated layer exposed to the second photoresist 8, and the part of the passivation layer 3 adjacent to the electroplated layer. In this way, an evaporation layer can be formed in the second opening 12. The thickness of the indium layer is preferably 2 - 10 microns, more preferably 2 - 5 microns.

[0051] Step 108: After forming the evaporation layer, remove the second photoresist 8 and the evaporation layer on the surface of the second photoresist 8 by the lift-off method, as Figure 10 shown.

[0052] Step 109: Alloy the indium layer and the tin layer through reflow treatment to obtain an indium-tin alloy layer as the alloy solder joint 10, as Figure 11 shown.

[0053] According to an alternative embodiment of the present invention, step 105' can be added after the above step 105: perform reflow treatment on the tin layer so that the tin layer forms a shape with a middle bulge, as Figure 12 shown. Then continue with steps 106-108, as Figures 13 - 15 shown. This can enable the evaporated indium to better form a continuous covering layer on the side of the electroplated bump, and make the indium layer outside the electroplated bump more likely to retract to the surface of the electroplated bump during the alloying treatment in the subsequent step 109.

[0054] Furthermore, the planar size of the evaporated indium layer is larger than the planar size of the electroplated tin layer, and the unilateral surrounding size is preferably 2-15 microns. Here, the planar sizes of the evaporated indium layer and the electroplated tin layer refer to the sizes of the evaporated indium layer and the electroplated tin layer in a plane parallel to the surface of the silicon substrate 1 where the pad 2 is formed, that is, the periphery of the evaporated indium layer can exceed the periphery of the electroplated tin layer. Generally, the planar shapes of the evaporated indium layer and the electroplated tin layer are formed into the same regular shape, such as a circle or a square. In the case of being formed into a circle, the unilateral surrounding size refers to the size by which the evaporated indium layer exceeds the electroplated tin layer in any direction in the plane of the evaporated indium layer and the electroplated tin layer. In the case of being formed into a square, the unilateral surrounding size refers to the size by which the evaporated indium layer exceeds the electroplated tin layer in the direction perpendicular to each side of the square in the plane of the evaporated indium layer and the electroplated tin layer. In the case where the evaporated indium layer and the electroplated tin layer are formed into a circle, the above planar size refers to the size of the radius of the circle, and in the case where the evaporated indium layer and the electroplated tin layer are formed into a square, the above planar size refers to the size of the side length of the square. That is to say, the planar size of the evaporated indium layer being larger than the planar size of the electroplated tin layer means that the area of the evaporated indium layer is larger than the area of the electroplated tin layer. As a typical embodiment, the planar size of the electroplated tin layer is 30 microns, the planar size of the evaporated indium layer is 40 microns, the unilateral surrounding is 5 microns, the thickness of the electroplated tin layer is selected to be 5 microns, and the evaporation thickness of the indium layer is selected to be 3 microns. The theoretical alloy solder joint ratio is In 52 Sn 48 . Preferably, in terms of the material ratio, the indium layer can exceed 52%, so that even if there is a deviation, the increase in the melting point will not be too high. Although the planar sizes of the evaporated indium layer and the electroplated tin layer are illustrated by taking a circle and a square as examples above, the planar shapes formed by the evaporated indium layer and the electroplated tin layer are not limited to a circle and a square, as long as they are formed such that the evaporated indium layer uniformly exceeds the periphery of the electroplated tin layer.

[0055] In the existing technical solutions for manufacturing indium-tin alloy solder joints, the electroplating process is entirely used. It is difficult for electroplated indium to nucleate on the tin layer, resulting in high process difficulty and high plating solution maintenance costs. By combining electroplating tin and evaporating indium, the present invention can effectively utilize mature technologies and mature supply chains to achieve the low-cost and high-yield manufacturing of indium-tin alloy solder joints, realize the effective encapsulation of temperature-sensitive X-ray detection crystals, and contribute to the development and application of high-end X-ray detection devices.

[0056] The above embodiments have been described by taking the tin layer as the first metal layer for electroplating and the indium layer as the second metal layer for evaporation as examples. However, the present invention is not limited thereto. The process method of the present invention can also be applied to the manufacture of alloy solder joints of other metal combinations. The electroplating process is not limited to electroplating tin and can also be extended to electroplating materials such as copper, nickel, gold, tin, and silver; the vacuum evaporation process is not limited to indium and can also be extended to evaporating materials such as titanium, silver, palladium, nickel, and gold.

[0057] On the other hand, according to the present invention, there is also provided a method for manufacturing an X-ray detection device, including: providing an X-ray detector, the material of the X-ray detector can be at least one of gallium arsenide, cadmium telluride, and cadmium zinc telluride; providing a wafer having an alloy solder joint 10, the alloy solder joint 10 is manufactured according to the above-mentioned manufacturing method of the alloy solder joint 10, wherein the readout circuit formed on the silicon substrate 1 is electrically connected to the pad 2; and welding the X-ray detector to the alloy solder joint 10 such that the X-ray detector and the pad 2 are electrically connected via the alloy solder joint 10, wherein the welding temperature is below 150°C. It can be seen that according to the manufacturing method of the X-ray detection device of the present invention, the welding temperature is below 150°C, meeting the temperature requirement of below 150°C for the temperature-sensitive X-ray detection material, and achieving further beneficial technical effects.

[0058] The above are only embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the scope of the claims of the present invention.

Claims

1. A method for manufacturing an alloy solder joint (10), characterized in that, Comprising the following steps: Wafer providing step (S1): Provide a wafer, the wafer including a silicon substrate (1) and pads (2) and a passivation layer (3) formed on the surface of the silicon substrate (1), the passivation layer (3) covering the surface of the silicon substrate (1) and having an opening formed therein to expose the pads (2); Seed layer forming step (S2): Form a seed layer (4) on the surfaces of the pads (2) and the passivation layer (3); Electroplated layer forming step (S3): Form an electroplated layer by electroplating at least in a pad covering area of the seed layer (4) that directly covers the pads (2) via the opening, the electroplated layer at least including a first metal layer (7); Seed layer removing step (S4): Remove the portion of the seed layer (4) that is not covered by the electroplated layer; Evaporated layer forming step (S5): Form an evaporated layer by evaporation at least on the surface of the electroplated layer, the evaporated layer being a second metal layer (9); And Alloying step (S6): Alloy the first metal layer (7) with the second metal layer (9) by a reflow process to form the alloy solder joint (10).

2. The manufacturing method according to claim 1, characterized in that, The electroplated layer further includes a support layer (6), the support layer (6) being located on a side of the first metal layer (7) facing the seed layer (4).

3. The manufacturing method according to claim 1, characterized in that, The evaporated layer also covers the side surfaces of the electroplated layer and a portion of the passivation layer (3) adjacent to the electroplated layer.

4. The manufacturing method according to claim 1, characterized in that, In the electroplated layer forming step (S3), the electroplated layer is formed by the following method: Deposit a first photoresist (5) on the seed layer (4), perform photolithography on the first photoresist (5) to remove at least a portion of the first photoresist (5) covering the pad covering area, thereby forming a first opening (11) that at least exposes the pad covering area, and then form an electroplated layer in the first opening (11) by electroplating, and then remove the remaining portion of the first photoresist (5).

5. The manufacturing method according to claim 1, characterized in that, In the evaporated layer forming step (S5), the evaporated layer is formed by the following method: Deposit a second photoresist (8) on the passivation layer (3) and the electroplated layer, perform photolithography on the second photoresist (8) to remove at least a portion of the second photoresist (8) covering the electroplated layer, thereby forming a second opening (12) that at least exposes the electroplated layer, and then form an evaporated layer in the second opening (12) by evaporation, and then remove the remaining portion of the second photoresist (8).

6. The manufacturing method according to claim 1, characterized in that Before the evaporated layer forming step (S5), the following step is further included: Perform a reflow process on the first metal layer (7) so that the first metal layer (7) forms a shape with a middle bulge.

7. The manufacturing method according to any one of claims 1-6, characterized in that, The first metal layer (7) is a tin layer, and the second metal layer (9) is an indium layer.

8. The manufacturing method according to any one of claims 1 to 6, characterized in that, The first metal layer (7) is composed of one of copper, nickel, gold, tin, and silver, and the second metal layer (9) is composed of one of indium, titanium, silver, palladium, nickel, and gold.

9. The manufacturing method according to claim 5, wherein The cross-section of the second opening (12) in a direction perpendicular to the surface of the silicon substrate (1) has an inverted trapezoidal shape, and the second photoresist (8) is removed by a lift-off method after forming the evaporation layer.

10. The manufacturing method according to any one of claims 1-6, characterized in that, The thickness of the first metal layer (7) is 2 - 10 microns, preferably 4 - 7 microns.

11. The manufacturing method according to any one of claims 1-6, characterized in that, The thickness of the second metal layer (9) is 2 - 10 microns, preferably 2 - 5 microns.

12. The manufacturing method according to claim 7, characterized in that, The thickness of the tin layer is 5 microns, and the thickness of the indium layer is 3 microns.

13. The manufacturing method according to claim 12, characterized in that, The tin layer and the indium layer form an alloy solder joint with a ratio of In 52 Sn 48 .

14. The manufacturing method according to claim 7, wherein The planar size of the indium layer is larger than the planar size of the tin layer.

15. A method for manufacturing an X-ray detection device, comprising: providing an X-ray detector, the material of the X-ray detector being at least one of gallium arsenide, cadmium telluride, and cadmium zinc telluride; providing a wafer having alloy solder joints (10), the alloy solder joints (10) being manufactured according to the manufacturing method of the alloy solder joints (10) described in any one of claims 1 - 14, wherein a readout circuit is formed on the silicon substrate (1), and the readout circuit is electrically connected to the pad (2); and welding the X-ray detector to the alloy solder joints (10) such that the X-ray detector and the pad (2) are electrically connected via the alloy solder joints (10), wherein the welding temperature is below 150°C.

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