Loopback test method and system for dual-channel data board and storage medium

Abstract

The invention relates to a loopback test method and system for a dual-channel data board and a storage medium, the system comprises at least two to-be-tested data boards, and each to-be-tested data board comprises an acquisition channel / input interface I, a recovery signal / output channel I, an acquisition channel / input interface II and a recovery signal / output channel II; the channel I data transmission link is formed by connecting a recovery signal / output channel I of a previous to-be-tested data board with a collection channel / input interface I of a next to-be-tested data board; the channel II data transmission link is formed by connecting a recovery signal / output channel II of the next to-be-tested data board with a collection channel / input interface II of the previous to-be-tested data board; a selection circuit is also included. According to the invention, only one path or one group of external input equipment or load equipment is needed to carry out testing and fault positioning on a plurality of dual-channel data boards of the same type at the same time; the complexity of circuit control logic and the time consumed by fault positioning traversal are effectively reduced.

Description

Technical Field

[0001] The present invention relates to a detection technology for a data board, in particular to a loopback test method, system and storage medium for a dual-channel data board. Background Art

[0002] The IoT gateway product is a general and reliable product that provides the converged access and centralized control of various subsystem professional sensing devices in the industrial IoT field. The dual-channel data board in it is widely used in the single-board configuration of the IoT gateway product. To ensure that the designed dual-channel data board can meet the requirements of the IoT gateway product system, a complete functional test needs to be carried out after the single board leaves the factory and before it is put into use. The existing data board test method is to poll and control the functional test of the data board to be tested on a fixed test slot of the test main board by means of the switching quantity of the auxiliary board, and only test the function of one single board at a time. Although automated testing is adopted, the traversal takes a long time and cannot well adapt to the test requirements of quickly and accurately troubleshooting problems after mass production, so the efficiency needs to be improved. In addition, considering that the signals of the IoT gateway data board are all configured with dual-channel input / collection and dual-channel output / feedback channels and not all are data signals, how to complete the test of all signals to be tested while reducing the configuration of the hardware test circuit is also the existing test requirement.

[0003] Chinese Patent Application Publication No. CN1592182A discloses a test method for the single-board aging link, specifically discloses a loopback detection method: "Connect the transmission port and the reception port of two adjacent single boards in the single board to be tested through a fixed attenuator to form a loopback link, and connect a system analyzer in the loopback link" and a faulty board discrimination method: "Determine the main control board that receives the error code event by sending a query command through the network port; use the error code information collected by the main control board to locate the first single board that appears the error code and the second single board that is the previous stage of the first single board; judge the faulty board from the first single board and the second single board", but there are two prerequisites for the implementation of the above technical solutions: 1. The single board needs to support the regeneration section error monitoring and report to the main control board, otherwise it is impossible to achieve "using the error code information collected by the main control board to locate the first single board that appears the error code and the second single board that is the previous stage of the first single board"; 2. The single board needs to be able to judge the corresponding faults. When a certain function of the single board cannot be realized during the aging test, an error code will be generated. In addition to the inability to realize the function during the pre-production test of the single board, more common faults are that the results do not match the preset in the simulation test, and the above faults cannot be detected in the function self-check of common single boards. Therefore, the existing loopback detection method cannot be applied to the new product test of the dual-channel data board of the IoT gateway data board, especially its faulty board discrimination cannot achieve rapid fault location in the new product test. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a loopback test method and system for a dual-channel data board, which only requires one or a group of external input devices or load devices to be able to test and fault locate multiple dual-channel data boards of the same type at the same time; effectively reducing the complexity of the circuit control logic and the time required for traversing the test and fault location of multiple dual-channel data boards of the same type.

[0005] The technical solution adopted by the present invention to solve the above technical problems is:

[0006] A loopback test method for a dual-channel data board, including at least two data boards to be tested, on which there are a collection channel / input interface one and a feedback signal / output channel one, as well as a collection channel / input interface two and a feedback signal / output channel two; a data transfer link for channel one is formed by connecting the feedback signal / output channel one of the previous data board to be tested to the collection channel / input interface one of the next data board to be tested; a data transfer link for channel two is formed by connecting the feedback signal / output channel two of the next data board to be tested to the collection channel / input interface two of the previous data board to be tested; and a selection circuit is also included.

[0007] The steps are as follows:

[0008] S1. Insert the data board to be tested into the test slot and power it on. The test main control board sends the type of the data board to be tested recognized to the host computer. The host computer issues a test image and an automated test program to the test main control board according to the recognized data board to be tested, and the test main control board then issues them to the data board to be tested.

[0009] S2. Close the data transfer link for channel one, the data transfer link for channel two, and the connection between the two to form a data loopback. The host computer judges the test items according to the type of the data board to be tested, and issues test instructions to the test main control board / external device according to the test items. After parsing the test instructions, the test main control board issues control instructions to the data board to be tested.

[0010] S3. The test main control board judges whether the functions of the data boards to be tested within the data loopback are normal according to the analysis of the output control signal and the input feedback signal. If the result is negative, go to step S4.

[0011] S4. Disconnect the data loopback, connect the test main control board to any one of the data boards to be tested through the selection circuit, and judge whether the functions of the data board to be tested are normal until all abnormal data boards are located.

[0012] Further, the selection circuits are interconnected. The feedback signal / output channel 1 of the previous data board to be tested is connected to the acquisition channel / input interface 1 of the next data board to be tested through a selection circuit; the feedback signal / output channel 2 of the next data board to be tested is connected to the acquisition channel / input interface 2 of the previous data board to be tested through a selection circuit; the data transfer link of channel 1 is connected to the data transfer link of channel 2 through a selection circuit.

[0013] Furthermore, step S4 includes:

[0014] S41. Disconnect all connections between the feedback signal / output channel 1 of the previous data board to be tested and the acquisition channel / input interface 1 of the next data board to be tested, between the feedback signal / output channel 2 of the next data board to be tested and the acquisition channel / input interface 2 of the previous data board to be tested, and between the data transfer link of channel 1 and the data transfer link of channel 2 through the selection circuit;

[0015] S42. Connect the test main control board to any data board to be tested through the interconnected selection circuits, and determine whether the functions measured by the data board to be tested are normal;

[0016] S43. Determine whether all data boards to be tested have been completed. If the result is no, return to step S41.

[0017] Preferably, step S42 further includes: connecting the acquisition channel / input interface 1 and the feedback signal / output channel 1 of the test main control board to any data board to be tested through the interconnected selection circuits, and / or connecting the acquisition channel / input interface 2 and the feedback signal / output channel 2.

[0018] Further, step S3 further includes: if the result is no, record the overall problem function items; step S4 further includes: when determining whether the functions measured by the data board to be tested are normal, traverse and execute the problem function item tests based on the overall problem function items.

[0019] Preferably, step S3 further includes:

[0020] S31. If the number of items of the overall problem function items is greater than or equal to the preset value, divide all data boards to be tested into at least two groups to be tested;

[0021] S32. Any group to be tested forms a data loopback, traverse and execute the problem function item tests based on the overall problem function items, obtain and record the group problem function items of each group to be tested. If the number of items of the group problem function items is greater than or equal to 1, the data boards to be tested corresponding to the group to be tested perform step S4;

[0022] The step S4 further includes: when determining whether the functions measured by the data board to be measured are normal, traversing and executing the problem function item tests based on the problem function items of the test group where the data board to be measured is located.

[0023] A loopback test system for a dual-channel data board, comprising a host computer, an external device, a test main control board, a backplane, and at least two data boards to be measured. The data board to be measured includes a collection channel / input interface 1 and a feedback signal / output channel 1, and a collection channel / input interface 2 and a feedback signal / output channel 2. The data board to be measured is connected to the backplane, and the external device and the test main control board are connected to the data board to be measured through the backplane. The host computer controls the external device and the test main control board.

[0024] The data boards to be measured are sequentially connected to the backplane, and the backplane includes:

[0025] Channel 1 circuit, used for connecting the feedback signal / output channel 1 of the previous data board to be measured to the collection channel / input interface 1 of the next data board to be measured;

[0026] Channel 2 circuit, used for connecting the feedback signal / output channel 2 of the next data board to be measured to the collection channel / input interface 2 of the previous data board to be measured;

[0027] Connection circuit, used for connecting the channel 1 circuit and the channel 2 circuit;

[0028] It further includes a selection circuit. The selection circuit is connected to the collection channel / input interface 1 and the collection channel / input interface 2 of the data board to be measured, and the feedback signal / output channel 1 and the feedback signal / output channel 2 of the data board to be measured are connected to the selection circuit. The selection circuits are connected to each other;

[0029] Selection circuits are provided in the channel 1 circuit, the channel 2 circuit, and the connection circuit.

[0030] Preferably, the backplane further includes a conversion circuit, and the external device, the test main control board, the feedback signal / output channel 1, and the feedback signal / output channel 2 are connected to the selection circuit through the conversion circuit.

[0031] Preferably, software logic switches are provided between the collection channel / input interface 1 and the feedback signal / output channel 1, and between the collection channel / input interface 2 and the feedback signal / output channel 2.

[0032] A computer-readable storage medium, on which a computer program is stored. When the computer program is run by a processor, it executes the steps of the above-mentioned loopback test method for a dual-channel data board.

[0033] The present invention has the following advantages and effects compared with the prior art:

[0034] 1. This technical solution only requires one or a group of external input devices or load devices to be able to test multiple dual-channel data boards of the same type simultaneously. Through the setting of the channel one data transfer link, the channel two data transfer link, and the selection circuit, the dual-channel overall loopback test of the dual-channel data board and the troubleshooting of a single faulty data board to be tested are realized simultaneously.

[0035] 2. The specific setting method of the channel one data transfer link, the channel two data transfer link, and the selection circuit realizes the loopback test and the troubleshooting of a single faulty data board to be tested only through the node transformation of the selection circuit. It can also separately troubleshoot any group of acquisition channels / input interfaces and feedback signals / output channels in the dual channel, and the circuit control logic method is simple.

[0036] 3. The overall problem function items are obtained through the overall loopback test, reducing the traversal time-consuming during the troubleshooting of a single faulty data board to be tested. Further, when the traversal time-consuming of the overall problem function items is relatively long, a group to be tested is formed to obtain the group problem function items, and the traversal time-consuming is further reduced through the group to be tested and the group problem function items. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0038] Figure 1 It is a schematic structural diagram of the system of the present invention.

[0039] Figure 2A 、 2B And 2C are schematic circuit connection logics of the system of the present invention.

[0040] Figure 3 It is an overall flowchart of the method of the present invention.

[0041] Figure 4 It is a flowchart of the fault diagnosis program for detecting a single data board to be tested of the present invention.

[0042] Figure 5 It is a flowchart of fault diagnosis based on the number of problem function items of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0043] The following further elaborates on the present invention in conjunction with embodiments. The following embodiments are explanations of the present invention, and the present invention is not limited to the following embodiments.

[0044] Embodiment:

[0045] This embodiment is a test system for a data board of an UnEIC edge intelligent controller, which is mainly used in cooperation with signal products in subway stations. The data board has two channels, namely the acquisition channel / input interface 1 and the feedback signal / output channel 1, and the acquisition channel / input interface 2 and the feedback signal / output channel 2. This test system includes: a reader, a host computer, and a test tooling table.

[0046] The reader obtains the single-board information by approaching the electronic tag of the data board to be tested. Refer to Figure 1 , the test tooling table includes an expandable test chassis (not shown in the figure), a backplane, a power supply board, and a test main control board. The test main control board realizes instruction reception, sending, and data storage. The power supply board is used for power supply. The backplane is a single board with complete functions, and multiple data board test slot interfaces are provided on the backplane (the number of test slot interfaces on the backplane is generally 8 or 12. In this embodiment, a backplane with 8 test slot interfaces is used as an example). The backplane can communicate with each data board to be tested, and the test main control board can communicate with each data board to be tested through the backplane or through the debugging network port. The data boards to be tested include types such as digital acquisition, digital output, analog acquisition, and analog output. The data boards to be tested in the same batch are of the same type. Combining Figures 2A to 2C, for each test slot of the data board to be tested on the backplane, there is a conversion circuit and a selection circuit, which are connected to the data board to be tested through test signal lines. The output interface of a data board to be tested is sequentially connected to the input interface of another data board to be tested through an input connector, a conversion circuit, a selection circuit, and an output connector. The conversion circuit on the backplane supports the input and output of various types of signals, as well as the logical control of external device signals, etc. Among them, the output of the feedback signal / output channel of each data board to be tested is connected to the input connector of the backplane conversion circuit through an external signal line. The selection circuit on the backplane is controlled by the test main control board to switch according to the test instructions from the host computer, thereby changing the signal loopback direction. Among them, the acquisition channel / input interface of each data board to be tested is connected to the first output connector of the selection circuit through an external signal line. The selection circuit has two input ends and two output ends. The first input end is connected to the output of the backplane conversion circuit, and the second input end is connected to the output of the second output end of the previous selection circuit. The first output end is connected to the acquisition channel / input interface of the test slot connector of the data board to be tested, and the second output end is connected to the second input end of the next selection circuit, thereby realizing the interconnection of the selection circuits. The host computer is connected to the test main control board through a communication cable. The host computer is connected to an external input device and an external load through a communication cable. The output end of the external input device and the input end of the external load are also connected to the selection circuit. The host computer has multiple test programs built-in, which can judge the test item information of the single board according to the identified single board type, single board presence information, etc. After confirming the start of the test, it sends test instructions to each single board in sequence according to the set test logic for automated testing, and at the same time can identify the problem single board and problem items according to the fault diagnosis program. A software logic switch is also set between the acquisition channel / input interface one and the feedback signal / output channel one of the data board to be tested, and between the acquisition channel / input interface two and the feedback signal / output channel two, so that the data board to be tested can also actively interrupt the test when necessary.

[0047] The test method of this test system depends on the hardware composition of the backplane, and forms a data loopback by connecting the data boards to be tested of the same type through a specific logic, combined with Figure 3 , the specific test method is as follows:

[0048] S1: Prepare the data board to be tested. After the data board to be tested is inserted into the test slot and successfully powered on, the test main control board sends the identified single board type and slot number of the data board to be tested to the host computer. The host computer issues a test image and an automated test program to the test main control board according to the identified single board information, and the test main control board then distributes them to each data board to be tested. The automated test program is composed of logic such as data board control instructions sent by the test main control board to the backplane and the MCU of the data board to be tested according to the test instructions from the host computer;

[0049] S2: The dual channels of the data board under test form a data loopback for detection. The host computer determines the test items according to the type of the data board under test, and issues test instructions to the test master board / external device according to the test item information. After the test master software parses the test instructions, it issues control instructions to the backplane conversion circuit and each data board according to the test software control logic. The data link of the test software control logic is divided into two parts, namely, the channel 1 data transfer link from the 1st data board under test to the 8th data board under test and the channel 2 data transfer link from the 8th data board under test to the 1st data board under test, forming a data loopback for detection.

[0050] The channel 1 data transfer link is as follows: After the test master board issues the test instructions, the signals output by the external input device or the test master board are converted by the backplane conversion circuit. Then, the backplane controls the switching of the selection circuit according to the parsed test instructions, and the normal test loop switches to the acquisition channel / input interface 1 of the data board under test. The 1st data board under test controls the software logic switch 1 within its single board according to the test instructions, thereby controlling the on / off of the acquisition channel / input interface 1 and the feedback signal / output channel 1 of the 1st data board under test. After the feedback signal / output channel 1 of the 1st data board under test is converted by the backplane conversion circuit, the signal is input into the acquisition channel / input interface 1 of the 2nd data board under test through the selection circuit. The 2nd data board under test controls the software logic switch 1 within its single board according to the test instructions, thereby controlling the on / off of the acquisition channel / input interface 1 and the feedback signal / output channel 1 of the 2nd data board under test. After the feedback signal / output channel 1 of the 2nd data board under test is converted by the backplane conversion circuit, the signal is input into the acquisition channel / input interface 1 of the 3rd data board under test through the selection circuit. The 3rd data board under test controls the software logic switch 1 within its single board according to the test instructions, thereby controlling the on / off of the acquisition channel / input interface 1 and the feedback signal / output channel 1 of the 3rd data board under test. In this way, after the feedback signal / output channel 1 of the 6th data board under test is converted by the backplane conversion circuit, the signal is input into the acquisition channel / input interface 1 of the 7th data board under test through the selection circuit. The 7th data board under test controls the software logic switch 1 within its single board according to the test instructions, thereby controlling the on / off of the acquisition channel / input interface 1 and the feedback signal / output channel 1 of the 7th data board under test. After the feedback signal / output channel 1 of the 7th data board under test is converted by the backplane conversion circuit, the signal is input into the acquisition channel / input interface 1 of the 8th data board under test through the selection circuit. The 8th data board under test controls the software logic switch 1 within its single board according to the test instructions, thereby controlling the on / off of the acquisition channel / input interface 1 and the feedback signal / output channel 1 of the 8th data board under test.

[0051] The feedback signal / output channel 1 of the 8th data board under test is connected to its own acquisition channel / input interface 2 through a conversion circuit and a selection circuit, realizing the connection between the data transfer link of channel 1 and the data transfer link of channel 2;

[0052] The data transfer link of channel 2 is as follows: The signal of the feedback signal / output channel 2 of the 8th data board under test, after being converted by the backplane conversion circuit, according to the test instruction, the selection circuit is switched to the acquisition channel / input interface 2 of the 7th data board under test. The 7th data board under test then controls the software logic switch 2 within its single board according to the test instruction, thereby controlling the on / off of the acquisition channel / input interface 2 and the feedback signal / output channel 2 of the 7th data board under test; The feedback signal / output channel 2 of the 6th data board under test, after being converted by the backplane conversion circuit, inputs the signal to the acquisition channel / input interface 1 of the 6th data board under test through the selection circuit. The 6th data board under test controls the software logic switch 2 within its single board according to the test instruction, thereby controlling the on / off of the acquisition channel / input interface 2 and the feedback signal / output channel 2 of the 6th data board under test; In this way, the feedback signal / output channel 2 of the 3rd data board under test, after being converted by the backplane conversion circuit, inputs the signal to the acquisition channel / input interface 1 of the 2nd data board under test through the selection circuit. The 2nd data board under test controls the software logic switch 2 within its single board according to the test instruction, thereby controlling the on / off of the acquisition channel / input interface 2 and the feedback signal / output channel 2 of the 2nd data board under test; The feedback signal / output channel 2 of the 2nd data board under test, after being converted by the backplane conversion circuit, inputs the signal to the acquisition channel / input interface 1 of the 1st data board under test through the selection circuit. The 1st data board under test controls the software logic switch 2 within its single board according to the test instruction, thereby controlling the on / off of the acquisition channel / input interface 2 and the feedback signal / output channel 2 of the 1st data board under test; The feedback signal / output channel 2 of the 1st data board under test, after being converted by the backplane conversion circuit, returns the signal to the feedback signal receiving channel of the test main control board through the selection circuit to complete the signal loopback.

[0053] S3: The test main control board judges whether the functions of the data board under test are normal according to the analysis of the output control signal and the input feedback signal. If it is consistent with the expected result after analysis, the detection ends; if it is inconsistent with the expected result after analysis, the S4 fault diagnosis program is started, and the slot number of the problem single board and the problem function item are located through the fault diagnosis program. Since the failure rate of the data board under test in new product testing is often less than 1%, most detections can end after step S3. Compared with the detection of a single data board, the backplane test using 8 test slot interfaces can shorten the total test duration to within 20%, and the backplane test using 12 test slot interfaces can be shortened to a lower level.

[0054] The fault diagnosis program is one of the programs for testing the main control board. When there are abnormalities in the functions to be tested, the control selection circuit is used to switch to the data board under test in loopback mode to locate the slot number of the faulty board, and through traversing the function test again, the specific abnormal function item of the data board is located.

[0055] Figure 4 The following is the flowchart for detecting the fault diagnosis program of a single data board under test. The specific steps are as follows:

[0056] S41. Control all selection circuits to output from the second output terminal.

[0057] S42. Control the selection circuits connected to the acquisition channel / input interface 1 and / or acquisition channel / input interface 2 of the current data board under test to output from the first output terminal, and traverse the k problem function item tests obtained from the overall loopback detection, so as to judge and obtain the abnormal information of the current data board under test.

[0058] In step S42, it is possible to control the selection circuits connected to both the acquisition channel / input interface 1 and the acquisition channel / input interface 2 of the current data board under test to output from the first output terminal, or according to the specific abnormal items in the overall loopback detection, select to connect only to the acquisition channel / input interface 1 or the acquisition channel / input interface 2.

[0059] S43. Judge whether all data boards under test have completed the test. If the result is no, return to step S41.

[0060] The time taken to test a single problem function item for a single board is generally between 30 and 90 seconds. When the number of problem function items obtained from the overall loopback detection is small, the time taken to traverse all data boards under test is controllable. However, when the number of problem function items is large, if it is necessary to traverse all data boards under test, the time taken is too long. Therefore, a threshold is also set for k in the fault diagnosis program to adopt different traversal strategies. For details, see Figure 5 。

[0061] When the number of overall problem function items is greater than or equal to 4, all data boards under test will be divided into test groups. In this embodiment, the data boards under test numbered 1 to 4 are used as test group 1, and the data boards under test numbered 5 to 8 are used as test group 2 (if a backplane test with 12 test slot interfaces is used, it can be further divided into test group 3).

[0062] First, a data loopback is formed for the first group to be tested 1. The method of forming the data loopback is the same as the aforementioned step S2. That is, the data link of the test software control logic is divided into two parts, namely, the channel one data transfer link from the first data board to be tested to the fourth data board to be tested and the channel two data transfer link from the fourth data board to be tested to the first data board to be tested. A data loopback is formed for detection. The detection traverses and executes the problem function item tests based on k overall problem function items, so that k1 problem function items of the first group to be tested 1 can be obtained. If k1≥1, the data boards to be tested in the first group to be tested are traversed and tested. The test method is the same as Figure 4 the displayed process, with the only difference being that the problem function item tests are traversed and executed based on k1 problem function items of the first group to be tested 1 instead of k overall problem function items.

[0063] After completing the traversal of the problem function items of the first group to be tested 1 or when k1 = 0, all selection circuits are controlled to output from the second output terminal, and a data loopback is formed for the second group to be tested. That is, the data link of the test software control logic is divided into two parts, namely, the channel one data transfer link from the fifth data board to be tested to the eighth data board to be tested and the channel two data transfer link from the eighth data board to be tested to the fifth data board to be tested. A data loopback is formed for detection. The detection traverses and executes the problem function item tests based on k overall problem function items, so that k2 problem function items of the second group to be tested 2 can be obtained. If k2≥1, the data boards to be tested in the second group to be tested are traversed and tested. The test method is the same as Figure 4 the displayed process, with the only difference being that the problem function item tests are traversed and executed based on k2 problem function items of the second group to be tested 2 instead of k overall problem function items.

[0064] After completing the traversal of the problem function items of the second group to be tested 2 or when k2 = 0, locate the slot numbers and problem function items of all problem single boards.

[0065] Since the failure rate of the data boards to be tested in the new product test is low, after further loopback detection by distinguishing groups, in most cases, the number of data boards to be traversed can be halved. Even if there are faulty boards in different groups, since the number of problem function item tests that need to be traversed and executed in different groups is reduced, the test time can also be reduced.

[0066] The method of the present application can be used in numerous general-purpose or special-purpose computing system environments or configurations. For example: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronic devices, network PCs, minicomputers, mainframe computers, distributed computing environments including any of the above systems or devices, and so on. The present application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in a distributed computing environment where tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.

[0067] Exemplarily, the above method can be implemented in the form of a computer program that can run on a test system as shown in Figure 1 Figure. The test system includes a processor, a memory, and a network interface connected through a system bus. Among them, the memory can include a storage medium and an internal memory. The storage medium can store an operating system and a computer program. The computer program includes program instructions that, when executed, can cause the processor to execute any one of the loopback test methods for a dual-channel data board. The processor is used to provide computing and control capabilities to support the operation of the entire test system. The internal memory provides an environment for the operation of the computer program in the storage medium. When the computer program is executed by the processor, it can cause the processor to execute any one of the loopback test methods for a dual-channel data board. The network interface is used for network communication, such as sending assigned tasks, etc. It should be understood that the processor can be a central processing unit (CPU), and the processor can also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among them, the general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0068] In addition, it should be noted that for the specific embodiments described in this specification, the shapes and names of the components can be different. Any equivalent or simple changes made according to the structure, features and principles described in the inventive concept of this invention patent are included in the protection scope of this invention patent. Those skilled in the technical field to which this invention pertains can make various modifications or supplements to the described specific embodiments or use similar ways to substitute, as long as they do not deviate from the structure of this invention or exceed the scope defined by this claims, they should all fall within the protection scope of this invention.

Claims

1. A loopback test method for a dual-channel data board, including at least two data boards to be tested. Each data board to be tested includes an acquisition channel / input interface 1 and a re-sampling signal / output channel 1, as well as an acquisition channel / input interface 2 and a re-sampling signal / output channel 2, characterized in that: including, a data transfer link for Channel 1, which is formed by connecting the acquisition channel / input interface 1 of the next data board under test through the feedback signal / output channel 1 of the previous data board under test; a data transfer link for Channel 2, which is formed by connecting the acquisition channel / input interface 2 of the previous data board under test through the feedback signal / output channel 2 of the next data board under test; also including a selection circuit; the steps are as follows: S1. Insert the data board under test into the test slot and power it on. The test main control board sends the type of the data board under test recognized to the host computer. The host computer issues a test image and an automated test program to the test main control board according to the recognized data board under test, and then the test main control board issues them to the data board under test; S2. Close the data transfer link for Channel 1, the data transfer link for Channel 2, and the connection between the two to form a data loopback. The host computer judges the test items according to the type of the data board under test, and issues test instructions to the test main control board / external device according to the test items. After parsing the test instructions, the test main control board issues control instructions to the data board under test; S3. The test main control board judges whether the functions of the data boards under test within the data loopback are normal according to the analysis of the output control signal and the input feedback signal. If the result is no, then proceed to step S4; S4. Disconnect the data loopback, connect the test main control board to any data board under test through the selection circuit, and judge whether the functions of the data board under test are normal until all abnormal data boards are located.

2. The loopback test method for a dual-channel data board according to claim 1, wherein: The selection circuits are connected to each other. The feedback signal / output channel 1 of the previous data board under test is connected to the acquisition channel / input interface 1 of the next data board under test through the selection circuit; the feedback signal / output channel 2 of the next data board under test is connected to the acquisition channel / input interface 2 of the previous data board under test through the selection circuit; the data transfer link for Channel 1 is connected to the data transfer link for Channel 2 through the selection circuit.

3. The loopback test method for a dual-channel data board according to claim 2, wherein: The step S4 includes: S41. Disconnect all the connections between the feedback signal / output channel 1 of the previous data board under test and the acquisition channel / input interface 1 of the next data board under test, between the feedback signal / output channel 2 of the next data board under test and the acquisition channel / input interface 2 of the previous data board under test, and between the data transfer link for Channel 1 and the data transfer link for Channel 2 through the selection circuit; S42. Connect the test main control board to any data board under test through the connected selection circuits, and judge whether the functions of the data board under test are normal; S43. Judge whether all the data boards under test have completed the test. If the result is no, then return to step S41.

4. The loopback test method for a dual-channel data board according to claim 3, wherein: The step S42 further includes: connecting the acquisition channel / input interface 1 and the feedback signal / output channel 1 of any data board under test to the test main control board through the connected selection circuits, and / or connecting the acquisition channel / input interface 2 and the feedback signal / output channel 2.

5. The loopback test method for a dual-channel data board according to claim 1, wherein: The step S3 further includes: if the result is no, record the overall problem function items; The step S4 further includes: when judging whether the functions of the data board under test are normal, perform the test of the problem function items by traversing based on the overall problem function items.

6. The loopback test method for a dual-channel data board according to claim 5, characterized in that: The step S3 further includes: S31. If the number of items of the overall problem function items is greater than or equal to a preset value, divide all the data boards to be tested into at least two groups to be tested; S32. Any group to be tested forms a data loopback, and based on the overall problem function items, traverse and execute the problem function item tests, obtain and record the group problem function items of each group to be tested. If the number of items of the group problem function items is greater than or equal to 1, the data board to be tested corresponding to the group to be tested performs step S4; The step S4 further includes: when judging whether the functions measured by the data board to be tested are normal, traverse and execute the problem function item tests based on the group problem function items of the group to which the data board to be tested belongs.

7. A loopback test system for a dual-channel data board, including a host computer, an external device, a test main control board, a backplane, and at least two data boards to be tested. The data board to be tested includes a collection channel / input interface 1 and a re-sampling signal / output channel 1, and a collection channel / input interface 2 and a re-sampling signal / output channel 2. The data board to be tested is connected to the backplane, and the external device and the test main control board are connected to the data board to be tested through the backplane. The host computer controls the external device and the test main control board. It is characterized in that: The data boards to be tested are sequentially connected to the backplane, and the backplane includes: A channel 1 circuit for connecting the re-sampling signal / output channel 1 of the previous data board to be tested to the collection channel / input interface 1 of the next data board to be tested; A channel 2 circuit for connecting the re-sampling signal / output channel 2 of the next data board to be tested to the collection channel / input interface 2 of the previous data board to be tested; A connection circuit for connecting the channel 1 circuit and the channel 2 circuit; It further includes a selection circuit. The selection circuit is connected to the collection channel / input interface 1 and the collection channel / input interface 2 of the data board to be tested, and the re-sampling signal / output channel 1 and the re-sampling signal / output channel 2 of the data board to be tested are connected to the selection circuit, and the selection circuits are connected to each other; Selection circuits are provided in the channel 1 circuit, the channel 2 circuit, and the connection circuit.

8. The loopback test system for a dual-channel data board according to claim 7, wherein: A conversion circuit is further provided on the backplane. The external device, the test main control board, the re-sampling signal / output channel 1, and the re-sampling signal / output channel 2 are connected to the selection circuit through the conversion circuit.

9. The loopback test system for a dual-channel data board according to claim 7, characterized in that: Software logic switches are provided between the collection channel / input interface 1 and the re-sampling signal / output channel 1, and between the collection channel / input interface 2 and the re-sampling signal / output channel 2.

10. A computer-readable storage medium, characterized in that: A computer program is stored on the computer-readable storage medium. When the computer program is run by a processor, it executes the steps of the loopback test method for a dual-channel data board according to any one of claims 1 to 6.

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