Electronic device, clock calibration method, storage medium and program product

Abstract

The present invention provides an electronic device, a clock calibration method, a storage medium, and a program product, which can be applied in the field of computer technology. The electronic device includes: a switch element electrically connected to a first controller, a processor, a clock generator, and a second controller; the second controller is configured to control the switch element to electrically connect the first controller to the clock generator when the electronic device is in an offline state; the first controller is configured to, when the first controller is electrically connected to the clock generator, perform a first calibration on the clock generator using a first reference time obtained from a time reference device to obtain a first calibrated clock generator; and, in response to an alarm signal sent by the first calibrated clock generator at a predetermined time, obtain a second reference time from the time reference device based on a first time difference between a first current system time of the first controller and the predetermined time, and perform a second calibration on the first calibrated clock generator using the second reference time.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to an electronic device, a clock calibration method, a storage medium, and a program product. Background Art

[0002] In computer technology, the accuracy and stability of server operations impact data storage, processing, and transmission. As a component that provides a time reference within a server, a clock generator provides precise timestamps for various server operations and tasks. These timestamps are widely used in logging, event sequencing, data synchronization, and other areas.

[0003] However, the time provided by the clock generator is easily affected by various factors and may deviate. The calibration of the clock generator is not only limited in scenarios, but also occupies related resources of the operating system, resulting in low resource utilization. Summary of the Invention

[0004] In view of the above problems, the present invention provides an electronic device, a clock calibration method, a storage medium and a program product for improving clock calibration diversity and resource utilization.

[0005] One aspect of the present invention provides an electronic device, comprising: a switching element, a first controller, a processor, a clock generator and a second controller; wherein the switching element is electrically connected to the first controller, the processor, the clock generator and the second controller; the second controller is used to control the switching element to electrically connect the first controller to the clock generator when the electronic device is in an offline state; the first controller is used to perform a first calibration on the clock generator using a first reference time obtained from a time reference device when the first controller is electrically connected to the clock generator, to obtain a first calibrated clock generator; and in response to an alarm signal sent by the first calibrated clock generator at a predetermined time, obtain a second reference time from the time reference device based on a first time difference between a first current system time of the first controller and a predetermined time, and perform a second calibration on the first calibrated clock generator using the second reference time.

[0006] Another aspect of the present invention also provides a clock calibration method, comprising: in response to an instruction to calibrate the clock generator, when the electronic device is in an offline state, the second controller controls the switch element to electrically connect the first controller to the clock generator; using the first reference time obtained by the first controller from the time reference device to perform a first calibration on the clock generator to obtain a first calibrated clock generator; and in response to an alarm signal sent by the first calibrated clock generator at a predetermined time, based on the first time difference between the first current system time of the first controller and the predetermined time, obtaining a second reference time from the time reference device, and using the second reference time to perform a second calibration on the first calibrated clock generator.

[0007] Another aspect of the present invention further provides a computer-readable storage medium having a computer program or instructions stored thereon, which implements the steps of the above method when the computer program or instructions are executed by a processor.

[0008] Another aspect of the present invention provides a computer program product, comprising a computer program or instructions, which implement the steps of the above method when executed by a processor.

[0009] According to an embodiment of the present invention, an electronic device is electrically connected to a first controller, a processor, a clock generator, and a second controller via a switch element. When the electronic device is offline, the second controller can control the switch element to electrically connect the first controller to the clock generator, thereby causing the first controller to calibrate the clock generator. This provides a technical solution for calibrating the clock in an offline electronic device, thereby increasing the diversity of calibrated clocks. Furthermore, in an embodiment of the present invention, a first reference time obtained by the first controller from a time reference device is used to perform a first calibration on the clock generator, thereby obtaining a first calibrated clock generator. In response to an alarm message sent by the first calibrated clock generator at a predetermined time, a second reference time is obtained based on a first time difference between the first current system time of the first controller and the predetermined time, and the second reference time is used to calibrate the first calibrated clock generator. In other words, in an embodiment of the present invention, the calibration of the clock generator can be performed by the first controller, without relying on the processor for calibration, thereby reducing processor resource usage and achieving the technical effect of improving resource utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above contents and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0011] Figure 1 A schematic diagram of a calibration clock generator is shown;

[0012] Figure 2A block diagram of an electronic device according to an embodiment of the present invention is shown;

[0013] Figure 3 shows a block diagram of an electronic device according to another embodiment of the present invention;

[0014] Figure 4 A flow chart of calibrating a clock generator according to an embodiment of the present invention is shown;

[0015] Figure 5 shows a flow chart of calibrating a clock generator according to another embodiment of the present invention;

[0016] Figure 6 A flow chart of a clock calibration method according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0017] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of embodiments of the present invention. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.

[0018] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the presence of the features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.

[0019] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0020] When expressions such as "at least one of A, B, and C, etc." are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0021] In cloud computing environments, precise time synchronization is required between multiple servers to ensure the consistency and reliability of distributed systems. Deviations in the time provided by clock generators can lead to data inconsistencies and task scheduling errors across multiple servers, impacting the performance and service quality of the entire cloud computing platform. Furthermore, with the rapid development of the Internet of Things (IoT), a large number of smart devices are connecting and interacting with servers via the network. The collaborative operation of these devices also relies on precise time synchronization. As the core hub of IoT systems, the accuracy of the time provided by their clock generators can directly impact the normal operation of the entire IoT system. For example, in intelligent transportation systems, traffic light control, vehicle scheduling, and monitoring all require precise time synchronization. Inaccurate time provided by server clock generators can cause traffic disruptions and even lead to safety incidents.

[0022] However, the time provided by a server's clock generator is susceptible to deviations due to various factors. For one thing, the clock generator itself may have certain precision errors, which gradually accumulate over time, leading to increasing time deviations. Furthermore, the server's operating environment, such as temperature, humidity, and electromagnetic interference, can also affect the clock generator's operation, further exacerbating time deviations. Furthermore, during operation, servers may experience frequent power cycles and hardware failures, which can also cause the clock generator's time to be lost or incorrect. Therefore, how to effectively calibrate the server's clock generator time and ensure its accuracy and stability has become a pressing issue in the server industry.

[0023] Figure 1 A schematic diagram of a calibration clock generator is shown.

[0024] Currently, the calibration of clock generators is generally done by the Central Processing Unit (CPU) of the operating system (OS). The Network Time Protocol (NTP) is one of the most widely used time calibration methods. This calibration method connects to the NTP server over the network to obtain accurate time information and synchronizes the time of the server's clock generator with the accurate time information obtained from the NTP server. The NTP protocol has high accuracy and reliability and can meet the server's requirements for time accuracy to a certain extent. The specific implementation process can be as follows: Figure 1 shown.

[0025] Figure 1 CPU 101 shown can act as a client of NTP server 102. CPU 101 can periodically send time request messages to NTP server 102. Upon receiving the request, NTP server 102 returns a response message containing accurate time information. CPU 101 can adjust the time of local clock generator 103 based on the time information in the response message. In current clock generators with real-time clock recording capabilities, the clock generator may have two system management buses (SMBUS). CPU 101 is connected to the first SMBUS interface 104 and has the highest read and write permissions on the clock generator. For example, it can operate registers, read, and calibrate the clock generator time via the SMB_CPU_RTC signal. Baseboard Management Controller (BMC) 105 is connected to the second SMBUS interface 106 and can read the clock generator time, for example, via SMB_BMC_RTC. The CPU 101 and the BMC 105 can be connected via the Enhanced Serial Peripheral Interface (eSPI) to enable data exchange between the CPU 101 and the BMC 105.

[0026] based on Figure 1 The schematic diagram of the calibration clock generator shown in the figure shows that the calibration of the clock generator has the problems of limited time calibration scenarios and unreasonable resource usage. For example, the current calibration of the clock generator only supports calibration of the clock generator 103 when the server to which the CPU 101 belongs is in working state. When the server is turned off or in a state where only power is retained for detecting the pressing of the power button, the clock generator 103 cannot be calibrated, so that the calibration of the clock generator is limited to the scenario where the server is working. For another example, the current calibration of the clock generator is implemented through the CPU. This method inevitably occupies the relevant resources of the CPU. When the CPU needs to handle multiple tasks, it is easy to cause resource shortages, reduce resource utilization, and affect the stability of the CPU.

[0027] In view of this, the real-time example of the present invention provides an electronic device that is not limited to the scenario of calibrating the clock generator in the working state, but can also calibrate the clock generator when the electronic device is offline, and can also reduce the occupancy of CPU resources and improve resource utilization.

[0028] ‌ Figure 2 A block diagram of an electronic device according to an embodiment of the present invention is shown.

[0029] like Figure 2 As shown, the electronic device may include a switch element 201, a first controller 202, a processor 203, a clock generator 204, and a second controller 205. The switch element 201 is electrically connected to the first controller 202, the processor 203, the clock generator 204, and the second controller 205.

[0030] In some embodiments, the switch element 201 can be an electronic component capable of performing a switching function in an analog circuit, such as an analog switch. The switch element 201 performs tasks such as switching, selecting, and processing analog signals in the analog circuit. In some embodiments, the switch element 201 can respond to a signal from the second controller 205 to electrically connect the first controller 202 to the clock generator 204, or to electrically connect the processor 203 to the clock generator 204.

[0031] In some embodiments, first controller 202 may be a device for calibrating a clock generator, such as a BMC. The BMC may have its own power supply, allowing it to continue operating and calibrating clock generator 204 even if the server to which the CPU belongs is shut down. In some embodiments, first controller 202 may be communicatively coupled to a time reference device to obtain the first reference time or the second reference time from the time reference device.

[0032] In some embodiments, the processor 203 may be a CPU, which is used to process data and perform calculations, etc. When the server to which the CPU belongs is powered on, the processor 203 may obtain time information from the clock generator 204 .

[0033] In some embodiments, the clock generator 204 can be an independent timing circuit for continuously tracking time, and can be powered by an independent power supply unit to ensure that the clock generator maintains accurate time information. The clock generator 204 can be, for example, a real-time clock (RTC).

[0034] In some embodiments, the second controller 205 may be a logic device for controlling and managing analog circuits by processing digital signals in the analog circuits, such as a complex programmable logic device (CPLD).

[0035] In some embodiments, the second controller 205 can be configured to control the switch element 201 to electrically connect the first controller 202 to the clock generator 204 when the electronic device is offline. In some embodiments, the second controller 205 can control the switch element to switch back and forth between a state in which the processor 203 is electrically connected to the clock generator 204 and a state in which the first controller 202 is electrically connected to the clock generator 204, to meet the needs of the processor 203 or the first controller 202 for using the clock generator 204.

[0036] In one embodiment of the present invention, the electronic device is in an offline state, which may be that the server to which the processor 203 belongs is in a shutdown state.

[0037] In some embodiments, the first controller 202 can be used to perform a first calibration on the clock generator 204 using a first reference time obtained from a time reference device when the first controller 202 is electrically connected to the clock generator 204, thereby obtaining a first calibrated clock generator 204; and in response to an alarm signal sent by the first calibrated clock generator 204 at a predetermined time, obtain a second reference time from the time reference device based on a first time difference between a first current system time of the first controller 202 and the predetermined time, and perform a second calibration on the first calibrated clock generator 204 using the second reference time.

[0038] In some embodiments, the time reference device may be a device for providing a reference time, such as an NTP server. This reference time may be used to calibrate the clock generator 204. The first reference time and the second reference time obtained from the time reference device may both be instant information. The first reference time may be earlier than the second reference time. The first reference time may be used to initially calibrate the clock generator 204, and the second reference time may be used to recalibrate the initially calibrated clock generator 204. In this way, the clock generator 204 may be calibrated twice, thereby improving the time accuracy of the clock generator 204.

[0039] In some embodiments, the first controller 202 can obtain a first reference time from a time reference device and use the first reference time to update its own second current system time. Simultaneously, the first controller 202 can also obtain a first time to be calibrated of the clock generator 204. The first time to be calibrated can be the first current clock time of the clock generator 204. If the second time difference between the first reference time and the first time to be calibrated is greater than a predetermined value, the first time to be calibrated of the clock generator 204 can be calibrated to the first reference time, thereby completing the initial calibration of the clock generator 204.

[0040] In some embodiments, the predetermined value may be a standard for determining whether the clock generator needs to be calibrated. For example, when the first time difference or the second time difference is less than or equal to the predetermined value, it may indicate that the first time difference or the second time difference can be ignored, and the time of the clock generator 204 is accurate; when the first time difference or the second time difference is greater than the predetermined value, it may indicate that the first time difference or the second time difference cannot be ignored, and the time of the clock generator 204 is inaccurate and needs to be calibrated. The above-mentioned circuit may be used to calibrate the clock generator.

[0041] In some embodiments, the predetermined value can be adaptively adjusted based on actual needs. By setting the predetermined value and calibrating the clock generator 204 when the time difference is greater than the predetermined value, frequent calibration of the clock generator 204 can be avoided. This not only reduces invalid time calibrations, reduces the number of switching times of the first clock interface of the clock generator 204, and reduces hardware consumption, but also saves resources for the first controller 202 and improves resource utilization.

[0042] In some embodiments, the predetermined time may be the time for the clock generator 204 to send an alarm. The clock generator 204 may have a timing function. By activating the timing function of the clock generator 204 and proactively sending an alarm to the first controller 202 when the clock generator 204 reaches the predetermined time, the first controller 202 can calibrate the clock generator 204. The calibration process of this embodiment eliminates the need for the first controller to initiate a task to proactively calibrate the clock generator. The calibration task is triggered by the clock generator 204, thereby reducing resource consumption of the first controller and improving resource utilization.

[0043] In some embodiments, when the initially calibrated clock generator 204 reaches a predetermined time, an alarm message may be sent to the first controller 202, indicating that the initially calibrated clock generator 204 has reached the predetermined time. The first controller 202 responds to the alarm message and may obtain its own first current system time and compare the first time difference between the first current system time and the predetermined time. If the first time difference is less than or equal to a predetermined value, it indicates that the time of the initially calibrated clock generator 204 is accurate; if the first time difference is greater than the predetermined value, it indicates that the time of the initially calibrated clock generator 204 is inaccurate. In this case, the initially calibrated clock generator 204 may be calibrated again.

[0044] In some embodiments, the initially calibrated clock generator 204 can be recalibrated by using the first controller 202 to obtain a reference time from the time reference device, i.e., a second reference time, and calibrating the second current clock moment of the initially calibrated clock generator 204 to the second reference time. The second current clock moment is later than the first current clock moment. By calibrating the clock generator 204 multiple times, the accuracy of the time information of the time generator 204 can be guaranteed, thereby providing an accurate basis for systems that require the time generator 204, ensuring the accurate and stable operation of these systems and improving the reliability of these systems.

[0045] According to an embodiment of the present invention, an electronic device is electrically connected to a first controller, a processor, a clock generator, and a second controller via a switch element. When the electronic device is offline, the second controller can control the switch element to electrically connect the first controller to the clock generator, thereby causing the first controller to calibrate the clock generator. This provides a technical solution for calibrating the clock in an offline electronic device, thereby increasing the diversity of calibrated clocks. Furthermore, in an embodiment of the present invention, a first reference time obtained by the first controller from a time reference device is used to perform a first calibration on the clock generator, thereby obtaining a first calibrated clock generator. In response to an alarm message sent by the first calibrated clock generator at a predetermined time, a second reference time is obtained based on a first time difference between the first current system time of the first controller and the predetermined time, and the second reference time is used to calibrate the first calibrated clock generator. In other words, in an embodiment of the present invention, the calibration of the clock generator can be performed by the first controller, without relying on the processor for calibration, thereby reducing processor resource usage and achieving the technical effect of improving resource utilization.

[0046] Figure 3 A block diagram of an electronic device according to another embodiment of the present invention is shown.

[0047] like Figure 3 As shown, the electronic device of this embodiment may include a switch element 201, a first controller 202, a processor 203, a clock generator 204, a second controller 205, a first power supply unit 301 and a second power supply unit 302. The control terminal 201-1 of the switch element 201 may be electrically connected to an interface of the second controller 205, the first terminal 201-2 of the switch element 201 may be electrically connected to a first clock interface 204-1 of the clock generator 204, the second terminal 201-3 of the switch element 201 may be electrically connected to an interface of the first controller 202, and the third terminal 201-4 of the switch element 201 may be electrically connected to the processor 203.

[0048] exist Figure 3In the block diagram shown, the switch element 201 can be electrically connected to the first clock interface 204-1 (i.e., the first SMBUS interface) of the clock generator 204 through the SMB_RTC_PRIMARY signal, and the first controller 202 can be electrically connected to the second clock interface 204-2 (i.e., the second SMBUS interface) of the clock generator 204 through the SMB_BMC_RTC signal, that is, the first controller 202 can multiplex a group of SMBUS interfaces to simultaneously connect to the first clock interface 204-1 and the second clock interface 204-2 of the clock generator 204, and the first controller 202 can access the clock generator 204 by accessing the Slave address of the clock generator. The processor 203 and the first controller 202 can be connected to the switch element 201 via SMB_CPU_RTC and SMB_BMC_RTC, respectively. The second controller 205 can control whether the first controller 202 or the processor 203 is connected to the SMB_RTC_PRIMARY signal via the FW_SW_SEL signal. The first controller 202 can send a request to the second controller 205 via the FM_SW_SEL_NOTICE signal to cause the switch element 201 to switch, for example, switching the first controller 202 or the processor 203 connected to the clock generator 204. The alarm signal FM_RTC_ALT_N of the clock generator 204 can be connected to both the first controller 202 and the processor 203 to actively trigger an alarm signal, for example, triggering an alarm signal to the first controller 202 at a predetermined time.

[0049] Continue to refer to Figure 3 The first power supply unit 301 can be electrically connected to the first power supply interface 204-3 of the clock generator 204, and is used to power the clock generator 204 when the electronic device is in the power-on state. The second power supply unit 302 can be electrically connected to the second power supply interface 204-4 of the clock generator 204. The second power supply unit 302 can be an independent power supply unit belonging to the clock generator 204 itself, and is used to power the clock generator 204 when the electronic device is in the offline state.

[0050] In one embodiment of the present invention, the electronic device being in a powered-on state or an offline state may refer to the server to which the processor 203 belongs being powered-on or offline. When the server is powered-on, the clock generator 204 may be powered by the server via the first power supply unit 301. When the server is powered-off and offline, the clock generator 204 may be powered by the second power supply unit 302 to ensure continuous operation of the clock generator 204.

[0051] According to an embodiment of the present invention, the processor and the first controller use a switching element to switch the control of the first clock interface of the clock generator, and the first controller uses the same set of bus interfaces to simultaneously connect to different interfaces of the clock generator, and uses different SMBUS addresses to realize separate operations on the two SMBUS bus interfaces of the clock generator, which can facilitate the first controller to perform calibration of the clock generator and reduce the resource pressure of the CPU.

[0052] based on Figure 3 The electronic device shown in the embodiment of the present invention provides a process for calibrating a clock generator in an electronic device in an offline state, such as Figure 4 shown.

[0053] Figure 4 A flow chart of calibrating a clock generator according to an embodiment of the present invention is shown.

[0054] like Figure 4 As shown, in one embodiment, the process of calibrating the clock generator in an electronic device in an offline state may include operations S410 to S440.

[0055] In operation S410, a first controller performs an initial time calibration on a clock generator to obtain a first calibrated clock generator. A first calibration record corresponding to the first calibrated clock generator may be stored in a log.

[0056] In operation S420, the first controller enables a timing function of a clock generator and configures a predetermined time.

[0057] In operation S430, the clock generator counts time and sends an alarm signal when a predetermined time is reached.

[0058] In operation S440, the first controller performs time comparison and calibrates the first calibrated clock generator to obtain a second calibrated clock generator. A second calibration record corresponding to the second calibrated clock generator may be stored in a log.

[0059] In some embodiments, when the electronic device is offline, i.e., in response to a server shutdown, the second controller can control FM_SW_SEL to enable SMB_BMC_RTC and SMB_RTC_PRIMARY, thereby connecting the first controller to the first clock interface of the clock generator. At this point, the first controller has ultimate control over the clock generator. In one example, the clock generator can be calibrated at a predetermined time each day (e.g., Time1) with a calibration accuracy of a predetermined value (e.g., T0). Specifically, when the second time difference between the first current clock time of the clock generator and the second current system time of the first controller is greater than T0, or the first time difference between the second current clock time of the clock generator and the first current system time of the first controller is greater than T0, the time of the clock generator is inaccurate and the time of the clock generator is updated. If the first current clock time of the clock generator and the second current system time of the first controller are less than or equal to T0, or the second current clock time of the clock generator and the first current system time of the first controller are less than or equal to T0, the time of the clock generator is accurate and the clock generator may not be calibrated.

[0060] In some embodiments, in the above operation S410, the first controller can read the precise network time from the time reference device (e.g., an NTP server) and update its own second current system time (e.g., Time0), and at the same time read the first current clock time (e.g., Time2) of the clock generator. If |Time2-Time0|≤T0, the clock generator is not calibrated; if |Time2-Time0|>T0, Time0 is written into the clock generator for a clock calibration to obtain a first calibrated clock generator, which represents the initial calibration of the clock generator. The first calibration record based on this operation can be stored in the log.

[0061] In some embodiments, in the above operation S420, the first controller may enable the timed alarm function of the clock generator through the first clock interface, and configure Time1 as the predetermined alarm time.

[0062] In some embodiments, in the above operation S430, when the time of the clock generator reaches a predetermined time (for example, Time1), the alarm function of the clock generator is triggered. At this time, the clock generator can lower the level of the electrical signal between the first controller and the clock generator, for example, lower the level of the FM_RTC_ALT_N signal, to obtain an alarm signal to trigger the timing mechanism.

[0063] In some embodiments, in the above operation S440, when the first controller detects that FM_RTC_ALT_N is pulled low, the first current system time of the first controller (for example, Time3) can be recorded. If |Time3-Time1|≤T0, the clock generator is not calibrated; if |Time3-Time1|>T0, the clock generator can be calibrated.

[0064] In some embodiments, the calibrated clock generator may be calibrated again using the first current system time. For example, Time3 may be written into the clock generator for recalibration.

[0065] In some embodiments, a second reference time (e.g., Time4) may be retrieved from the time reference device and written into the clock generator to recalibrate the first-calibrated clock generator. A second calibration record based on this operation may also be stored in the log.

[0066] According to an embodiment of the present invention, the above process can realize the calibration of the clock generator when the server is shut down, which increases the diversity of calibration scenarios. Moreover, in the above calibration process, the first controller does not need to actively start the calibration task. The first controller will only calibrate the clock generator when the clock generator reaches the predetermined time and alerts the first controller. This can reduce the resource occupation of the first controller and improve resource utilization.

[0067] According to an embodiment of the present invention, by storing the first calibration record and the second calibration record in the log, it is not only convenient to determine whether the calibration of the clock generator is successful based on the first calibration record and the second calibration record, but also the working status of the clock generator can be determined based on the first calibration record and the second calibration record. For example, it is possible to determine whether the clock generator has been aged or affected by temperature based on the time deviation in the calibration record, and then the predetermined time or accuracy value can be adjusted based on the time deviation to compensate the time of the clock generator in advance, reduce the number of times the clock generator is adjusted, and save resources.

[0068] In some embodiments, the time reference device mentioned in the above operation may be any time reference device in a time reference device cluster. For example, the first controller is in communication with the time reference device cluster, where the time reference device cluster includes multiple time reference devices, each of which is configured with priority information. The first controller is further configured to: in response to an instruction for obtaining a reference time, arrange the time reference devices according to their priority information to obtain an arrangement result, where the instruction for obtaining a reference time includes an instruction for obtaining a first reference time or an instruction for obtaining a second reference time; and based on the arrangement result and the operating status of the time reference device, obtain the first reference time or the second reference time.

[0069] In some embodiments, the time reference devices in the time reference device cluster may include an NTP server for providing reference time information, a first time server equipped with a global positioning system, and a second time server equipped with a time synchronization protocol system. These time reference devices may have priority information, for example, the NTP server takes precedence over the first time server, and the first time server takes precedence over the second time server.

[0070] Arranging the NTP server, the first time server, and the second time server according to priority may result in the following order: NTP server > first time server > second time server. When the first controller needs to obtain the first reference time or the second reference time from the time reference device, the operating status of the NTP server can be determined based on the communication signal between the first controller and the NTP server. If a communication signal exists between the first controller and the NTP server, it can be determined that the NTP server is operating, and the first reference time or the second reference time can be obtained from the NTP server. If no communication signal exists between the first controller and the NTP server, it can be determined that the NTP server is not operating, and the first reference time or the second reference time can be obtained from the first time server based on the ranking result.

[0071] According to an embodiment of the present invention, by configuring multiple time reference devices, multiple time sources are provided for the first controller. By obtaining the first reference time or the second reference time based on the priority information of the multiple time sources, the availability of the first reference time or the second reference time can be guaranteed, and the reliability of the calibration clock generator can be improved.

[0072] In some embodiments, the above description is about calibration of the clock generator when the electronic device is offline. When the electronic device is powered on, the electronic device of the embodiment of the present invention can also calibrate the clock generator and reduce the occupancy of CPU resources.

[0073] In some embodiments, the second controller is also used to control the switch element to electrically connect the processor to the clock generator when the electronic device is in the power-on state; the first controller is also used to: when the processor is electrically connected to the clock generator, send a first control signal to the second controller, so that the second controller controls the switch element to electrically connect the first controller to the first clock interface of the clock generator according to the first control signal, and configure a predetermined time for the clock generator through the first clock interface; send a second control signal to the second controller, so that the second controller controls the switch element to electrically connect the processor to the first clock interface according to the second control signal.

[0074] In some embodiments, the first controller is also used to: when the processor is electrically connected to the clock generator, in response to an alarm signal sent by the first calibrated clock generator at a predetermined time, send a first control signal to the second controller so that the second controller controls the switching element to electrically connect the first controller to the first clock interface; perform a second calibration on the first calibrated clock generator using a second reference time; and send a second control signal to the second controller so that the second controller responds to the second control signal.

[0075] In some embodiments, the first control signal may be a signal indicating that the first controller is connected to the clock generator, and the second control signal may be a signal indicating that the processor is connected to the clock generator.

[0076] In some embodiments, the process of calibrating the clock generator when the electronic device is powered on is different from the process of calibrating the clock generator when the electronic device is powered off in that when the electronic device is powered on, the processor and the clock generator are conductive, and only when the clock generator needs to be calibrated is the conductive state between the processor and the clock generator switched to the conductive state between the first controller and the clock generator, and when the first controller configures a predetermined time for alarming the clock generator or recalibrates the clock generator, the conductive state between the first controller and the clock generator is switched back to the conductive state between the processor and the clock generator.

[0077] Figure 5 FIG. 4 is a flow chart of calibrating a clock generator according to another embodiment of the present invention.

[0078] In some embodiments, when the electronic device is powered on, the second controller can control FM_SW_SEL to select SMB_CPU_RTC and SMB_RTC_PRIMARY, that is, the processor is connected to the first clock interface of the clock generator. In one example, the clock generator can be calibrated at a predetermined time (e.g., Time1') every day, with a calibration accuracy of a predetermined value (e.g., T0'). The process of calibrating the clock generator when the electronic device is powered on can be as follows: Figure 5 As shown, it includes operations S510 to S560.

[0079] like Figure 5 As shown, the process of calibrating the clock generator in this embodiment may include operations S510 to S560.

[0080] In operation S510 , a channel is switched to electrically connect a first controller with a clock generator.

[0081] In operation S520, the first controller performs initial time calibration on the clock generator to obtain a first calibrated clock generator. A first calibration record corresponding to the first calibrated clock generator may be stored in a log.

[0082] In operation S530, the first controller enables a timing function of the clock generator and configures a predetermined time.

[0083] In operation S540 , the channel is switched to electrically connect the first controller to the clock generator.

[0084] In operation S550 , the clock generator counts time and sends an alarm signal when a predetermined time is reached.

[0085] In operation S560, the first controller performs time comparison and calibrates the first calibrated clock generator to obtain a second calibrated clock generator. A second calibration record corresponding to the second calibrated clock generator may be stored in a log.

[0086] In some embodiments, in the above operation S510, the first controller may notify the second controller through a first control signal (eg, FM_SW_SEL_NOTICE signal) to control FM_SW_SEL to select SMB_BMC_RTC and SMB_RTC_PRIMARY, ie, the first controller is connected to the first clock interface of the clock generator.

[0087] In some embodiments, in the above operation S520, the first controller can read the precise network time from the time reference device (e.g., an NTP server) and update its own second current system time (e.g., Time0'), and at the same time read the first current clock time (e.g., Time2') of the clock generator. If |Time2'-Time0'|≤T0', it indicates that the time of the clock generator is accurate, and the clock generator is not calibrated; if |Time2'-Time0'|>T0', it indicates that the time of the clock generator is inaccurate, and Time0' can be written to the clock generator for a clock calibration, indicating the initial calibration of the clock generator. The first calibration record based on this operation can be stored in the log.

[0088] In some embodiments, in the above operation S530, the first controller may enable the timing alarm function of the clock generator through the first clock interface, and configure Time1' as the predetermined alarm time.

[0089] In some embodiments, in the above operation S540, when the configuration is completed at the predetermined time, the first controller can immediately change the FM_SW_SEL_NOTICE signal at the time of configuration completion to switch the first clock interface back to the processor, so that the processor and the clock generator are connected.

[0090] In some embodiments, in the above operation S550, when the time of the clock generator reaches a predetermined time (for example, Time1'), the alarm function of the clock generator is triggered. At this time, the clock generator can lower the level of the electrical signal between the first controller and the clock generator, for example, lower the level of the FM_RTC_ALT_N signal, to obtain an alarm signal to trigger the timing mechanism.

[0091] In some embodiments, in the above operation S560, when the first controller detects that FM_RTC_ALT_N is pulled low, the second current system time of the first controller (for example, Time3') is recorded. If |Time3'-Time1'|≤T0', the clock generator is not calibrated; if |Time3'-Time1'|>T0', the first controller takes the lead in performing clock calibration.

[0092] The first controller can use a first control signal (e.g., the FM_SW_SEL_NOTICE signal) to notify the second controller to control FM_SW_SEL to select SMB_BMC_RTC and SMB_RTC_PRIMARY. The first controller can then read the precise network time Time4' from a time reference device (e.g., an NTP server) and write it to the clock generator. After Time4' is written, the first controller can immediately change the first control signal (e.g., the FM_SW_SEL_NOTICE signal) to obtain a second control signal. This second control signal can be used to control a switch element, switching the first controller connected to the first clock interface back to the processor, thereby connecting the clock generator to the processor.

[0093] According to an embodiment of the present invention, when the electronic device is turned on, there is no need for the first controller to start an active calibration task. The timing function of the clock generator can be used to trigger an alarm signal to inform the first controller to perform time correction when a predetermined time is reached. This not only eliminates the dependence of the calibration clock generator on the CPU, but also saves resource usage of the CPU and the first controller system.

[0094] According to an embodiment of the present invention, in the above-mentioned process of calibrating the clock generator, the time calibration accuracy of the clock generator is configured. For example, at T0 when the electronic device is offline and T0' when the electronic device is powered on, the clock generator is calibrated only when the first time difference or the second time difference exceeds the time calibration accuracy, thereby reducing invalid time calibration and reducing resource usage. When the electronic device is powered on, the number of switching times of connecting the first clock interface of the clock generator to the processor or the first controller can be reduced.

[0095] In some embodiments, before the second controller switches the processor connected to the first clock interface of the clock generator to the first controller, it can detect whether there is a clock pulse signal between the processor and the clock generator, and if there is no clock pulse signal between the processor and the clock generator, the processor connected to the first clock interface of the clock generator is switched to the first controller; if there is a clock pulse signal between the processor and the clock generator, the switching of the first clock interface is stopped.

[0096] If a pulse signal is detected between the processor and the clock generator, it can be indicated that data is being exchanged between the processor and the clock generator. In this case, the switching of the first clock interface can be stopped. If no pulse signal is detected between the processor and the clock generator, it can be indicated that there is no data exchange between the processor and the clock generator. In this case, the first controller can be switched to avoid switching the first controller during the interaction between the processor and the clock generator, and avoid the scenario where the first controller is forced to read and write the clock generator when the processor is reading and writing the clock generator, thereby ensuring the smooth operation of the processor and the clock generator.

[0097] Based on the above electronic device, an embodiment of the present invention further provides a clock calibration method for the above electronic device. The process of the clock calibration method can be as follows: Figure 6 shown.

[0098] Figure 6 A flow chart of a clock calibration method according to an embodiment of the present invention is shown.

[0099] like Figure 6 As shown, the clock calibration method may include operations S610 to S630.

[0100] In operation S610, in response to an instruction to calibrate the clock generator, when the electronic device is in an offline state, the second controller controls the switch element to electrically connect the first controller to the clock generator.

[0101] In operation S620, the clock generator is first calibrated using the first reference time obtained by the first controller from the time reference device to obtain a first calibrated clock generator. In one example, operations S610 to S620 may refer to operation S410, and the first calibrated clock generator may be an initially calibrated clock generator.

[0102] In operation S630, in response to an alarm signal transmitted by the first calibrated clock generator at a predetermined time, a second reference time is obtained from a time reference device based on a first time difference between the first current system time of the first controller and the predetermined time, and the first calibrated clock generator is second calibrated using the second reference time. In one example, operation S630 may refer to operations S430 to S440.

[0103] According to an embodiment of the present invention, by calibrating the clock generator when the server is shut down, not only the diversity of calibration scenarios is increased, but the calibration task is also started when the clock generator reaches a predetermined time, which can reduce the resource occupation of the first controller and improve resource utilization.

[0104] In some embodiments, when the electronic device is powered on, in response to an instruction to calibrate the clock generator, the second controller may control a switch element to electrically connect the processor to the clock generator. In response to an alarm signal, a first control signal is sent to the second controller, causing the second controller to control the switch element to electrically connect the first controller to the first clock interface. A second calibration is performed on the clock generator that has undergone the first calibration using a second reference time, and a second control signal is sent to the second controller, causing the second controller to respond to the second control signal. In one example, this process may refer to operations S510 through S560.

[0105] According to an embodiment of the present invention, in the powered-on state, upon receiving an alarm signal, the processor connected to the first clock interface can be switched to the first controller. After the first controller completes calibration, the first controller connected to the first clock interface can be switched back to the processor. This process eliminates the need for the first controller to actively initiate calibration tasks, reducing resource usage by the first controller. Furthermore, by using the first controller to calibrate the clock generator while the computer is powered on, the clock generator calibration process is less dependent on the processor.

[0106] In some embodiments, when the electronic device is in an offline state or a powered-on state, a first reference time obtained by the first controller from a time reference device can be used to perform a first calibration on the clock generator, thereby obtaining a first-calibrated clock generator. In one embodiment, the process of obtaining the first-calibrated clock generator may include the following operations: updating the second current system moment of the first controller to the first reference time, wherein the second current system moment is earlier than the first current system moment; and performing a first calibration on the clock generator based on the relationship between the first reference time and the first time to be calibrated of the clock generator, thereby obtaining a first-calibrated clock generator.

[0107] In some embodiments, based on the relationship between the first reference time and the first time to be calibrated of the clock generator, a first calibration is performed on the clock generator to obtain a first calibrated clock generator. The process may include the following operations: in response to the second time difference between the first reference time and the first time to be calibrated being less than or equal to a predetermined value, stopping the calibration of the clock generator; in response to the second time difference being greater than the predetermined value, calibrating the first time to be calibrated to the first reference time.

[0108] According to the embodiment of the present invention, by performing initial calibration on the clock generator to ensure consistency of initial time information, time deviation can be reduced and the frequency of calibration of the clock generator can be reduced.

[0109] In some embodiments, whether the electronic device is in an offline state or in a powered-on state, a second calibration can be performed on the clock generator using a second reference time obtained by the first controller from a time reference device, thereby obtaining a second calibrated clock generator. The process of obtaining the second reference time may include the following operations: obtaining a first current system time of the first controller; obtaining a second reference time from the time reference device when a first time difference between the first current system time and a predetermined time is greater than a predetermined value; and when the first time difference between the first current system time and the predetermined time is less than or equal to a predetermined value, indicating that the time information of the clock generator is accurate, obtaining the second reference time may not be necessary.

[0110] According to an embodiment of the present invention, by obtaining the second reference time when the first time difference is greater than a predetermined value, the number of times the second reference time is invalidly obtained can be reduced. The obtained second reference time can be used to implement secondary calibration of the clock generator, thereby improving the time accuracy of the clock generator.

[0111] In some embodiments, the above-mentioned clock calibration method may further include the following operations: in response to an alarm signal sent by the first calibrated clock generator at a predetermined time, performing a second calibration on the first calibrated clock generator based on a first time difference between the first current system time and the predetermined time, and using the first current system time.

[0112] In some embodiments, a process of performing a second calibration on a first calibrated clock generator based on a first time difference between a first current system moment and a predetermined moment, and using the first current system moment, may include the following operations: in response to a moment when the first time difference is greater than a predetermined value, obtaining a second time to be calibrated of the clock generator; calibrating the second time to be calibrated to the first current system moment to obtain a second calibrated clock generator.

[0113] In some embodiments, the second time to be calibrated may be a second current clock time of the clock generator.

[0114] In some embodiments, when the electronic device is in an offline state, if the first time difference between the first current system moment and the predetermined moment is greater than a predetermined value, it can be indicated that the clock generator is inaccurate. Therefore, when the first time difference is greater than the predetermined value, the second time to be calibrated of the clock generator can be obtained. The second time to be calibrated can be later than the predetermined moment, and the second time to be calibrated can be calibrated to the first current system moment.

[0115] According to an embodiment of the present invention, by calibrating the second time to be calibrated to the first current system time, the number of times the first controller obtains the second reference time can be reduced, that is, the number of interactions between the first controller and the time reference device can be reduced, and the resource consumption of the first controller due to the interactive operation can be reduced, thereby improving resource saving and improving resource utilization.

[0116] In some embodiments, the clock calibration method may further include the following operations: determining a historical trigger error of the scheduled time according to a distribution characteristic value of the first time difference; and adjusting the scheduled time using the historical trigger error to obtain an updated scheduled time.

[0117] In some embodiments, a first calibration record of a first calibration of a clock generator by a first controller and a second calibration record of a second calibration of the clock generator by a first controller may be stored in a log. The first calibration record and the second calibration record may each include information such as a first current clock time, a second current clock time, a first current system time, a second current system time, a scheduled time, a record of calibration success or failure, and the number of calibrations.

[0118] In some embodiments, based on the historical first time difference between the first current system moment and the scheduled moment in the case of a triggered calibration in the second calibration record, a distribution characteristic value of the historical first time difference, such as the mean or standard deviation of the first time difference, can be obtained. Based on these distribution characteristic values, a historical trigger error at the scheduled moment can be obtained. In one example, if the mean of the first time difference between the first current system moment and the scheduled moment is less than 0, indicating a delay in the scheduled moment, the scheduled moment can be advanced to obtain an updated scheduled moment. For example, the scheduled moment can be added to the average of the first time difference to obtain the updated scheduled moment.

[0119] According to the embodiment of the present invention, by continuously updating the scheduled time, the number of times the clock generator is calibrated can be reduced, and unnecessary calibration of the clock generator can be reduced, thereby reducing the resources required for calibrating the clock generator and improving resource utilization.

[0120] In some embodiments, the clock generator may be affected by temperature during operation, which in turn may affect the timing information of the clock generator, such as the scheduled timing of the clock generator, and thus affect the alarm of the clock generator at the scheduled timing, which may lead to frequent calibration of the clock generator, increasing the resources required to calibrate the clock generator and reducing resource utilization.

[0121] In some embodiments, a temperature sensor may be installed on the clock generator, or a sphere with a predetermined radius and centered around the clock generator may be used to draw a temperature sensor on a portion of the sphere that is not the clock generator. The temperature sensor can be used to detect the ambient temperature of the clock generator in real time. As a preferred embodiment, since the temperature sensor may emit heat during operation, and this heat, when continuously accumulated, may accelerate the impact of temperature on the performance of the clock generator, the temperature sensor may be installed on a portion of the sphere that is not the clock generator to reduce the impact of temperature on the clock generator, improve the performance of the clock generator, reduce the number of calibrations required for the clock generator, reduce the use of calibration resources, and improve resource utilization.

[0122] In some embodiments, different ambient temperatures may result in different time calibration accuracies. For example, different ambient temperatures may result in different T0s or different T0's. Before the first controller compares the second current system time with the first current clock time, or before comparing the first current system time with the second current clock time, the ambient temperature may be acquired from a temperature sensor. Based on the temperature range in which the ambient temperature falls, T0 or T0' corresponding to the ambient temperature range may be determined. The T0 or T0' corresponding to the ambient temperature range may be used as a criterion for determining whether to calibrate the clock generator, thereby calibrating the clock generator.

[0123] According to an embodiment of the present invention, by calibrating the clock generator using T0 or T0' corresponding to the ambient temperature range, T0 or T0' can be dynamically adjusted, thereby avoiding frequent calibration of the clock generator and reducing calibration resource consumption.

[0124] In some embodiments, the above-mentioned temperature sensor is a component that can be attached externally. In order to accurately detect the temperature of the clock generator itself, the clock generator can be configured with a temperature sensor for detecting the temperature of the clock generator. The temperatures of different clock generators can have different T0 or different T0'. The clock generator is calibrated according to T0 or T0' corresponding to the temperature of the clock generator. The time information of the clock generator can be accurately obtained, unnecessary calibration of the clock generator can be reduced, the consumption of calibration resources can be reduced, and resource utilization can be improved.

[0125] In some embodiments, the above-mentioned clock calibration method may further include the following operations: determining the calibration result of the clock generator based on the calibration record, the calibration record including a first calibration record and a second calibration record; if the calibration result indicates a calibration failure, repeating the operation of calibrating the clock generator; if the operation of calibrating the clock generator is repeated a predetermined number of times and the obtained repeated calibration record still indicates a calibration failure, pushing information about the calibration failure to the target object.

[0126] In some embodiments, both the first calibration record and the second calibration record may record an identifier of calibration success or calibration failure, such as a field indicating calibration success or a field indicating calibration failure.

[0127] In some embodiments, a predetermined number of calibrations can be used to determine whether to continue calibrating the clock generator. If the number of calibrations of the clock generator has not reached the predetermined number, the calibration of the clock generator can be repeated until a field indicating successful calibration is included in the repeated calibration record obtained by repeatedly calibrating the clock generator. If the number of calibrations of the clock generator has reached the predetermined number of calibrations, but the field indicating successful calibration is still not included in the repeated calibration record, the calibration of the clock generator can be terminated, and a calibration failure message can be sent to the target object.

[0128] In some embodiments, the target object may be an object that can process calibration failure information, such as an operation and maintenance personnel, an operation and maintenance robot, and an intelligent operation and maintenance device.

[0129] In some embodiments, pushing calibration failure information to a target object may include the following operations: calling a template for pushing information, wherein the template may be divided into different description areas based on information attributes, such as an area for describing the identifier of the target object, an area for describing the identifier of the failed calibration record, an area for describing the identifier of the first controller in which the calibration failure occurred, and an area for describing the identifier of the clock generator in which the calibration failure occurred. The calibration failure information may be obtained by filling in the above description areas based on the information recorded in the first calibration record or the second calibration record having the calibration failure field.

[0130] According to an embodiment of the present invention, by calling the template of the push information and automatically filling in the template of the push information according to the information in the first calibration record or the second calibration record, the efficiency of generating calibration failure information can be improved, thereby facilitating the template object to promptly maintain the electronic device according to the calibration failure information, such as maintaining the first controller or clock generator, thereby ensuring the operational reliability of the electronic device and ensuring that the electronic device can provide reliable time information in a timely manner.

[0131] According to embodiments of the present invention, by automatically sending calibration failure information to a target object, the target object no longer needs to actively and continuously monitor the first controller's calibration of the clock generator, thereby reducing resource consumption. Furthermore, automatically sending calibration failure information to a target object can help the target object promptly detect clock generator failures and perform maintenance, thereby improving the reliability of the electronic device.

[0132] It should be noted that, unless it is clearly stated that there is a sequence of execution between different operations shown in the flowchart in the embodiments of the present invention, or there is a sequence of execution between different operations in technical implementation, otherwise, the execution order of multiple operations may not be prioritized, and multiple operations may also be executed simultaneously.

[0133] The present invention also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments, or may exist independently and not incorporated into the device / apparatus / system. The computer-readable storage medium carries one or more programs, which, when executed, implement the method according to the embodiments of the present invention.

[0134] According to an embodiment of the present invention, a computer-readable storage medium may be a non-volatile computer-readable storage medium, such as, but not limited to, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present invention, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. For example, according to an embodiment of the present invention, a computer-readable storage medium may include the ROM and / or RAM described above, and / or one or more memories other than ROM and RAM.

[0135] An embodiment of the present invention further includes a computer program product, which includes a computer program containing program code for executing the method shown in the flowchart. When the computer program product is executed in a computer system, the program code is used to enable the computer system to implement the clock calibration method provided by the embodiment of the present invention.

[0136] When the computer program is executed by a processor, the above functions defined in the system / device of the embodiment of the present invention are performed. According to the embodiment of the present invention, the system, device, module, unit, etc. described above can be implemented by a computer program module.

[0137] In one embodiment, the computer program may be stored on a tangible storage medium, such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may be transmitted and distributed in the form of a signal over a network medium, downloaded and installed via a communication component, and / or installed from a removable medium. The program code contained in the computer program may be transmitted using any suitable network medium, including but not limited to wireless, wired, or any suitable combination thereof.

[0138] In such an embodiment, the computer program can be downloaded and installed from a network via the communication portion, and / or installed from a removable medium. When the computer program is executed by the processor, the above-described functions defined in the system of the embodiment of the present invention are performed. According to the embodiment of the present invention, the systems, devices, means, modules, units, etc. described above can be implemented by computer program modules.

[0139] According to an embodiment of the present invention, the program code for executing the computer program provided by the embodiment of the present invention can be written in any combination of one or more programming languages. Specifically, these computer programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C" or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, using an Internet service provider to connect via the Internet).

[0140] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the above-mentioned module, program segment, or a part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0141] It will be understood by those skilled in the art that the features described in the various embodiments of the present invention may be combined and / or coupled in various ways, even if such combinations or couplings are not explicitly described in the present invention. In particular, the features described in the various embodiments of the present invention may be combined and / or coupled in various ways without departing from the spirit and teachings of the present invention. All such combinations and / or couplings fall within the scope of the present invention.

[0142] The above describes embodiments of the present invention. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present invention. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination. Without departing from the scope of the present invention, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. An electronic device, characterized in that: include: a switching element, a first controller, a processor, a clock generator, and a second controller; The switching element is electrically connected to the first controller, the processor, the clock generator, and the second controller, the first controller includes a baseboard management controller, and the second controller is a device for controlling the switching element by processing digital signals; The second controller is configured to control the switch element to electrically connect the first controller to the clock generator when the electronic device is in an offline state, wherein the electronic device is in an offline state, including when the server to which the processor belongs is in a shut down state; The first controller is configured to, when the first controller is electrically connected to the clock generator, performing a first calibration on the clock generator using a first reference time obtained from a time reference device to obtain a first calibrated clock generator; and In response to an alarm signal sent by the first calibrated clock generator at a predetermined time, a second reference time is obtained from the time reference device based on a first time difference between a first current system time of the first controller and the predetermined time, and the first calibrated clock generator is subjected to a second calibration using the second reference time.

2. The electronic device according to claim 1, wherein The second controller is further configured to control the switch element to electrically connect the processor to the clock generator when the electronic device is powered on; The first controller is further configured to: When the processor is electrically connected to the clock generator, sending a first control signal to the second controller, so that the second controller controls the switch element according to the first control signal to electrically connect the first controller to the first clock interface of the clock generator, and configures the predetermined time for the clock generator through the first clock interface; A second control signal is sent to the second controller, so that the second controller controls the switch element to electrically connect the processor to the first clock interface according to the second control signal.

3. The electronic device according to claim 2, wherein: The first controller is further configured to: When the processor is electrically connected to the clock generator, In response to the alarm signal sent by the first calibrated clock generator at the predetermined time, sending the first control signal to the second controller so that the second controller controls the switch element to electrically connect the first controller to the first clock interface; performing the second calibration on the first calibrated clock generator using the second reference time; The second control signal is sent to the second controller so that the second controller responds to the second control signal.

4. The electronic device according to any one of claims 1 to 3, characterized in that Also includes: a first power supply unit, electrically connected to the first power supply interface of the clock generator, and configured to supply power to the clock generator when the electronic device is in a powered-on state; The second power supply unit is electrically connected to the second power supply interface of the clock generator and is used to supply power to the clock generator when the electronic device is in an offline state.

5. The electronic device according to claim 4, characterized in that When the clock generator reaches the predetermined time, the level of the electrical signal between the first controller and the clock generator is lowered to obtain the alarm signal.

6. The electronic device according to claim 1, wherein: The control end of the switching element is electrically connected to the interface of the second controller, the first end of the switching element is electrically connected to the first clock interface of the clock generator, the second end of the switching element is electrically connected to the interface of the first controller, and the third end of the switching element is electrically connected to the processor.

7. The electronic device according to claim 4, wherein: The first controller is further configured to: A first calibration record of performing a first calibration on the clock generator using the first reference time and a second calibration record of performing a second calibration on the first calibrated clock generator using the second reference time are stored in a log.

8. The electronic device according to claim 1, wherein: The first controller is further configured to: In response to an alarm signal sent by the first calibrated clock generator at a predetermined time, the first calibrated clock generator is second calibrated using the first current system time based on a first time difference between the first current system time and the predetermined time.

9. The electronic device according to claim 1, wherein: The first controller is in communication with a time reference device cluster, the time reference device cluster includes a plurality of the time reference devices, and the time reference devices are configured with priority information; The first controller is further configured to: In response to an instruction for obtaining a reference time, arranging the time reference devices according to priority information of the time reference devices to obtain an arrangement result, wherein the instruction for obtaining a reference time includes an instruction for obtaining the first reference time or an instruction for obtaining the second reference time; The first reference time or the second reference time is acquired based on the arrangement result and the operating status of the time reference device.

10. A clock calibration method, applied to the electronic device according to any one of claims 1 to 9, characterized in that: The method comprises: In response to an instruction to calibrate the clock generator, when the electronic device is in an offline state, the second controller controls the switch element to electrically connect the first controller to the clock generator; performing a first calibration on the clock generator using a first reference time obtained by the first controller from a time reference device to obtain a first calibrated clock generator; and In response to an alarm signal sent by the first calibrated clock generator at a predetermined time, a second reference time is obtained from the time reference device based on a first time difference between a first current system time of the first controller and the predetermined time, and the first calibrated clock generator is subjected to a second calibration using the second reference time.

11. The method according to claim 10, characterized in that Also includes: When the electronic device is in a powered-on state, in response to an instruction to calibrate the clock generator, the second controller controls the switch element to electrically connect the processor to the clock generator; In response to the alarm signal, sending a first control signal to the second controller so that the second controller controls the switch element to electrically connect the first controller to the first clock interface of the clock generator; The second calibration is performed on the first calibrated clock generator using the second reference time, and a second control signal is sent to the second controller so that the second controller responds to the second control signal.

12. The method according to claim 10, characterized in that The first calibrating the clock generator by using the first reference time obtained by the first controller from the time reference device to obtain a first calibrated clock generator includes: Updating a second current system time of the first controller to the first reference time, wherein the second current system time is earlier than the first current system time; Based on the relationship between the first reference time and the first time to be calibrated of the clock generator, a first calibration is performed on the clock generator to obtain the first calibrated clock generator.

13. The method according to claim 12, characterized in that The step of performing a first calibration on the clock generator based on a relationship between the first reference time and a first time to be calibrated of the clock generator to obtain the first calibrated clock generator includes: In response to a second time difference between the first reference time and the first time to be calibrated being less than or equal to a predetermined value, stopping calibrating the clock generator; In response to the second time difference being greater than the predetermined value, the first time to be calibrated is calibrated to the first reference time.

14. The method according to claim 10, characterized in that The step of obtaining, in response to an alarm signal sent by the first calibrated clock generator at a predetermined time, a second reference time from the time reference device based on a first time difference between a first current system time of the first controller and the predetermined time, comprises: Obtaining the first current system time; When a first time difference between the first current system time and the predetermined time is greater than a predetermined value, the second reference time is acquired from the time reference device.

15. The method according to claim 10, characterized in that The method further comprises: In response to an alarm signal sent by the first calibrated clock generator at a predetermined time, the first calibrated clock generator is second calibrated based on a first time difference between the first current system time and the predetermined time and using the first current system time.

16. The method according to claim 15, characterized in that The performing a second calibration on the first calibrated clock generator based on a first time difference between the first current system time and the predetermined time and using the first current system time includes: In response to a moment when the first time difference is greater than a predetermined value, acquiring a second time to be calibrated of the clock generator; The second time to be calibrated is calibrated to the first current system time to obtain a second calibrated clock generator.

17. The method according to claim 10, wherein: The method further comprises: determining a historical trigger error at the predetermined moment according to a distribution characteristic value of the first time difference; The scheduled time is adjusted using the historical trigger error to obtain an updated scheduled time.

18. The method according to claim 10, wherein: The method further comprises: Determining a calibration result of the clock generator according to a calibration record, wherein the calibration record includes a first calibration record and a second calibration record; If the calibration result indicates a calibration failure, repeating the operation of calibrating the clock generator; When the operation of calibrating the clock generator is repeated a predetermined number of times and the obtained repeated calibration record still indicates calibration failure, information about calibration failure is pushed to the target object.

19. A computer-readable storage medium having a computer program or instruction stored thereon, characterized in that: When the computer program or instructions are executed by a processor, the steps of the method according to any one of claims 10 to 18 are implemented.

20. A computer program product comprising a computer program or instructions, characterized in that When the computer program or instructions are executed by a processor, the steps of the method according to any one of claims 10 to 18 are implemented.

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