NBTI effect simulation method and device of double-interface gate oxide structure device

Abstract

The invention discloses an NBTI effect simulation method and device for a double-interface gate oxide structure device, and the method comprises the steps: building an NBTI simulation model based on a three-dimensional model of the double-interface gate oxide structure device, and simulating the generation and recovery process of an interface trap, a body trap and an oxide layer pre-stored hole trap in the NBTI effect, obtaining threshold voltage degradation components induced by different traps; performing NBTI effect degradation stage analog simulation on the basis to extract a first electrical parameter change condition of the double-interface gate oxide structure device to obtain a first threshold voltage degradation component and a first transfer characteristic curve; and on the basis of the device state subjected to NBTI degradation simulation, NBTI effect recovery stage analog simulation is carried out to extract a second electrical parameter change condition of the double-interface gate oxide structure device, and a second threshold voltage degradation component and a second transfer characteristic curve are obtained, so that the complexity of the NBTI effect is accurately reflected.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and particularly relates to a method and device for simulating the NBTI (Negative Bias Temperature Instability) effect of a double-interface gate oxide structure device. Background Art

[0002] With the continuous evolution of semiconductor process nodes, the continuous miniaturization of device sizes has caused significant changes in the physical properties of the gate oxide layer. The traditional single-layer gate oxide structure can no longer meet the requirements of high performance and low power consumption. In order to balance the leakage current and gate control ability, advanced processes (especially below the 45nm node) generally adopt a double-interface gate oxide structure stacked with high-k materials such as HfO2 (hafnium dioxide) and SiO2 (silicon dioxide). This structure can not only effectively improve the performance of the device but also significantly enhance its reliability. However, with the continuous increase in the scale of integrated circuits, the aging problem of such structures under the NBTI effect has become increasingly prominent. The NBTI effect is manifested as the continuous drift of the threshold voltage of p-type transistors under negative gate voltage and high-temperature stress, which is mainly caused by the combined action of interface traps, bulk traps, and pre-existing hole traps in the oxide layer. This effect has become a serious obstacle restricting the development of high-precision and high-reliability integrated circuits, such as automotive electronics and aerospace devices.

[0003] Traditional NBTI effect simulation methods mainly target single-layer gate oxide structures and do not consider the reaction process at the interface of high-k materials. The energy band offset, trap density, and electric field distribution in the double-interface gate oxide structure are significantly different from those in the single-layer gate oxide structure. Continuing to use traditional simulation methods will not be able to accurately describe the NBTI effect in the double-interface gate oxide structure.

[0004] In addition, existing NBTI effect simulation methods usually only consider a single degradation model, that is, they can only simulate the degradation caused by a single trap. Different simulation environments need to be established for the degradation stage and recovery stage of NBTI, which is difficult to operate and has poor relevance, and cannot accurately take into account the simulation of the degradation process and the recovery process. In practical applications, devices are often in an environment of combined stress, and the simulation method of a single model cannot comprehensively reflect the complexity of the NBTI effect.

[0005] Therefore, how to provide an NBTI effect simulation method for the double-interface gate oxide structure in advanced processes and simultaneously take into account the simulation of the degradation and recovery stages has become an important issue. Summary of the Invention

[0006] In order to solve the above problems existing in the prior art, the present invention provides a method and device for simulating the NBTI effect of a double-interface gate oxide structure device.

[0007] The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0008] In a first aspect, the present invention provides a method for simulating the NBTI effect of a dual-interface gate oxide structure device, and the NBTI effect simulation method includes:

[0009] Construct an NBTI simulation model based on the three-dimensional model of the dual-interface gate oxide structure device;

[0010] Based on the NBTI simulation model, by simulating the generation and recovery processes of interface traps, bulk traps, and pre-existing hole traps in the oxide layer in the NBTI effect, obtain the threshold voltage degradation components induced by different traps;

[0011] Based on the threshold voltage degradation components induced by different traps, perform simulation of the degradation stage of the NBTI effect to extract the change of the first electrical parameter of the dual-interface gate oxide structure device, and obtain the first threshold voltage degradation component and the first transfer characteristic curve;

[0012] Based on the device state of the dual-interface gate oxide structure device after the simulation of the degradation stage of the NBTI effect, perform simulation of the recovery stage of the NBTI effect to extract the change of the second electrical parameter of the dual-interface gate oxide structure device, and obtain the second threshold voltage degradation component and the second transfer characteristic curve, realizing the two-stage simulation of the NBTI effect for the dual-interface gate oxide structure device.

[0013] Optionally, the construction method of the three-dimensional model of the dual-interface gate oxide structure device includes:

[0014] Based on the structural parameters of the dual-interface gate oxide structure device, use TCAD simulation software to perform three-dimensional modeling to obtain the three-dimensional model of the dual-interface gate oxide structure device.

[0015] Optionally, constructing an NBTI simulation model according to the three-dimensional model of the dual-interface gate oxide structure device includes:

[0016] Construct an NBTI simulation model by adding a reaction-diffusion model, a reaction-drift-diffusion model, and an activated barrier double-well thermionic model to the three-dimensional model of the dual-interface gate oxide structure device.

[0017] Optionally, the threshold voltage degradation components induced by different traps include the threshold voltage degradation component induced by interface traps, the threshold voltage degradation component induced by bulk traps, and the threshold voltage degradation component induced by pre-existing hole traps in the oxide layer.

[0018] Optionally, based on the threshold voltage degradation components induced by different traps, a simulation of the NBTI effect degradation stage is performed to extract the change in the first electrical parameters of the double-interface gate oxide structure device, obtaining the first threshold voltage degradation component and the first transfer characteristic curve, including:

[0019] Set the voltage bias and temperature in the NBTI effect degradation stage, and perform a simulation of the NBTI effect degradation stage based on the threshold voltage degradation components induced by different traps to obtain the device state of the double-interface gate oxide structure device;

[0020] Extract the degraded trap distribution state from the device state for quasi-static electrical characteristics simulation to obtain the change in the first electrical parameters;

[0021] Generate the first threshold voltage degradation component and the first transfer characteristic curve based on the change in the first electrical parameters.

[0022] Optionally, based on the device state of the double-interface gate oxide structure device after the NBTI effect degradation stage simulation, a simulation of the NBTI effect recovery stage is performed to extract the change in the second electrical parameters of the double-interface gate oxide structure device, obtaining the second threshold voltage degradation component and the second transfer characteristic curve, including:

[0023] Adjust the voltage bias to the recovery voltage, keep the temperature unchanged, and perform a simulation of the NBTI effect recovery stage based on the device state to obtain the device state after recovery of the double-interface gate oxide structure device;

[0024] Extract the recovered trap distribution state from the device state after recovery for quasi-static electrical characteristics simulation to obtain the change in the second electrical parameters;

[0025] Generate the second threshold voltage degradation component and the second transfer characteristic curve based on the change in the second electrical parameters.

[0026] In a second aspect, the present invention provides an NBTI effect simulation device for a double-interface gate oxide structure device, and the NBTI effect simulation device includes:

[0027] A construction module for constructing an NBTI simulation model according to the three-dimensional model of the double-interface gate oxide structure device;

[0028] A simulation module for obtaining the threshold voltage degradation components induced by different traps by simulating the generation and recovery processes of interface traps, bulk traps, and pre-existing hole traps in the oxide layer in the NBTI effect based on the NBTI simulation model;

[0029] The first extraction module is configured to perform NBTI effect degradation stage simulation and simulation based on the threshold voltage degradation components induced by different traps, so as to extract the change of the first electrical parameters of the double-interface gate oxide structure device, and obtain the first threshold voltage degradation component and the first transfer characteristic curve;

[0030] The second extraction module is configured to perform NBTI effect recovery stage simulation based on the device state of the double-interface gate oxide structure device after the NBTI effect degradation stage simulation, so as to extract the change of the second electrical parameters of the double-interface gate oxide structure device, and obtain the second threshold voltage degradation component and the second transfer characteristic curve, so as to realize the two-stage simulation of the NBTI effect of the double-interface gate oxide structure device.

[0031] In a third aspect, the present invention provides an electronic device, including a processor, a communication interface, a memory, and a communication bus. Among them, the processor, the communication interface, and the memory complete communication with each other through the communication bus;

[0032] The memory is used to store a computer program;

[0033] The processor is configured to implement the method steps described in any of the above NBTI effect simulation methods for the double-interface gate oxide structure device when executing the computer program stored on the memory.

[0034] In a fourth aspect, the present invention provides a computer-readable storage medium, in which a computer program is stored, and the computer program realizes the method steps described in any of the above NBTI effect simulation methods for the double-interface gate oxide structure device when executed by a processor.

[0035] The NBTI effect simulation method for a double-interface gate oxide structure device provided by the present invention comprehensively simulates the threshold voltage degradation components induced by different traps for the double-interface gate oxide structure in advanced processes, breaks through the limitation that the traditional single-model simulation method can only simulate a single trap, and accurately reflects the complexity of the NBTI effect; in addition, by simulating the degradation and recovery behaviors successively in the same simulation environment, the operation is simple and the data correlation is strong, significantly improving the simulation efficiency and accuracy, and providing strong support for the reliability analysis and optimal design of the double-interface gate oxide structure device.

[0036] The following will further elaborate on the present invention in conjunction with the accompanying drawings. Description of the Drawings

[0037] Figure 1 It is a schematic flowchart of an NBTI effect simulation method for a double-interface gate oxide structure device provided by an embodiment of the present invention;

[0038] Figure 2It is a schematic three-dimensional model diagram of a double-interface gate oxide structure PMOS device provided by an embodiment of the present invention;

[0039] Figure 3 It is a schematic diagram showing the distribution of interface trap charges at the Si / SiO2 interface under different stress times provided by an embodiment of the present invention;

[0040] Figure 4 It is a schematic diagram showing the degradation of the device threshold voltage and its components provided by an embodiment of the present invention;

[0041] Figure 5 It is a schematic diagram showing the degradation of the device transfer characteristic curve provided by an embodiment of the present invention;

[0042] Figure 6 It is a schematic diagram showing the degradation of the device threshold voltage at different temperatures provided by an embodiment of the present invention;

[0043] Figure 7 It is a schematic diagram showing the degradation of the device threshold voltage under different gate voltages provided by an embodiment of the present invention;

[0044] Figure 8 It is a schematic diagram showing the recovery of the device threshold voltage and its components provided by an embodiment of the present invention;

[0045] Figure 9 It is a schematic diagram showing the recovery of the device transfer characteristic curve provided by an embodiment of the present invention;

[0046] Figure 10 It is a schematic structural diagram of an NBTI effect simulation device for a double-interface gate oxide structure device provided by an embodiment of the present invention;

[0047] Figure 11 It is a schematic structural diagram of an electronic device provided by an embodiment of the present invention. Detailed implementation manners

[0048] The following further describes the present invention in detail with reference to specific embodiments, but the implementation manners of the present invention are not limited thereto.

[0049] To solve the problem that the existing NBTI effect simulation methods cannot fully reflect the complexity of the NBTI effect, an embodiment of the present invention provides an NBTI effect simulation method for a double-interface gate oxide structure device. Refer to Figure 1 , Figure 1 It is a schematic flow diagram of an NBTI effect simulation method for a double-interface gate oxide structure device provided by an embodiment of the present invention, which specifically includes the following steps:

[0050] Step S101, construct an NBTI simulation model according to the three-dimensional model of the double-interface gate oxide structure device.

[0051] In an embodiment of the present invention, the dual-interface gate oxide structure device is specifically a dual-interface gate oxide structure PMOS (positive channel Metal Oxide Semiconductor) device. Among them, the dual-interface gate oxide structure refers to a structure formed by stacking SiO2 (silicon dioxide) and HfO2 (hafnium dioxide).

[0052] In one implementation, establishing a three-dimensional model of the dual-interface gate oxide structure device includes:

[0053] Based on the device structure parameters of the dual-interface gate oxide structure device, using TCAD (Technology Computer Aided Design) simulation software for three-dimensional modeling to obtain a three-dimensional model of the dual-interface gate oxide structure device.

[0054] In an embodiment of the present invention, the device structure parameters of the dual-interface gate oxide structure device include the device geometric dimensions, material types, doping concentrations, and gate work functions of the dual-interface gate oxide structure device.

[0055] In an embodiment of the present invention, based on the device structure parameters of the dual-interface gate oxide structure device, using TCAD simulation software for three-dimensional modeling can specifically be using the sde tool in the TCAD simulation software for three-dimensional structure modeling of the dual-interface gate oxide structure device. Among them, sde is a key module in the TCAD tool suite, mainly used for semiconductor device structure modeling, mesh generation, and pre-simulation preparation work.

[0056] See Figure 2 , Figure 2 is a schematic diagram of a three-dimensional model of a dual-interface gate oxide structure PMOS device provided by an embodiment of the present invention. The dual-interface gate oxide structure PMOS device includes a substrate and a buried oxide layer (BOX) from bottom to top, and a source / drain region, a channel region, and a gate oxide layer stacked on the upper surface of the buried oxide layer. Among them, the gate oxide layer is formed by stacking SiO2 and HfO2, having Si / SiO2 and SiO2 / HfO2 dual interfaces. Figure 2 The numbers and colors in it represent the doping concentrations of the corresponding regions of the dual-interface gate oxide structure PMOS device. Red is N-type doping, and blue is P-type doping.

[0057] In an embodiment of the present invention, the structure parameters of the dual-interface gate oxide structure PMOS device can be seen in Table 1.

[0058] Table 1 Structure parameters of the dual-interface gate oxide structure PMOS device

[0059] Channel length 35 nm Channel width 11 nm Channel height 11 nm Equivalent oxide thickness (EOT) 1.2 nm Buried oxide thickness 145 nm Source / drain doping concentration <![CDATA[1e20 cm -3 (boron-doped)]]> Channel doping concentration <![CDATA[1e15 cm -3 (phosphorus-doped)]]> Gate work function 4.74 eV

[0060] In an embodiment of the present invention, the NBTI simulation model is used to simulate the variation of the current-voltage characteristics of a dual-interface gate oxide structure device with time under a negative bias voltage.

[0061] In one implementation, an NBTI simulation model is constructed based on a three-dimensional model, including:

[0062] An NBTI simulation model is constructed by adding a reaction-diffusion model, a reaction-drift-diffusion model, and an activated-barrier double-well thermionic model to the three-dimensional model.

[0063] In an embodiment of the present invention, the reaction-diffusion model (RD), the reaction-drift-diffusion model (RDD), and the activated-barrier double-well thermionic model (ABDWT) are key physical models used to describe defect generation, charge transport, and device aging mechanisms.

[0064] In an embodiment of the present invention, the ABDWT model parameters include: the height of the energy level, the potential barrier between energy levels, the carrier concentration, the average activation energy, and the distribution.

[0065] In an embodiment of the present invention, the multi-state hydrogen transport model (MSC) can be activated in the sdevice tool. The MSC model is used to build a dual-interface reaction-diffusion model and a reaction-drift-diffusion model, and to adjust the parameters of the three-dimensional model of the dual-interface gate oxide structure device for simulating the changes in interface traps and bulk traps; an activated-barrier double-well thermionic model is added, and the parameters of the three-dimensional model of the dual-interface gate oxide structure device are adjusted to simulate the changes in pre-existing hole traps in the oxide layer. Among them, the sdevice tool is a semiconductor device simulator. The parameters of the MSC model include: trap concentration, transition state, reaction rate equation, and driving electric field.

[0066] In an embodiment of the present invention, a dual-interface reaction-diffusion model and a reaction-drift-diffusion model are built using the multi-state hydrogen transport model in the TCAD software. This model can define the characteristics of multiple states at different interfaces and achieve the mutual conversion between states. Specific examples are as follows:

[0067] MSConfigs(# Add the pre-defined MSC model framework in the TCAD software;

[0068] MSConfig(Name="msc0"Conc=5e12# Define a multi-state defect configuration with the name msc0 and a defect concentration of 5e12 cm-3

[0069] State(Name="s0" Charge=0 Hydrogen=1 TTOM)

[0070] State(Name="s1" Charge=1 Hydrogen=0 TTOM) # State definition: name, charge, hydrogen atoms, and specific energy level model

[0071] Transition(Name="Depassivation"

[0072] CEModel("CEModel_Depassivation",1) To="s1" From="s0"

[0073] Reservoirs("VB"(Particles=+1)"HydrogenAtom"(Particles=-1))

[0074] FieldFromInsulator)) # State transition definition: name, carrier emission model (CEModel), particle exchange carriers (Reservoirs), and electric field driving the transition (FieldFromInsulator)

[0075] MSConfigs(# Add MSC model framework

[0076] MSConfig(Name="msc1" Conc=1e13 # Define a polymorphic defect configuration named msc1 with a defect concentration of 1e13 cm-3

[0077] State(Name="s2" Charge=0 Hydrogen=1)

[0078] State(Name="s3" Charge=1 Hydrogen=0) # State definition: name, charge, hydrogen atoms, and specific energy level model (default none)

[0079] Transition(Name="Depassivation_1"

[0080] CEModel("CEModel_PMI2",1) To="s3" From="s2"

[0081] Reservoirs("VB"(Particles=+1)"HydrogenAtom"(Particles=+1)

[0082] "HydrogenMolecule"(Particles=-1))))# State transition definition: name, carrier emission model (CEModel), particle exchange carriers (Reservoirs), electric field driving the transition (default)

[0083] The above command simulates the reaction-diffusion model, as shown in formulas (1) and (2):

[0084]

[0085] Among them, X-H refers to the Si-H bond at the interface, representing the hydrogen passivation state at the interface; p represents holes; X- represents the depassivated charged defect; H represents a hydrogen atom; X represents the recovered defect at the interface; H2 represents a hydrogen molecule; the symbol represents mutual conversion.

[0086] The first MSConfigs(...) command is used to simulate the reaction at the Si / SiO2 interface, i.e., the breaking process of Si-H (hydrogen); the second MSConfigs(...) command simulates the reaction at the SiO2 / HfO2 interface, i.e., the diffusion process of H. Among them, Conc represents the initial Si-H concentration; s0 and s1 are the two states before and after the reaction in formula (1), Charge = 0 Hydrogen = 1 means s0 is uncharged and carries one unit of hydrogen, Charge = 1 Hydrogen = 0 means s1 carries one unit of charge and no hydrogen; the TTOM (Transient Trap Occupancy Model) model is activated to calculate the trap occupancy, because only traps above the Fermi level will affect the drift of the threshold voltage; Transition defines the state transition from s0 to s1, using the reaction rate equation CEModel_Depassivation built into the software model; "VB"(Particles = +1) means the reaction consumes one hole, and "HydrogenAtom"(Particles = -1) means the reaction generates one hydrogen atom; FieldFromInsulator indicates that this reaction process is driven by the built-in electric field of the insulator (gate oxide layer).

[0087]

[0088] Among them, Y-H usually refers to the Si-H bond at the interface, representing the hydrogen passivation state at the interface; p represents holes; Y- represents the depassivated charged defect; H represents a hydrogen atom; Y represents the recovered defect at the interface; H2 represents a hydrogen molecule; H Ion is a hydrogen ion, representing the ionic form after the dissociation of the hydrogen molecule; the symbol represents mutual conversion.

[0089] Equations (3), (4), and (5) show the reaction drift-diffusion model. Similarly, it can be built using 3 MSConfigs(…) commands.

[0090] In the embodiments of the present invention, the ABDWT model in the TCAD software is used to simulate the process in which pre-existing hole traps in the gate oxide layer participate in the reaction. The built-in model parameters are shown in Table 2. In the NBTI effect, in addition to interface states and bulk traps that cause device aging, pre-existing traps in the gate oxide layer can also capture holes, affecting the degradation of the device's electrical functions. Such traps can be characterized by the ABDWT model, and the random sampling mechanism of the pre-existing hole traps in this model conforms to the actual law. The activation example is as follows:

[0091] ABDWT(# Add the pre-defined activation barrier double-well thermionic model (ABDWT) in the TCAD software

[0092] Conc = 5e20 # Define the defect concentration

[0093] NumberOfSamples = 100) # Define the number of samples in the simulation

[0094] Among them, Conc represents the concentration of pre-existing hole traps in the gate oxide layer, and NumberOfSamples represents the number of random samples. The software model generates random trap configurations for each interface point.

[0095] Table 2 Built-in model parameters

[0096] Carrier concentration N0 6.5e20 Mobility characteristic γ 4.5e-9 Carrier effective mass m 3.2 Carrier velocity v 1e13 <![CDATA[Energy level height E A > 0.0085 <![CDATA[Energy level height E2]]> 0.38 <![CDATA[Average activation energy E Bmean > 1.3 <![CDATA[Activation energy distribution E spread > 0.26

[0097] In the embodiments of the present invention, to build the NBTI simulation model, in addition to activating the MSC and ABDWT models, it is also necessary to activate the necessary basic physical models according to the device structure, that is, the double-interface gate oxide structure P-type Tri-Gate (triple-gate) NWFET (nanowire field-effect transistor), including: the hydrogen diffusion model, the mobility model, the quantum potential model, and the SRH (Shockley-Read-Hall) recombination model. In addition, in the selection of the simulation strategy, the present invention example first uses the quasi-static simulation bias state, then uses the transient simulation degradation process, and finally uses the quasi-static simulation electrical characteristics, improving the convergence of the simulation while shortening the simulation time.

[0098] It should be noted that the set(MSConfigs(-Frozen)) and set(MSConfigs(Frozen)) commands need to be added before and after the transient simulation degradation process respectively to freeze the trap state to prevent unexpected changes in the trap state during the quasi-static simulation process with an infinite long time.

[0099] Step S102: Based on the NBTI simulation model, by simulating the generation and recovery processes of interface traps, bulk traps, and pre-existing hole traps in the oxide layer during the NBTI effect, different trap-induced threshold voltage degradation components are obtained.

[0100] In the embodiments of the present invention, different trap-induced threshold voltage degradation components include the threshold voltage degradation component ΔV IT induced by interface traps, the threshold voltage degradation component ΔV OT induced by bulk traps, and the threshold voltage degradation component ΔV HT induced by pre-existing hole traps in the oxide layer.

[0101] Referring to Figure 3 and Figure 4 , Figure 3 is a schematic diagram showing the distribution of interface trap charges at the Si / SiO2 interface under different stress times provided by the embodiments of the present invention. It can be seen that the number of positive interface trap charges increases with the increase of the stress time, and shows a random distribution pattern on the interface; Figure 4 is a schematic diagram showing the degradation of the device threshold voltage and its components provided by the embodiments of the present invention. Figure 4 In HT , the horizontal axis represents time, and the vertical axis represents the threshold voltage. It can be seen that the changes of each threshold voltage degradation component show different trends. Among them, ΔV IT induced by pre-existing hole traps in the oxide layer dominates in the initial stage of the reaction and remains basically unchanged after 1 s of reaction. ΔV OT induced by interface traps and ΔV IT induced by bulk traps are always positively correlated with the stress time. Generally, ΔV IT contributes more to the degradation of the threshold voltage.

[0102] In the embodiments of the present invention, for the dual-interface gate oxide structure in advanced processes, a simulation environment is built by synergistically using multiple physical models (RD + RDD + ABDWT) to comprehensively simulate the degradation effects of interface traps, bulk traps, and pre-existing hole traps in the oxide layer during the NBTI effect.

[0103]

[0104] In the embodiments of the present invention, according to the threshold voltage degradation components induced by different traps, the degradation stage of the NBTI effect is simulated, the device state after NBTI degradation is obtained and saved, the change of the first electrical parameter of the double-interface gate oxide structure device is extracted, and the first threshold voltage degradation component and the first transfer characteristic curve in the degradation stage are obtained.

[0105] In one implementation, based on the threshold voltage degradation components induced by different traps, simulation of the degradation stage of the NBTI effect is carried out to extract the change of the first electrical parameter of the double-interface gate oxide structure device, and the first threshold voltage degradation component and the first transfer characteristic curve are obtained, including:

[0106] Set the voltage bias and temperature in the degradation stage of the NBTI effect, and carry out simulation of the degradation stage of the NBTI effect based on the threshold voltage degradation components induced by different traps to obtain the device state of the double-interface gate oxide structure device;

[0107] Extract the trap distribution state after degradation from the device state to carry out quasi-static simulation of electrical characteristics and obtain the change of the first electrical parameter;

[0108] Generate the first threshold voltage degradation component and the first transfer characteristic curve based on the change of the first electrical parameter.

[0109] In the embodiments of the present invention, the specific implementation process of step S103 is as follows:

[0110] 1a) In the simulation environment, set the simulation time, apply the voltage bias and temperature for NBTI degradation, and carry out simulation in the degradation stage;

[0111] 1b) Save the device state (.tdr) after NBTI effect degradation to provide the initial state for the simulation in the recovery stage; the device state includes: voltage bias, temperature, potential distribution, doping distribution, carrier distribution and trap distribution state;

[0112] 1c) Use a Tcl (Tool Command Language) script to separately extract the trap distribution state after degradation and carry out quasi-static simulation of electrical characteristics to obtain the device electrical characteristic degradation result; among them, Tcl is a scripting language widely used in the fields of software development and system management;

[0113] 1d) Use the svisual tool of the TCAD simulation software to extract the device electrical characteristic degradation result in sdevice, that is, the change of the first electrical parameter, and generate the first threshold voltage degradation component and the first transfer characteristic curve; among them, svisual is a graphical tool for viewing simulation results, which can display different physical fields, coordinate axes, cutting curves, etc.

[0114] 1e) Control a single variable, change the three groups of different voltage biases and temperatures respectively, repeat steps 1a, 1b, 1c and 1d, and compare the NBTI degradation under different temperatures and different gate voltages.

[0115] In the embodiment of the present invention, the trap distribution state in the device at different degradation time points is extracted by using the Tcl scripting language, and is re-added to the physical model of the source device in the form of fixed defects for electrical characteristic simulation, avoiding the difficult situation of solving the initial solution when reloading all device states, reducing the simulation time, and improving the simulation convergence. The specific example is as follows:

[0116] Use the Tcl scripting language to extract the trap distribution state

[0117]

[0118] In the embodiment of the present invention, the temperature is set to 398K, the first gate voltage V str is -1.4V, and the degradation time is 1000s to explore the NBTI effect degradation of the device. Refer to Figure 4 and Figure 5 , it can be seen from Figure 4 that the threshold voltage degradation component (red curve) continues to increase under stress, and the time exponent stabilizes to 1 / 6 after 0.1s, that is, the slope ≈ 0.16; Figure 5 is a schematic diagram of the degradation of the device transfer characteristic curve provided by the embodiment of the present invention, Figure 5 in which the horizontal axis represents the gate voltage Vg, and the vertical axis represents the drain current Id. As the stress time increases, the curve as a whole shows a rightward shift trend, reflecting that the threshold voltage continuously increases and the drain current in the saturation region continuously decreases.

[0119] In the embodiment of the present invention, the degradation of the device threshold voltage under different temperatures and different gate voltages is compared respectively. Refer to Figure 6 and Figure 7 , Figure 6 is a schematic diagram of the degradation of the device threshold voltage at different temperatures provided by the embodiment of the present invention, Figure 7 is a schematic diagram of the degradation of the device threshold voltage at different gate voltages provided by the embodiment of the present invention, Figure 6 and Figure 7 in which the horizontal axis represents time and the vertical axis represents the threshold voltage. It can be seen that the threshold voltage degradation components of the device under different temperatures and different gate voltages increase with the increase of the stress time, and the higher the temperature and the larger the gate voltage, the larger the threshold voltage degradation component, but the time exponent is basically unchanged and stabilizes at 1 / 6, which conforms to the NBTI effect degradation law.

[0120] Step S104: Based on the device state after the simulation of the NBTI effect degradation stage of the dual-interface gate oxide structure device, perform the simulation of the NBTI effect recovery stage to extract the change in the second electrical parameters of the dual-interface gate oxide structure device, obtain the second threshold voltage degradation component and the second transfer characteristic curve, and achieve the two-stage simulation of the NBTI effect for the dual-interface gate oxide structure device.

[0121] In the embodiment of the present invention, based on the device state after the NBTI effect degradation in step S103, perform the simulation of the recovery stage, extract the change in the second electrical parameters of the device, and obtain the second threshold voltage degradation component and the second transfer characteristic curve in the recovery stage.

[0122] In one implementation, based on the device state after the simulation of the NBTI effect degradation stage of the dual-interface gate oxide structure device, perform the simulation of the NBTI effect recovery stage to extract the change in the second electrical parameters of the dual-interface gate oxide structure device, obtain the second threshold voltage degradation component and the second transfer characteristic curve, including:

[0123] Adjust the voltage bias to the recovery voltage, keep the temperature unchanged, and perform the simulation of the NBTI effect recovery stage based on the device state to obtain the device state after recovery of the dual-interface gate oxide structure device;

[0124] Extract the trap distribution state after recovery from the device state after recovery to perform the quasi-static simulation of the electrical characteristics and obtain the change in the second electrical parameters;

[0125] Generate the second threshold voltage degradation component and the second transfer characteristic curve based on the change in the second electrical parameters.

[0126] In the embodiment of the present invention, the specific implementation process of step S104 is as follows:

[0127] 2a) In the above simulation environment, set the simulation time, adjust the voltage bias to the recovery voltage, and keep the temperature unchanged;

[0128] 2b) Load the device state (.tdr) after the NBTI effect degradation saved in step 1b) and perform the recovery stage simulation;

[0129] 2c) Use the Tcl script to separately extract the trap distribution state after recovery, perform the quasi-static simulation of the electrical characteristics, and obtain the device electrical characteristic recovery result, that is, the change in the second electrical parameters;

[0130] 2d) Use the svisual tool of the TCAD simulation software to extract the device electrical characteristic recovery result and generate the second threshold voltage degradation component and the second transfer characteristic curve.

[0131] In the embodiment of the present invention, when using the Load command to load the device state after NBTI effect degradation for the recovery stage simulation, it should be noted that the imported file name must be the same as the file name saved in step 1b.

[0132] In this embodiment, the temperature is set to 398K, the second gate voltage V rec is 0V, and the recovery time is 1000s to explore the NBTI effect recovery of the device. Refer to Figure 8 and Figure 9 , Figure 8 which is a schematic diagram of the recovery of the device threshold voltage and its components provided by the embodiment of the present invention. Figure 8 In OT the horizontal axis represents time and the vertical axis represents the threshold voltage. It can be seen that the degradation component of the threshold voltage (red curve) shows a certain downward trend, but far from reaching the state before degradation. This is because some interface states and bulk traps cannot be completely eliminated during the recovery process. In the figure, the changes in the ΔV IT component intuitively demonstrate this phenomenon; Figure 9 which is a schematic diagram of the recovery of the device transfer characteristic curve provided by the embodiment of the present invention. Figure 9 In Figure 5 the horizontal axis represents time and the vertical axis represents the threshold voltage. As the recovery time increases, the curve as a whole shows a leftward recovery trend. However, compared with Figure 5 it can be seen that the recovery amount is significantly less than the degradation component, indicating that the electrical property degradation caused by the NBTI effect has partial reversibility but cannot be completely recovered, and the irreversible part will increase with time accumulation, ultimately affecting the long-term reliability of the device.

[0133] In the embodiment of the present invention, for the dual-interface gate oxide structure in advanced processes, the threshold voltage degradation components induced by different traps are comprehensively simulated, breaking through the limitation that the traditional single-model simulation method can only simulate a single trap, and accurately reflecting the complexity of the NBTI effect. In addition, by simulating the degradation and recovery behaviors successively in the same simulation environment, the operation is simple and the data correlation is strong, significantly improving the simulation efficiency and accuracy, and providing strong support for the reliability analysis and optimized design of dual-interface gate oxide structure devices.

[0134] Based on the same inventive concept, the embodiment of the present invention also provides an NBTI effect simulation device for a dual-interface gate oxide structure device. Refer to Figure 10 , Figure 10 which is a schematic structural diagram of an NBTI effect simulation device for a dual-interface gate oxide structure device provided by the embodiment of the present invention. The NBTI effect simulation device includes:

[0135] A construction module 1001, configured to construct an NBTI simulation model according to the three-dimensional model of the dual-interface gate oxide structure device;

[0136] The simulation module 1002 is configured to, based on the NBTI simulation model, obtain the threshold voltage degradation components induced by different traps by simulating the generation and recovery processes of interface traps, bulk traps, and pre-existing hole traps in the oxide layer during the NBTI effect;

[0137] The first extraction module 1003 is configured to, based on the threshold voltage degradation components induced by different traps, perform simulation and emulation on the degradation stage of the NBTI effect to extract the change in the first electrical parameters of the double-interface gate oxide structure device, and obtain the first threshold voltage degradation component and the first transfer characteristic curve;

[0138] The second extraction module 1004 is configured to, based on the device state of the double-interface gate oxide structure device after the simulation and emulation of the degradation stage of the NBTI effect, perform simulation and emulation on the recovery stage of the NBTI effect to extract the change in the second electrical parameters of the double-interface gate oxide structure device, and obtain the second threshold voltage degradation component and the second transfer characteristic curve, thereby realizing the two-stage simulation of the NBTI effect for the double-interface gate oxide structure device.

[0139] In the embodiment of the present invention, for the double-interface gate oxide structure in advanced processes, the threshold voltage degradation components induced by different traps are comprehensively simulated, breaking through the limitation of the traditional single-model simulation method that can only simulate a single trap, and accurately reflecting the complexity of the NBTI effect; in addition, by successively simulating the degradation and recovery behaviors in the same simulation environment, the operation is simple and the data correlation is strong, significantly improving the simulation efficiency and accuracy, and providing strong support for the reliability analysis and optimal design of double-interface gate oxide structure devices.

[0140] Optionally, the method for constructing the three-dimensional model of the double-interface gate oxide structure device in the construction module 1001 includes:

[0141] Based on the structural parameters of the double-interface gate oxide structure device, use TCAD simulation software to perform three-dimensional modeling to obtain the three-dimensional model of the double-interface gate oxide structure device.

[0142] Optionally, the construction module 1001 is specifically configured to:

[0143] Construct the NBTI simulation model by adding a reaction-diffusion model, a reaction-drift-diffusion model, and an activated-barrier double-well thermionic model to the three-dimensional model of the double-interface gate oxide structure device.

[0144] Optionally, the threshold voltage degradation components induced by different traps include the threshold voltage degradation component induced by interface traps, the threshold voltage degradation component induced by bulk traps, and the threshold voltage degradation component induced by pre-existing hole traps in the oxide layer.

[0145] Optionally, the first extraction module 1003 is specifically configured to:

[0146] Set the voltage bias and temperature in the degradation stage of the NBTI effect, perform simulation of the NBTI effect degradation stage based on the threshold voltage degradation components induced by different traps, and obtain the device state of the double-interface gate oxide structure device; extract the degraded trap distribution state from the device state to perform quasi-static simulation of electrical characteristics, and obtain the change of the first electrical parameter; generate the first threshold voltage degradation component and the first transfer characteristic curve based on the change of the first electrical parameter.

[0147] Optionally, the second extraction module 1004 performs simulation of the NBTI effect recovery stage based on the device state of the double-interface gate oxide structure device after the simulation of the NBTI effect degradation stage, so as to extract the change of the second electrical parameter of the double-interface gate oxide structure device, and obtain the second threshold voltage degradation component and the second transfer characteristic curve, including:

[0148] Adjust the voltage bias to the recovery voltage, keep the temperature unchanged, and perform simulation of the NBTI effect recovery stage based on the device state to obtain the device state after recovery of the double-interface gate oxide structure device; extract the trap distribution state after recovery from the device state after recovery to perform quasi-static simulation of electrical characteristics, and obtain the change of the second electrical parameter; generate the second threshold voltage degradation component and the second transfer characteristic curve based on the change of the second electrical parameter.

[0149] An embodiment of the present invention also provides an electronic device, such as Figure 11 shown, including a processor 1101, a communication interface 1102, a memory 1103, and a communication bus 1104. Among them, the processor 1101, the communication interface 1102, and the memory 1103 complete mutual communication through the communication bus 1104.

[0150] The memory 1103 is used to store a computer program;

[0151] When the processor 1101 is used to execute the program stored in the memory 1103, it implements the method steps of any one of the above NBTI effect simulation methods for the double-interface gate oxide structure device.

[0152] The communication bus mentioned in the above electronic device may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into an address bus, a data bus, a control bus, etc. For the sake of representation, only a thick line is used in the figure to represent it, but it does not mean that there is only one bus or one type of bus.

[0153] The communication interface is used for communication between the above-mentioned electronic device and other devices.

[0154] The memory may include a Random Access Memory (RAM), or may also include a Non-Volatile Memory (NVM), such as at least one disk memory. Optionally, the memory may also be at least one storage device located far away from the aforementioned processor.

[0155] The aforementioned processor may be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0156] The present invention also provides a computer-readable storage medium. A computer program is stored in the computer-readable storage medium. When the computer program is executed by a processor, the method steps of any of the above-mentioned NBTI effect simulation methods of the dual-interface gate oxide structure device are implemented.

[0157] Optionally, the computer-readable storage medium may be a Non-Volatile Memory (NVM), such as at least one disk memory.

[0158] Optionally, the above-mentioned computer-readable storage medium may also be at least one storage device located far away from the aforementioned processor.

[0159] In another embodiment of the present invention, a computer program product containing instructions is also provided. When it runs on a computer, it causes the computer to execute the method steps described in any of the above-mentioned NBTI effect simulation methods of the dual-interface gate oxide structure device.

[0160] It should be noted that the terms "first", "second", etc. are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present invention.

[0161] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.

[0162] Although the present invention has been described in conjunction with various embodiments herein, however, in the process of implementing the claimed invention, those skilled in the art can understand and implement other variations of the disclosed embodiments by viewing the accompanying drawings and the disclosure. In the description of the present invention, the term "including" does not exclude other components or steps, the term "one" or "a" does not exclude the case of a plurality, and the meaning of "a plurality" is two or more unless otherwise specifically defined. In addition, certain measures are described in different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0163] The method provided by the embodiments of the present invention can be applied to an electronic device. Specifically, the electronic device can be: a desktop computer, a portable computer, a smart mobile terminal, a server, etc. There is no limitation here, and any electronic device that can implement the present invention belongs to the protection scope of the present invention.

[0164] For the device / electronic device / storage medium embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiments.

[0165] It should be noted that the device, electronic device, and storage medium of the embodiments of the present invention are respectively the device, electronic device, and storage medium that apply the above-mentioned NBTI effect simulation method of a dual-interface gate oxide structure device. Then all embodiments of the above-mentioned NBTI effect simulation method of a dual-interface gate oxide structure device are applicable to the device, electronic device, and storage medium, and can achieve the same or similar beneficial effects.

[0166] The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, and all should be regarded as falling within the protection scope of the present invention.

Claims

1. A simulation method for the NBTI effect of a dual - interface gate - oxide - structure device, characterized in that, The NBTI effect simulation method includes: Construct an NBTI simulation model based on the three-dimensional model of the dual-interface gate oxide structure device; Based on the NBTI simulation model, by simulating the generation and recovery processes of interface traps, bulk traps, and pre-existing hole traps in the oxide layer in the NBTI effect, obtain the threshold voltage degradation components induced by different traps; Based on the threshold voltage degradation components induced by different traps, conduct simulation of the degradation stage of the NBTI effect to extract the change in the first electrical parameter of the dual-interface gate oxide structure device, and obtain the first threshold voltage degradation component and the first transfer characteristic curve; Based on the device state of the dual-interface gate oxide structure device after the simulation of the degradation stage of the NBTI effect, conduct simulation of the recovery stage of the NBTI effect to extract the change in the second electrical parameter of the dual-interface gate oxide structure device, and obtain the second threshold voltage degradation component and the second transfer characteristic curve, thereby realizing the two-stage simulation of the NBTI effect for the dual-interface gate oxide structure device.

2. The NBTI effect simulation method according to claim 1, wherein The construction method of the three-dimensional model of the dual-interface gate oxide structure device includes: Based on the structural parameters of the dual-interface gate oxide structure device, use TCAD simulation software to perform three-dimensional modeling to obtain the three-dimensional model of the dual-interface gate oxide structure device.

3. The NBTI effect simulation method according to claim 1, wherein Constructing an NBTI simulation model according to the three-dimensional model of the dual-interface gate oxide structure device includes: Construct an NBTI simulation model by adding a reaction-diffusion model, a reaction-drift-diffusion model, and an activated barrier double-well thermionic model to the three-dimensional model of the dual-interface gate oxide structure device.

4. The NBTI effect simulation method according to claim 1, wherein The threshold voltage degradation components induced by different traps include the threshold voltage degradation component induced by interface traps, the threshold voltage degradation component induced by bulk traps, and the threshold voltage degradation component induced by pre-existing hole traps in the oxide layer.

5. The NBTI effect simulation method according to claim 1, characterized in that Based on the threshold voltage degradation components induced by different traps, conduct simulation of the degradation stage of the NBTI effect to extract the change in the first electrical parameter of the dual-interface gate oxide structure device, and obtain the first threshold voltage degradation component and the first transfer characteristic curve, including: Set the voltage bias and temperature in the degradation stage of the NBTI effect, and conduct simulation of the degradation stage of the NBTI effect based on the threshold voltage degradation components induced by different traps to obtain the device state of the dual-interface gate oxide structure device; Extract the degraded trap distribution state from the device state to conduct a quasi-static simulation of the electrical characteristics and obtain the change in the first electrical parameter; Generate the first threshold voltage degradation component and the first transfer characteristic curve based on the change in the first electrical parameter.

6. The NBTI effect simulation method according to claim 5, wherein Based on the device state of the dual-interface gate oxide structure device after the simulation of the degradation stage of the NBTI effect, conduct simulation of the recovery stage of the NBTI effect to extract the change in the second electrical parameter of the dual-interface gate oxide structure device, and obtain the second threshold voltage degradation component and the second transfer characteristic curve, including: Adjust the voltage bias to the recovery voltage, keep the temperature unchanged, and conduct simulation of the recovery stage of the NBTI effect based on the device state to obtain the device state of the dual-interface gate oxide structure device after recovery; Extract the recovered trap distribution state from the recovered device state after recovery for quasi-static electrical characteristic simulation to obtain the change of the second electrical parameter. Generate a second threshold voltage degradation component and a second transfer characteristic curve based on the change of the second electrical parameter.

7. An NBTI effect simulation device for a dual-interface gate oxide structure device, characterized in that, The NBTI effect simulation device includes: A construction module for constructing an NBTI simulation model according to the three-dimensional model of the dual-interface gate oxide structure device. A simulation module for obtaining the threshold voltage degradation components induced by different traps by simulating the generation and recovery processes of interface traps, bulk traps, and pre-existing hole traps in the oxide layer in the NBTI effect based on the NBTI simulation model. A first extraction module for performing simulation of the degradation stage of the NBTI effect based on the threshold voltage degradation components induced by different traps to extract the change of the first electrical parameter of the dual-interface gate oxide structure device, and obtaining a first threshold voltage degradation component and a first transfer characteristic curve. A second extraction module for performing simulation of the recovery stage of the NBTI effect based on the device state of the dual-interface gate oxide structure device after the simulation of the degradation stage of the NBTI effect to extract the change of the second electrical parameter of the dual-interface gate oxide structure device, and obtaining a second threshold voltage degradation component and a second transfer characteristic curve, so as to realize the two-stage simulation of the NBTI effect for the dual-interface gate oxide structure device.

8. The NBTI effect simulation device according to claim 7, wherein The construction method of the three-dimensional model of the dual-interface gate oxide structure device in the construction module includes: Based on the structural parameters of the dual-interface gate oxide structure device, use TCAD simulation software to perform three-dimensional modeling to obtain the three-dimensional model of the dual-interface gate oxide structure device.

9. An electronic device, characterized in that, It includes a processor, a communication interface, a memory, and a communication bus. Among them, the processor, the communication interface, and the memory complete mutual communication through the communication bus. The memory is used to store computer programs. The processor is used to implement the NBTI effect simulation method according to any one of claims 1-6 when executing the computer program stored on the memory.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, and when the computer program is executed by the processor, it implements the NBTI effect simulation method according to any one of claims 1-6.

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