RFID tag chip and power management method thereof

Abstract

The invention discloses an RFID tag chip and a power management method thereof, and relates to the technical field of radio frequency, and the RFID tag chip comprises a radio frequency antenna which is suitable for receiving a high-frequency electromagnetic wave signal or an ultrahigh-frequency electromagnetic wave signal; a high-frequency analog circuit and a high-frequency digital circuit, the high-frequency analog circuit being configured to demodulate the high-frequency electromagnetic wave signal and generate a high-frequency reset signal when the high-frequency electromagnetic wave signal is received; an ultrahigh-frequency analog circuit and an ultrahigh-frequency digital circuit, the ultrahigh-frequency analog circuit being configured to demodulate the ultrahigh-frequency electromagnetic wave signal and generate an ultrahigh-frequency reset signal when receiving the ultrahigh-frequency electromagnetic wave signal; and the power management module is configured to perform power-off control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultrahigh-frequency analog circuit and the ultrahigh-frequency digital circuit according to at least one of the high-frequency reset signal and the ultrahigh-frequency reset signal. The RFID tag chip has no static power consumption and dynamic power consumption, and is low in power consumption.

Description

Technical Field

[0001] This application relates to the field of radio frequency technology, and particularly to an RFID tag chip and its power management method. Background Art

[0002] Dual-frequency RFID (Radio Frequency Identification) technology combines the advantages of high frequency and ultra-high frequency to achieve non-contact automatic identification and plays an important role in the power system. As a mixed-signal chip, the power consumption problem of RFID tag chips has always been a key factor restricting their performance and application scope. The power consumption of RFID tag chips mainly comes from dynamic power consumption and static power consumption. Dynamic power consumption includes switching power consumption and short-circuit power consumption, which are mainly generated when digital circuits execute functions. Static power consumption is mainly composed of leakage current power consumption. Even when no operation is performed, there will be a tiny current flow inside the chip, thus generating power consumption. In related technologies, the clock gating technology is adopted to turn off the clocks of non-working digital modules to reduce the dynamic power consumption of RFID chips. However, this method cannot reduce the static power consumption of the chips. Therefore, the power consumption of RFID chips is still relatively high. Summary of the Invention

[0003] The present invention aims to solve at least one of the technical problems in the related technologies to some extent. For this reason, the first object of the present invention is to provide an RFID tag chip. According to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal, it can be determined which circuits in the high-frequency analog circuit, high-frequency digital circuit, ultra-high-frequency analog circuit, and ultra-high-frequency digital circuit do not need to work. The power management module can control the power-down of this circuit to make this circuit enter the off state. Therefore, this circuit will not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0004] The second object of the present invention is to provide a power management method for an RFID tag chip.

[0005] To achieve the above object, according to an embodiment of the first aspect of the present invention, an RFID tag chip is provided, including: a radio frequency antenna adapted to receive high-frequency electromagnetic wave signals or ultra-high-frequency electromagnetic wave signals; a high-frequency analog circuit and a high-frequency digital circuit, where the high-frequency analog circuit is configured to demodulate the high-frequency electromagnetic wave signals to obtain high-frequency downlink commands, and generate a high-frequency reset signal when receiving the high-frequency electromagnetic wave signals, and the high-frequency digital circuit is configured to execute the high-frequency downlink commands; an ultra-high-frequency analog circuit and an ultra-high-frequency digital circuit, where the ultra-high-frequency analog circuit is configured to demodulate the ultra-high-frequency electromagnetic wave signals to obtain ultra-high-frequency downlink commands, and generate an ultra-high-frequency reset signal when receiving the ultra-high-frequency electromagnetic wave signals, and the ultra-high-frequency digital circuit is configured to execute the ultra-high-frequency downlink commands; a power management module configured to perform power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal.

[0006] The RFID tag chip according to an embodiment of the present invention includes a radio frequency antenna, a high-frequency analog circuit and a high-frequency digital circuit, an ultra-high-frequency analog circuit and an ultra-high-frequency digital circuit, and a power management module. Among them, the radio frequency antenna is adapted to receive high-frequency electromagnetic wave signals or ultra-high-frequency electromagnetic wave signals. The high-frequency analog circuit is configured to demodulate the high-frequency electromagnetic wave signals to obtain high-frequency downlink commands, and generate a high-frequency reset signal when receiving the high-frequency electromagnetic wave signals. The high-frequency digital circuit is configured to execute the high-frequency downlink commands. The ultra-high-frequency analog circuit is configured to demodulate the ultra-high-frequency electromagnetic wave signals to obtain ultra-high-frequency downlink commands, and generate an ultra-high-frequency reset signal when receiving the ultra-high-frequency electromagnetic wave signals. The ultra-high-frequency digital circuit is configured to execute the ultra-high-frequency downlink commands. The power management module is configured to perform power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal. Thus, according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal, it can be determined which circuits among the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit do not need to work. The power management module can control the power-down of the circuit to make the circuit enter the off state. Therefore, the circuit will not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0007] According to an embodiment of the present invention, the power management module is further configured to perform power-down control on the ultra-high frequency analog circuit and the ultra-high frequency digital circuit when a high-frequency reset signal is received and the ultra-high frequency reset signal is not received; or perform power-down control on the high-frequency analog circuit and the high-frequency digital circuit when the high-frequency reset signal is not received and the ultra-high frequency reset signal is received; or perform power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit according to the first generation time of the high-frequency reset signal and the second generation time of the ultra-high frequency reset signal when the high-frequency reset signal and the ultra-high frequency reset signal are received.

[0008] According to an embodiment of the present invention, the power management module is further configured to perform power-down control on the ultra-high frequency analog circuit and the ultra-high frequency digital circuit when the first generation time is earlier than the second generation time; or perform power-down control on the high-frequency analog circuit and the high-frequency digital circuit when the second generation time is earlier than the first generation time; or perform power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit according to the first parsing time of the high-frequency digital circuit for the high-frequency downlink command and the second parsing time of the ultra-high frequency digital circuit for the ultra-high frequency downlink command when the first generation time is the same as the second generation time.

[0009] According to an embodiment of the present invention, the power management module is further configured to perform power-down control on the ultra-high frequency analog circuit and the ultra-high frequency digital circuit when the first parsing time is earlier than the second parsing time; or perform power-down control on the high-frequency analog circuit and the high-frequency digital circuit when the second parsing time is earlier than the first parsing time; or perform power-down control on the high-frequency analog circuit and the ultra-high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit respectively when the first parsing time is the same as the second parsing time.

[0010] According to an embodiment of the present invention, the high-frequency analog circuit includes: a high-frequency reset generation module configured to generate a high-frequency reset signal and send the high-frequency reset signal to the power management module when a high-frequency electromagnetic wave signal is received; a high-frequency power generation unit configured to generate a power supply for the high-frequency digital circuit according to the high-frequency electromagnetic wave signal when a high-frequency electromagnetic wave signal is received; a high-frequency demodulation module configured to demodulate the high-frequency electromagnetic wave signal to generate a high-frequency downlink command and send the high-frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the high-frequency downlink command and returns high-frequency uplink data; a high-frequency modulation module configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier and transmit the high-frequency electromagnetic carrier to a radio frequency antenna to transmit the high-frequency electromagnetic carrier through the radio frequency antenna.

[0011] According to an embodiment of the present invention, a high-frequency digital circuit includes: a high-frequency downlink decoding module configured to decode a high-frequency downlink command to obtain a high-frequency decoded signal; a high-frequency command parsing module configured to parse the high-frequency decoded signal to obtain a high-frequency command type and high-frequency command parameters; a high-frequency status control module configured to control the status of the RFID tag chip according to the high-frequency command type and high-frequency command parameters, and determine the type of high-frequency uplink data; a high-frequency uplink encoding module configured to perform uplink data encoding according to the type of high-frequency uplink data and the status of the RFID tag chip to generate high-frequency uplink data.

[0012] According to an embodiment of the present invention, a power management module is respectively connected to the high-frequency downlink decoding module, the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module. The power management module is further configured to, after receiving a high-frequency reset signal, supply the power supply of the high-frequency digital circuit to the high-frequency downlink decoding module to power on the high-frequency downlink decoding module, and after receiving a control signal sent by the high-frequency downlink decoding module, sequentially supply the power supply of the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module to power on the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module in sequence.

[0013] According to an embodiment of the present invention, the power management module is further configured to control the high-frequency uplink encoding module, the high-frequency status control module, and the high-frequency command parsing module to power off in sequence when the RFID tag chip finishes executing the high-frequency downlink command.

[0014] According to an embodiment of the present invention, a ultra-high-frequency analog circuit includes: an ultra-high-frequency reset generation module configured to generate an ultra-high-frequency reset signal when receiving an ultra-high-frequency electromagnetic wave signal, and send the ultra-high-frequency reset signal to the power management module; an ultra-high-frequency power generation unit configured to generate the power supply of the ultra-high-frequency digital circuit according to the ultra-high-frequency electromagnetic wave signal when receiving the ultra-high-frequency electromagnetic wave signal; an ultra-high-frequency demodulation module configured to demodulate the ultra-high-frequency electromagnetic wave signal to generate an ultra-high-frequency downlink command, and send the ultra-high-frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the ultra-high-frequency downlink command and returns ultra-high-frequency uplink data; an ultra-high-frequency modulation module configured to modulate the ultra-high-frequency uplink data to generate an ultra-high-frequency electromagnetic carrier, and transmit the ultra-high-frequency electromagnetic carrier to a radio frequency antenna to transmit the ultra-high-frequency electromagnetic carrier through the radio frequency antenna.

[0015] According to an embodiment of the present invention, the ultra-high frequency digital circuit includes: an ultra-high frequency downlink decoding module configured to decode an ultra-high frequency downlink command to obtain an ultra-high frequency decoded signal; an ultra-high frequency command parsing module configured to parse the ultra-high frequency decoded signal to obtain an ultra-high frequency command type and ultra-high frequency command parameters; an ultra-high frequency status control module configured to control the status of the RFID tag chip according to the ultra-high frequency command type and ultra-high frequency command parameters and determine the type of ultra-high frequency uplink data; and an ultra-high frequency uplink encoding module configured to perform uplink data encoding according to the type of ultra-high frequency uplink data and the status of the RFID tag chip to generate ultra-high frequency uplink data.

[0016] According to an embodiment of the present invention, the power management module is respectively connected to the ultra-high frequency downlink decoding module, the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module. The power management module is further configured to, after receiving the ultra-high frequency reset signal, supply the power supply of the ultra-high frequency digital circuit to the ultra-high frequency downlink decoding module to power on the ultra-high frequency downlink decoding module, and after receiving the control signal sent by the ultra-high frequency downlink decoding module, supply the power supply of the ultra-high frequency digital circuit to the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module in sequence to power on the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module in sequence.

[0017] According to an embodiment of the present invention, the power management module is further configured to control the ultra-high frequency uplink encoding module, the ultra-high frequency status control module, and the ultra-high frequency command parsing module to power off in sequence when the RFID tag chip finishes executing the ultra-high frequency downlink command.

[0018] According to an embodiment of the present invention, the power management module includes: a high-frequency power switch respectively connected to the high-frequency analog circuit and the high-frequency digital circuit, and the high-frequency power switch is configured to perform power-on control and power-off control on the high-frequency analog circuit and the high-frequency digital circuit; an ultra-high frequency power switch respectively connected to the ultra-high frequency analog circuit and the ultra-high frequency digital circuit, and the ultra-high frequency power switch is configured to perform power-on control and power-off control on the ultra-high frequency analog circuit and the ultra-high frequency digital circuit.

[0019] To achieve the above object, according to an embodiment of the second aspect of the present invention, a power management method for an RFID tag chip is proposed. The RFID tag chip includes a radio frequency antenna, a high-frequency analog circuit and a high-frequency digital circuit, and a ultra-high-frequency analog circuit and a ultra-high-frequency digital circuit. The radio frequency antenna is adapted to receive high-frequency electromagnetic wave signals or ultra-high-frequency electromagnetic wave signals. The high-frequency analog circuit is configured to demodulate the high-frequency electromagnetic wave signals to obtain high-frequency downlink commands, and generate a high-frequency reset signal when receiving the high-frequency electromagnetic wave signals. The high-frequency digital circuit is configured to execute the high-frequency downlink commands. The ultra-high-frequency analog circuit is configured to demodulate the ultra-high-frequency electromagnetic wave signals to obtain ultra-high-frequency downlink commands, and generate an ultra-high-frequency reset signal when receiving the ultra-high-frequency electromagnetic wave signals. The ultra-high-frequency digital circuit is configured to execute the ultra-high-frequency downlink commands. The method includes: performing power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal.

[0020] According to the power management method of the RFID tag chip in the embodiment of the present invention, power-down control is performed on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal. Wherein, the RFID tag chip includes a radio frequency antenna, a high-frequency analog circuit and a high-frequency digital circuit, and a ultra-high-frequency analog circuit and a ultra-high-frequency digital circuit. The radio frequency antenna is adapted to receive high-frequency electromagnetic wave signals or ultra-high-frequency electromagnetic wave signals. The high-frequency analog circuit is configured to demodulate the high-frequency electromagnetic wave signals to obtain high-frequency downlink commands, and generate a high-frequency reset signal when receiving the high-frequency electromagnetic wave signals. The high-frequency digital circuit is configured to execute the high-frequency downlink commands. The ultra-high-frequency analog circuit is configured to demodulate the ultra-high-frequency electromagnetic wave signals to obtain ultra-high-frequency downlink commands, and generate an ultra-high-frequency reset signal when receiving the ultra-high-frequency electromagnetic wave signals. The ultra-high-frequency digital circuit is configured to execute the ultra-high-frequency downlink commands. Thus, according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal, it can be determined which circuits among the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit do not need to work. The power management module can control the power-down of the circuit to make the circuit enter the off state. Therefore, the circuit will not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0021] According to an embodiment of the present invention, power-down control is performed on at least two of a high-frequency analog circuit and a high-frequency digital circuit and an ultra-high-frequency analog circuit and an ultra-high-frequency digital circuit according to at least one of a high-frequency reset signal and an ultra-high-frequency reset signal, including: when the high-frequency reset signal is received and the ultra-high-frequency reset signal is not received, performing power-down control on the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit; or when the high-frequency reset signal is not received and the ultra-high-frequency reset signal is received, performing power-down control on the high-frequency analog circuit and the high-frequency digital circuit; or when the high-frequency reset signal and the ultra-high-frequency reset signal are received, performing power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to a first generation time of the high-frequency reset signal and a second generation time of the ultra-high-frequency reset signal.

[0022] According to an embodiment of the present invention, the high-frequency analog circuit includes a high-frequency reset generation module, a high-frequency power generation unit, a high-frequency demodulation module, and a high-frequency modulation module. The high-frequency reset generation module is configured to generate a high-frequency reset signal when a high-frequency electromagnetic wave signal is received. The high-frequency power generation unit is configured to generate a power supply for the high-frequency digital circuit according to the high-frequency electromagnetic wave signal when the high-frequency electromagnetic wave signal is received. The high-frequency demodulation module is configured to demodulate the high-frequency electromagnetic wave signal to generate a high-frequency downlink command and send the high-frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the high-frequency downlink command and returns high-frequency uplink data. The high-frequency modulation module is configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier and transmit the high-frequency electromagnetic carrier to a radio frequency antenna to transmit the high-frequency electromagnetic carrier through the radio frequency antenna. The high-frequency digital circuit includes a high-frequency downlink decoding module, a high-frequency command parsing module, a high-frequency status control module, and a high-frequency uplink encoding module. The high-frequency downlink decoding module is configured to decode the high-frequency downlink command to obtain a high-frequency decoded signal. The high-frequency command parsing module is configured to parse the high-frequency decoded signal to obtain a high-frequency command type and high-frequency command parameters. The high-frequency status control module is configured to control the status of the RFID tag chip according to the high-frequency command type and high-frequency command parameters and determine the type of the high-frequency uplink data. The high-frequency uplink encoding module is configured to perform uplink data encoding according to the type of the high-frequency uplink data and the status of the RFID tag chip to generate the high-frequency uplink data. The method further includes: after receiving the high-frequency reset signal, providing the power supply of the high-frequency digital circuit to the high-frequency downlink decoding module to power on the high-frequency downlink decoding module; after receiving a control signal sent by the high-frequency downlink decoding module, sequentially providing the power supply of the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module to power on the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module in sequence.

[0023] According to an embodiment of the present invention, the method further includes: when the RFID tag chip finishes executing the high-frequency downlink command, controlling the high-frequency uplink encoding module, the high-frequency status control module, and the high-frequency command parsing module to power down in sequence.

[0024] According to an embodiment of the present invention, the ultra-high-frequency analog circuit includes an ultra-high-frequency reset generation module, an ultra-high-frequency power generation unit, an ultra-high-frequency demodulation module, and an ultra-high-frequency modulation module. The ultra-high-frequency reset generation module is configured to generate an ultra-high-frequency reset signal when receiving an ultra-high-frequency electromagnetic wave signal. The ultra-high-frequency power generation unit is configured to generate a power supply for the ultra-high-frequency digital circuit according to the ultra-high-frequency electromagnetic wave signal or the ultra-high-frequency electromagnetic wave signal when receiving the ultra-high-frequency electromagnetic wave signal. The ultra-high-frequency demodulation module is configured to demodulate the ultra-high-frequency electromagnetic wave signal to generate an ultra-high-frequency downlink command, and send the ultra-high-frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the ultra-high-frequency downlink command and returns ultra-high-frequency uplink data. The ultra-high-frequency modulation module is configured to modulate the ultra-high-frequency uplink data to generate an ultra-high-frequency electromagnetic carrier, and transmit the ultra-high-frequency electromagnetic carrier to the radio frequency antenna to transmit the ultra-high-frequency electromagnetic carrier through the radio frequency antenna. The ultra-high-frequency digital circuit includes an ultra-high-frequency downlink decoding module, an ultra-high-frequency command parsing module, an ultra-high-frequency status control module, and an ultra-high-frequency uplink encoding module. The ultra-high-frequency downlink decoding module is configured to decode the ultra-high-frequency downlink command to obtain an ultra-high-frequency decoded signal. The ultra-high-frequency command parsing module is configured to parse the ultra-high-frequency decoded signal to obtain an ultra-high-frequency command type and ultra-high-frequency command parameters. The ultra-high-frequency status control module is configured to control the status of the RFID tag chip according to the ultra-high-frequency command type and ultra-high-frequency command parameters, and determine the type of the ultra-high-frequency uplink data. The ultra-high-frequency uplink encoding module is configured to perform uplink data encoding according to the type of the ultra-high-frequency uplink data and the status of the RFID tag chip to generate ultra-high-frequency uplink data. The method further includes: after receiving the ultra-high-frequency reset signal, providing the power supply of the ultra-high-frequency digital circuit to the ultra-high-frequency downlink decoding module to power on the ultra-high-frequency downlink decoding module; after receiving the control signal sent by the ultra-high-frequency downlink decoding module, providing the power supply of the ultra-high-frequency digital circuit to the ultra-high-frequency command parsing module, the ultra-high-frequency status control module, and the ultra-high-frequency uplink encoding module in sequence to power on the ultra-high-frequency command parsing module, the ultra-high-frequency status control module, and the ultra-high-frequency uplink encoding module in sequence.

[0025] According to an embodiment of the present invention, the method further includes: when the RFID tag chip finishes executing the ultra-high-frequency downlink command, controlling the ultra-high-frequency uplink encoding module, the ultra-high-frequency status control module, and the ultra-high-frequency command parsing module to power down in sequence.

[0026] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a schematic structural diagram of an RFID tag chip according to an embodiment of the present invention; Figure 2 is a schematic structural diagram of a high-frequency analog circuit and a high-frequency digital circuit according to an embodiment of the present invention; Figure 3 is a schematic flow diagram of an RFID tag chip operating in a high-frequency protocol stack according to an embodiment of the present invention; Figure 4 is a schematic structural diagram of a UHF analog circuit and a UHF digital circuit according to an embodiment of the present invention; Figure 5 is a schematic flow diagram of an RFID tag chip operating in a UHF protocol stack according to an embodiment of the present invention; Figure 6 is a schematic structural diagram of a power management module according to an embodiment of the present invention; Figure 7 is a schematic flow diagram of a power management method for an RFID tag chip according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0028] Embodiments of the present invention will be described in detail below. Examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0029] An RFID tag chip and a power management method thereof according to an embodiment of the present invention will be described below with reference to the accompanying drawings.

[0030] Figure 1 is a schematic structural diagram of an RFID tag chip according to an embodiment of the present invention. As Figure 1 shown, the RFID tag chip 1000 includes a radio frequency antenna 100, a high-frequency analog circuit 200, a high-frequency digital circuit 300, a UHF analog circuit 400, a UHF digital circuit 500, and a power management module 600.

[0031] Among them, the radio frequency antenna 100 is adapted to receive high-frequency electromagnetic wave signals or ultra-high-frequency electromagnetic wave signals; the high-frequency analog circuit 200 is configured to demodulate the high-frequency electromagnetic wave signals to obtain high-frequency downlink commands, and generate a high-frequency reset signal when receiving the high-frequency electromagnetic wave signals. The high-frequency digital circuit 300 is configured to execute the high-frequency downlink commands; the ultra-high-frequency analog circuit 400 is configured to demodulate the ultra-high-frequency electromagnetic wave signals and generate an ultra-high-frequency reset signal when receiving the ultra-high-frequency electromagnetic wave signals. The ultra-high-frequency digital circuit 500 is configured to execute the ultra-high-frequency downlink commands; the power management module 600 is configured to perform power-down control on at least two of the high-frequency analog circuit 200 and the high-frequency digital circuit 300 and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal.

[0032] Specifically, the high-frequency analog circuit 200 and the high-frequency digital circuit 300 can identify and execute high-frequency electromagnetic wave signals, and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 can identify and execute ultra-high-frequency electromagnetic wave signals. Among them, the frequency of the high-frequency electromagnetic wave signal is usually around 13.56 MHz, and the frequency of the ultra-high-frequency electromagnetic wave signal is usually between 860 MHz and 960 MHz. When the RF antenna 100 receives a high-frequency electromagnetic wave signal, the high-frequency analog circuit 200 demodulates the high-frequency electromagnetic wave signal to generate a high-frequency downlink command. At the same time, the high-frequency analog circuit 200 will generate a high-frequency reset signal, and the high-frequency digital circuit 300 will execute the high-frequency downlink command. When the RF antenna 100 receives an ultra-high-frequency electromagnetic wave signal, the ultra-high-frequency analog circuit 400 demodulates the ultra-high-frequency electromagnetic wave signal to generate an ultra-high-frequency downlink command. At the same time, the ultra-high-frequency analog circuit 400 will generate an ultra-high-frequency reset signal, and the ultra-high-frequency digital circuit 500 will execute the high-frequency downlink command. The power management module 600 is respectively connected to the high-frequency analog circuit 200, the high-frequency digital circuit 300, the ultra-high-frequency analog circuit 400, and the ultra-high-frequency digital circuit 500. If the high-frequency analog circuit 200 generates a high-frequency reset signal, the high-frequency analog circuit 200 will send the high-frequency reset signal to the power management module 600. If the ultra-high-frequency analog circuit 400 generates an ultra-high-frequency reset signal, the ultra-high-frequency analog circuit 400 will send the ultra-high-frequency reset signal to the power management module 600. The power management module 600 can determine which of the high-frequency analog circuit 200, the high-frequency digital circuit 300, the ultra-high-frequency analog circuit 400, and the ultra-high-frequency digital circuit 500 need to work and which do not need to work according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal, and then control the power-off of the circuits that do not need to work. For example, if the power management module 600 only receives the high-frequency reset signal, indicating that the RF antenna 100 has received a high-frequency electromagnetic wave signal, then the high-frequency analog circuit 200 and the high-frequency digital circuit 300 need to work, while the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 do not need to work. Therefore, the power management module 600 controls the power-off of the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500.

[0033] It should be noted that the high-frequency analog circuit 200 and the high-frequency digital circuit 300 need to be powered on or off simultaneously, and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 need to be powered on or off simultaneously.

[0034] In the above embodiments, since the high-frequency reset signal and the ultra-high-frequency reset signal are generated according to the high-frequency electromagnetic wave signal and the ultra-high-frequency electromagnetic wave signal, the power management module can determine which circuits in the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit do not need to work based on the high-frequency reset signal and / or the ultra-high-frequency reset signal, and then control the power-down of the circuits that do not need to work, so that the circuits enter the off state. Therefore, the circuits will not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0035] In some embodiments, the power management module 600 is further configured to perform power-down control on the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 when receiving the high-frequency reset signal and not receiving the ultra-high-frequency reset signal; or perform power-down control on the high-frequency analog circuit 200 and the high-frequency digital circuit 300 when not receiving the high-frequency reset signal and receiving the ultra-high-frequency reset signal; or perform power-down control on at least two of the high-frequency analog circuit 200 and the high-frequency digital circuit 300 and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 according to the first generation time of the high-frequency reset signal and the second generation time of the ultra-high-frequency reset signal when receiving the high-frequency reset signal and the ultra-high-frequency reset signal.

[0036] Specifically, if the power management module 600 receives a high-frequency reset signal and does not receive an ultra-high-frequency reset signal, it indicates that the radio frequency antenna 100 receives a high-frequency electromagnetic wave signal and does not receive an ultra-high-frequency electromagnetic wave signal. Then, the high-frequency analog circuit 200 and the high-frequency digital circuit 300 need to work according to the high-frequency electromagnetic wave signal, and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 do not need to work. Therefore, the power management module 600 performs a power-down control on the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500. If the power management module 600 receives an ultra-high-frequency reset signal and does not receive a high-frequency reset signal, it indicates that the radio frequency antenna 100 receives an ultra-high-frequency electromagnetic wave signal and does not receive a high-frequency electromagnetic wave signal. Then, the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 need to work according to the ultra-high-frequency electromagnetic wave signal, and the high-frequency analog circuit 200 and the high-frequency digital circuit 300 do not need to work. Therefore, the power management module 600 performs a power-down control on the high-frequency analog circuit 200 and the high-frequency digital circuit 300. If the power management module 600 receives an ultra-high-frequency reset signal and a high-frequency reset signal, it indicates that the radio frequency antenna 100 receives a high-frequency electromagnetic wave signal and an ultra-high-frequency electromagnetic wave signal. Then, according to the first generation time of the high-frequency reset signal and the second generation time of the ultra-high-frequency reset signal, that is, the order in which the high-frequency reset signal and the ultra-high-frequency reset signal first become 1, it can be determined which part of the circuit executes the command first and which part of the circuit executes the command later. The circuit that executes the command later can be powered down first to turn off the circuit that executes the command later, thereby reducing the power consumption of the RFID tag chip 1000.

[0037] In some embodiments, the power management module 600 is further configured to perform a power-down control on the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 when the first generation time is earlier than the second generation time; or perform a power-down control on the high-frequency analog circuit 200 and the high-frequency digital circuit 300 when the second generation time is earlier than the first generation time; or perform a power-down control on at least two of the high-frequency analog circuit 200 and the high-frequency digital circuit 300 and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 according to the first parsing time of the high-frequency digital circuit 300 for the high-frequency downlink command and the second parsing time of the ultra-high-frequency digital circuit 500 for the ultra-high-frequency downlink command when the first generation time is the same as the second generation time.

[0038] Specifically, if the first generation time is earlier than the second generation time, indicating that the generation time of the high-frequency reset signal is earlier than that of the ultra-high-frequency reset signal, then the high-frequency analog circuit 200 and the high-frequency digital circuit 300 will execute the high-frequency downlink command first, and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 will execute the ultra-high-frequency downlink command later. Therefore, the power management module 600 performs a power-down control on the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500; if the second generation time is earlier than the first generation time, indicating that the generation time of the ultra-high-frequency reset signal is earlier than that of the high-frequency signal, then the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 will execute the ultra-high-frequency downlink command first, and the high-frequency analog circuit 200 and the high-frequency digital circuit 300 will execute the high-frequency downlink command later. Therefore, the power management module 600 performs a power-down control on the high-frequency analog circuit 200 and the high-frequency digital circuit 300; if the ultra-high-frequency reset signal and the high-frequency reset signal are generated simultaneously, it is determined which part of the circuit executes the command first and which part executes the command later according to the parsing time of the high-frequency downlink command and the ultra-high-frequency downlink command. The circuit that executes the command later can be powered down first so that the circuit that executes the command later is turned off, thereby reducing the power consumption of the RFID tag chip 1000.

[0039] In some embodiments, the power management module 600 is further configured to perform a power-down control on the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 when the first parsing time is earlier than the second parsing time; or perform a power-down control on the high-frequency analog circuit 200 and the high-frequency digital circuit 300 when the second parsing time is earlier than the first parsing time; or perform a power-down control on the high-frequency analog circuit 200 and the ultra-high-frequency digital circuit 500 and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 respectively when the first parsing time is the same as the second parsing time.

[0040] Specifically, if the first parsing time is earlier than the second parsing time, it indicates that the high-frequency downlink command is parsed first. Then, the high-frequency analog circuit 200 and the high-frequency digital circuit 300 will execute the high-frequency downlink command first, and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 will execute the ultra-high-frequency downlink command later. Therefore, the power management module 600 performs a power-down control on the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500. If the second parsing time is earlier than the first parsing time, it indicates that the ultra-high-frequency downlink command is parsed first. Then, the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 will execute the ultra-high-frequency downlink command first, and the high-frequency analog circuit 200 and the high-frequency digital circuit 300 will execute the high-frequency downlink command later. Therefore, the power management module 600 performs a power-down control on the high-frequency analog circuit 200 and the high-frequency digital circuit 300. If the ultra-high-frequency downlink command and the high-frequency downlink command are parsed at the same time, in order to avoid faults in the RFID, the power management module 600 performs a power-down on the high-frequency analog circuit 200, the high-frequency digital circuit 300, the ultra-high-frequency analog circuit 400, and the ultra-high-frequency digital circuit 500.

[0041] In some embodiments, as Figure 2 shown, the high-frequency analog circuit 200 includes: a high-frequency reset generation module 210, a high-frequency power generation unit 220, a high-frequency demodulation module 230, and a high-frequency modulation module 240. Among them, the high-frequency reset generation module 210 is configured to generate a high-frequency reset signal when receiving a high-frequency electromagnetic wave signal, and send the high-frequency reset signal to the power management module 600; the high-frequency power generation unit 220 is configured to generate a power supply for the high-frequency digital circuit 300 according to the high-frequency electromagnetic wave signal when receiving the high-frequency electromagnetic wave signal; the high-frequency demodulation module 230 is configured to demodulate the high-frequency electromagnetic wave signal to generate a high-frequency downlink command, and send the high-frequency downlink command to the high-frequency digital circuit 300 so that the high-frequency digital circuit 300 can execute the high-frequency downlink command and return high-frequency uplink data; the high-frequency modulation module 240 is configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier, and transmit the high-frequency electromagnetic carrier to the radio frequency antenna 100 to transmit the high-frequency electromagnetic carrier through the radio frequency antenna 100.

[0042] It can be understood that when the high-frequency reset generation module 210 receives a high-frequency electromagnetic wave signal, it generates a high-frequency reset signal. After receiving the high-frequency reset signal, the power management module 600 powers on and resets the RFID chip. The high-frequency power generation unit 220 generates the power supply for the high-frequency digital circuit 300 according to the high-frequency electromagnetic wave signal. The power management module 600 controls whether the high-frequency power generation unit 220 generates the power supply for the high-frequency digital circuit 300 and controls whether the power supply for the high-frequency digital circuit 300 is provided to the high-frequency digital circuit 300. The high-frequency demodulation module 230 demodulates the high-frequency electromagnetic wave signal to restore the original baseband signal from the high-frequency electromagnetic wave signal, obtaining a high-frequency downlink command. The high-frequency digital circuit 300 executes the high-frequency downlink command. After executing the high-frequency downlink command, the high-frequency digital circuit 300 needs to feedback data to the reader. Therefore, the high-frequency digital circuit 300 returns high-frequency uplink data. After receiving the high-frequency uplink data, the high-frequency modulation module 240 modulates the high-frequency uplink data to generate a high-frequency electromagnetic carrier that can be transmitted by the RF antenna 100 and transmits it to the reader through the RF antenna 100.

[0043] In an alternative embodiment, as Figure 2 shown, the high-frequency analog circuit 200 further includes a high-frequency clock generation module 250. The high-frequency clock generation module 250 is used to generate the clock signal for the high-frequency digital circuit 300 so that the high-frequency digital circuit 300 operates according to the clock signal. The working clock of the RFID tag chip 1000 can be generated by using the clock gating technology in the related art and combined with the power management logic of this embodiment on the basis of the clock gating technology in the related art, thereby further reducing the power consumption of the RFID tag chip 1000. The high-frequency power generation unit 220 includes a high-frequency rectification module 221, a high-frequency limiting module 222, and a high-frequency voltage regulation module 223. The high-frequency rectification module 221 is connected to the RF antenna 100. The high-frequency limiting module 222 is respectively connected to the high-frequency rectification module 221 and the power management module 600. The high-frequency voltage regulation module 223 is respectively connected to the high-frequency limiting module 222 and the power management module 600. The high-frequency rectification module 221 rectifies the high-frequency electromagnetic wave signal to generate a first DC signal. The high-frequency limiting module 222 generates the high-voltage power supply HF_VDDH for the high-frequency digital circuit 300 according to the first preset voltage amplitude and the first DC signal and provides the high-voltage power supply HF_VDDH for the high-frequency digital circuit 300 to the power management module 600. The high-frequency voltage regulation module 223 generates the low-voltage power supply HF_VDD for the high-frequency digital circuit 300 according to the high-voltage power supply HF_VDDH for the high-frequency digital circuit 300 and provides the low-voltage power supply HF_VDD for the high-frequency digital circuit 300 to the power management module 600.

[0044] In some embodiments, as Figure 2As shown in the figure, the high-frequency digital circuit 300 includes: a high-frequency downlink decoding module 310, a high-frequency command parsing module 320, a high-frequency status control module 330, and a high-frequency uplink encoding module 340. Among them, the high-frequency downlink decoding module 310 is configured to decode the high-frequency downlink command to obtain a high-frequency decoded signal; the high-frequency command parsing module 320 is configured to parse the high-frequency decoded signal to obtain a high-frequency command type and high-frequency command parameters; the high-frequency status control module 330 is configured to control the status of the RFID tag chip 1000 according to the high-frequency command type and high-frequency command parameters, and determine the type of high-frequency uplink data; the high-frequency uplink encoding module 340 is configured to perform uplink data encoding according to the type of high-frequency uplink data and the status of the RFID tag chip to generate high-frequency uplink data.

[0045] That is to say, after the high-frequency downlink decoding module 310 receives the high-frequency downlink command sent by the high-frequency demodulation module 230, it decodes the high-frequency downlink command to obtain a high-frequency decoded signal. The high-frequency decoded signal includes a reqa command or a wupa command. Among them, the reqa command is used to detect whether the smart card is in the radio frequency field, and the wupa command is used to wake up the smart card that has entered the stop state and make it return to the ready state. The high-frequency command parsing module 320 usually parses the high-frequency decoded signal according to the preset command protocol and format to obtain the high-frequency command type and high-frequency command parameters. The high-frequency status control module 330 controls the status of the RFID tag chip 1000 according to the high-frequency command type and high-frequency command parameters to execute the high-frequency downlink command. After the execution is completed, the high-frequency status control module 330 will determine the type of high-frequency uplink data. After receiving the type of high-frequency uplink data sent by the high-frequency status control module 330, the high-frequency uplink encoding module 340 performs uplink data encoding according to the type of high-frequency uplink data and the status of the RFID tag chip to generate high-frequency uplink data, and then sends the high-frequency uplink data to the high-frequency modulation module 240.

[0046] In some embodiments, such as Figure 2 and Figure 3As shown in the figure, the power management module 600 is respectively connected to the high-frequency downlink decoding module 310, the high-frequency command parsing module 320, the high-frequency status control module 330, and the high-frequency uplink encoding module 340. The power management module 600 is further configured to, after receiving the high-frequency reset signal, supply the power supply of the high-frequency digital circuit 300 to the high-frequency downlink decoding module 310 to power on the high-frequency downlink decoding module 310, and after receiving the control signal sent by the high-frequency downlink decoding module 310, supply the power supply of the high-frequency digital circuit 300 to the high-frequency command parsing module 320, the high-frequency status control module 330, and the high-frequency uplink encoding module 340 in sequence to power on the high-frequency command parsing module 320, the high-frequency status control module 330, and the high-frequency uplink encoding module 340 in sequence.

[0047] Specifically, when the RF antenna 100 receives a high-frequency electromagnetic wave signal, the RFID tag chip 1000 operates in the high-frequency protocol stack. After receiving the high-frequency reset signal, the power management module 600 powers on and resets. After the RFID tag chip 1000 powers on and resets and the initialization is completed, the power supply of the high-frequency digital circuit 300 is supplied to the high-frequency downlink decoding module 310 to power on the high-frequency downlink decoding module 310. At this time, the RFID tag chip 1000 is in the IDLE state. After the high-frequency downlink decoding module 310 decodes the high-frequency decoding signal (reqa command or wupa command) for the first time, the high-frequency downlink decoding module 310 sends a control signal to the power management module 600. After receiving the control signal, the power management module 600 controls the high-frequency command parsing module 320, the high-frequency status control module 330, and the high-frequency uplink encoding module 340 to power on in sequence, and then executes the high-frequency downlink command.

[0048] Further, in some embodiments, as Figure 3 shown, the power management module 600 is further configured to control the high-frequency uplink encoding module 340, the high-frequency status control module 330, and the high-frequency command parsing module 320 to power off in sequence when the RFID tag chip 1000 finishes executing the high-frequency downlink command.

[0049] Specifically, after the RFID tag chip 1000 finishes executing the high-frequency downlink command, the RFID tag chip 1000 will return to the idle state. If the RFID tag chip 1000 does not return to the idle state, it will continue to execute the high-frequency downlink command. If the RFID tag chip 1000 returns to the idle state, the power management module 600 controls the high-frequency uplink encoding module 340, the high-frequency status control module 330, and the high-frequency command parsing module 320 to power down in sequence, and waits for the high-frequency decoding signal (reqa command or wupa command). After the high-frequency decoding signal (reqa command or wupa command) arrives, if the high-frequency downlink decoding module 310 decodes the high-frequency decoding signal (reqa command or wupa command), it will again control the high-frequency command parsing module 320, the high-frequency status control module 330, and the high-frequency uplink encoding module 340 to power on in sequence.

[0050] In the above embodiment, after the chip is powered on, if the high-frequency downlink decoding module decodes a high-frequency command, it controls the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module to power on in sequence. After the high-frequency command is executed, it controls the high-frequency uplink encoding module, the high-frequency status control module, and the high-frequency command parsing module to power down in sequence, thereby achieving low standby power consumption.

[0051] In some embodiments, as Figure 4 shown, the ultra-high-frequency analog circuit 400 includes: an ultra-high-frequency reset generation module 410, an ultra-high-frequency power generation unit 420, an ultra-high-frequency demodulation module 430, and an ultra-high-frequency modulation module 440. Among them, the ultra-high-frequency reset generation module 410 is configured to generate an ultra-high-frequency reset signal and send the ultra-high-frequency reset signal to the power management module 600 when receiving an ultra-high-frequency electromagnetic wave signal; the ultra-high-frequency power generation unit 420 is configured to generate a power supply for the ultra-high-frequency digital circuit 500 according to the ultra-high-frequency electromagnetic wave signal when receiving the ultra-high-frequency electromagnetic wave signal; the ultra-high-frequency demodulation module 430 is configured to demodulate the ultra-high-frequency electromagnetic wave signal to generate an ultra-high-frequency downlink command, and send the ultra-high-frequency downlink command to the high-frequency digital circuit 300 so that the high-frequency digital circuit 300 executes the ultra-high-frequency downlink command and returns ultra-high-frequency uplink data; the ultra-high-frequency modulation module 440 is configured to modulate the ultra-high-frequency uplink data to generate an ultra-high-frequency electromagnetic carrier, and transmit the ultra-high-frequency electromagnetic carrier to the radio frequency antenna 100 to transmit the ultra-high-frequency electromagnetic carrier through the radio frequency antenna 100.

[0052] It can be understood that the working principle of the ultra-high frequency analog circuit 400 is similar to that of the high frequency analog circuit 200. When the ultra-high frequency reset generation module 410 receives an ultra-high frequency electromagnetic wave signal, it generates an ultra-high frequency reset signal. After receiving the ultra-high frequency reset signal, the power management module 600 powers on and resets the RFID chip. The ultra-high frequency power generation unit 420 generates the power supply for the ultra-high frequency digital circuit 500 according to the ultra-high frequency electromagnetic wave signal. The power management module 600 controls whether the ultra-high frequency power generation unit 420 generates the power supply for the ultra-high frequency digital circuit 500 and controls whether the power supply for the ultra-high frequency digital circuit 500 is provided to the ultra-high frequency digital circuit 500. The ultra-high frequency demodulation module 430 demodulates the ultra-high frequency electromagnetic wave signal to restore the original baseband signal from the ultra-high frequency electromagnetic wave signal, obtaining an ultra-high frequency downlink command. The ultra-high frequency digital circuit 500 executes the ultra-high frequency downlink command. After the ultra-high frequency digital circuit 500 finishes executing the ultra-high frequency downlink command, it needs to feedback data to the reader. Therefore, the ultra-high frequency digital circuit 500 returns ultra-high frequency uplink data. After receiving the ultra-high frequency uplink data, the ultra-high frequency modulation module 440 modulates the ultra-high frequency uplink data to generate an ultra-high frequency electromagnetic carrier that can be transmitted by the radio frequency antenna 100 and transmits it to the reader through the radio frequency antenna 100.

[0053] In an alternative embodiment, such as Figure 4As shown, the ultra-high frequency analog circuit 400 further includes an ultra-high frequency clock generation module 450. The ultra-high frequency clock generation module 450 is used to generate a clock signal for the ultra-high frequency digital circuit 500, so that the ultra-high frequency digital circuit 500 operates according to the clock signal. The operating clock of the RFID tag chip 1000 can be generated by using the clock gating technology in the related art and combined with the power management logic of this embodiment on the basis of the clock gating technology in the related art, thereby further reducing the power consumption of the RFID tag chip 1000. The ultra-high frequency power generation unit 420 includes an ultra-high frequency rectification module 421, an ultra-high frequency limiting module 422, and an ultra-high frequency voltage regulation module 423. The ultra-high frequency rectification module 421 is connected to the radio frequency antenna 100. The ultra-high frequency limiting module 422 is respectively connected to the ultra-high frequency rectification module 421 and the power management module 600. The ultra-high frequency voltage regulation module 423 is respectively connected to the ultra-high frequency limiting module 422 and the power management module 600. The ultra-high frequency rectification module 421 rectifies the ultra-high frequency electromagnetic wave signal to generate a second DC signal. The ultra-high frequency limiting module 422 generates the high-voltage power supply UHF_VDDH for the ultra-high frequency digital circuit 500 according to the second preset voltage amplitude and the second DC signal, and provides the high-voltage power supply UHF_VDDH for the ultra-high frequency digital circuit 500 to the power management module 600. The ultra-high frequency voltage regulation module 423 generates the low-voltage power supply UHF_VDD for the ultra-high frequency digital circuit 500 according to the high-voltage power supply UHF_VDDH for the ultra-high frequency digital circuit 500, and provides the low-voltage power supply UHF_VDD for the ultra-high frequency digital circuit 500 to the power management module 600.

[0054] In some embodiments, as Figure 4 shown, the ultra-high frequency digital circuit 500 includes: an ultra-high frequency downlink decoding module 510, an ultra-high frequency command parsing module 520, an ultra-high frequency status control module 530, and an ultra-high frequency uplink encoding module 540. Among them, the ultra-high frequency downlink decoding module 510 is configured to decode the ultra-high frequency downlink command to obtain an ultra-high frequency decoded signal; the ultra-high frequency command parsing module 520 is configured to parse the ultra-high frequency decoded signal to obtain an ultra-high frequency command type and an ultra-high frequency command parameter; the ultra-high frequency status control module 530 is configured to control the status of the RFID tag chip 1000 according to the high-frequency command type and the high-frequency command parameter, and determine the type of the ultra-high frequency uplink data; the ultra-high frequency uplink encoding module 540 is configured to perform uplink data encoding according to the type of the ultra-high frequency uplink data and the status of the RFID tag chip to generate ultra-high frequency uplink data.

[0055] That is to say, after the ultra-high frequency downlink decoding module 510 receives the ultra-high frequency downlink command sent by the ultra-high frequency demodulation module 430, it decodes the ultra-high frequency downlink command to obtain an ultra-high frequency decoded signal, and the ultra-high frequency decoded signal includes a query command. The ultra-high frequency command parsing module 520 usually parses the ultra-high frequency decoded signal according to a preset command protocol and format to obtain an ultra-high frequency command type and ultra-high frequency command parameters. The ultra-high frequency status control module 530 controls the status of the RFID tag chip 1000 according to the ultra-high frequency command type and ultra-high frequency command parameters to execute the ultra-high frequency downlink command. After the execution is completed, the ultra-high frequency status control module 530 determines the type of ultra-high frequency uplink data. After receiving the type of ultra-high frequency uplink data sent by the ultra-high frequency status control module 530, the ultra-high frequency uplink encoding module 540 performs uplink data encoding according to the type of ultra-high frequency uplink data and the status of the RFID tag chip to generate ultra-high frequency uplink data, and then sends the ultra-high frequency uplink data to the ultra-high frequency modulation module 440.

[0056] In some embodiments, as Figure 4 and Figure 5 shown, the power management module 600 is respectively connected to the ultra-high frequency downlink decoding module 510, the ultra-high frequency command parsing module 520, the ultra-high frequency status control module 530, and the ultra-high frequency uplink encoding module 540. The power management module 600 is further configured to, after receiving the ultra-high frequency reset signal, supply the power supply of the ultra-high frequency digital circuit 500 to the ultra-high frequency downlink decoding module 510 to power on the ultra-high frequency downlink decoding module 510, and after receiving the control signal sent by the ultra-high frequency downlink decoding module 510, supply the power supply of the ultra-high frequency digital circuit 500 to the ultra-high frequency command parsing module 520, the ultra-high frequency status control module 530, and the ultra-high frequency uplink encoding module 540 in sequence to power on the ultra-high frequency command parsing module 520, the ultra-high frequency status control module 530, and the ultra-high frequency uplink encoding module 540 in sequence.

[0057] Specifically, when the RF antenna 100 receives a UHF electromagnetic wave signal, the RFID tag chip 1000 operates in the UHF protocol stack. After the power management module 600 receives the UHF reset signal, it powers on and resets. After the RFID tag chip 1000 is powered on and reset and the initialization is completed, the power supply for the UHF digital circuit 500 is provided to the UHF downlink decoding module 510 to power on the UHF downlink decoding module 510. At this time, the RFID tag chip 1000 is in the READY state. After the UHF downlink decoding module 510 first decodes the UHF decoding signal (query command), the UHF downlink decoding module 510 sends a control signal to the power management module 600. After receiving the control signal, the power management module 600 controls the UHF command parsing module 520, the UHF status control module 530, and the UHF uplink encoding module 540 to power on in sequence, and then executes the UHF downlink command.

[0058] Further, in some embodiments, as Figure 5 shown, the power management module 600 is further configured to control the UHF uplink encoding module 540, the UHF status control module 530, and the UHF command parsing module 520 to power off in sequence when the RFID tag chip 1000 has completed executing the UHF downlink command.

[0059] Specifically, after the RFID tag chip 1000 has completed executing the UHF downlink command, the RFID tag chip 1000 will return to the ready state (READY state). If the RFID tag chip 1000 does not return to the ready state (READY state), the UHF downlink command will continue to be executed. If the RFID tag chip 1000 returns to the ready state (READY state), the power management module 600 controls the UHF uplink encoding module 540, the UHF status control module 530, and the UHF command parsing module 520 to power off in sequence, waiting for the UHF decoding signal (query command). After the UHF decoding signal (query command) arrives, if the UHF downlink decoding module 510 decodes the UHF decoding signal (query command), it will again control the UHF command parsing module 520, the UHF status control module 530, and the UHF uplink encoding module 540 to power on in sequence.

[0060] In the above embodiments, after the chip is powered on, if the UHF downlink decoding module decodes a UHF command, it controls the UHF command parsing module, the UHF status control module, and the UHF uplink encoding module to power on in sequence. After the UHF command is executed, it controls the UHF uplink encoding module, the UHF status control module, and the UHF command parsing module to power off in sequence, thus achieving low standby power consumption.

[0061] In some embodiments, asFigure 6 As shown in Figure 6 , the power management module 600 includes a high-frequency power switch 610 and an ultra-high-frequency power switch 620. Among them, the high-frequency power switch 610 is respectively connected to the high-frequency analog circuit 200 and the high-frequency digital circuit 300. The high-frequency power switch 610 is configured to perform power-on control and power-off control on the high-frequency analog circuit 200 and the high-frequency digital circuit 300. The ultra-high-frequency power switch 620 is respectively connected to the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500. The ultra-high-frequency power switch 620 is configured to perform power-on control and power-off control on the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500.

[0062] It can be understood that the high-frequency power switch 610 is used to control the power-on and power-off of the high-frequency analog circuit 200 and the high-frequency digital circuit 300. The ultra-high-frequency power switch 620 is used to control the power-on and power-off of the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500. When a high-frequency reset signal is received and no ultra-high-frequency reset signal is received, the power management module 600 controls the ultra-high-frequency power switch 620 to power off the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500. When an ultra-high-frequency reset signal is received and no high-frequency reset signal is received, the power management module 600 controls the high-frequency power switch 610 to power off the high-frequency analog circuit 200 and the high-frequency digital circuit 300.

[0063] In summary, for the RFID tag chip according to the embodiment of the present invention, according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal, it can be determined which circuits among the high-frequency analog circuit, the high-frequency digital circuit, the ultra-high-frequency analog circuit, and the ultra-high-frequency digital circuit do not need to work. The power management module can control the circuits that do not need to work to power off, so that the circuit enters the off state. Therefore, the circuit will not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip. And it will not affect the circuits that need to work, realizing the seamless switching and compatibility of the high-frequency and ultra-high-frequency protocols, and improving the flexibility and application range of the RFID tag chip. In addition, after the high-frequency uplink decoding module / ultra-high-frequency uplink decoding module decodes a valid command, it controls the corresponding module to power on in sequence, and after the command execution is completed, it controls the corresponding module to power off in sequence, thereby further reducing the standby power consumption of the chip.

[0064] Corresponding to the above embodiment, the embodiment of the present invention also provides a power management method for an RFID tag chip 1000. As Figure 1As shown, the RFID tag chip 1000 includes a radio frequency antenna 100, a high-frequency analog circuit 200 and a high-frequency digital circuit 300, a ultra-high-frequency analog circuit 400 and a ultra-high-frequency digital circuit 500. The radio frequency antenna 100 is adapted to receive high-frequency electromagnetic wave signals or ultra-high-frequency electromagnetic wave signals. The high-frequency analog circuit 200 is configured to demodulate the high-frequency electromagnetic wave signals to obtain high-frequency downlink commands, and generate a high-frequency reset signal when receiving high-frequency electromagnetic wave signals. The high-frequency digital circuit 300 is configured to execute high-frequency downlink commands. The ultra-high-frequency analog circuit 400 is configured to demodulate the ultra-high-frequency electromagnetic wave signals and generate an ultra-high-frequency reset signal when receiving ultra-high-frequency electromagnetic wave signals. The ultra-high-frequency digital circuit 500 is configured to execute ultra-high-frequency downlink commands. As Figure 7 shown, the power management method of the RFID tag chip includes: S101, perform power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal.

[0065] In some embodiments, performing power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal includes: performing power-down control on the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit when receiving the high-frequency reset signal and not receiving the ultra-high-frequency reset signal; or performing power-down control on the high-frequency analog circuit and the high-frequency digital circuit when not receiving the high-frequency reset signal and receiving the ultra-high-frequency reset signal; or performing power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to the first generation time of the high-frequency reset signal and the second generation time of the ultra-high-frequency reset signal when receiving the high-frequency reset signal and the ultra-high-frequency reset signal.

[0066] In some embodiments, performing power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to the first generation time of the high-frequency reset signal and the second generation time of the ultra-high-frequency reset signal includes: performing power-down control on the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit when the first generation time is earlier than the second generation time; or performing power-down control on the high-frequency analog circuit and the high-frequency digital circuit when the second generation time is earlier than the first generation time; or performing power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to the first parsing time of the high-frequency digital circuit for the high-frequency downlink command and the second parsing time of the ultra-high-frequency digital circuit for the ultra-high-frequency downlink command when the first generation time is the same as the second generation time.

[0067] In some embodiments, power-down control is performed on at least two of a high-frequency analog circuit and a high-frequency digital circuit and an ultra-high-frequency analog circuit and an ultra-high-frequency digital circuit according to a first parsing time of a high-frequency downlink command by the high-frequency digital circuit and a second parsing time of an ultra-high-frequency downlink command by the ultra-high-frequency digital circuit, including: when the first parsing time is earlier than the second parsing time, performing power-down control on the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit; or when the second parsing time is earlier than the first parsing time, performing power-down control on the high-frequency analog circuit and the high-frequency digital circuit; or when the first parsing time is the same as the second parsing time, performing power-down control on the high-frequency analog circuit and the ultra-high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit respectively.

[0068] In some embodiments, such as Figure 2As shown in the figure, the high-frequency analog circuit 200 includes: a high-frequency reset generation module 210, a high-frequency power generation unit 220, a high-frequency demodulation module 230, and a high-frequency modulation module 240. The high-frequency reset generation module 210 is configured to generate a high-frequency reset signal and send the high-frequency reset signal to the power management module 600 when receiving a high-frequency electromagnetic wave signal. The high-frequency power generation unit 220 is configured to generate a power supply for the high-frequency digital circuit 300 according to the high-frequency electromagnetic wave signal when receiving the high-frequency electromagnetic wave signal. The high-frequency demodulation module 230 is configured to demodulate the high-frequency electromagnetic wave signal to generate a high-frequency downlink command and send the high-frequency downlink command to the high-frequency digital circuit 300 so that the high-frequency digital circuit 300 executes the high-frequency downlink command and returns high-frequency uplink data. The high-frequency modulation module 240 is configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier and transmit the high-frequency electromagnetic carrier to the radio frequency antenna 100 to transmit the high-frequency electromagnetic carrier through the radio frequency antenna 100. The high-frequency digital circuit 300 includes: a high-frequency downlink decoding module 310, a high-frequency command parsing module 320, a high-frequency status control module 330, and a high-frequency uplink encoding module 340. The high-frequency downlink decoding module 310 is configured to decode the high-frequency downlink command to obtain a high-frequency decoded signal. The high-frequency command parsing module 320 is configured to parse the high-frequency decoded signal to obtain a high-frequency command type and high-frequency command parameters. The high-frequency status control module 330 is configured to control the status of the RFID tag chip 1000 according to the high-frequency command type and high-frequency command parameters and determine the type of the high-frequency uplink data. The high-frequency uplink encoding module 340 is configured to perform uplink data encoding according to the type of the high-frequency uplink data and the status of the RFID tag chip to generate high-frequency uplink data. The method further includes: after receiving the high-frequency reset signal, providing the power supply of the high-frequency digital circuit to the high-frequency downlink decoding module to power on the high-frequency downlink decoding module; after receiving the control signal sent by the high-frequency downlink decoding module, sequentially providing the power supply of the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module to power on the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module in sequence.

[0069] In some embodiments, the method further includes: when the RFID tag chip finishes executing the high-frequency downlink command, controlling the high-frequency uplink encoding module, the high-frequency status control module, and the high-frequency command parsing module to power off in sequence.

[0070] In some embodiments, such as Figure 4As shown in the figure, the ultra-high frequency analog circuit 400 includes: an ultra-high frequency reset generation module 410, an ultra-high frequency power generation unit 420, an ultra-high frequency demodulation module 430, and an ultra-high frequency modulation module 440. The ultra-high frequency reset generation module 410 is configured to generate an ultra-high frequency reset signal when receiving an ultra-high frequency electromagnetic wave signal, and send the ultra-high frequency reset signal to the power management module 600. The ultra-high frequency power generation unit 420 is configured to generate a power supply for the ultra-high frequency digital circuit 500 according to the ultra-high frequency electromagnetic wave signal when receiving the ultra-high frequency electromagnetic wave signal. The ultra-high frequency demodulation module 430 is configured to demodulate the ultra-high frequency electromagnetic wave signal to generate an ultra-high frequency downlink command, and send the ultra-high frequency downlink command to the high-frequency digital circuit 300 so that the high-frequency digital circuit 300 executes the ultra-high frequency downlink command and returns ultra-high frequency uplink data. The ultra-high frequency modulation module 440 is configured to modulate the ultra-high frequency uplink data to generate an ultra-high frequency electromagnetic carrier, and transmit the ultra-high frequency electromagnetic carrier to the radio frequency antenna 100 to transmit the ultra-high frequency electromagnetic carrier through the radio frequency antenna 100. The ultra-high frequency digital circuit 500 includes: an ultra-high frequency downlink decoding module 510, an ultra-high frequency command parsing module 520, an ultra-high frequency status control module 530, and an ultra-high frequency uplink encoding module 540. The ultra-high frequency downlink decoding module 510 is configured to decode the ultra-high frequency downlink command to obtain an ultra-high frequency decoded signal. The ultra-high frequency command parsing module 520 is configured to parse the ultra-high frequency decoded signal to obtain an ultra-high frequency command type and ultra-high frequency command parameters. The ultra-high frequency status control module 530 is configured to control the status of the RFID tag chip 1000 according to the high-frequency command type and high-frequency command parameters, and determine the type of the ultra-high frequency uplink data. The ultra-high frequency uplink encoding module 540 is configured to perform uplink data encoding according to the type of the ultra-high frequency uplink data and the status of the RFID tag chip to generate ultra-high frequency uplink data. The method further includes: after receiving the ultra-high frequency reset signal, providing the power supply of the ultra-high frequency digital circuit to the ultra-high frequency downlink decoding module to power on the ultra-high frequency downlink decoding module; after receiving the control signal sent by the ultra-high frequency downlink decoding module, sequentially providing the power supply of the ultra-high frequency digital circuit to the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module to power on the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module in sequence.

[0071] In some embodiments, the method further includes: when the RFID tag chip finishes executing the ultra-high frequency downlink command, controlling the ultra-high frequency uplink encoding module, the ultra-high frequency status control module, and the ultra-high frequency command parsing module to power off in sequence.

[0072] It should be noted that the specific implementation of the power management method of the RFID tag chip in the embodiments of the present invention corresponds one by one to the specific implementation of the RFID tag chip in the foregoing embodiments of the present invention, and will not be elaborated herein.

[0073] According to the power management method of the RFID tag chip in the embodiments of the present invention, at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit are powered down according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal. The RFID tag chip includes a radio frequency antenna, a high-frequency analog circuit and a high-frequency digital circuit, and an ultra-high-frequency analog circuit and an ultra-high-frequency digital circuit. The radio frequency antenna is adapted to receive a high-frequency electromagnetic wave signal or an ultra-high-frequency electromagnetic wave signal. The high-frequency analog circuit is configured to demodulate the high-frequency electromagnetic wave signal to obtain a high-frequency downlink command, and generate a high-frequency reset signal when the high-frequency electromagnetic wave signal is received. The high-frequency digital circuit is configured to execute the high-frequency downlink command. The ultra-high-frequency analog circuit is configured to demodulate the ultra-high-frequency electromagnetic wave signal to obtain an ultra-high-frequency downlink command, and generate an ultra-high-frequency reset signal when the ultra-high-frequency electromagnetic wave signal is received. The ultra-high-frequency digital circuit is configured to execute the ultra-high-frequency downlink command. Thus, according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal, it can be determined which circuits in the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit do not need to work. The power management module can control the power-down of the circuit so that the circuit enters the off state. Therefore, the circuit will not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0074] Note that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a definite sequence list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other systems that can fetch and execute instructions from the instruction execution system, apparatus, or device), or used in combination with these instruction execution systems, apparatuses, or devices. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium include the following: an electrical connection part with one or more wirings (electronic device), a portable computer diskette (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or other suitable processing as necessary, and then stored in a computer memory.

[0075] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits having logic gate circuits for implementing logical functions on data signals, application specific integrated circuits having suitable combinational logic gate circuits, programmable gate arrays (PGA), field programmable gate arrays (FPGA), etc.

[0076] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0077] In addition, the terms "first", "second", etc. used in the embodiments of the present invention are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated in this embodiment. Thus, the features defined with the terms "first", "second", etc. in the embodiments of the present invention may explicitly or implicitly indicate that at least one such feature is included in this embodiment. In the description of the present invention, the meaning of the word "plural" is at least two or more than two, such as two, three, four, etc., unless otherwise specifically defined in the embodiments.

[0078] In the present invention, unless otherwise clearly specified or limited in the embodiments, the terms "mounted", "connected", "coupled" and "fixed" and the like appearing in the embodiments should be understood in a broad sense. For example, the connection can be a fixed connection, a detachable connection, or integrated. Understandably, it can also be a mechanical connection, an electrical connection, etc.; of course, it can also be directly connected, or indirectly connected through an intermediate medium, or it can be the communication inside two elements, or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific implementation situations.

[0079] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. An RFID tag chip, characterized in that, Comprising: A radio frequency antenna, adapted to receive high-frequency electromagnetic wave signals or ultra-high-frequency electromagnetic wave signals; A high-frequency analog circuit and a high-frequency digital circuit, the high-frequency analog circuit being configured to demodulate the high-frequency electromagnetic wave signal to obtain a high-frequency downlink command, and to generate a high-frequency reset signal when the high-frequency electromagnetic wave signal is received, the high-frequency digital circuit being configured to execute the high-frequency downlink command; An ultra-high-frequency analog circuit and an ultra-high-frequency digital circuit, the ultra-high-frequency analog circuit being configured to demodulate the ultra-high-frequency electromagnetic wave signal to obtain an ultra-high-frequency downlink command, and to generate an ultra-high-frequency reset signal when the ultra-high-frequency electromagnetic wave signal is received, the ultra-high-frequency digital circuit being configured to execute the ultra-high-frequency downlink command; A power management module, the power management module being configured to perform a power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal.

2. The RFID tag chip according to claim 1, wherein The power management module is further configured to, perform a power-down control on the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit when the high-frequency reset signal is received and the ultra-high-frequency reset signal is not received; or perform a power-down control on the high-frequency analog circuit and the high-frequency digital circuit when the high-frequency reset signal is not received and the ultra-high-frequency reset signal is received; or perform a power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to a first generation time of the high-frequency reset signal and a second generation time of the ultra-high-frequency reset signal when the high-frequency reset signal and the ultra-high-frequency reset signal are received.

3. The RFID tag chip according to claim 2, wherein The power management module is further configured to, perform a power-down control on the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit when the first generation time is earlier than the second generation time; or perform a power-down control on the high-frequency analog circuit and the high-frequency digital circuit when the second generation time is earlier than the first generation time; or perform a power-down control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to a first parsing time of the high-frequency digital circuit for the high-frequency downlink command and a second parsing time of the ultra-high-frequency digital circuit for the ultra-high-frequency downlink command when the first generation time is the same as the second generation time.

4. The RFID tag chip according to claim 3, characterized in that, The power management module is further configured to, perform a power-down control on the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit when the first parsing time is earlier than the second parsing time; or perform a power-down control on the high-frequency analog circuit and the high-frequency digital circuit when the second parsing time is earlier than the first parsing time; or When the first parsing time is the same as the second parsing time, power-down control is respectively performed on the high-frequency analog circuit and the ultra-high-frequency digital circuit, and on the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit.

5. The RFID tag chip according to claim 1, characterized in that, The high-frequency analog circuit includes: A high-frequency reset generation module, configured to generate the high-frequency reset signal and send the high-frequency reset signal to the power management module when receiving the high-frequency electromagnetic wave signal; A high-frequency power generation unit, configured to generate the power supply for the high-frequency digital circuit according to the high-frequency electromagnetic wave signal when receiving the high-frequency electromagnetic wave signal; A high-frequency demodulation module, configured to demodulate the high-frequency electromagnetic wave signal to generate the high-frequency downlink command, and send the high-frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the high-frequency downlink command and returns high-frequency uplink data; A high-frequency modulation module, configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier, and transmit the high-frequency electromagnetic carrier to the radio frequency antenna to transmit the high-frequency electromagnetic carrier through the radio frequency antenna.

6. The RFID tag chip according to claim 5, characterized in that, The high-frequency digital circuit includes: A high-frequency downlink decoding module, configured to decode the high-frequency downlink command to obtain a high-frequency decoding signal; A high-frequency command parsing module, configured to parse the high-frequency decoding signal to obtain a high-frequency command type and high-frequency command parameters; A high-frequency status control module, configured to control the status of the RFID tag chip according to the high-frequency command type and the high-frequency command parameters, and determine the type of the high-frequency uplink data; A high-frequency uplink encoding module, configured to perform uplink data encoding according to the type of the high-frequency uplink data and the status of the RFID tag chip to generate the high-frequency uplink data.

7. The RFID tag chip according to claim 6, characterized in that, The power management module is respectively connected to the high-frequency downlink decoding module, the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module. The power management module is further configured to provide the power supply for the high-frequency digital circuit to the high-frequency downlink decoding module after receiving the high-frequency reset signal, so that the high-frequency downlink decoding module is powered on, and after receiving the control signal sent by the high-frequency downlink decoding module, provide the power supply for the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module in sequence, so that the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module are powered on in sequence.

8. The RFID tag chip according to claim 6, characterized in that, The power management module is further configured to control the high-frequency uplink encoding module, the high-frequency status control module, the high-frequency command parsing module, and the high-frequency downlink decoding module to be powered off in sequence when the RFID tag chip finishes executing the high-frequency downlink command.

9. The RFID tag chip according to claim 1, wherein The ultra-high-frequency analog circuit includes: The ultra-high frequency reset generation module is configured to generate the ultra-high frequency reset signal and send the ultra-high frequency reset signal to the power management module when receiving the ultra-high frequency electromagnetic wave signal; The ultra-high frequency power generation unit is configured to generate the power supply for the ultra-high frequency digital circuit according to the ultra-high frequency electromagnetic wave signal when receiving the ultra-high frequency electromagnetic wave signal; The ultra-high frequency demodulation module is configured to demodulate the ultra-high frequency electromagnetic wave signal to generate the ultra-high frequency downlink command, and send the ultra-high frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the ultra-high frequency downlink command and returns the ultra-high frequency uplink data; The ultra-high frequency modulation module is configured to modulate the ultra-high frequency uplink data to generate an ultra-high frequency electromagnetic carrier, and transmit the ultra-high frequency electromagnetic carrier to the radio frequency antenna to transmit the ultra-high frequency electromagnetic carrier through the radio frequency antenna.

10. The RFID tag chip according to claim 9, wherein, The ultra-high frequency digital circuit includes: The ultra-high frequency downlink decoding module is configured to decode the ultra-high frequency downlink command to obtain an ultra-high frequency decoded signal; The ultra-high frequency command parsing module is configured to parse the ultra-high frequency decoded signal to obtain the ultra-high frequency command type and ultra-high frequency command parameters; The ultra-high frequency status control module is configured to control the status of the RFID tag chip according to the ultra-high frequency command type and the ultra-high frequency command parameters, and determine the type of the ultra-high frequency uplink data; The ultra-high frequency uplink encoding module is configured to perform uplink data encoding according to the type of the ultra-high frequency uplink data and the status of the RFID tag chip to generate the ultra-high frequency uplink data.

11. The RFID tag chip according to claim 10, wherein The power management module is respectively connected to the ultra-high frequency downlink decoding module, the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module. The power management module is further configured to provide the power supply for the ultra-high frequency digital circuit to the ultra-high frequency downlink decoding module after receiving the ultra-high frequency reset signal, so that the ultra-high frequency downlink decoding module is powered on, and after receiving the control signal sent by the ultra-high frequency downlink decoding module, provide the power supply for the ultra-high frequency digital circuit to the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module in sequence, so that the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module are powered on in sequence.

12. The RFID tag chip according to claim 11, wherein, The power management module is further configured to control the ultra-high frequency uplink encoding module, the ultra-high frequency status control module, the ultra-high frequency command parsing module, and the ultra-high frequency downlink decoding module to be powered off in sequence when the RFID tag chip finishes executing the ultra-high frequency downlink command.

13. The RFID tag chip according to any one of claims 1-12, characterized in that, The power management module includes: The high-frequency power switch, the high-frequency power switch is respectively connected to the high-frequency analog circuit and the high-frequency digital circuit, and the high-frequency power switch is configured to perform power-on control and power-off control on the high-frequency analog circuit and the high-frequency digital circuit; An ultra-high frequency power switch, the high-frequency power switch is respectively connected to the ultra-high frequency analog circuit and the ultra-high frequency digital circuit, and the ultra-high frequency power switch is configured to perform power-on control and power-off control on the ultra-high frequency analog circuit and the ultra-high frequency digital circuit.

14. A power management method for an RFID tag chip, characterized in that, The RFID tag chip includes a radio frequency antenna, a high-frequency analog circuit and a high-frequency digital circuit, an ultra-high frequency analog circuit and an ultra-high frequency digital circuit. The radio frequency antenna is adapted to receive high-frequency electromagnetic wave signals or ultra-high frequency electromagnetic wave signals. The high-frequency analog circuit is configured to demodulate the high-frequency electromagnetic wave signals to obtain high-frequency downlink commands, and generate a high-frequency reset signal when the high-frequency electromagnetic wave signals are received. The high-frequency digital circuit is configured to execute the high-frequency downlink commands. The ultra-high frequency analog circuit is configured to demodulate the ultra-high frequency electromagnetic wave signals to obtain ultra-high frequency downlink commands, and generate an ultra-high frequency reset signal when the ultra-high frequency electromagnetic wave signals are received. The ultra-high frequency digital circuit is configured to execute the ultra-high frequency downlink commands. The method includes: Performing power-off control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high frequency reset signal.

15. The power management method according to claim 14, wherein Performing power-off control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high frequency reset signal includes: When the high-frequency reset signal is received and the ultra-high frequency reset signal is not received, performing power-off control on the ultra-high frequency analog circuit and the ultra-high frequency digital circuit; or When the high-frequency reset signal is not received and the ultra-high frequency reset signal is received, performing power-off control on the high-frequency analog circuit and the high-frequency digital circuit; or When the high-frequency reset signal and the ultra-high frequency reset signal are received, performing power-off control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit according to the first generation time of the high-frequency reset signal and the second generation time of the ultra-high frequency reset signal.

16. The power management method according to claim 14, wherein The high-frequency analog circuit includes a high-frequency reset generation module, a high-frequency power generation unit, a high-frequency demodulation module, and a high-frequency modulation module. The high-frequency reset generation module is configured to generate the high-frequency reset signal when receiving the high-frequency electromagnetic wave signal. The high-frequency power generation unit is configured to generate the power supply for the high-frequency digital circuit according to the high-frequency electromagnetic wave signal when receiving the high-frequency electromagnetic wave signal. The high-frequency demodulation module is configured to demodulate the high-frequency electromagnetic wave signal to generate the high-frequency downlink command and send the high-frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the high-frequency downlink command and returns high-frequency uplink data. The high-frequency modulation module is configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier wave and transmit the high-frequency electromagnetic carrier wave to the radio frequency antenna to transmit the high-frequency electromagnetic carrier wave through the radio frequency antenna. The high-frequency digital circuit includes a high-frequency downlink decoding module, a high-frequency command parsing module, a high-frequency status control module, and a high-frequency uplink encoding module. The high-frequency downlink decoding module is configured to decode the high-frequency downlink command to obtain a high-frequency decoded signal. The high-frequency command parsing module is configured to parse the high-frequency decoded signal to obtain a high-frequency command type and high-frequency command parameters. The high-frequency status control module is configured to control the status of the RFID tag chip according to the high-frequency command type and the high-frequency command parameters and determine the type of the high-frequency uplink data. The high-frequency uplink encoding module is configured to perform uplink data encoding according to the type of the high-frequency uplink data and the status of the RFID tag chip to generate the high-frequency uplink data. The method further includes: After receiving the high-frequency reset signal, supply the power supply of the high-frequency digital circuit to the high-frequency downlink decoding module to power on the high-frequency downlink decoding module; After receiving the control signal sent by the high-frequency downlink decoding module, supply the power supply of the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module in sequence to power on the high-frequency command parsing module, the high-frequency status control module, and the high-frequency uplink encoding module in sequence.

17. The power management method according to claim 16, characterized in that, The method further includes: When the RFID tag chip finishes executing the high-frequency downlink command, control the high-frequency uplink encoding module, the high-frequency status control module, the high-frequency command parsing module, and the high-frequency downlink decoding module to power off in sequence.

18. The power management method according to claim 14, wherein The ultra-high frequency analog circuit includes an ultra-high frequency reset generation module, an ultra-high frequency power generation unit, an ultra-high frequency demodulation module, and an ultra-high frequency modulation module. The ultra-high frequency reset generation module is configured to generate the ultra-high frequency reset signal when receiving the ultra-high frequency electromagnetic wave signal. The ultra-high frequency power generation unit is configured to generate the power supply for the ultra-high frequency digital circuit according to the ultra-high frequency electromagnetic wave signal or the ultra-high frequency electromagnetic wave signal when receiving the ultra-high frequency electromagnetic wave signal. The ultra-high frequency demodulation module is configured to demodulate the ultra-high frequency electromagnetic wave signal to generate the ultra-high frequency downlink command, and send the ultra-high frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the ultra-high frequency downlink command and returns the ultra-high frequency uplink data. The ultra-high frequency modulation module is configured to modulate the ultra-high frequency uplink data to generate an ultra-high frequency electromagnetic carrier, and transmit the ultra-high frequency electromagnetic carrier to the radio frequency antenna to transmit the ultra-high frequency electromagnetic carrier through the radio frequency antenna. The ultra-high frequency digital circuit includes an ultra-high frequency downlink decoding module, an ultra-high frequency command parsing module, an ultra-high frequency status control module, and an ultra-high frequency uplink encoding module. The ultra-high frequency downlink decoding module is configured to decode the ultra-high frequency downlink command to obtain an ultra-high frequency decoded signal. The ultra-high frequency command parsing module is configured to parse the ultra-high frequency decoded signal to obtain the ultra-high frequency command type and ultra-high frequency command parameters. The ultra-high frequency status control module is configured to control the status of the RFID tag chip according to the ultra-high frequency command type and the ultra-high frequency command parameters, and determine the type of the ultra-high frequency uplink data. The ultra-high frequency uplink encoding module is configured to perform uplink data encoding according to the type of the ultra-high frequency uplink data and the status of the RFID tag chip to generate the ultra-high frequency uplink data. The method further includes: After receiving the ultra-high frequency reset signal, supply the power supply of the ultra-high frequency digital circuit to the ultra-high frequency downlink decoding module to power on the ultra-high frequency downlink decoding module; After receiving the control signal sent by the ultra-high frequency downlink decoding module, supply the power supply of the ultra-high frequency digital circuit to the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module in sequence to power on the ultra-high frequency command parsing module, the ultra-high frequency status control module, and the ultra-high frequency uplink encoding module in sequence.

19. The power management method according to claim 18, characterized in that, The method further includes: When the RFID tag chip finishes executing the ultra-high frequency downlink command, control the ultra-high frequency uplink encoding module, the ultra-high frequency status control module, the ultra-high frequency command parsing module, and the ultra-high frequency downlink decoding module to power off in sequence.

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