Unconditional stable bidirectional amplifier based on negative feedback technology

Abstract

The invention discloses an unconditional stable bidirectional amplifier based on a negative feedback technology, which comprises an amplifying circuit and a switch control circuit, and the amplifying circuit is connected with the switch control circuit, so that the related problem of insufficient stability of the existing bidirectional amplifier is solved. According to the bidirectional amplifier, by introducing negative feedback, interference in the amplification process is effectively restrained, the stability and accuracy of output signals are ensured, the bidirectional amplification function is completed only through a single amplifier, and compared with an existing technology of utilizing two amplifiers and adopting a single-pole double-throw switch for switching, the bidirectional amplifier has the advantages of being simple in structure and convenient to operate. According to the bidirectional amplifier, the size of a chip can be reduced to about 1 / 2, meanwhile, due to the fact that the chip is only provided with a single amplifier, compared with an existing bidirectional amplifier structure, power consumption can be reduced, absolute stability and reverse isolation can be guaranteed in the process of forming a switch loop of the amplifier, and the reliability of the amplifier is improved. And the single-amplifier scheme in the invention does not need to be controlled by a switching power supply, so that the bidirectional switching speed is also greatly increased.

Description

Technical Field

[0001] The present invention belongs to the technical field of wireless communication, and particularly relates to an unconditional stable bidirectional amplifier based on negative feedback technology. Background Art

[0002] In recent years, with the development of wireless communication systems, the requirements for components have gradually increased, especially in terms of miniaturization of volume. As an important part of wireless communication systems, amplifiers are used to amplify signals to meet communication standards. Usually, the receiving and transmitting paths adopt independent amplification circuits, which not only increases the volume of the system but also brings high complexity. Therefore, bidirectional amplifiers have attracted the attention of many researchers.

[0003] A bidirectional amplifier is an active radio frequency device widely used in various communication, radar, and other radio frequency sensing applications to enhance signal strength and ensure the integrity of signals during long-distance transmission or through complex networks. When the existing bidirectional amplifier selects its transmitting and receiving functions, various transient impedance occurrences and parasitic effects may occur, resulting in the loading of power amplifiers or the overload of low-noise amplifiers, causing component damage or forming oscillations.

[0004] Therefore, the existing bidirectional amplifier designs still need to be improved in terms of stability, and there is an urgent need for a bidirectional amplifier design that can balance wide bandwidth, high power, and dynamic stability. Summary of the Invention

[0005] To solve the above technical problems, the present invention provides an unconditional stable bidirectional amplifier based on negative feedback technology. By introducing negative feedback, interference during the amplification process is effectively suppressed, ensuring the stability and accuracy of the output signal.

[0006] The technical solution adopted by the present invention is as follows: An unconditional stable bidirectional amplifier based on negative feedback technology, comprising: an amplification circuit and a switch control circuit. The amplification circuit is connected to the switch control circuit.

[0007] Among them, the amplification circuit adopts a JFET cascade amplification structure.

[0008] The amplification circuit includes: a DC bias port VD, a first JFET 1, a second JFET 2, a third JFET 3, a fourth JFET 4, a resistor R1, a resistor R2, a resistor R4, a resistor R5, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, an inductor L1, an inductor L2, an inductor L3, an inductor L4, an inductor L5, and an inductor L6.

[0009] Among them, the source of the first JFET1 is connected to the drain of the second JFET2. The drain of the first JFET1 is connected to the first end of the inductor L1, and the gate of the first JFET1 is connected to the first end of the resistor R1. The source of the second JFET2 is grounded, and the gate of the second JFET2 is connected to the first end of the resistor R2. The second end of the resistor R1 is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is grounded. The second end of the resistor R2 is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the second end of the inductor L1. The second end of the inductor L1 is connected to the first end of the inductor L2, and the second end of the inductor L2 is connected to the first ends of the capacitor C4 and the inductor L5 respectively. The second end of the capacitor C4 is connected to the switch control circuit. The second end of the inductor L5 is connected to the first end of the inductor L6, and the second end of the inductor L6 is connected to the first end of the capacitor C6. The second end of the capacitor C6 is grounded. The second end of the inductor L6 is also connected to the DC bias port VD. The first end of the resistor R2 is also connected to the first end of the resistor R4. The second end of the resistor R4 is connected to the first ends of the resistor R1 and the resistor R5 respectively. The second end of the resistor R5 is connected to the first end of the capacitor C6. The first end of the resistor R4 is also connected to the drain of the third JFET3 and the first end of the inductor L3 respectively. The drain of the third JFET3 is also connected to the gate of the third JFET3. The source of the third JFET3 is connected to the drain of the fourth JFET4. The drain of the fourth JFET is also connected to the gate of the fourth JFET4. The source of the fourth JFET4 is grounded. The second end of the inductor L3 is connected to the first end of the capacitor C3. The second end of the capacitor C3 is grounded. The first end of the capacitor C3 is also connected to the first end of the inductor L4. The second end of the inductor L4 is connected to the first end of the capacitor C5. The second end of the capacitor C5 is connected to the switch control circuit.

[0010] The switch control circuit includes: an input terminal RF1, an output terminal RF2, a switching switch MS1_1, a switching switch MS1_2, a switching switch MS2_1, and a switching switch MS2_2. Among them, the input terminal RF1 is connected to the first ends of the switching switch MS1_1 and the switching switch MS2_2 respectively. The second end of the switching switch MS1_1 is connected to the second end of the capacitor C4 and the second end of the switching switch MS1_2 respectively. The second end of the switching switch MS2_2 is connected to the second end of the capacitor C5 and the second end of the switching switch MS2_1 respectively. The input terminal RF2 is connected to the first ends of the switching switch MS1_2 and the switching switch MS2_1 respectively. The second end of the switching switch MS1_2 is connected to the second end of the capacitor C4 and the second end of the switching switch MS1_1 respectively. The second end of the switching switch MS2_1 is connected to the second end of the capacitor C5 and the second end of the switching switch MS2_2 respectively.

[0011] Further, in the switch control circuit, a single-ended RF signal is input at the input end RF1, and a single-ended RF signal is output at the output end RF2. Both ends of the switching switches MS1_1, MS1_2, MS2_1, and MS22_2 are respectively connected to one closed end of a switch SW1. The open end of the switch SW1 is connected to the amplifier circuit. The closed end of the switch SW1 is also connected to the open end of a switch SW2, and the closed end of the switch SW2 is grounded.

[0012] Further, in the unconditional stable bidirectional amplifier, the switching states of the switches SW1 and SW2 are controlled by inputting 0V or 5V through a TTL circuit, and all SW1s are closed.

[0013] When the two switches SW2 connected to the two switches SW1 at both ends of the switching switch MS1_1 are disconnected from the ground, and the two switches SW2 connected to the two switches SW1 at both ends of the switching switch MS2_1 are disconnected from the ground, the function is to amplify the signal input at the input end RF1 and output it from the output end RF2, and the remaining switches SW2 are all closed. When the two switches SW2 connected to the two switches SW1 at both ends of the switching switch MS1_2 are disconnected from the ground, and the two switches SW2 connected to the two switches SW1 at both ends of the switching switch MS2_2 are disconnected from the ground, the function is to amplify the signal input at the output end RF2 and output it from the input end RF1, and the remaining switches SW2 are all closed.

[0014] Among them, when one of the functions is realized, the other two switching switches that do not participate in the amplification function and other structures of the circuit jointly form a negative feedback loop between the input end RF1 and the output end RF2.

[0015] The beneficial effects of the present invention: The unconditional stable bidirectional amplifier of the present invention includes: an amplifier circuit and a switch control circuit, and the amplifier circuit is connected to the switch control circuit, solving the related problems of insufficient stability of the existing bidirectional amplifier. The bidirectional amplifier of the present invention effectively suppresses interference during the amplification process by introducing negative feedback, ensuring the stability and accuracy of the output signal. Only a single amplifier is used to complete the bidirectional amplification function. Compared with the existing technology that uses two amplifiers and a single-pole double-throw switch for switching, the bidirectional amplifier of the present invention can reduce the chip size to about 1 / 2. At the same time, since there is only a single amplifier in the chip, the power consumption can also be reduced compared with the existing bidirectional amplifier structure. Absolute stability and reverse isolation can also be ensured during the formation of the amplifier switching loop. Moreover, the single-amplifier scheme in the present invention does not require switch power control, so the bidirectional switching speed is also greatly enhanced. Description of the Drawings

[0016] Figure 1 It is a structural diagram of an unconditional stable bidirectional amplifier based on negative feedback technology of the present invention.

[0017] Figure 2 This is the actual layout of the bidirectional amplifier in the embodiments of the present invention. Detailed implementation manners

[0018] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0019] As Figure 1 shown, a non-conditionally stable bidirectional amplifier based on negative feedback technology includes: an amplification circuit and a switch control circuit. The amplification circuit is connected to the switch control circuit.

[0020] Among them, the amplification circuit adopts a JFET cascade amplification structure.

[0021] The amplification circuit includes: a DC bias port VD, a first JFET 1, a second JFET 2, a third JFET 3, a fourth JFET 4, a resistor R1, a resistor R2, a resistor R4, a resistor R5, capacitors C1, C2, C3, C4, C5, C6, inductors L1, L2, L3, L4, L5, L6.

[0022] Among them, the source of the first JFET 1 is connected to the drain of the second JFET 2, the drain of the first JFET 1 is connected to the first end of the inductor L1, and the gate of the first JFET 1 is connected to the first end of the resistor R1; the source of the second JFET 2 is grounded, and the gate of the second JFET 2 is connected to the first end of the resistor R2; the second end of the resistor R1 is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is grounded;

[0023] the second end of the resistor R2 is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the second end of the inductor L1; the second end of the inductor L1 is connected to the first end of the inductor L2, the second end of the inductor L2 is respectively connected to the first end of the capacitor C4 and the first end of the inductor L5, and the second end of the capacitor C4 is connected to the switch control circuit; the second end of the inductor L5 is connected to the first end of the inductor L6, the second end of the inductor L6 is connected to the first end of the capacitor C6, and the second end of the capacitor C6 is grounded; the second end of the inductor L6 is also connected to the DC bias port VD;

[0024] The first terminal of resistor R2 is also connected to the first terminal of resistor R4. The second terminal of resistor R4 is respectively connected to the first terminal of resistor R1 and the first terminal of resistor R5. The second terminal of resistor R5 is connected to the first terminal of capacitor C6. The first terminal of resistor R4 is also respectively connected to the drain of the third JFET 3 and the first terminal of inductor L3. The drain of the third JFET 3 is also connected to the gate of the third JFET 3. The source of the third JFET 3 is connected to the drain of the fourth JFET 4. The drain of the fourth JFET is also connected to the gate of the fourth JFET 4. The source of the fourth JFET 4 is grounded. The second terminal of inductor L3 is connected to the first terminal of capacitor C3. The second terminal of capacitor C3 is grounded. The first terminal of capacitor C3 is also connected to the first terminal of inductor L4. The second terminal of inductor L4 is connected to the first terminal of capacitor C5. The second terminal of capacitor C5 is connected to the switch control circuit.

[0025] The switch control circuit includes: a switching switch MS1_1, a switching switch MS1_2, a switching switch MS2_1, a switching switch MS2_2, an input terminal RF1, and an output terminal RF2. Among them, the input terminal RF1 is respectively connected to the first terminals of the switching switch MS1_1 and the switching switch MS2_2. The second terminal of the switching switch MS1_1 is respectively connected to the second terminal of capacitor C4 and the second terminal of the switching switch MS1_2. The second terminal of the switching switch MS2_2 is respectively connected to the second terminal of capacitor C5 and the second terminal of the switching switch MS2_1. The input terminal RF2 is respectively connected to the first terminals of the switching switch MS1_2 and the switching switch MS2_1. The second terminal of the switching switch MS1_2 is respectively connected to the second terminal of capacitor C4 and the second terminal of the switching switch MS1_1. The second terminal of the switching switch MS2_1 is respectively connected to the second terminal of capacitor C5 and the second terminal of the switching switch MS2_2.

[0026] In this embodiment, in the switch control circuit, a single-ended radio frequency signal is input at the input terminal RF1, and a single-ended radio frequency signal is output at the output terminal RF2. Both ends of the switching switches MS1_1, MS1_2, MS2_1, and MS22_2 are respectively connected to the closed end of a switch SW1. The open end of the switch SW1 is connected to the amplifier circuit. The closed end of the switch SW1 is also connected to the open end of a switch SW2. The closed end of the switch SW2 is grounded.

[0027] In this embodiment, in the unconditional stable bidirectional amplifier, the switching states of the switches SW1 and SW2 are controlled by inputting 0V or 5V through the TTL circuit, and all SW1s are closed.

[0028] This embodiment adopts negative feedback technology and uses a switching switch to form a negative feedback loop in the bidirectional amplifier structure to improve the circuit stability. When the two switches SW2 grounded connected to the two switches SW1 at both ends of the switching switch MS1_1 are disconnected, and the two switches SW2 grounded connected to the two switches SW1 at both ends of the switching switch MS2_1 are disconnected, the function is to amplify the signal input at the input end RF1 and output it from the output end RF2, and the remaining switches SW2 are all closed. When the two switches SW2 grounded connected to the two switches SW1 at both ends of the switching switch MS1_2 are disconnected, and the two switches SW2 grounded connected to the two switches SW1 at both ends of the switching switch MS2_2 are disconnected, the function is to amplify the signal input at the output end RF2 and output it from the input end RF1, and the remaining switches SW2 are all closed.

[0029] Among them, when one of the functions is realized, the other two switching switches that do not participate in the amplification function and other circuit structures jointly form a negative feedback loop between the input end RF1 and the output end RF2. This enables the circuit impedance and the like to remain stable when the TTL control level VCT of the switch control circuit switches, so that the overall circuit has unconditional stability and realizes the improvement of the stability of the bidirectional amplifier. By reasonably setting the values of resistors, capacitors, etc., good gain flatness can be obtained within the entire frequency band, and at the same time, it is necessary to ensure that the noise in the entire frequency band is at a relatively low level.

[0030] This embodiment uses GaAs to manufacture the bidirectional amplifier HMF033 chip. Figure 2 That is the actual layout of the bidirectional amplifier HMF033 chip. Figure 2 In it, 1 is the radio frequency input end (input end RF1), 2 is the radio frequency output end (output end RF2), 3 is the VD input point, 4 is the VEE input point, 5 is the VCT input point, and 6 is the ground point. The bidirectional amplifier HMF033 chip has smooth gain within the working frequency band of 1 - 12 GHz, excellent return loss and isolation, and low noise figure. The specific parameters adopted by the HMF033 chip in this embodiment are: the working voltage of the amplifier is +5V, the working current is 48mA, the working voltage of the TTL control circuit is -5V, and the TTL control voltage is 0V / +5V. The specific indicators that the final chip can achieve under the above parameters are: it can provide 13dB small-signal gain and 1dB gain compression point output power of 14dBm at the working voltage of +5V, the gain flatness is better than ±0.8dB, the typical noise figure is 3.5dB, the input return loss is better than -10dB, the output return loss is better than -15dB, and the isolation is better than 25dB.

[0031] In summary, the bidirectional amplifier according to the present invention effectively suppresses interference during the amplification process by introducing negative feedback, ensuring the stability and accuracy of the output signal. Only a single amplifier is used to complete the bidirectional amplification function. Compared with the existing technology that uses two amplifiers and a single-pole double-throw switch for switching, the bidirectional amplifier according to the present invention can reduce the chip size to about 1 / 2. At the same time, since there is only a single amplifier in the chip, the power consumption can also be reduced compared with the existing bidirectional amplifier structure. Absolute stability and reverse isolation can also be ensured during the formation of the amplifier switching loop. Moreover, the single-amplifier scheme in the present invention does not require switch power supply control, so the bidirectional switching speed is also greatly enhanced.

[0032] Those of ordinary skill in the art will realize that the embodiments described herein are for helping readers understand the principles of the present invention and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. For those skilled in the art, various modifications and changes can be made to the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the scope of the claims of the present invention.

Claims

1. An unconditional stable two-way amplifier based on negative feedback technology, comprising: Amplifier circuit, switch control circuit; The amplifier circuit is connected to the switch control circuit; Among them, the amplifier circuit adopts a JFET cascade amplification structure; The amplifier circuit includes: a DC bias port VD, a first JFET 1, a second JFET 2, a third JFET 3, a fourth JFET 4, a resistor R1, a resistor R2, a resistor R4, a resistor R5, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, an inductor L1, an inductor L2, an inductor L3, an inductor L4, an inductor L5, an inductor L6; Among them, the source of the first JFET 1 is connected to the drain of the second JFET 2, the drain of the first JFET 1 is connected to the first end of the inductor L1, and the gate of the first JFET 1 is connected to the first end of the resistor R1; the source of the second JFET 2 is grounded, and the gate of the second JFET 2 is connected to the first end of the resistor R2; the second end of the resistor R1 is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is grounded; the second end of the resistor R2 is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the second end of the inductor L1; the second end of the inductor L1 is connected to the first end of the inductor L2, and the second end of the inductor L2 is respectively connected to the first end of the capacitor C4 and the first end of the inductor L5, and the second end of the capacitor C4 is connected to the switch control circuit; the second end of the inductor L5 is connected to the first end of the inductor L6, the second end of the inductor L6 is connected to the first end of the capacitor C6, and the second end of the capacitor C6 is grounded; the second end of the inductor L6 is also connected to the DC bias port VD; the first end of the resistor R2 is also connected to the first end of the resistor R4, the second end of the resistor R4 is respectively connected to the first end of the resistor R1 and the first end of the resistor R5, and the second end of the resistor R5 is connected to the first end of the capacitor C6; the first end of the resistor R4 is also respectively connected to the drain of the third JFET 3 and the first end of the inductor L3, the drain of the third JFET 3 is also connected to the gate of the third JFET 3, the source of the third JFET 3 is connected to the drain of the fourth JFET 4, the drain of the fourth JFET is also connected to the gate of the fourth JFET 4, and the source of the fourth JFET 4 is grounded; the second end of the inductor L3 is connected to the first end of the capacitor C3, and the second end of the capacitor C3 is grounded; the first end of the capacitor C3 is also connected to the first end of the inductor L4, the second end of the inductor L4 is connected to the first end of the capacitor C5, and the second end of the capacitor C5 is connected to the switch control circuit; The switch control circuit includes: an input terminal RF1, an output terminal RF2, a switching switch MS1_1, a switching switch MS1_2, a switching switch MS2_1, and a switching switch MS2_2. Among them, the input terminal RF1 is respectively connected to the first ends of the switching switch MS1_1 and the switching switch MS2_2. The second end of the switching switch MS1_1 is respectively connected to the second end of the capacitor C4 and the second end of the switching switch MS1_2. The second end of the switching switch MS2_2 is respectively connected to the second end of the capacitor C5 and the second end of the switching switch MS2_1. The input terminal RF2 is respectively connected to the first ends of the switching switch MS1_2 and the switching switch MS2_1. The second end of the switching switch MS1_2 is respectively connected to the second end of the capacitor C4 and the second end of the switching switch MS1_1. The second end of the switching switch MS2_1 is respectively connected to the second end of the capacitor C5 and the second end of the switching switch MS2_2.

2. The unconditional stable two-way amplifier based on negative feedback technology according to claim 1, characterized in that In the switch control circuit, a single-ended RF signal is input at the input terminal RF1, and a single-ended RF signal is output at the output terminal RF2. One closed end of a switch SW1 is respectively connected to both ends of the switching switches MS1_1, MS1_2, MS2_1, and MS22_2. The open end of the switch SW1 is connected to the amplifier circuit. The closed end of the switch SW1 is also connected to the open end of a switch SW2, and the closed end of the switch SW2 is grounded.

3. The unconditional stable two-way amplifier based on negative feedback technology according to claim 2, characterized in that, In the unconditional stable bidirectional amplifier, the switch states of the switches SW1 and SW2 are controlled by inputting 0V or 5V through the TTL circuit, and all SW1s are closed. When the two switches SW2 grounded and connected to the two switches SW1 at both ends of the switching switch MS1_1 are disconnected, and the two switches SW2 grounded and connected to the two switches SW1 at both ends of the switching switch MS2_1 are disconnected, the function is to amplify the signal input at the input terminal RF1 and output it from the output terminal RF2, and the rest of the switches SW2 are all closed. When the two switches SW2 grounded and connected to the two switches SW1 at both ends of the switching switch MS1_2 are disconnected, and the two switches SW2 grounded and connected to the two switches SW1 at both ends of the switching switch MS2_2 are disconnected, the function is to amplify the signal input at the output terminal RF2 and output it from the input terminal RF1, and the rest of the switches SW2 are all closed. Among them, when one of the functions is realized, the other two switching switches not participating in the amplification function and other circuit structures jointly form a negative feedback loop between the input terminal RF1 and the output terminal RF2.

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