Inkjet head wafer structure

Abstract

An ink jet head wafer structure comprises a substrate layer, a heating resistance layer, a control layer and a plurality of protection layers. The heating resistance layer is arranged adjacent to and in contact with the conductive layer, and is located at the same horizontal position as the conductive layer. The control layer and the conductive layer are electrically connected with the control transistor. And the control transistor is used as a lead for control, so that the control layer controls the heating resistance layer to heat the ink through the control transistor. The plurality of protective layers are respectively disposed on the substrate layer. The heating resistance layer and the conductive layer are arranged in any electrically insulating layer or any electrically insulating layer in a wrapping manner.

Description

Technical Field

[0001] The present invention relates to an inkjet head wafer structure. More specifically, it is an inkjet head wafer structure that improves the structures of the conductive layer and the heating resistance layer therein, thereby increasing the overall structural strength, as well as the electrical and printing performance. Background Art

[0002] Inkjet printing technology, commonly known as "Inkjet Printing", is a widely used printing technology. Its history can be traced back to the 1950s when the British company HP (Hewlett-Packard) invented inkjet printing technology. Since then, inkjet printing technology has developed rapidly, making inkjet printers the mainstream technology for home and commercial printing. Inkjet printers have many advantages, including: low cost, especially having an economic advantage in home and small business applications; high printing quality, capable of providing high-resolution and high-quality images, especially in the case of photos or pictures; convenient to use, inkjet printers are easy to install, and most inkjet printers can be printed through a computer or mobile device. Combined with office machines with multi-functional capabilities (including fax, photocopying, scanning) that have emerged in recent years, it can quickly expand the flexibility of document operations and packaging printing in offices or any place in need.

[0003] The operating principle of an inkjet printer is to spray fine ink dots on paper or a recording medium for text or image output. With the booming development of digital imaging, it has driven the demand for high-resolution inkjet printing. In order to control more ink dots to provide printing resolution, inkjet head technology has evolved from traditional single-point control to a combination of Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short) control. More specifically, please refer to Figure 1 , which shows an inkjet head wafer structure 100 in the current technology. The inkjet head wafer structure 100 generally includes nozzle holes 101, a barrier layer 103, a protective layer 104, a conductive layer 105, a heating resistance layer 106, and a thermal barrier layer 107, which are sequentially formed into a stacked structure to form the inkjet head wafer structure 100. An ink supply chamber 102 is formed between the protective layer 104 and the barrier layer 103. A part of the conductive layer 105 is formed on the heating resistance layer 106, such that the conductive layer 105 contacts the heating resistance layer 106 in a two-layer inclined stepped shape (as shown in the dotted circular frame in Figure 1 ). Therefore, the heating resistance layer 106 can generate bubbles by heating the ink through the electric energy supplied by the conductive layer 105, and finally eject the ink in the ink supply chamber 102 through the nozzle holes 101.

[0004] However, the drawback of the inkjet head wafer structure 100 of the current technology lies in that during the manufacturing process, the conductive layer 105 and the heating resistance layer 106 are respectively deposited by sputtering after the corresponding MOSFET control elements are completed. Subsequently, the required dimensions and patterns are defined through the yellow light and etching processes. During the process of defining the dimension range, the above-mentioned two-layer inclined stepped shape will be generated at the junction of the conductive layer 105 and the heating resistance layer 106 due to erosion. This two-layer inclined stepped shape in the inkjet head wafer structure 100 is likely to cause problems such as stress concentration and poor step coverage in the innate structure.

[0005] As mentioned above, further, during the printing process, both the heating resistance layer 106 and the conductive layer 105 in contact with the ink to be heated at the bottom layer of the ink supply chamber 102 need to work in an environment of high current, high temperature, mechanical shock, and ink chemical erosion. Since the two-layer inclined stepped structure of the heating resistance layer 106 and the conductive layer 105 itself has a problem of poor physical mechanical strength, cracks or holes are likely to occur at the stepped junction in practice, further causing the nearby protective layer 104 to crack, enabling the ink to penetrate into the inkjet head wafer, resulting in component damage, and leading to poor service life or reliability of the existing inkjet head wafer structure 100, thus directly affecting the performance during inkjet printing. Therefore, in the current market, there is still an urgent need to improve the structure of the known inkjet head wafer structure 100. Summary of the Invention

[0006] For the above reasons, the object of the present invention is to improve the two-layer inclined stepped structure at the junction of the heating resistance layer and the conductive layer in the heating architecture of the existing inkjet head wafer. By integrating the above two on the same layer of material, the stepped phenomenon can be eliminated when configuring the protective layer subsequently, thereby improving its mechanical strength, service life and reliability. In addition, the present invention combines the improved and integrated structure with the MOSFET control element at the same time, so that the printing performance of the inkjet head wafer structure in subsequent encryption identification, control of the number of nozzles printed simultaneously, printing mode processing, vividness control, saturation control, etc. can be further improved due to better structural integration, and can more effectively reduce the requirements of the manufacturing process and additional manufacturing costs. Finally, as described above, since the heating resistance layer and the conductive layer are integrated on the same layer, the bonding degree and mechanical strength between the two are relatively high. Under some application conditions, the strength requirement for the protective layer can be slightly reduced (of course, the strength of the protective layer can also be selected to be maintained or increased under other application conditions). This enables the two to be configured in various electrically insulating layers such as dielectric layers or protective layers according to the needs of the application, providing more configuration options during the manufacturing process. At the same time, if the heating resistance layer and the conductive layer are closer to the surface of the inkjet head wafer, due to better heat transfer effects, less energy is required, which can further save the energy required to eject the ink. And because less energy is required, the heating resistance layer and the conductive layer are less impacted by current pulses, further achieving environmental protection effects such as extending the service life. The detailed technical proposal will be described in detail later.

[0007] To achieve the above object, the present invention provides an inkjet head wafer structure, including: a substrate layer for carrying the components of the inkjet head wafer structure; a conductive layer; a heating resistance layer, wherein the heating resistance layer is adjacent to and in the same horizontal position as the conductive layer; a control layer electrically connected to the conductive layer and a control transistor, serving as a control wire to enable the control transistor to control the heating resistance layer to heat the ink; and several protective layers disposed on the substrate layer. Among them, the heating resistance layer and the conductive layer are coated and configured in or on any of the above-mentioned electrically insulating layers (such as a dielectric layer or a protective layer).

[0008] According to the content of the present invention, the inkjet head wafer structure further includes a first oxide layer disposed on the substrate layer.

[0009] According to the content of the present invention, the inkjet head wafer structure further includes a dielectric layer covering the first oxide layer and coating the heating resistance layer and the conductive layer therein.

[0010] According to the content of the present invention, the above-mentioned control layer serves as a control wire and partially covers the dielectric layer or the protective layer.

[0011] According to the content of the present invention, the above-mentioned protective layer covers the dielectric layer and coats the control layer therein.

[0012] According to the content of the present invention, the above control transistor is a metal-oxide-semiconductor field-effect transistor (MOSFET), and the control transistor can be selected from an N-type metal-oxide-semiconductor field-effect transistor (N-MOSFET) or a P-type metal-oxide-semiconductor field-effect transistor (P-MOSFET).

[0013] According to the content of the present invention, the inkjet head wafer structure includes a plurality of contact layers disposed on the conductive layer and the control transistor and electrically connected to the control layer, so that the control transistor can control the heating resistor layer to heat the ink during the printing process.

[0014] According to the content of the present invention, when the control transistor is a MOSFET, the control transistor includes a source electrode, a drain electrode, and a gate electrode, wherein the source electrode and the drain electrode are buried in the substrate layer, and the gate electrode is disposed on the substrate layer and connected to the source electrode and the drain electrode to control the operation of the control transistor.

[0015] According to the content of the present invention, the gate electrode further includes a second oxide layer and a polysilicon layer, which are sequentially stacked on the substrate layer. Description of the Drawings

[0016] The following detailed description of the present invention and the schematic diagrams of the embodiments should enable the present invention to be more fully understood; however, it should be understood that this is only for reference in understanding the application of the present invention and does not limit the present invention to a specific embodiment.

[0017] Figure 1 Showing the inkjet head wafer structure in the prior art.

[0018] Figure 2 It is to illustrate one embodiment of the inkjet head wafer stacking structure of the present invention.

[0019] Figure 3 Illustrating how the conductive layer in the present invention is integrated with the heating resistor layer to avoid the deficiencies of the two-layer inclined stepped structure in the prior art.

[0020] Figure 4 Illustrating another embodiment of the inkjet head wafer stacking structure of the present invention.

[0021]

Symbol Description

[0022] 100: Inkjet head wafer structure

[0023] 101: Ink ejection hole

[0024] 102: Ink supply chamber

[0025] 103: Barrier layer

[0026] 104: Protective layer

[0027] 105: Conductive layer

[0028] 106: Heating resistance layer

[0029] 107: Thermal barrier layer

[0030] 200: Inkjet head wafer structure

[0031] 201: Substrate layer

[0032] 202: First oxide layer

[0033] 203: Dielectric layer

[0034] 204: Conductive layer

[0035] 205: Heating resistance layer

[0036] 206: Connection layer

[0037] 207: Control layer

[0038] 208: Protection layer

[0039] 208A: First protection layer

[0040] 208B: Second protection layer

[0041] 209: Control transistor

[0042] 209A: Second oxide layer

[0043] 209B: Polysilicon layer

[0044] S: Source

[0045] D: Drain

[0046] G: Gate Detailed implementation manners

[0047] The present invention will be described in detail with preferred embodiments and viewpoints. The following description provides specific implementation details of the present invention to enable readers to thoroughly understand the implementation manners of these embodiments. However, those skilled in the art should understand that the present invention can also be implemented without these details. In addition, the present invention can also be applied and implemented by other specific embodiments, and the details described in this specification can also be applied based on different requirements and various modifications or changes can be made without departing from the spirit of the present invention. Therefore, the present invention will be described with preferred embodiments and viewpoints, and such descriptions are to explain the structure of the present invention and are only used for illustration rather than to limit the scope of the patent application of the present invention. The terms used in the following description will be interpreted in the broadest reasonable manner so that they can be used together with the detailed description of a specific embodiment of the present invention.

[0048] To achieve the goal of improving the prior art, please refer to Figure 2 , Figure 3 , and Figure 4 , in the present invention, an inkjet head wafer structure 200 with a novel structure is explored, including: a substrate layer 201, which bears the components of the inkjet head wafer structure 200; a conductive layer 204; a heating resistance layer 205, which is adjacent to and in the same horizontal position as the conductive layer 204; a control layer 207, which is electrically connected to the conductive layer 204 and a control transistor 209 and serves as a control wire, enabling the control transistor 209 to control the heating resistance layer 106 to heat the ink; and several protective layers 208, which are disposed on the substrate layer 201. Among them, the heating resistance layer 205 and the conductive layer 204 are disposed in any layer (such as in the dielectric layer 203 or the protective layer 208) or on any layer (also for example, above the dielectric layer 203 or the protective layer 208) that is electrically insulated and coated. According to one aspect of the present invention, integrating the heating resistance layer 205 and the conductive layer 204 on the same layer has a higher degree of adhesion and mechanical strength between the two, which enables them to be configured in various electrically insulating layers according to the application requirements, providing more configuration options during the manufacturing process to meet the application needs in the market. For example, configuring the heating resistance layer 205 and the conductive layer 204 close to the ink (i.e., the position of the inkjet head wafer structure 200) has a better heat transfer effect, achieving the aforementioned goals of small energy consumption, environmental protection, and extended service life.

[0049] As mentioned above, the control transistor 209 can be a metal-oxide-semiconductor field-effect transistor (MOSFET). When the control transistor 209 is a MOSFET, the control transistor 209 includes a source S, a drain D, and a gate G. The source S and the drain D are buried in the substrate layer 201, and the gate G is disposed on the substrate layer 201 and connected to the source S and the drain D to control the operation of the control transistor 209. Among them, according to an embodiment of the present invention, the gate G further includes a second oxide layer 209A and a polysilicon layer 209B, which are sequentially stacked on the substrate layer 201. According to the embodiments of the present invention, when the control transistor 209 is a MOSFET, the control transistor 209 can be selected from an N-type metal-oxide-semiconductor field-effect transistor (N-MOSFET) or a P-type metal-oxide-semiconductor field-effect transistor (P-MOSFET). And when there are multiple control transistors 209 in the inkjet head wafer structure 200, the MOSFETs described in the present invention can also be any combination of N-MOSFETs or P-MOSFETs.

[0050] According to an embodiment of the present invention, the inkjet head wafer structure 200 further includes: a first oxide layer 202 disposed on the substrate layer 201; a dielectric layer 203 covering the first oxide layer 202 and encapsulating the heating resistance layer 205 and the conductive layer 204 therein; a control layer 207 serving as a control wire and partially covering the dielectric layer 203 or the protective layer 208; wherein the protective layer 208 covers the dielectric layer 203 and encapsulates the control layer 207 therein.

[0051] In an embodiment of the present invention, when the control transistor 209 is a MOSFET, the polysilicon layer 209B of the gate G, the heating resistance layer 205, and the conductive layer 204 can be made of the same material, such as a polysilicon material (Polycrystalline Silicon), but with different component doping ratios. According to a view of the present invention, based on the need to improve the two-layer inclined stepped structure in the heating structure, and the fact that there are still differences in the resistance values of the gate G, the heating resistance layer 205, and the conductive layer 204 that need to be individually adjusted and set according to actual application requirements, during the manufacturing process of the inkjet head wafer structure 200, by forming the above-mentioned polysilicon material on the first oxide layer 202, then defining the size and position of the polysilicon material by means of photoresist masking to form the heating resistance layer 205, and finally doping the unmasked area of the polysilicon material by ion implantation, ion diffusion or other means to improve conductivity to form the conductive layer 204, so that the heating resistance layer 205 and the conductive layer 204 are formed simultaneously and are located on the same layer (i.e., adjacent to each other and at the same horizontal position), thus avoiding the problem of the inclined stepped shape at the junction between the two caused by separate sputtering and etching in the currently known structure.

[0052] Continuing from the above, please further refer to Figure 3, where the heating resistance layer 205 is the heater area for heating the ink required for inkjet printing. According to an embodiment of the present invention, the conductive layer 204 can be located on the adjacent two sides of the heating resistance layer 205. During the doping process of the polysilicon material, the doping concentration can be in the form of high-low-high to form a structure with better conductivity-higher impedance-better conductivity, that is, the structure of the conductive layer 204 - heating resistance layer 205 - conductive layer 204. In this way, the conductive layer 204 and the heating resistance layer 205 can be located in the same layer as described above. When the problem of the inclined stepped shape of the two is eliminated and the mechanical strength is improved, when the subsequent dielectric layer 203 is formed on the two and wraps them between the first oxide layer 202, naturally, the bonding of the dielectric layer 203 and the protective layer 208 can be made more firm, thereby having better mechanical strength, service life and reliability, making the inkjet head wafer structure 200 operate more stably, preventing the ink from seeping in due to the rupture of the thin film therein, and thus achieving the purpose of subsequent encryption identification, simultaneous control of the number of printed dots, printing mode processing, vividness control, saturation control and other improvements in printing performance of the present invention.

[0053] Please continue to refer to Figure 4 , which is another embodiment of the present invention, showing the case where the conductive layer 204 and the heating resistance layer 205 are arranged in the protective layer 208. In this embodiment, the dielectric layer 203 is located above the first oxide layer 202, while the conductive layer 204 and the heating resistance layer 205 are further arranged in the first protective layer 208A, different from Figure 3 the embodiment in which the conductive layer 204 and the heating resistance layer 205 are arranged in the dielectric layer 203. In Figure 4 the embodiment, the control layer 207 is used as a wire. To cooperate with this structure, it is respectively arranged in the protective layer 208, that is, in the middle of the first protective layer 208A and the second protective layer 208B, and above the dielectric layer 203, and the control transistor 209 is electrically connected to the conductive layer 204 through the connection layer 206 respectively to achieve the purpose of controlling the inkjet operation.

[0054] As described above, according to the content of the present invention, the inkjet head wafer structure 200 includes several connection layers 206, which are disposed above the conductive layer 204 and the source S and drain D of the control transistor 209, and are electrically connected to the control layer 207 used as a wire, so that the control transistor 209 can control the heating resistor layer 205 to heat the ink during the printing process. Among them, in an embodiment of the present invention, the dielectric layer 203 can define the connection layer 206 by contact hole technology (Contact Hole) in a way of yellow light and etching to form the control layer 207 used as a wire. In the present invention, the material of the control layer 207 can be selected from aluminum copper alloy (AlCu) or gold (Au) according to application requirements. In the protective layer 208, the perforations of the required wires (not shown in the figure) can also be defined by via hole technology according to application requirements, and the material of the wires can also be selected from aluminum copper alloy (AlCu) or gold (Au).

[0055] According to another embodiment of the present invention, in addition to being formed by doping polysilicon material, the heating resistor layer 205 can also be selected from one of tantalum aluminide (TaAl), tantalum (Ta), tantalum nitride (TaN), tantalum disilicide (Si2Ta), carbon (C), silicon carbide (SiC), indium tin oxide (ITO), zinc oxide (ZnO), cadmium sulfide (CdS), hafnium diboride (HfB2), titanium tungsten alloy (TiW), and titanium nitride (TiN).

[0056] According to another embodiment of the present invention, in addition to being selected from the aforementioned aluminum copper alloy (AlCu) and gold (Au), the control layer 207 can also be selected from one of aluminum silicon alloy (AlSi), palladium (Pd), palladium silver alloy (PdAg), platinum (Pt), aluminum silicon copper (AlSiCu), niobium (Nb), vanadium (V), hafnium (Hf), titanium (Ti), zirconium (Zr), and yttrium (Y).

[0057] According to an embodiment of the present invention, the aforementioned first oxide layer 202 is an electrically insulating and heat insulating material, and the electrically insulating and heat insulating material can be selected from one of field oxide (FOX), silicon dioxide (SiO2), silicon nitride (Si3N4), and phosphosilicate glass (PSG).

[0058] According to an embodiment of the present invention, the protective layer 208 can be configured with an appropriate number of layers according to application requirements. In an embodiment of the present invention, it can be two layers, namely Figure 2 and Figure 3The first protective layer 208A and the second protective layer 208B in it are stacked in sequence from bottom to top. The first protective layer 208A can be a passivation material, and the passivation material is one of silicon nitride (Si3N4), silicon dioxide (SiO2), titanium dioxide (TiO2), hafnium dioxide (HfO2), zirconium dioxide (ZrO2), tantalum pentoxide (Ta2O5), rhenium heptoxide (Re2O7), niobium pentoxide (Nb2O5), uranium pentoxide (U2O5), tungsten trioxide (WO3), silicon oxynitride (Si4O5N3), silicon carbide (SiC). The second protective layer 208B is a metal material, and the metal material is one of tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), titanium tungsten (TiW).

[0059] In an embodiment of the present invention, the resolution (Dots Per Inch, the number of dots or ink droplets per inch) of the inkjet head wafer structure 200 of this case can be set within a range of at least 150 DPI to 48000 DPI.

[0060] In summary, the present invention provides an inkjet head wafer structure. By improving the two-layer inclined stepped structure at the junction of the heating resistance layer and the conductive layer in the heating architecture of the existing inkjet head wafer in the prior art to be on the same layer, compared with the known technology, its mechanical strength, service life, and reliability are increased. And the architecture combined with the MOSFET control element benefits from the operation stability brought by the increased mechanical strength, enabling the inkjet head wafer structure to further improve printing performance such as subsequent encryption identification, control of the number of nozzles printed simultaneously, printing mode processing, vividness control, saturation control, etc., and more effectively reducing the manufacturing

[0061] requirements of the MJ24A-1327CN_24A461 1TWCN_simplified Chinese version process and additional manufacturing costs. At the same time, both the heating resistance layer and the conductive layer can be arranged in insulating layers such as the interlayer or the protective layer according to the requirements of industrial utilization conditions, which has great industrial availability.

Claims

1. An inkjet head wafer structure, comprising: A substrate layer for carrying components of the inkjet head wafer structure; A conductive layer; A heating resistance layer, adjacent to and in the same horizontal position as the conductive layer; A control layer, electrically connected to the conductive layer and a control transistor, for controlling the heating resistance layer to heat the ink; and At least one protective layer disposed on the substrate layer; Wherein, the heating resistance layer and the conductive layer are respectively coated and disposed in any layer with electrical insulation or above any layer.

2. The inkjet head wafer structure according to claim 1, further comprising a first oxide layer disposed on the substrate layer.

3. The inkjet head wafer structure according to claim 2, further comprising a dielectric layer covering the first oxide layer and enclosing the heating resistance layer and the conductive layer therein.

4. The inkjet head wafer structure according to claim 3, wherein the control layer partially covers the dielectric layer or the at least one protective layer.

5. The inkjet head wafer structure according to claim 3, wherein the at least one protective layer covers the dielectric layer and encloses the control layer therein.

6. The inkjet head wafer structure according to claim 1, wherein the control transistor is a metal-oxide-semiconductor field-effect transistor (MOSFET).

7. The inkjet head wafer structure according to claim 6, wherein the metal-oxide-semiconductor field-effect transistor is selected from an N-type metal-oxide-semiconductor field-effect transistor (N-MOSFET), a P-type metal-oxide-semiconductor field-effect transistor (P-MOSFET), or any combination thereof.

8. The inkjet head wafer structure as described in claim 6, wherein the metal-oxide semiconductor field-effect transistor further comprises: A source electrode, a drain electrode, and a gate electrode; wherein, the source electrode and the drain electrode are disposed in the substrate layer, and the gate electrode is disposed on the substrate layer, connecting the source electrode and the drain electrode to control the operation of the metal-oxide-semiconductor field-effect transistor.

9. The inkjet head wafer structure according to claim 8, wherein the gate electrode further comprises a second oxide layer and a polysilicon layer, sequentially stacked on the substrate layer, wherein the polysilicon layer, the heating resistance layer, and the conductive layer are of the same material but with different component doping ratios.

10. The inkjet head wafer structure according to claim 9, wherein the polysilicon layer, the heating resistance layer, and the conductive layer are all polysilicon materials, the conductive layer is located at positions adjacent to both sides of the heating resistance layer, and their doping concentrations respectively form a structure with better conductivity - higher impedance - better conductivity in the order of high - low - high.

11. The inkjet head wafer structure according to claim 1, wherein the material of the heating resistance layer is selected from one of polycrystalline silicon, tantalum aluminide (TaAl), tantalum (Ta), tantalum nitride (TaN), tantalum disilicide (Si2Ta), carbon (C), silicon carbide (SiC), indium tin oxide (ITO), zinc oxide (ZnO), cadmium sulfide (CdS), hafnium diboride (HfB2), titanium tungsten alloy (TiW), titanium nitride (TiN).

12. The inkjet head wafer structure according to claim 1, further comprising a plurality of connection layers disposed on the conductive layer and the control transistor and electrically connected to the control layer, enabling the control transistor to control the heating resistance layer to heat the ink.

13. The inkjet head wafer structure as claimed in claim 1, wherein the material of the control layer is selected from aluminum copper alloy (AlCu) or gold (Au).

14. The inkjet head wafer structure as claimed in claim 1, wherein the at least one protective layer further has a first protective layer and a second protective layer, and they are stacked in sequence from bottom to top in the inkjet head wafer structure.

15. The inkjet head wafer structure as claimed in claim 14, wherein the material of the first protective layer is selected from one of silicon nitride (Si3N4), silicon dioxide (SiO2), titanium dioxide (TiO2), hafnium dioxide (HfO2), zirconium dioxide (ZrO2), tantalum pentoxide (Ta2O5), rhenium heptoxide (Re2O7), niobium pentoxide (Nb2O5), uranium pentoxide (U2O5), tungsten trioxide (WO3), silicon oxynitride (Si4O5N3), silicon carbide (SiC).

16. The inkjet head wafer structure as claimed in claim 14, wherein the material of the second protective layer is a metal material, and the metal material is selected from one of tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), titanium tungsten (TiW).

17. The inkjet head wafer structure as claimed in claim 1, wherein the resolution range that the inkjet head wafer structure can print is between 150 DPI - 48000 DPI.

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