Preparation method of metal nano gap array

By preparing metal electrodes on the substrate and introducing a sacrificial layer, combining chemical mechanical polishing and wet etching methods, the problems of high nano gap processing costs and low depth and aspect ratio are solved, and low cost, high depth and aspect ratio nano gap array preparation and large-area mass production are achieved, which is suitable for high-frequency and high-speed systems.

CN120348906APending Publication Date: 2025-07-22NAT UNIV OF DEFENSE TECH

Patent Information

Application Number
CN202510853911.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-24
Publication Date
2025-07-22

AI Technical Summary

Technical Problem

In the prior art, nano gap processing methods are expensive, have low depth and aspect ratio, are unable to prepare heterogeneous electrodes, and are difficult to prepare in large areas in batches.

Method used

The metal electrodes were prepared and patterned on the substrate, the sacrificial layer separation electrode was introduced, and the electrode overlapping top cap was removed using chemical mechanical polishing, and nano gaps were formed by wet etching, and metal nano gap arrays were prepared in combination with ultraviolet lithography and dry etching methods.

Benefits of technology

It realizes low-cost, high-deep and aspect ratio nano gap preparation, can prepare heterogeneous electrodes, and large-area mass production, suitable for high-frequency and high-speed systems.

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Abstract

The invention belongs to the technical field of micro-nano machining, and relates to a preparation method of a metal nano slot array, which comprises the following steps: preparing a metal electrode on a substrate and patterning to obtain a first electrode; depositing a sacrificial structure at the joint of the first electrode and the substrate and patterning to obtain a sacrificial layer; preparing another metal electrode on the substrate and patterning to obtain a second electrode, and enabling the second electrode to cover the sacrificial layer; removing an electrode overlapping top cap at the junction of the first electrode and the second electrode by adopting a chemical mechanical polishing method to enable the sacrificial layer to be in an exposed state; and processing the sacrificial layer by adopting a wet etching method, so that a nano gap is formed between the first electrode and the second electrode, and the metal nano gap array is obtained. The metal nano gap array can be prepared, the heterogeneous electrode can be prepared, the depth-to-width ratio is high, the cost is low, and large-area batch preparation can be achieved.
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Description

Technical Field

[0001] This application relates to the field of micro-nano processing technology, and particularly to a method for preparing a metal nano-gap array. Background Art

[0002] With the development of technology and the progress of techniques, nano-gap devices have received extensive attention.

[0003] Compared with solid-state devices, nano-gap devices have inherent advantages: on the one hand, due to their unique non-scattering electron transport characteristics, nano-gap devices can achieve femtosecond-level ultrafast electrical responses and cut-off frequencies in the terahertz range; on the other hand, due to their junctionless characteristics, nano-gap devices have excellent tolerance to high temperature and radiation; in addition, the on-chip integration ability of nano-gap devices provides a new approach for the realization of high-performance integrated circuits. These characteristics make nano-gap devices an ideal choice for high-frequency and high-speed systems.

[0004] In the prior art, the processing methods of nano-gaps mainly rely on complex nano-processing means such as electron beam lithography and focused ion beam.

[0005] However, the above methods have high processing costs, low aspect ratios, cannot fabricate heterogeneous electrodes, and are difficult to fabricate in large areas in batches. Summary of the Invention

[0006] Based on this, it is necessary to provide a method for preparing a metal nano-gap array for the above technical problems, which can use conventional instrument methods to prepare a metal nano-gap array, can fabricate heterogeneous electrodes, has a high aspect ratio, low cost, and can be fabricated in large areas in batches.

[0007] A method for preparing a metal nano-gap array includes: Preparing a metal electrode on a substrate and patterning it to obtain a first electrode; Depositing a sacrificial structure at the connection between the first electrode and the substrate and patterning it to obtain a sacrificial layer; Preparing another metal electrode on the substrate and patterning it to obtain a second electrode, and making the second electrode cover the sacrificial layer; Using a chemical mechanical polishing method to remove the electrode overlapping top cap at the junction of the first electrode and the second electrode, so that the sacrificial layer is in an exposed state; Using a wet etching method to process the sacrificial layer, so that nano-gaps are formed between the first electrode and the second electrode, and a metal nano-gap array is obtained.

[0008] In one embodiment, preparing a metal electrode on a substrate and patterning it to obtain a first electrode includes: Depositing a thin film on the substrate by means of magnetron sputtering, electron beam evaporation, or electroplating to obtain a metal electrode; Pattern a metal electrode to obtain a first electrode.

[0009] In one embodiment, patterning a metal electrode to obtain a first electrode includes: Adopt ultraviolet lithography to fabricate a photoresist mask, and use dry etching to pattern a metal electrode to obtain a first electrode.

[0010] In one embodiment, deposit a sacrificial structure at the connection between the first electrode and the substrate and pattern it to obtain a sacrificial layer, including: Deposit a thin film at the connection between the first electrode and the substrate by magnetron sputtering, atomic layer deposition, or chemical vapor deposition to obtain a sacrificial structure; Pattern the sacrificial structure to obtain a sacrificial layer.

[0011] In one embodiment, patterning the sacrificial structure to obtain a sacrificial layer includes: Use the lift-off method to pattern the sacrificial structure to obtain a sacrificial layer.

[0012] In one embodiment, cleaning operations are performed before preparing a metal electrode, after obtaining the first electrode, and after obtaining the second electrode.

[0013] In one embodiment, the cleaning operation includes: Perform ultrasonic cleaning with an acetone solution with a content of 99.5%, perform ultrasonic cleaning with an absolute ethanol solution with a content of 99.7%, and perform ultrasonic cleaning with a deionized water solution.

[0014] In one embodiment, the substrate is made of a double-sided polished sapphire material.

[0015] In one embodiment, both the first electrode and the second electrode are made of an alloy material.

[0016] In one embodiment, the sacrificial layer is made of an oxide or a pure metal material.

[0017] The above method for preparing a metal nano-gap array can prepare a heterogeneous electrode with a high aspect ratio and low cost, and can be prepared in large areas in batches by introducing a sacrificial layer to separate the electrodes (specifically, separating the first electrode and the second electrode), patterning by ultraviolet lithography, removing the overlapping top caps of the electrodes by chemical mechanical polishing, and finally obtaining nano-gaps by wet etching. Description of the Drawings

[0018] Figure 1 It is a schematic flow chart of a method for preparing a metal nano-gap array in one embodiment; Figure 2 Schematic architecture diagram of a preparation method for a metal nano-gap array in an embodiment; Figure 3 Schematic diagram of a nano-gap obtained by a preparation method for a metal nano-gap array in an embodiment; Figure 4 Schematic diagram of a nano-gap array obtained by a preparation method for a metal nano-gap array in an embodiment; Figure 5 Scanning electron microscope photograph of a preparation method for a metal nano-gap array in an embodiment.

[0019] Reference numerals: Substrate 1, first electrode 2, sacrificial layer 3, second electrode 4, electrode overlapping top cap 5. Detailed implementation manners

[0020] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts belong to the scope of protection of the present application.

[0021] In addition, in the present application, descriptions such as "first" and "second" are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present application, the meaning of "multiple groups" is at least two groups, such as two groups, three groups, etc., unless otherwise specifically defined.

[0022] In the present application, unless otherwise clearly specified and limited, terms such as "connection" and "fixation" should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection, an electrical connection, a physical connection or a wireless communication connection; it can be directly connected, or indirectly connected through an intermediate medium, and can be the internal communication of two components or the interaction relationship between two components, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0023] In addition, the technical solutions between various embodiments of the present application can be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement it. When the combination of technical solutions results in contradictions or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present application.

[0024] This application provides a method for preparing a metal nano-gap array. As Figures 1 to 4 shown, in one embodiment, it includes: Step 101, preparing a metal electrode on a substrate and patterning it to obtain a first electrode.

[0025] Specifically: By means of magnetron sputtering, electron beam evaporation, or electroplating, deposit a thin film on the substrate to obtain a metal electrode; Pattern a metal electrode to obtain a first electrode.

[0026] More specifically: By means of magnetron sputtering, electron beam evaporation, or electroplating, deposit a thin film on the substrate. The thickness of the thin film is between 10 nm and 10 μm to obtain a metal electrode; Adopt ultraviolet lithography to make a photoresist mask plate as a protective layer, and use a dry etching method (such as inductively coupled plasma etching (ICP) method) to pattern a metal electrode to obtain a first electrode.

[0027] In this step, before preparing a metal electrode, perform a cleaning operation to ensure the cleanliness of the substrate; the cleaning operation includes: performing ultrasonic cleaning for 10 min with an acetone solution with a content of 99.5%, then performing ultrasonic cleaning for 10 min with an absolute ethanol solution with a content of 99.7% to remove organic impurities on the substrate surface, and finally performing ultrasonic cleaning for 10 min with a deionized water solution to remove residual acetone and ethanol solutions.

[0028] After obtaining the first electrode, perform a cleaning operation to clean the residual photoresist; the cleaning operation includes: performing ultrasonic cleaning for 10 min with an acetone solution with a content of 99.5%, performing ultrasonic cleaning for 10 min with an absolute ethanol solution with a content of 99.7%, and performing ultrasonic cleaning for 10 min with a deionized water solution.

[0029] Step 102, deposit a sacrificial structure at the connection between the first electrode and the substrate and pattern it to obtain a sacrificial layer.

[0030] Specifically: By means of magnetron sputtering, atomic layer deposition, or chemical vapor deposition, deposit a thin film at the connection between the first electrode and the substrate to obtain a sacrificial structure; Pattern the sacrificial structure to obtain a sacrificial layer.

[0031] More specifically: By means of magnetron sputtering, atomic layer deposition, and chemical vapor deposition, a thin film is deposited at the connection between the first electrode and the substrate. The thickness of the thin film ranges from 10 nm to 1 μm to obtain a sacrificial structure; The sacrificial structure is patterned by the lift-off method to obtain a sacrificial layer.

[0032] In this step, before depositing the sacrificial structure, it further includes: spin-coating a layer of photoresist on the substrate, and removing the photoresist at the sacrificial structure through ultraviolet exposure.

[0033] Step 103, preparing another metal electrode on the substrate and patterning it to obtain a second electrode, and making the second electrode cover the sacrificial layer.

[0034] Specifically: By means of magnetron sputtering, electron beam evaporation, and electroplating, a thin film is deposited on the substrate to obtain another metal electrode, and making the other metal electrode cover the sacrificial layer; The other metal electrode is patterned to obtain a second electrode.

[0035] More specifically: By means of magnetron sputtering, electron beam evaporation, and electroplating, a thin film is deposited on the substrate. The thickness of the thin film ranges from 10 nm to 10 μm to obtain another metal electrode, and making the other metal electrode cover the sacrificial layer; Using ultraviolet lithography method to make a photoresist mask as a protective layer, and using a dry etching method (such as inductively coupled plasma etching (ICP) method) to pattern the other metal electrode to obtain a second electrode.

[0036] In this step, after obtaining the second electrode, a cleaning operation is performed to clean the residual photoresist; the cleaning operation includes: ultrasonic cleaning for 10 min with an acetone solution with a content of 99.5%, ultrasonic cleaning for 10 min with an absolute ethanol solution with a content of 99.7%, and ultrasonic cleaning for 10 min with a deionized water solution.

[0037] Step 104, using a chemical mechanical polishing method to remove the electrode overlapping top cap at the junction of the first electrode and the second electrode, so that the sacrificial layer is in an exposed state.

[0038] In this step, the electrode overlapping top cap at the junction of the first electrode and the second electrode is the protrusion at the junction of the first electrode and the second electrode.

[0039] Step 105, using a wet etching method to process the sacrificial layer, so that a nano-gap is formed between the first electrode and the second electrode to obtain a metal nano-gap array.

[0040] In this step, wet etching can be carried out with 40% hydrofluoric acid (HF) for 40 s to remove the silicon oxide sacrificial layer at the electrode gap, and the preparation of the metal nano-gap array is completed.

[0041] In this embodiment, the substrate is made of a double-sided polished sapphire material. Specifically, a double-sided polished sapphire material with a crystal orientation of (0001) and a diameter of 50.8 mm is used.

[0042] Both the first electrode and the second electrode are made of alloy materials. Specifically, pure metals such as gold, tungsten, molybdenum, platinum, and titanium can be selected, or multi-metal alloys such as titanium tungsten, platinum rhodium, and nickel tungsten can also be selected; different materials have different effects on the electrical properties of the nano-gap. Specifically, nano-gaps of different materials can be prepared according to needs to meet the requirements of different devices.

[0043] The sacrificial layer is made of an oxide or pure metal material. Specifically, oxides such as silicon dioxide and aluminum oxide can be selected, or pure metals such as aluminum and chromium can also be selected.

[0044] It should be noted that the selection of the sacrificial layer material needs to ensure that the wet etching solution does not react with the substrate material and the electrode material.

[0045] It should also be noted that magnetron sputtering, electron beam evaporation, electroplating, ultraviolet lithography, dry etching, atomic layer deposition, chemical vapor deposition, lift-off, chemical mechanical polishing, and wet etching methods are all existing technologies and will not be elaborated here.

[0046] The above method for preparing the metal nano-gap array can prepare heterogeneous electrodes with a high aspect ratio and low cost, and can be prepared in large areas in batches by introducing a sacrificial layer to separate the electrodes (specifically, separating the first electrode and the second electrode), using ultraviolet lithography for patterning, using chemical mechanical polishing to remove the electrode overlapping top cap, and finally obtaining nano-gaps by wet etching. Specifically: 1) By introducing a sacrificial layer to separate the electrodes, using ultraviolet lithography for patterning, using chemical mechanical polishing to remove the electrode overlapping top cap, and finally obtaining nano-gaps by wet etching, high-cost processing methods such as electron beam lithography and focused ion beam are avoided, and nano-gaps with a minimum gap of about 10 nm can be prepared only by using conventional instrument methods such as micron-level ultraviolet lithography, greatly reducing the processing cost and process difficulty; 2) By controlling the thicknesses of the control electrodes (including the first electrode and the second electrode) and the sacrificial layer, precise control over the thickness and width of the metal nano-gap can be achieved. Furthermore, nano-gaps with a width as low as 10 nm and an aspect ratio greater than 10:1 (up to 100:1. For example, when the thickness of the sacrificial layer is 10 nm and the thickness of the electrode is 500 nm, a nano-gap with a width of 10 nm and a height of 500 nm can be achieved, and the aspect ratio at this time is 50:1) can be fabricated. Compared with the aspect ratio of existing nano-gaps generally not exceeding 2:1, this application has significant advantages and can meet the requirements of high current and high power tolerance for nano-gap devices. 3) By depositing two layers of electrodes made of different materials, heterogeneous electrodes can be fabricated, enabling the processing of nano-scale width gap arrays of heterogeneous electrodes, and further improving the working voltage and current of nano-gap field emission devices. 4) It is capable of large-area batch preparation, which is conducive to the mass manufacturing and processing of nano-gap field emission devices and nano-gap plasma devices, as well as subsequent device research. 5) It is compatible with traditional semiconductor processes, providing convenience for the subsequent optimization, integration, and device fabrication of nano-gaps. 6) Compared with directly etching to form nano-gaps, by using mature ultraviolet lithography, chemical mechanical polishing, and wet etching methods to fabricate nano-gaps, the nano-gap structure can be customized, precise control over the size of nano-gaps with different structures can be achieved, the size effect and edge effect generated during device fabrication can be avoided, and more ideal and better-performing nano-gaps can be obtained.

[0047] It should be understood that although Figure 1 the steps in the flowchart of Figure 1 are shown in sequence according to the arrows, these steps do not necessarily need to be executed in the order indicated by the arrows. Unless otherwise clearly stated in this article, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover,

[0048] In a specific embodiment, a gold (Au) thin film with a thickness of 1 μm is deposited on a substrate by magnetron sputtering to serve as a metal electrode and ensure good uniformity. A silicon dioxide (SiO2) thin film with a thickness of 100 nm is deposited at the joint between the first electrode and the substrate by plasma-enhanced chemical vapor deposition (PECVD) to obtain a sacrificial structure. A titanium (Ti) thin film with a thickness of 1 μm is deposited on the substrate by magnetron sputtering to serve as another metal electrode.

[0049] As Figure 5 shown, it can be seen that this embodiment can complete the preparation of a metal nano-gap array with good uniformity, high aspect ratio, and the ability to prepare heterogeneous metal nano-gaps.

[0050] In this embodiment, the preparation of a linear nano-gap array is realized. Since the electrical properties of nano-gaps with different shapes are different, nano-gap arrays with other shapes, such as zigzag, semicircular, and curved, can be prepared according to actual needs.

[0051] The content not described in detail in this specification belongs to the prior art well-known to those skilled in the art.

[0052] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0053] The above-described embodiments merely represent several implementation manners of the present application. Their descriptions are relatively specific and detailed, but should not be construed as limiting the scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A preparation method of a metal nano-gap array, characterized in that, Including: Prepare a metal electrode on a substrate and pattern it to obtain a first electrode; Deposit a sacrificial structure at the connection between the first electrode and the substrate and pattern it to obtain a sacrificial layer; Prepare another metal electrode on the substrate and pattern it to obtain a second electrode, and make the second electrode cover the sacrificial layer; Adopt a chemical mechanical polishing method to remove the electrode overlapping cap at the junction of the first electrode and the second electrode, so that the sacrificial layer is in an exposed state; Adopt a wet etching method to process the sacrificial layer, so as to form a nano-gap between the first electrode and the second electrode, and obtain a metal nano-gap array.

2. The preparation method of a metal nano-gap array according to claim 1, wherein Prepare a metal electrode on a substrate and pattern it to obtain a first electrode, including: Adopt magnetron sputtering, electron beam evaporation, electroplating methods to deposit a thin film on the substrate to obtain a metal electrode; Pattern a metal electrode to obtain a first electrode.

3. The preparation method of a metal nano-gap array according to claim 2, wherein, Pattern a metal electrode to obtain a first electrode, including: Adopt an ultraviolet lithography method to make a photoresist mask plate, and use a dry etching method to pattern a metal electrode to obtain a first electrode.

4. A method for preparing a metal nano-gap array according to any one of claims 1 to 3, characterized in that Deposit a sacrificial structure at the connection between the first electrode and the substrate and pattern it to obtain a sacrificial layer, including: Adopt magnetron sputtering, atomic layer deposition, chemical vapor deposition methods to deposit a thin film at the connection between the first electrode and the substrate to obtain a sacrificial structure; Pattern the sacrificial structure to obtain a sacrificial layer.

5. The preparation method of a metal nano-gap array according to claim 4, characterized in that, Pattern the sacrificial structure to obtain a sacrificial layer, including: Adopt a lift-off method to pattern the sacrificial structure to obtain a sacrificial layer.

6. The preparation method of a metal nano-gap array according to any one of claims 1 to 3, characterized in that, Before preparing a metal electrode, after obtaining the first electrode, and after obtaining the second electrode, cleaning operations are all performed.

7. The preparation method of a metal nano-gap array according to claim 6, characterized in that The cleaning operation includes: Perform ultrasonic cleaning with an acetone solution with a content of 99.5%, perform ultrasonic cleaning with an absolute ethanol solution with a content of 99.7%, and perform ultrasonic cleaning with a deionized water solution.

8. A method for preparing a metal nano-gap array according to any one of claims 1 to 3, characterized in that, The substrate is made of a double-sided polished sapphire material.

9. A method for preparing a metal nano-gap array according to any one of claims 1 to 3, characterized in that Both the first electrode and the second electrode are made of an alloy material.

10. A method for preparing a metal nano-gap array according to any one of claims 1 to 3, characterized in that, The sacrificial layer is made of an oxide or a pure metal material.

Citation Information

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