Man-machine cooperation function test cross-domain overall optimization method, system, equipment and medium

Abstract

The invention discloses a man-machine cooperation function test cross-domain overall optimization method, system and device and a medium, and relates to the technical field of electronic information, and the method comprises the steps: carrying out the reliability analysis of a mainboard function test process, and determining the relation between a fault coverage rate and the inherent reliability of a system; establishing a fault tree, extracting element reliability information from a historical maintenance data set, determining reliability ranges of all function test modules, and obtaining association relationships among the modules; based on the fault tree, analyzing the influence on the inherent reliability of the system when the modules containing the same bottom event concurrently fail, and correcting a calculation formula of the inherent reliability of the system; constructing an optimization model oriented to a function test process, and proposing a two-stage optimization solution method considering reliability uncertainty; according to the optimization method, system, equipment and medium, the cross-domain overall optimization capability of the model is enhanced, and more reliable decision support is provided for man-machine collaborative testing.

Description

Technical Field

[0001] The present invention relates to the field of electronic information technology, and particularly to a cross-domain overall optimization method, system, device and medium for human-machine collaborative function testing. Background Art

[0002] With the continuous growth of the demand for electronic products, the complexity of circuit board design and manufacturing has increased significantly. As a key link to ensure product performance and quality, functional testing has become increasingly important and costly. Existing test strategy methods usually adopt greedy algorithms, which obtain the optimal test strategy only based on the information of the test link. However, in the flexible manufacturing mode of multi-variety and small-batch notebook motherboards, due to the dynamic change characteristics of the production line working conditions, this single-point optimization method is prone to overfitting problems. It is not only difficult to effectively reduce the total test cost, but also often leads to a high repair rate, bringing greater economic losses to manufacturers.

[0003] The above problems mainly occur because in a flexible manufacturing system, all links of the production process are strongly coupled, and key problems often involve the collaborative optimization of multiple different domains. Yield is only the short-term performance of component reliability in the test link. The existing single-point optimization model established based on the yield characteristics of the test link ignores the fact that the reliability of motherboard components is essentially determined by the upstream manufacturing process. This optimization model constructed based on single-domain information, due to the failure to fully consider the relevance of cross-domain information, lacks consideration of the uncertainty of reliability when calculating the fault coverage rate. When facing the dynamic changes of relevant parameters in other domains, it often performs poorly due to insufficient cross-domain collaborative optimization ability. This limitation makes the model difficult to adapt to the dynamic requirements of multi-domain coupling and rapid response in a flexible manufacturing environment, ultimately affecting the overall optimization effect. Summary of the Invention

[0004] Based on the technical problems existing in the background art, the present invention proposes a cross-domain overall optimization method, system, device and medium for human-machine collaborative function testing, which improves the optimization effect.

[0005] The cross-domain overall optimization method for human-machine collaborative function testing proposed by the present invention includes: By performing reliability analysis on the motherboard function test process, determining the relationship between the fault coverage rate and the inherent reliability of the system; By analyzing the motherboard schematic diagram to establish a fault tree, extracting component reliability information from the historical maintenance dataset, and combining the reliability interval estimation method guided by expert knowledge to determine the reliability range of the bottom events in the fault tree, and accordingly determining the reliability range of all functional test modules, so as to obtain the association relationship between the functional test modules; Based on the fault tree analysis, the impact of concurrent failures of functional test modules containing the same basic events on the inherent reliability of the system is analyzed, and the formula for calculating the inherent reliability of the system is corrected accordingly. Construct an optimization model for the functional test process, and propose a two-stage optimization solution method considering the uncertainty of reliability. The goal of the first stage is to maximize the inherent reliability of the system while meeting the test time constraint, and the goal of the second stage is to minimize the average total test cost.

[0006] Furthermore, in the reliability analysis of the motherboard functional test process, the test strategy of the motherboard functional test process divides the test items into two categories: tested items and untested items. The unreliability of the motherboard functional test process only comes from the subsystem composed of untested items, and the inherent reliability of the system is calculated as follows: ; where, is the total number of functional test modules included in the test strategy , is the functional test module index, is the th functional test module in the test strategy , represents that the test start signal of the th

[0007] functional test module is not activated.

[0008] Furthermore, in the fault tree, the motherboard failure is regarded as the top event, the functional test module failure is regarded as the intermediate event, and the underlying causes of the functional test module failure are regarded as the basic events of the fault tree. The reliability range of the basic events in the fault tree is determined by the reliability interval estimation method combined with expert knowledge, and based on this, the reliability range of all functional test modules is determined. Specifically: The samples in the historical maintenance dataset are evenly divided into groups, and the reliability of all basic events in each group is calculated; Based on the reliability calculation results in each group, the reliability mean and standard deviation of each basic event are calculated, and based on this, the reliability range of each basic event is obtained;

[0009] Furthermore, the optimization model is constructed as: Objective function: ; Constraint conditions: ; Among them, is the test strategy for the main board function test, is the th function test module whose test start signal has been activated, represents the inherent reliability of the system, is the total number of function test modules included in the main board function test process, is the function test module index, represents the th function test module's average test time, represents the test time threshold for each product.

[0010] Furthermore, in the first stage of the two-stage optimization solution method; Set the optimization goal for the first stage; Randomly generate groups of reliability value combinations within the reliability range of all function test modules, and solve the optimization problem for each combination to obtain test strategies; Since the same test strategy may be generated in different rounds of optimization, then rounds of optimization result in types of test strategies, ; Select the test strategies with a generation frequency greater than the strategy setting threshold as alternative test strategies.

[0011] Furthermore, in the two-stage optimization solution method, the second-stage optimization solution is specifically as follows: Introduce a comprehensive evaluation index for test strategy optimization to select the best test strategy from alternative test strategies : ; Among them, represents the average total test cost value of test strategy on the training set, is the set of alternative test strategies.

[0012] The human-machine collaborative function test cross-domain overall optimization system includes a reliability analysis module, a correlation relationship module, a reliability correction module, and a two-stage optimization solution module; The reliability analysis module is used to determine the relationship between the fault coverage rate and the inherent reliability of the system by performing reliability analysis on the main board function test process; The associated relationship module is used to establish a fault tree by analyzing the motherboard schematic diagram, extract component reliability information from the historical maintenance dataset, determine the reliability range of the bottom events in the fault tree in combination with the reliability interval estimation method guided by expert knowledge, and accordingly determine the reliability range of all functional test modules, so as to obtain the associated relationship between the functional test modules; The reliability correction module is used to analyze the impact of the concurrent faults of the functional test modules containing the same bottom events on the inherent reliability of the system based on the fault tree, and accordingly correct the calculation formula of the inherent reliability of the system; The two-stage optimization solution module is used to solve the optimization model for the functional test process. The optimization solution objective in the first stage is to maximize the inherent reliability of the system while satisfying the test time constraint, and the optimization solution objective in the second stage is to minimize the average test total cost.

[0013] A computer device includes a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the optimization method described above is implemented.

[0014] A computer-readable storage medium stores a number of classification programs, and the number of classification programs is used to be called by a processor and execute the optimization method described above.

[0015] The advantages of the human-machine collaborative functional test cross-domain overall optimization method, system, device, and medium provided by the present invention are as follows: Combining expert experience, starting from the manufacturing perspective, tracing the root cause of motherboard faults, and realizing the accurate evaluation of the reliability of motherboard components; Then, combining the reliability information of motherboard components and the reliability analysis of the functional test process, establishing an optimization model for the functional test process from the perspective of the inherent reliability of the system, and proposing a two-stage optimization solution method considering the uncertainty of reliability. This model not only improves the accuracy of calculating the inherent reliability of the system, but also enhances the cross-domain overall optimization ability of the model, providing more reliable decision-making support for human-machine collaborative testing. Description of the Drawings

[0016] Figure 1 is a flowchart of the present invention; Figure 2 is a flowchart of the motherboard functional test; Figure 3 is a schematic diagram of the motherboard of a typical notebook computer; Figure 4 is Figure 3 a schematic diagram of the fault tree established for the notebook motherboard; Figure 5 is Figure 4 a partial branch schematic diagram of the fault tree of the motherboard of a typical notebook computer in; Figure 6 For Figure 4 Schematic diagram of the remaining part of the fault tree of a typical laptop motherboard; Figure 7 It is a structural diagram of a fault tree with repeated events in the minimum cut set. Specific implementation mode

[0017] Next, through specific embodiments, the technical solutions of the present invention will be described in detail. Many specific details are set forth in the following description in order to fully understand the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific implementations disclosed below.

[0018] As Figures 1 to 7 shown, the cross-domain overall optimization method for human-machine collaborative function testing proposed by the present invention includes steps one to four: Step 1: Determine the relationship between the fault coverage rate and the inherent reliability of the system by performing reliability analysis on the motherboard function test process; Step 2: Establish a fault tree by analyzing the motherboard schematic diagram, extract component reliability information from the historical maintenance dataset, and determine the reliability range of the bottom events in the fault tree in combination with the reliability interval estimation method guided by expert knowledge. Based on this, determine the reliability range of all function test modules, and thus obtain the correlation relationship between the function test modules; Step 3: Based on the fault tree analysis, analyze the impact of the concurrent faults of the function test modules containing the same bottom events on the inherent reliability of the system, and accordingly correct the calculation formula of the inherent reliability of the system; Step 4: Construct an optimization model for the function test process, and set a two-stage optimization solution method considering the uncertainty of reliability. The optimization solution objective of the first stage is to maximize the inherent reliability of the system while satisfying the test time constraint, and the optimization solution objective of the second stage is to minimize the average test total cost.

[0019] In view of the problem that the existing method lacks consideration of the uncertainty of reliability, resulting in insufficient generalization ability of the optimal solution of the optimization model, this embodiment proposes a cross-domain overall optimization method for function testing. This method realizes the root cause tracing of product quality problems by integrating expert experience, laying a key theoretical and data foundation for establishing a cross-domain collaborative optimization model, and effectively solving the limitations of the existing single-point optimization method. At the same time, based on the monitoring of the actual operating efficiency of the production line and the test production line, constraints are set for the model to ensure that the test strategy and the actual working conditions of the production line are in the best match.

[0020] That is, first, by performing reliability analysis on the functional test process, the inherent reliability information of the process is mined, and the inherent reliability of the system is used to replace the traditional fault coverage rate. Then, by additionally considering the situation of simultaneous failures of modules containing the same basic event, the calculation accuracy of the inherent reliability of the system in the case of repeated events in the minimum cut set is improved. Finally, based on the construction of an optimization model for the functional test process, a two-stage optimization solution method considering reliability uncertainty is designed. Case studies show that the proposed method can design a mainboard functional test strategy with cross-domain overall optimization ability, thereby reducing the cost of the functional test process. In one embodiment, in step one, by performing reliability analysis on the mainboard functional test process, the relationship between the fault coverage rate and the inherent reliability of the system is determined, specifically as follows: The yield rate is only a temporary indicator reflecting the reliability of the mainboard components. The reliability of the mainboard components is determined by the fixed mainboard manufacturing technology and thus has a definite value. Since the reliability of the mainboard functional test process depends on the reliability of the tested mainboard components, the test strategy obtained by analyzing the reliability of the mainboard functional test process is definite and is more likely to have stronger generalization ability than the test strategy obtained by maximizing the fault coverage rate.

[0021] The functional test is divided into two stages: the mainboard functional test and the finished product functional test. In the mainboard functional test stage, the test is carried out according to the test strategy, and the test strategy determines the test status of the test items. The finished product functional test tests all the functions of the finished product assembled from the mainboards that have passed the mainboard functional test. Therefore, there are no undetected faulty products in this stage. In the mainboard functional test stage, the test strategy divides the test items into two categories: tested items and untested items. Only when all the tested items of a mainboard pass the test is the mainboard regarded as a good product; if there are items that fail the test, the mainboard is regarded as a defective product and is sent to the repair center for additional testing and repair. If a mainboard has untested faulty items, the mainboard is a false negative mainboard, that is, the mainboard is misjudged as a good product. After that, the mainboard will also be assembled into a finished product. In the finished product functional test process, the finished product will be detected as a defective product. Subsequently, the finished product will be disassembled and sent to the repair center. Since the repair cost of false negative mainboards is relatively high, too many false negative mainboards will lead to a high total test cost.

[0022] According to Figure 2From the motherboard flowchart, in the motherboard functional test stage, since each test item is tested serially and the test items are independent of each other, the tested items form a series subsystem, and the untested items form another series subsystem. The reliability of the motherboard functional test stage is jointly determined by the two subsystems. According to the above analysis, if the faulty component of a faulty motherboard is tested, then the motherboard will definitely be detected as a defective product; therefore, the occurrence of false negative motherboards is caused by the untested items. For the finished product functional test, the reliability of the subsystem composed of the tested items in the motherboard functional test process is 100%, and the unreliability of the motherboard functional test process only comes from the subsystem composed of the untested items. Therefore, the inherent reliability of the system is calculated as follows: ; (1) Wherein, is the total number of functional test modules included in the test strategy in, is the functional test module index, is the test strategy in the th functional test module, represents the th functional test module whose test start signal is not activated.

[0023] In one embodiment, step two: establish a fault tree by analyzing the motherboard schematic diagram, extract component reliability information from the historical maintenance dataset, estimate the reliability of the bottom events in the fault tree, combine the reliability interval estimation method guided by expert knowledge to determine the reliability range of the bottom events in the fault tree, and replace the reliability of the estimated bottom events accordingly to obtain the association relationship between each module. Specifically: The inherent reliability of motherboard components is essentially determined by their manufacturing process, and this reliability characteristic will be directly reflected in the subsequent maintenance data. Based on this, first collect the fault diagnosis information recorded by maintenance personnel during the test process to construct a historical maintenance dataset; then use statistical analysis methods to extract component reliability information from the historical maintenance dataset; finally, based on the qualitative analysis and quantitative calculation of the fault tree to test the reliability of the items, realize the reliability assessment from the manufacturing source to the test link.

[0024] First, a motherboard functional test was carried out on the motherboard of a typical notebook computer. The circuit diagram of this motherboard is as Figure 3 shown, and Table 1 lists the functional test items of this motherboard. The motherboards that failed the test were sent to the repair center for more detailed testing. According to the test results and the actual experience of experts, determine the underlying cause of the motherboard failure and repair the relevant components, and record them in the historical maintenance dataset (i.e., the maintenance log).

[0025] Based on the motherboard function test results and the historical repair dataset, a fault tree as shown in Figure 4 is established. To simplify the structure of the fault tree, the branches of the intermediate events are drawn in Figure 5 and Figure 6 . In the figures, A, B, and C represent the fault types, and the specific meanings are shown in Table 2. In the fault tree, the motherboard fault is regarded as the top event; the function test module fault is regarded as the intermediate event, which is listed in Table 3; the underlying causes that result in the function test module fault are regarded as the bottom events of the fault tree, which are listed in Table 4.

[0026] Table 1 Function Test Items of a Typical Laptop Motherboard

[0027] Table 2 Fault Types of a Typical Laptop Motherboard

[0028] Table 3 Intermediate Events of the Fault Tree of a Typical Laptop Motherboard

[0029] Table 4 Bottom Events of the Fault Tree of a Typical Laptop Motherboard

[0030] Table 5 Set of Bottom Events of Intermediate Events Corresponding to the Test Items of a Typical Laptop Motherboard

[0031] Therefore, step two is specifically as follows: First, construct a dataset from a large number of historical test results of this motherboard , where represents the number of times this motherboard is tested by the motherboard function test process. Then, collect the historical repair dataset of the motherboard and its finished products corresponding to from the repair center. This historical repair dataset contains the diagnosis and repair information of the faulty motherboards in the motherboard and finished product function test processes. Next, use the historical repair dataset to construct another dataset and denote it as , where represents the number of faulty motherboards in the dataset , and represents the number of bottom events. In this dataset , represents that the th motherboard is repaired due to the occurrence of the th bottom event, . is a sparse matrix. Usually Each row has only one element equal to 1. Calculate the occurrence times of the th basic event using formula (2) : ; (2) Then, the reliability of the th basic event can be estimated by formula (3) : ; (3) ; (3) Since the number of faulty motherboards is very limited during the manufacturing process of motherboards with high yield rates. To improve the accuracy of the reliability estimation of basic events, a large number of tests are required to collect sufficient historical maintenance data sets. Therefore, usually, the value in formula (3) should not be lower than .

[0032] Then, the reliability of intermediate events is derived from the reliability of basic events as follows: As can be seen from Figure 5 and Figure 6 , each intermediate event in Table 5 is connected to its related basic events through an OR gate. According to reliability theory, calculate the reliability of the component corresponding to the intermediate event as follows: ; (4) where is the set of underlying causes (i.e., basic events) that cause the failure of the th functional test module, is the total number of functional test modules included in the motherboard functional test process , is the functional test module index, is the th functional test module in the motherboard functional test process .

[0033] In practical applications, the estimation deviation of reliability is difficult to ignore, especially for the manufacturing process of motherboards with high yield rates. To solve this problem, this embodiment proposes an expert knowledge-guided reliability interval estimation method, using the range of reliability to replace the reliability in formula (3). The specific approach is as follows: Divide the samples in into several groups on average, then calculate the reliability of all basic events in each group using formula (3). Based on the reliability calculation results in each group, calculate the mean and standard deviation of the reliability of each basic event, and thereby obtain the reliability range Based on the th basic event, its reliability mean and standard deviation are denoted as and 。Then calculate the reliability range of the th basic event as follows: ; (5) Where: ; (6) ; (7) According to formulas (4) to (7), the reliability range of the test item can be determined, which is the basis for obtaining the test strategy through subsequent optimization modeling.

[0034] In one embodiment, Step 3: Based on the fault tree analysis, analyze the impact of the concurrent failures of modules containing the same basic event on the inherent reliability of the system, and accordingly correct the formula for calculating the inherent reliability of the system. Specifically: In Step 1, through the reliability analysis of the functional test process, it is determined that the inherent reliability of the system can more accurately represent the fault coverage rate, and according to the reliability theory, the inherent reliability of the system is expressed as the product of the reliability of the system component units. When calculating the inherent reliability of the system in the existing analysis, the impact of the concurrent failures of modules containing the same basic event on the system reliability is not fully considered. Specifically, when performing the reliability analysis of the functional test process, the existing model ignores the impact of repeated events in the minimal cut sets on the calculation results. This simplification leads to a significant deviation in the calculated value of the inherent reliability of the system, thereby affecting the optimization effect of the subsequent test strategy.

[0035] Since the fault tree model constructed in Step 2 clearly reveals the correlation relationships between modules, according to the guidance of experts, in this embodiment, by deeply analyzing the structural characteristics of the fault tree, the impact of the concurrent failures of modules containing the same basic event on the system reliability is quantitatively analyzed, and the formula for calculating the inherent reliability of the system is corrected. Thereby improving the accuracy of the calculation of the inherent reliability of the system and providing a more reliable theoretical basis for the optimization of the test strategy.

[0036] Considering the case where there are repeated events in the minimal cut sets, the occurrence probability of the top event is expressed as: ; (8) ; (9)

[0037]

[0038]

[0039] ; (11) ; (12) Among them, is the th functional test module in the main board functional test process, is the total number of functional test modules included in the main board functional test process, are the indexes of the functional test modules respectively, is the index of the summation term in the formula.

[0040] Taking the fault tree shown in Figure 7 as an example, the formula for calculating the occurrence probability of the top event considering repeated events is specifically described below. In Figure 7 , the events are connected by an OR gate. The occurrence of the top event T may be caused by the occurrence of events M1, M2, or M3. And according to the fault tree structure, it can be seen that events M1 and M2 contain the same event M5, and events M1, M2, and M3 contain the same event M5. Then the calculation process of the occurrence probability of the top event is as follows: ; (13) Use the module association information contained in the fault tree to solve the probability problem of simultaneous failures of modules containing the same bottom event. For example, the common event M5 contained in events M1 and M2. The occurrence of event M5 will cause events M1 and M2 to occur simultaneously. Therefore, the occurrence probability of events M1 and M2 occurring simultaneously is represented by the occurrence probability of event M5.

[0041] It is difficult to obtain the true value of the unavailability. Usually, the probability value of the occurrence of an event is used as the estimated value of the unavailability. According to the reliability analysis in step one, the unavailability of the main board functional test process only comes from the subsystems of the untested items. Analyze the subsystems composed of untested items as a whole, and record the occurrence of a failure in the subsystem as the top event , and the occurrence of a failure in the intermediate events contained in the subsystem as the bottom event. Then the probability of the occurrence of the top event is: ; (14)

[0042] Among them, indicates that the test start signal of the th functional test module is not activated, is the th functional test module in the main board functional test process.

[0043] Since it is difficult to accurately obtain the true value of the unavailability in reality, the present invention uses the occurrence probability of an event (functional test module failure) as the estimated value of the unavailability. Then the corrected inherent reliability of the system Expressed as: ; (16) Wherein, is the inherent unreliability of the system.

[0044] In one embodiment, step four is to construct an optimization model for the functional test process, and set a two-stage optimization solution method considering the uncertainty of reliability, specifically: The goal of the first stage is to maximize the inherent reliability of the system while satisfying the test time constraint.

[0045] The purpose of the motherboard functional test link is to detect as many defective motherboards as possible, that is, to reduce the reliability of the motherboard functional test link. Based on the analysis in step three, the objective function is established as follows: ; (17) To avoid product accumulation on the test production line, the test time of each product should be controlled within a certain range. Therefore, the constraint conditions are established as follows: ; (18) Wherein, is the test strategy for the motherboard functional test, represents the average test time of the th functional test module, represents the test time threshold of each product, which is determined according to the multi-dimensional evaluation results of the real-time operation status of the production line.

[0046] To reduce overfitting, the average test time of each test item is calculated by the historical test time : ; (19) Wherein, is the test time of the th functional test module of the th motherboard, is the number of times the motherboard functional test process tests this motherboard, is the index of the motherboard functional test process for testing this motherboard.

[0047] Based on the above analysis, the following optimization problem is established: ; (20) ; (21) ; (22) For a given set of value combinations of the basic event reliability, a definite test strategy can be obtained by solving the optimization problems (20)-(22). However, since only the range of the basic event reliability can be obtained in practice, therefore, randomly generate within the reliability range calculated in step two groups of different value combinations of reliability. Then, solve the optimization problems (20)-(22) for each combination. The optimization result of each combination is a test strategy to ensure the reliability of the motherboard function test.

[0048] In the first-stage optimization solution, first randomly generate within the reliability range of all the function test modules groups of value combinations of reliability, and solve the optimization problems (20)-(22) for each combination to obtain test strategies; since the same test strategy may be generated in different rounds of optimization, then rounds of optimization obtain types of test strategies, , and represent the occurrence frequency of the th test strategy in the round of optimization as ; select the test strategies with the generation frequency greater than the strategy setting threshold as the alternative test strategies.

[0049] Because a group of reliability is randomly set each time the optimization problem is solved for each combination, and the relatively best test strategy is obtained each time of optimization, so, the higher the occurrence frequency of the test strategy, the more suitable the test strategy is for the situation where the reliability of the intermediate event is within the range obtained in step two. Select the test strategies with the generation frequency greater than the strategy setting threshold as the alternative test strategy set : ; (23) wherein, The value of is usually determined according to actual production experience, and it is recommended to take a value not less than 0.1 to select several strategies with the highest occurrence frequencies. The value of should also be relatively large, and it is recommended to take a value greater than 200.

[0050] In existing research, the fault coverage rate is usually used as the only criterion for optimizing the test strategy, that is, only the test quality is considered in the optimization. Since the test time occupies a relatively high proportion of the total test cost, it is crucial to select a test strategy that takes into account both the test quality and the required time.

[0051] Therefore, in the second-stage optimization solution of this embodiment, a comprehensive evaluation index for testing strategy optimization is introduced to select the best testing strategy with strong generalization ability from the alternative testing strategy sets. This comprehensive evaluation index aims to achieve a balance between testing quality and testing speed. The following formula is used to select the testing strategy with the lowest average total testing cost on the training set from the alternative testing strategy sets as the best testing strategy finally optimized: ; (24) where represents the average total testing cost value of the testing strategy on the training set, and the calculation process of will be described in detail below.

[0052] In this embodiment, to verify the effectiveness of the method proposed in this embodiment, three evaluation indexes are set, namely the false negative rate (FNR), the average main board testing time, and the average main board total testing cost. The calculation processes are as follows: First, calculate the number of actually qualified main boards as: ; (25) where represents the main board index, is the number of batches of main boards to be tested, represents the th function test module test result of the th main board, represents that the th

[0053] function test module of the th main board passes the test, and is true for the logical AND operation. Then the number of actually defective main boards is: ; (26) where represents that the th function test module of the th main board fails the test; Then the number of undetected defective main boards ​。(28) The false negative rate represents the proportion of undetected defective motherboards among all defective motherboards, and is used to evaluate the detection ability of the test strategy for defective motherboards. Under the test strategy the formula for calculating the false negative rate FNR is as follows: ;(29) where is the false negative rate under the test strategy S.

[0054] The average test time represents the average test time for testing one motherboard, and is used to evaluate the test efficiency of the test strategy. Under the test strategy S, the formula for the average test time is as follows: ;(30) where represents the test time of the th functional test module of the th product.

[0055] The total average test cost of the motherboard is the sum of the test time and repair time of one motherboard, and is used to evaluate the overall test effect of the test strategy. The calculation formula is as follows: ;(31) where represents the average repair time of the motherboard, represents the average repair time of the finished notebook, is the number of faulty motherboards detected by the test strategy in the motherboard functional test stage.

[0056] In this embodiment, by integrating the expert experience of multiple process domains, tracing the root cause of product quality, and additionally considering the simultaneous failures of modules containing the same basic event, the calculation accuracy of the inherent reliability of the system in the case of repeated events in the minimal cut set is improved. And, by further considering the uncertainty of the reliability value of the basic event in the actual scenario, a human-machine collaborative functional test cross-domain overall optimization method is designed. This optimization method analyzes the component reliability from the perspective of product manufacturing, and then integrates the reliability characteristics at the manufacturing end into the system reliability analysis of the functional test process, thereby enhancing the cross-domain optimization ability of the optimization method and solving the problem of insufficient generalization ability of the optimal solution of the optimization model due to the lack of consideration of the uncertainty of reliability in the existing methods.

[0057] To verify the effectiveness of this embodiment, the following comparison methods are set: (1)The strategy design method based on fault tree analysis, which is the ablation experiment of this embodiment. Specifically, when using the method of this embodiment for experiments, when calculating the inherent reliability of the system, the influence of the concurrent failures of functional test modules containing the same basic events on the inherent reliability of the system is not considered.

[0058] (2)The strategy design method for minimizing the total test cost, which is the ablation experiment of this embodiment. Specifically, when using the method of this embodiment for experiments, only one-stage solution is set for the optimization model. Specifically: in the solution of the optimization model, the test strategy with the lowest average total test cost is selected as the best test strategy.

[0059] (3)The strategy design method based on budget maximum coverage, which is the ablation experiment of this embodiment. Specifically, when using the method of this embodiment for experiments, the reliability information in the main board functional test process is not utilized (that is, the relationship between the fault coverage rate and the inherent reliability of the system is not determined), and the maximization of the fault coverage rate in the training set is used as the objective function of the optimization model. Among them, using the maximization of the fault coverage rate in the training set as the objective function of the optimization model is an existing method. For details, see the literature PAN R, ZHANG Z, LI X, et al. Black-Box Test-Coverage Analysis and Test-Cost Reduction Based on a Bayesian Network Model[C] / / 2019 IEEE 37th VLSI Test Symposium(VTS). 2019: 1-6.

[0060] The evaluation indexes of the method proposed in this embodiment and its comparison methods on the test set are specifically shown in Table 6 as follows: Table 6: Evaluation indexes of the optimization method of this embodiment and existing methods on the test set

[0061] The experimental results according to Table 6 show that the cross-domain overall optimization method proposed in this embodiment shows significant advantages in key performance indexes: 1) In terms of defect detection, its false negative rate (FNR) is reduced by about 8.40% at most compared with the existing methods, effectively controlling the undetected rate of defective main boards; 2) In terms of economic benefits, a 7.28% reduction in the average total test cost is achieved. This shows that the method proposed in this embodiment effectively reduces the cost of the functional test process by innovatively integrating the human-machine collaborative decision-making mechanism and cross-domain reliability modeling technology, providing an effective cross-domain overall optimization solution for flexible intelligent manufacturing systems.

[0062] As an embodiment; Taking a typical notebook motherboard as the object, analyze the reliability of the motherboard function test process to determine the relationship between the fault coverage rate and the inherent reliability of the system. Then, extract the component reliability information contained in the historical maintenance dataset, estimate the reliability of the underlying components, and quantitatively calculate the module reliability based on the fault tree. Next, analyze the impact of multiple modules failing simultaneously on the inherent reliability of the system based on the fault tree structure, and improve the calculation accuracy of the inherent reliability of the system in the case where there are repeated events in the minimum cut set. Finally, considering the uncertainty of the reliability value of the bottom event, a two-stage optimization model for reliability uncertainty is established. The specific implementation steps are as follows: A1. Analyze the reliability of the function test process, replace the traditional fault coverage rate with the inherent reliability of the system, consider the impact on the inherent reliability of the system when modules containing the same bottom event fail simultaneously, adjust the calculation formula of the inherent reliability of the system, and establish an optimization problem as: ; (32) ; (33) ; (34) A2. Based on the progress of the current board manufacturing process and expert experience, set the test time threshold of each motherboard to 75 seconds.

[0063] A3. According to step two, count the motherboard test information and the maintenance data of the corresponding faulty motherboards, and calculate the reliability range of the intermediate events. The results are shown in Table 7: Table 7: Reliability range of the function test module

[0064] A4. Within the reliability range of the function test module (i.e., the intermediate event) in Table 7, solve the optimization problem in A1 (formulas (32) to (34)) 200 times, count the frequency of each strategy, and according to expert experience, set in formula (23) to 95%, and use formula (23) to screen alternative test strategies.

[0065] A5. In the training set, calculate the three evaluation indicators of the alternative test strategies in A4 according to formulas (29) to (31), compare the average test total cost index values of each alternative strategy, and select the test strategy with the lowest average test total cost index value as the best test strategy; A6. According to expert experience, set in formula (31) to 0.5h, and set

[0066] A7. Based on the evaluation metrics described in (29) to (31), the performance metrics of four test strategy design methods were calculated respectively: 1) the test strategy design method based on fault tree analysis (existing method); 2) the test strategy design method based on budget maximum coverage (existing method); 3) the test strategy design method that minimizes the total test cost (existing method); 4) the optimization method based on the best test strategy in this embodiment. Table 6 details the comparison of the key metric values such as fault coverage rate, average test time, and average total test cost for each method. Through data analysis, it can be clearly seen that the method proposed in this embodiment exhibits stronger generalization ability and provides a more effective technical solution for solving the test strategy optimization problem in flexible manufacturing.

[0067] In this embodiment, a cross-domain overall optimization system for human-machine collaborative function testing is proposed, including a reliability analysis module, a correlation relationship module, a reliability correction module, and a two-stage optimization solution module; The reliability analysis module is used to determine the relationship between the fault coverage rate and the inherent reliability of the system by performing reliability analysis on the main board function test process; The correlation relationship module is used to establish a fault tree by analyzing the main board schematic diagram, extract component reliability information from the historical maintenance dataset, and determine the reliability range of the bottom events in the fault tree by combining the reliability interval estimation method guided by expert knowledge, so as to determine the reliability range of all function test modules, and thus obtain the correlation relationship between the function test modules; The reliability correction module is used to correct the formula for calculating the inherent reliability of the system based on the impact of the concurrent faults of function test modules containing the same bottom event on the inherent reliability of the system in fault tree analysis; The two-stage optimization solution module is used to solve the optimization model for the function test process. The optimization solution goal in the first stage is to maximize the inherent reliability of the system while satisfying the test time constraint, and the optimization solution goal in the second stage is to minimize the average total test cost.

[0068] In this embodiment, a computer device is proposed, which includes a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the optimization method described above is implemented. The computer device includes, but is not limited to: digital computers (such as desktop computers, server clusters) and mobile terminal devices (such as smart phones, wearable smart devices). The core architecture of the device includes: a computing unit (including, but not limited to, CPU, GPU, and AI acceleration chips), a storage system (ROM, RAM, and other non-volatile memories), and a system bus architecture. The device realizes human-computer interaction and data communication through an input subsystem (input devices such as keyboards, touch screens), an output subsystem (display unit, audio output device), a storage subsystem (storage media such as solid-state drives, mechanical hard drives), and a communication subsystem (wired network interface, wireless communication module). The device realizes data exchange through communication networks such as the Internet. During operation, the computing unit drives the device to run by executing program instructions stored in ROM or RAM.

[0069] In this embodiment, a computer-readable storage medium is proposed, characterized in that a number of classification programs are stored on the computer-readable storage medium, and the number of classification programs are used to be called by a processor and execute the optimization method described above. The programs can be loaded into the device entirely or partially through ROM or the communication subsystem. When the programs are loaded into RAM and executed by the computing unit, one or more processing steps of the foregoing method can be realized.

[0070] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0071] As mentioned above, only the preferred specific embodiments of the present invention are described, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, makes equivalent substitutions or changes, and should be covered by the protection scope of the present invention.

Claims

1. Cross - domain overall optimization method for human - machine collaborative function testing, characterized in that including: By performing reliability analysis on the main board function test process, determine the relationship between the fault coverage rate and the inherent reliability of the system; Establish a fault tree by analyzing the main board schematic diagram, extract component reliability information from the historical maintenance dataset, and determine the reliability range of the bottom events in the fault tree by combining the reliability interval estimation method guided by expert knowledge. Based on this, determine the reliability range of all function test modules, thereby obtaining the association relationship between the function test modules; Based on the analysis of the impact of concurrent failures of function test modules containing the same bottom events on the inherent reliability of the system in the fault tree analysis, modify the formula for calculating the inherent reliability of the system accordingly; Construct an optimization model for the function test process, and propose a two-stage optimization solution method considering reliability uncertainty. The goal of the first stage is to maximize the inherent reliability of the system while satisfying the test time constraint, and the goal of the second stage is to minimize the average total test cost.

2. The cross-domain overall optimization method for human-machine collaborative function testing according to claim 1, wherein In the reliability analysis of the main board function test process, the test strategy of the main board function test process divides the test items into two categories: tested items and untested items; The unreliability of the main board function test process only comes from the subsystem composed of untested items, and the inherent reliability of the system is calculated as follows: ； Wherein, is the total number of functional test modules included in the test strategy , is the functional test module index is the test strategy in the th functional test module indicating that the test start signal of the th functional test module is not activated.

3. The cross-domain overall optimization method for human-machine collaborative function testing according to claim 1, wherein In the fault tree, regard the main board failure as the top event, regard the function test module failure as the intermediate event, and regard the underlying cause of the function test module failure as the bottom event of the fault tree.

4. The cross-domain overall optimization method for human-machine collaborative function testing according to claim 3, characterized in that The reliability range of the bottom events in the fault tree is determined by the reliability interval estimation method guided by expert knowledge, and based on this, the reliability range of all function test modules is determined. Specifically: Divide the samples in the historical maintenance dataset into groups, and calculate the reliability of all basic events in each group; Based on the reliability calculation results in each group, calculate the reliability mean and standard deviation of each bottom event, and based on this, obtain the reliability range of each bottom event; Based on the fact that each intermediate event in the fault tree is connected to the relevant bottom events through an OR gate, use the reliability range of the bottom events to calculate the reliability range of the intermediate events, thereby obtaining the reliability range of all function test modules.

5. The cross-domain overall optimization method for human-machine collaborative function testing according to claim 1, characterized in that The constructed optimization model is: Objective function: ； Constraint conditions: ； Among them, is the test strategy for the main board function test, is the th function test module whose test start signal has been activated, represents the inherent reliability of the system, is the main board function test process including the total number of function test modules, is the function test module index, indicating the th function test module's average test time, represents the test time threshold for each product.

6. The cross-domain overall optimization method for human-machine collaborative function testing according to claim 1, wherein In the first stage of the two-stage optimization solution method; Set the optimization goal of the first stage; Randomly generate within the reliability range of all functional test modules groups of reliability value combinations, and solve the optimization problem for each combination to obtain test strategies; Since different rounds of optimization may generate the same test strategy, the test strategies obtained by rounds of optimization are ; Select the test strategy with a generation frequency greater than the strategy setting threshold as the alternative test strategy.

7. The cross-domain overall optimization method for human-machine collaborative function testing according to claim 6, characterized in that In the two-stage optimization solution method, the second-stage optimization solution is specifically: A comprehensive evaluation index for testing strategy optimization is introduced to select the best test strategy from alternative test strategies : ； Among them, represents the test strategy The average total test cost value on the training set, is the set of alternative test strategies.

8. Human-machine collaborative function test cross-domain overall optimization system, characterized in that, including a reliability analysis module, an association relationship module, a reliability correction module, and a two-stage optimization solution module; The reliability analysis module is used to determine the relationship between the fault coverage rate and the inherent reliability of the system by performing reliability analysis on the main board function test process; The association relationship module is used to establish a fault tree by analyzing the main board schematic diagram, extract component reliability information from the historical maintenance dataset, and determine the reliability range of the bottom events in the fault tree by combining the reliability interval estimation method guided by expert knowledge. Based on this, determine the reliability range of all function test modules, thereby obtaining the association relationship between the function test modules; The reliability correction module is used to modify the formula for calculating the inherent reliability of the system based on the analysis of the impact of concurrent failures of function test modules containing the same bottom events on the inherent reliability of the system in the fault tree analysis; The two-stage optimization and solution module is used to solve the optimization model for the functional test process. The optimization and solution objective in the first stage is to maximize the inherent reliability of the system while satisfying the test time constraint, and the optimization and solution objective in the second stage is to minimize the average total test cost.

9. A computer device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the optimization method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, A number of classification programs are stored on the computer-readable storage medium, and the number of classification programs is used to be called by the processor and execute the optimization method as described in any one of claims 1 to 7.

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