Display panel and display device

Abstract

According to the display panel and the display device, the display panel comprises a pixel circuit, the pixel circuit comprises a light-emitting control transistor and a driving transistor, a grid electrode of the light-emitting control transistor is electrically connected with a light-emitting control signal line, and a first electrode of the light-emitting control transistor is electrically connected with a first node. The first light-emitting device and the second light-emitting device are different in color. In the working process of the pixel circuit, the first node comprises a first coupling capacitor, and the first sub-coupling capacitor is a coupling capacitor between the first node and the light-emitting control signal line. According to the embodiment of the invention, the first sub-coupling capacitance in the first pixel circuit is set to be smaller than the first sub-coupling capacitance in the second pixel circuit, and the first sub-coupling capacitance in the first light-emitting device and the first sub-coupling capacitance in the second light-emitting device are differentiated. The difference between the fluctuation degree generated by the light-emitting driving current generated by the first pixel circuit and the fluctuation degree generated by the light-emitting driving current generated by the second pixel circuit is reduced, and the display uniformity of the display panel is improved.

Description

Technical Field

[0001] This application relates to the field of display technologies, and particularly to a display panel and a display device. Background Art

[0002] A pixel circuit can be used to drive a light-emitting device in a display panel to emit light. The light-emitting driving current generated by the pixel circuit is output to the light-emitting device through a transistor. However, during the operation of the pixel circuit, multiple nodes therein will generate coupling, which affects the accuracy of the light-emitting driving current output by the pixel circuit, thereby affecting the light-emitting accuracy of the light-emitting device. Moreover, the magnitudes of the light-emitting driving currents required by light-emitting devices of different colors are different, so the couplings generated are also different, resulting in a large difference in the fluctuation degrees of the light-emitting driving currents between light-emitting devices of different colors, which is not conducive to the uniform display of the display panel. Summary of the Invention

[0003] In view of this, this application provides a display panel and a display device to facilitate solving the above problems.

[0004] In a first aspect, an embodiment of this application provides a display panel, including: a pixel circuit, the pixel circuit includes a light-emitting control transistor and a driving transistor, the driving transistor is used to generate a light-emitting driving current, the light-emitting control transistor is electrically connected to the driving transistor and is used to control the light-emitting driving current to be output to the light-emitting device; the gate of the light-emitting control transistor is electrically connected to a light-emitting control signal line, and the first pole is electrically connected to a first node; a light-emitting device, at least including a first light-emitting device and a second light-emitting device with different colors; the pixel circuit at least includes a first pixel circuit and a second pixel circuit, the first pixel circuit is electrically connected to the first light-emitting device, and the second pixel circuit is electrically connected to the second light-emitting device; During the operation of the pixel circuit, a first coupling capacitor is included at the first node; the first coupling capacitor includes a first sub-coupling capacitor, and the first sub-coupling capacitor is a coupling capacitor between the first node and the light-emitting control signal line; wherein, the first sub-coupling capacitor in the first pixel circuit is smaller than the first sub-coupling capacitor in the second pixel circuit.

[0005] In a second aspect, an embodiment of this application provides a display device, including the display panel provided in the first aspect.

[0006] In the embodiment of this application, the first sub-coupling capacitors in the first light-emitting device and the second light-emitting device are differentiated, the coupling degree between the first node and the light-emitting control signal line in the first pixel circuit is reduced, thereby reducing the difference in the fluctuation degrees of the light-emitting driving current generated by the first pixel circuit and the light-emitting driving current generated by the second pixel circuit, thereby improving the light-emitting uniformity of the first light-emitting device and the second light-emitting device, and improving the display uniformity of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the accompanying drawings required for the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0008] Figure 1 A plan view of a display panel provided by an embodiment of the present application; Figure 2 A plan view of a pixel circuit provided by an embodiment of the present application; Figure 3 A layout diagram of a pixel circuit in the related art provided by an embodiment of the present application; Figure 4 A layout diagram of a pixel circuit provided by an embodiment of the present application; Figure 5 A provided by an embodiment of the present application Figure 4 Cross-sectional view along the A-A' direction; Figure 6 Another layout diagram of a pixel circuit provided by an embodiment of the present application; Figure 7 Another layout diagram of a pixel circuit provided by an embodiment of the present application; Figure 8 Another layout diagram of a pixel circuit provided by an embodiment of the present application; Figure 9 Another provided by an embodiment of the present application Figure 7 Cross-sectional view along the B-B' direction; Figure 10 Another layout diagram of a pixel circuit provided by an embodiment of the present application; Figure 11 Another layout diagram of a pixel circuit provided by an embodiment of the present application; Figure 12 Another layout diagram of a pixel circuit provided by an embodiment of the present application; Figure 13 Another layout diagram of a pixel circuit provided by an embodiment of the present application; Figure 14 A schematic diagram of a display device provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0009] In order to better understand the technical solutions of the present application, the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0010] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0011] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "an", and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0012] It should be understood that the term "and / or" used herein is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0013] In the description of this specification, it should be understood that the words such as "substantially", "approximately", "about", "around", "roughly", and "substantially" described in the claims and embodiments of the present application refer to values that can be generally recognized within a reasonable process operation range or tolerance range, rather than an exact value.

[0014] It should be understood that although terms such as first and second may be used in the embodiments of the present application to describe pixel circuits, light-emitting devices, coupling capacitors, etc., these should not be limited to these terms. These terms are only used to distinguish pixel circuits, light-emitting devices, coupling capacitors, etc. from each other. For example, without departing from the scope of the embodiments of the present application, the first pixel circuit may also be referred to as the second pixel circuit, and similarly, the second pixel circuit may also be referred to as the first pixel circuit. Through careful and in-depth research, the applicant of this case provides a solution to the problems existing in the prior art.

[0015] Figure 1 A schematic plan view of a display panel provided for an embodiment of the present application Figure 2 A schematic plan view of a pixel circuit provided for an embodiment of the present application Figure 3 A layout schematic diagram of a pixel circuit in the related art provided for an embodiment of the present application.

[0016] The embodiments of the present application provide a display panel 100, as Figure 1 shown, the display panel 100 includes a pixel circuit 10. Combining Figure 2As shown, the pixel circuit 10 includes a light-emitting control transistor 101 and a driving transistor Md. The driving transistor 101 is used to generate a light-emitting driving current I. The light-emitting control transistor 101 is electrically connected to the driving transistor Md and is used to control the output of the light-emitting driving current I to the light-emitting device 20. The gate of the light-emitting control transistor 101 is electrically connected to the light-emitting control signal line EMIT, and the first pole is electrically connected to the first node N1.

[0017] It should be noted that in an embodiment of the present application, with continued reference to Figure 2 As shown, the light-emitting control transistor 101 in the pixel circuit 10 includes a first light-emitting control transistor 101A. The first pole of the first light-emitting control transistor 101A is electrically connected to the driving transistor Md, and the second pole is electrically connected to the first power supply voltage PVDD. The light-emitting device 20 is electrically connected to the second power supply voltage PVEE. The first light-emitting control transistor 101A is used to transfer the first power supply voltage PVDD to the driving transistor Md, so that the driving transistor Md generates a light-emitting driving current I. When a path is formed between the first power supply voltage PVDD and the second power supply voltage PVEE to which the first light-emitting control transistor 101A is electrically connected, the driving transistor Md can generate a light-emitting driving current I.

[0018] The first node N1 here is located between the first pole of the first light-emitting control transistor 101A and the driving transistor Md, which has a certain impact on the stability of the light-emitting driving current I. The magnitude of the light-emitting driving current I is related to the driving transistor Md and the magnitude of the first power supply voltage PVDD received by the first pole of the driving transistor Md. The gate of the first light-emitting control transistor Md is electrically connected to the light-emitting control signal line EMIT. When the signal transmitted by the light-emitting control signal line EMIT jumps high, a coupling effect is formed with the first node N1, resulting in a deviation in the potential of the first pole of the driving transistor Md, thereby affecting the light-emitting driving current I generated by the driving transistor Md and causing fluctuations in the light-emitting driving current I.

[0019] In an embodiment of the present application, taking the light-emitting control transistor 101 as the first light-emitting control transistor 101A and taking the first node N1 as the node between the first light-emitting control transistor 101A and the driving transistor Md as an example for illustration.

[0020] In the pixel circuit 10, when the light-emitting control signal line EMIT transmits an enable signal to the light-emitting control transistor 101, the light-emitting control transistor 101 is turned on. At this time, the path between the first power supply voltage PVDD and the second power supply voltage PVEE in the pixel circuit 10 is turned on, and the light-emitting driving current I can be output to the light-emitting device 20, causing the light-emitting device 20 to emit light. In combination with Figure 3As shown, in the preparation of the pixel circuit 10, it includes multiple traces distributed in different film layers along different directions. For example, the light emission control signal line EMIT and the active layers of the transistors in the pixel circuit 10 are in different film layers. The first node N1 is located on the path between the first power supply voltage PVDD and the second power supply voltage PVEE in the pixel circuit 10. The stable state at the first node N1 is of great significance for ensuring the accuracy of the output of the light emission driving current.

[0021] However, in the related art, in combination with Figure 3 As shown, there are a large number of traces overlapping, adjacent, etc. with the first node N1. When the electrical signals transmitted by the traces at the adjacent position of the first node N1 generate a jump, it is more likely to generate coupling with the first node N1. In the embodiment of the present application, the first node N1 is electrically connected to the first pole of the light emission control transistor 101. Then, the positions at the first node N1 can be equivalent to the positions electrically connected to the first pole of the light emission control transistor 101. Continuing to refer to Figure 3 As shown, there are multiple positions where coupling capacitors are generated by coupling with the first node N1, such as the coupling effect between the scan control signal line S1 and the first node N1, the coupling effect between the light emission control signal line EMIT and the first node N1, etc. However, through research by the inventors of the embodiment of the present application, it is found that during the light emission stage, when the driving transistor Md generates the light emission driving current I, in order to transmit the light emission driving current I to the light emitting device 20, the light emission control signal line EMIT transmits an enable signal to turn on the light emission control transistor 101 to transmit the light emission driving current I. When the light emission control signal line EMIT transmits the enable signal, a level jump will occur. Here, an example is given where the enable signal of the light emission control signal line EMIT is a high-level signal. The electrical signal transmitted by the light emission control signal line EMIT undergoes a jump, and at this time, the light emission driving current I is also transmitted on the path where the first node N1 is located. At this time, the coupling capacitor generated by the coupling between the light emission control signal line EMIT and the first node N1 has a certain impact on the potential of the first node N1, resulting in an error in the light emission driving current I transmitted on the path where the first node N1 is located, thereby reducing the accuracy of the light emission driving current I received by the light emitting device 20 and affecting the light emission effect of the light emitting device 20.

[0022] From the above content, it can be seen that in the pixel circuit 10, the coupling between the light emission control signal line EMIT and the first node N1 has a greater impact on the accuracy of the light emission driving current I. Therefore, in the embodiment of the present application, the key point of solution can be placed on the coupling problem between the light emission control signal line EMIT and the first node N1. Of course, in some other embodiments, the scheme for reducing the coupling impact proposed in the embodiment of the present application is also applicable to other positions. For example, the coupling impact between the light emitting device 20 and the power supply voltage signal line PVDD.

[0023] In the pixel circuit 10 proposed in the embodiment of the present application, the first node N1 on the channels of the first power supply voltage PVDD and the second power supply voltage PVEE may be The display panel 100 further includes a light-emitting device 20, at least including a first light-emitting device 20A and a second light-emitting device 20B with different colors. The pixel circuit 10 at least includes a first pixel circuit 10A and a second pixel circuit 10B. The first pixel circuit 10A is electrically connected to the first light-emitting device 20A, and the second pixel circuit 10B is electrically connected to the second light-emitting device 20B. Here, the first light-emitting device 20A and the second light-emitting device 20B are light-emitting devices 20 with different light-emitting colors. The first pixel circuit 10A provides a light-emitting driving current I for the first light-emitting device 20A. The second pixel circuit 10B provides a light-emitting driving current I for the second light-emitting device 20B. In the embodiment of the present application, the circuit structures of the first pixel circuit 10A and the second pixel circuit 10B can both refer to Figure 2 the schematic diagram of the pixel circuit 10 shown as an example for description. That is, there is a coupling capacitance between the first node N1 of the first pixel circuit 10A and the light-emitting control signal line EMIT, and there is also a coupling capacitance between the first node N1 of the second pixel circuit 10B and the light-emitting control signal line EMIT.

[0024] In the embodiment of the present application, the display panel 100 including the light-emitting device 20 emitting red light, blue light, and green light is taken as an example for description. Since the light-emitting efficiencies of light-emitting devices 20 of different colors are different, in order to achieve the corresponding gray-scale brightness, the light-emitting driving currents I provided by the pixel circuit 10 to light-emitting devices 20 of different colors are also different. At this time, the coupling degrees between the first node N1 at different pixel circuits 10 and the light-emitting control signal line EMIT are different, resulting in different coupling capacitances, and the fluctuation degrees of the light-emitting driving current I are different. This easily causes the problem of uneven light-emitting effect of the display panel 100.

[0025] It is found that, especially in the pixel circuit 10 that provides the light-emitting driving current I to the blue light-emitting device 20, since the light-emitting efficiency of the blue light-emitting device 20 is relatively low, the light-emitting driving current I provided to the blue light-emitting device 20 is usually relatively large. Then, the coupling capacitance generated between the first node N1 and the light-emitting control signal line EMIT is larger than that generated between the N1 node of the pixel circuit 10 electrically connected to the red light-emitting device 20 and the light-emitting control signal line EMIT of the pixel circuit 10 electrically connected to the green light-emitting device 20, resulting in a larger fluctuation of the light-emitting driving current I received by the blue light-emitting device 20.

[0026] It can be understood that the fluctuation degrees of the light-emitting driving currents I received by the first light-emitting device 20A and the second light-emitting device 20B in the display panel 100 are different, resulting in poor light-emitting uniformity of the first light-emitting device 20A and the second light-emitting device 20B. To reduce the coupling difference between different light-emitting devices 20, the embodiments of the present application provide the following solutions: During the operation of the pixel circuit 10, a first coupling capacitor C1 is included at the first node N1, and the first coupling capacitor C1 is the total coupling capacitor generated at the first node N1. The first coupling capacitor C1 includes a first sub-coupling capacitor C11, and the first sub-coupling capacitor C11 is the coupling capacitor between the first node N1 and the light-emitting control signal line EMIT. Combining the above content, it can be seen that the first sub-coupling capacitor C11 has a greater influence on the light-emitting driving current I. In the embodiments of the present application, taking the example that the fluctuation degree of the light-emitting driving current I received by the first light-emitting device 20A due to the first sub-coupling capacitor C11 is greater than the fluctuation degree of the light-emitting driving current I received by the second light-emitting device 20B due to the first sub-coupling capacitor C11, the first sub-coupling capacitor C11 in the first pixel circuit 10A is set to be smaller than the first sub-coupling capacitor C11 in the second pixel circuit 10B. Thus, the first sub-coupling capacitor C11 generated by coupling in the first pixel circuit 10A is reduced, the influence degree of the first sub-coupling capacitor C11 on the light-emitting driving current I can be reduced, and further the fluctuation degree of the light-emitting driving current I received by the first light-emitting device 20A can be reduced, improving the light-emitting stability of the first light-emitting device 20A.

[0027] It should be additionally noted that, taking the first light-emitting device 20A as a blue light-emitting device and the second light-emitting device 20B as a red or green light-emitting device as an example. Experimental research shows that when the first sub-coupling capacitor C11 of the first pixel circuit 10A is made smaller than the first sub-coupling capacitor of the second pixel circuit 10B, the fluctuation degree of the light-emitting driving current I received by the first light-emitting device 20A is reduced compared with the fluctuation degree of the light-emitting driving current I received by the second light-emitting device 20B, improving the display uniformity of the display panel 100. Therefore, although the first sub-coupling capacitor C11 of the first pixel circuit 10A is set to be smaller than the first sub-coupling capacitor C11 of the second pixel circuit 10B, it will not further deteriorate to cause a greater fluctuation difference in the light-emitting driving current I.

[0028] In the embodiments of the present application, the first sub-coupling capacitor C11 in the first light-emitting device 20A and the second light-emitting device 20B is differentiated to reduce the coupling degree between the first node N1 in the first pixel circuit 10A and the light-emitting control signal line EMIT, thereby reducing the difference in the fluctuation degree of the light-emitting driving current I generated by the first pixel circuit 10A and the fluctuation degree of the light-emitting driving current I generated by the second pixel circuit 10B, and thus improving the light-emitting uniformity of the first light-emitting device 20A and the second light-emitting device 20B and improving the display uniformity of the display panel 100.

[0029] It should be noted that Figure 2 In the pixel circuit shown, when the enable signal is output on the SP scan line, the transistor T1 is turned on to transmit the data signal Vdata to the driving transistor Md; when the enable signal is output on the SPX scan line, the transistor T2 transmits the compensation data signal DVH to the driving transistor, and the transistor T3 transmits the second reset voltage Vref2 to the first pole of the light-emitting device 20; when the enable signal is transmitted on the S1N scan line, the transistor T4 transmits the first reset voltage to the gate of the driving transistor Md; when the enable signal is transmitted on the S2N scan line, the transistor T5 compensates the threshold voltage of the driving transistor Md to the gate of the driving transistor Md; when the enable signal is transmitted on the light-emitting control signal line EMIT, the first light-emitting control transistor 101A is turned on to output the first power supply voltage PVDD to the driving transistor, and the second light-emitting control transistor 101B outputs the light-emitting driving current I to the light-emitting device 20. Combining Figure 3 As shown, the position where the active layer poly overlaps with the signal line electrically connected to the gate of the transistor is the position where the transistor is located Figure 3 In [reference], a plurality of pixel circuits 10 arranged in parallel are shown.

[0030] Figure 3 In the layout schematic diagram of the pixel circuit in the related technology shown in [reference], the structures shown in the figure are all fabricated on the basis of the substrate. Among them, the film layer where the light-shielding layer 40 is located is on one side of the substrate; the active layer poly is on the side of the light-shielding layer 40 away from the substrate; the film layers where the SPX scan line, the SP scan line, and the light-emitting control signal line EMIT are located are all fabricated on the first metal layer 50, and the first metal layer 50 is on the side of the active layer poly away from the substrate; the film layer where one of the plates of the S1N scan line, the S2N scan line, and the storage capacitor C2 can be fabricated on the capacitor layer 60, and the capacitor layer 60 is on the side of the first metal layer 50 away from the substrate; the signal line for transmitting the data signal Vdata can be fabricated on the second metal layer 70, and the second metal layer 70 is on the side of the capacitor layer 60 away from the substrate.

[0031] In an embodiment of the present application, the light-emitting color of the first light-emitting device 20A is blue. Combining the above content, it is beneficial to reduce the difference in the fluctuation degree of the light-emitting driving current I received by the blue light-emitting device 20 and the light-emitting driving current I received by the light-emitting devices 20 of other colors, and improve the display uniformity of the display panel 100.

[0032] In an embodiment of the present application, the ratio of the first sub-coupling capacitor C11 to the first coupling capacitor C1 in the first pixel circuit 10A is N1; the ratio of the first sub-coupling capacitor C11 to the first coupling capacitor C1 in the second pixel circuit 10B is N2.

[0033] In the embodiment of the present application, N1 < N2 is set. That is to say, in the first pixel circuit 10A, the coupling capacitance caused by the light emission control signal line EMIT to the first node N1 accounts for a relatively small proportion of the total coupling capacitance at the first node N1, indicating that the coupling influence of the light emission control signal line EMIT on the first node N1 is reduced.

[0034] Exemplarily, when reducing the ratio of the first sub-coupling capacitance C11 to the first capacitance C1 in the first pixel circuit 10A of the embodiment of the present application so that N1 < N2 to improve the uniformity of the display panel 100. Taking the first light-emitting device 20A as a blue light-emitting device and the second light-emitting device 20B as a red or green light-emitting device as an example, several experiments were conducted by relevant technical personnel of the present application. To compare the effects of adjusting the ratios of different first sub-coupling capacitances C11 to the first coupling capacitance C1 on improving the uniformity of the display panel 100, the following were set: (1) The first sub-coupling capacitances C11 of the pixel circuits 10 to which the red light-emitting device, the green light-emitting device, and the blue light-emitting device are electrically connected respectively account for 2.73% of the first capacitance C1; (2) The first sub-coupling capacitance C11 of the pixel circuits 10 to which the red light-emitting device and the green light-emitting device are electrically connected accounts for 2.73% of the first capacitance C1, while the first sub-coupling capacitance C11 of the pixel circuit 10 to which the blue light-emitting device is electrically connected accounts for 7.56% of the first capacitance C1; (3) The first sub-coupling capacitance C11 of the pixel circuits 10 to which the red light-emitting device and the green light-emitting device are electrically connected accounts for 7.56% of the first capacitance C1, while the first sub-coupling capacitance C11 of the pixel single circuit 10 to which the blue light-emitting device is electrically connected accounts for 2.73% of the first coupling capacitance C1; (4) The first sub-coupling capacitances C11 of the pixel circuits 10 to which the red light-emitting device, the green light-emitting device, and the blue light-emitting device are electrically connected respectively account for 7.56% of the first capacitance C1. Through the above experiments (1)-(4), it is concluded that in terms of improving the uniformity of the display panel 100 by reducing the ratio of the first sub-coupling capacitance C11, the effects are ranked as (3) > (1) > (4) > (2). That is to say, setting the ratio of the first sub-coupling capacitance C11 to the first coupling capacitance C1 of the blue light-emitting device, that is, the first light-emitting device 10A, to be less than that of the red light-emitting device or the green light-emitting device, that is, the second light-emitting device 10B, has a significant effect on reducing the fluctuation difference between the light emission driving current I generated by the first pixel circuit 10A and the light emission driving current I generated by the second pixel circuit 10B, and thus has a significant effect on improving the display uniformity of the display panel 100.

[0035] In one embodiment of the present application, the first coupling capacitor C1 in the first pixel circuit 10A further includes a second sub-coupling capacitor C12, and the first coupling capacitor C1 in the second pixel circuit 10B does not include the second sub-coupling capacitor C12. The first coupling capacitor C1 in the first pixel circuit 10A is larger than the first coupling capacitor C1 in the second pixel circuit 10B.

[0036] As described in the above embodiment, reducing the ratio of the first sub-coupling capacitor C11 to the first coupling capacitor C1 in the first pixel circuit 10A is beneficial to improving the uniformity of the display panel 100. Then, the second sub-coupling capacitor C12 that also has a coupling effect with the first node N1 is added in the first pixel circuit 10A in the embodiment of the present application, thereby increasing the total coupling capacitor at the first node N1 in the first pixel circuit 10A, that is, the first coupling capacitor C1. This is beneficial to reducing the proportion of the first sub-coupling capacitor C11 in the first coupling capacitor in the first pixel circuit 10A.

[0037] Figure 4 It is a layout schematic diagram of a pixel circuit provided by an embodiment of the present application. Figure 5 It is a kind provided by an embodiment of the present application Figure 4 The cross-sectional schematic diagram along the A-A' direction.

[0038] In one embodiment of the present application, in combination with Figure 2 、 Figures 4 - 5 As shown, Figure 4 As shown, it is a comparison schematic diagram of a first pixel circuit 10A and a second pixel circuit 10B selected in the display panel 100. The display panel 100 includes a substrate 30, and the pixel circuit 10 is located on one side of the substrate 30. A first supplementary electrode plate 102 is included between the light-emitting control transistor 101 and the substrate 10 in the first pixel circuit 10A. The second sub-coupling capacitor C12 in the first pixel circuit 10A is the coupling capacitor between the first node N1 and the first supplementary electrode plate 102. As Figure 4 As shown, the signal line part electrically connected to the first node N1 can all be regarded as the first node N1, such as the active layer poly part at the light-emitting control transistor 101 electrically connected to the first node N1.

[0039] In an embodiment of the present application, a first supplementary electrode plate 102 is provided between the active layer of the light-emitting control transistor 101 and the substrate 10, so as to add a second sub-coupling capacitor C12 in the first pixel circuit 10A. It should be noted that the first supplementary electrode plate 102 is electrically connected to a signal, which can be a fixed power supply signal, etc. In a direction perpendicular to the plane where the display panel 100 is located, the first supplementary electrode plate 102 overlaps with the first node N1, and the second sub-coupling capacitor C12 is formed by coupling between the first supplementary electrode plate 102 and the first node N1. Thereby, the first coupling capacitor C1 in the first pixel circuit 10A is increased, so that without adjusting the first sub-coupling capacitor C11, the ratio N1 of the first sub-coupling capacitor C11 to the first coupling capacitor C1 in the first pixel circuit 10A is reduced, thereby realizing N1 < N2, and achieving the effect of improving the display uniformity of the display panel 100.

[0040] In an embodiment of the present application, continue to refer to Figure 4 , Figure 5 As shown, the display panel 100 further includes a light-shielding layer 40, and the light-shielding layer 40 is located between the film layer where the light-emitting control transistor 101 is located and the substrate 30, and at least partially overlaps with the light-emitting control transistor 101. The light-shielding layer 40 overlaps with the active layer at the light-emitting control transistor 101, which can prevent other light from entering from the side of the light-emitting control transistor 101 facing the substrate 30, thereby ensuring the stable performance of the light-emitting control transistor 101.

[0041] Figure 6 This is a layout schematic diagram of another pixel circuit provided by an embodiment of the present application.

[0042] In an embodiment of the present application, the light-shielding layer 40 is set to be reused as the first supplementary electrode plate 102, and the first supplementary electrode plate 102 is also located between the light-emitting control transistor 101 and the substrate 30, which is beneficial to forming the second sub-coupling capacitor C12 between the light-shielding layer 40 and the first node N1, beneficial to reducing the process preparation process and improving the film layer utilization rate. In addition, as Figure 6 shown, a light-shielding layer 40 may also be included between the light-emitting control transistor 101 and the substrate 30 in the second pixel circuit 10B. Here, the area of the light-shielding layer 40 corresponding to the light-emitting control transistor 101 in the first pixel circuit 10A is set to be larger than the area of the light-shielding layer 40 corresponding to the light-emitting control transistor 101 in the second pixel circuit 10B, and the light-shielding layer 40 between the light-emitting control transistor 101 and the substrate 30 in the first pixel circuit 10A is separated from the light-shielding layer 40 between the light-emitting control transistor 101 and the substrate 30 in the second pixel circuit 10B, which is beneficial to realizing an increase in the second sub-coupling capacitor C12 between the light-shielding layer 40 and the first node N1 in the first pixel circuit 10A, thereby increasing the first coupling capacitor C1 in the first pixel circuit 10A and realizing N1 < N2.

[0043] Figure 7 This is another layout schematic diagram of the pixel circuit provided by the embodiment of the present application. Figure 8 This is another layout schematic diagram of the pixel circuit provided by the embodiment of the present application.

[0044] In an embodiment of the present application, as Figure 7 shown, in a direction perpendicular to the plane where the display panel 100 is located, the first pixel circuit 10A includes a second supplementary electrode plate 103, and the second supplementary electrode plate 103 is located between the first node N1 of the first pixel circuit 10A and the light emission control signal line EMIT.

[0045] There is a coupling effect between the first node N1 and the light emission control signal line EMIT, thereby generating a first sub-coupling capacitor C11. Then, adding the second supplementary electrode plate 103 between the first node N1 and the light emission control signal line EMIT can make the second supplementary electrode plate 103 serve as an isolation layer between the first node N1 and the light emission control signal line EMIT, which is beneficial to reducing the coupling effect between the first node N1 and the light emission control signal line EMIT, and thus reducing the first sub-coupling capacitor C11.

[0046] Optionally, as Figure 7 shown, in a direction perpendicular to the plane where the display panel 100 is located, the display panel 100 is provided with a second supplementary electrode plate 103, and the second supplementary electrode plate 103 is located between the first node N1 in the first pixel circuit 10A and the light emission control signal line EMIT, which is beneficial to isolating the first node N1 and the light emission control signal line EMIT, and reducing the first sub-coupling capacitor C11 generated by the coupling between the first node N1 and the light emission control signal line EMIT. Thereby, it is beneficial to make the first sub-coupling capacitor C11 in the first pixel circuit 10A smaller than the first sub-coupling capacitor C11 in the second pixel circuit 10B, reducing the difference in the fluctuation degree of the light emission driving current I generated by the first pixel circuit 10A and the fluctuation degree of the light emission driving current generated by the second pixel circuit 10B, and improving the display uniformity of the display panel 100.

[0047] Optionally, as Figure 8As shown in the figure, in a direction perpendicular to the plane of the display panel 100, a first pixel circuit 10A in the display panel 100 includes a first supplementary electrode plate 102 and a second supplementary electrode plate 103. The first supplementary electrode plate 102 can be used to add a second sub-coupling capacitor C12 to the first pixel circuit 10A, and the ratio between the first sub-coupling capacitor C11 and the first coupling capacitor C1 at the first node N1 can be reduced. And the second supplementary electrode plate 103 can be used to reduce the coupling effect between the first node N1 and the light-emitting control signal line EMIT, thereby reducing the first sub-coupling capacitor C11. Generally speaking, setting the first supplementary electrode plate 102 and the second supplementary electrode plate 103 in the first pixel circuit 10A is beneficial to further reduce the influence of the fluctuation of the first sub-coupling capacitor C11 on the light-emitting driving current I in the first pixel circuit 10A, and further reduce the difference in the fluctuation degree of the light-emitting driving current I generated by the first pixel circuit 10A and the fluctuation degree of the light-emitting driving current generated by the second pixel circuit 10B, and improve the display uniformity of the display panel 100.

[0048] Figure 9 Another provided by the embodiment of the present application Figure 7 Cross-sectional schematic diagram along the B-B' direction.

[0049] In an embodiment of the present application, continue to refer to Figures 7 - 9 As shown in the figure, the display panel 100 includes a substrate 30, an active layer poly, a first metal layer 50, a capacitor layer 60, and a second metal layer 70. The active layer poly is located on one side of the substrate 30 and is used to prepare the active part of the transistor, such as the active part of the light-emitting control transistor 101. The first metal layer 50 is located on the side of the active layer poly away from the substrate 30 and can be used to prepare the gate of the transistor and the light-emitting control signal line EMIT. The capacitor layer 60 is located on the side of the first metal layer 50 away from the substrate 30 and can be used to prepare capacitor electrode plates. Combined with Figure 2 As shown in the figure, the capacitor electrode plates included in the storage capacitor C2 in the pixel circuit 10 can be prepared in the capacitor layer 60. The second metal layer 70 is located on the side of the capacitor layer 60 away from the substrate 30 and can be used to prepare data signal lines Ld. The data signal lines can be used to transmit data signals Vdata.

[0050] In the pixel circuit 10, when the transistor T2 is turned on, the data signal line Ld can be electrically connected to the first node N1 through the transistor T2 to transmit the data signal Vdata to the driving transistor Md. It can be understood that the part where the data signal line Ld is electrically connected to the first node N1 can also be regarded as the first node N1. Then, in the first pixel circuit 10A, the part of the second metal layer 70 including the first node N1 and the first metal layer 50 include the light-emitting control signal line EMIT.

[0051] In an embodiment of the present application, the second supplementary electrode plate 103 can be arranged between the second metal layer 70 and the first metal layer 50, so as to shield the first node N1 and the light emission control signal line EMIT, and reduce the first sub-coupling capacitance C11. Moreover, the capacitor layer 60 is located between the first metal layer 50 and the second metal layer 70. Optionally, the second supplementary electrode plate 103 is arranged in the capacitor layer 60, which is beneficial to avoiding the extra preparation of film layers and improving the utilization rate of film layers.

[0052] In an embodiment of the present application, continue to combine Figure 7 、 Figure 9 As shown, the pixel circuit 10 further includes a storage capacitor C2, and the storage capacitor C2 is electrically connected to the gate of the driving transistor Md. One electrode plate of the storage capacitor C2 is located in the capacitor layer 60, and the other electrode plate is multiplexed as the gate of the driving transistor Md.

[0053] In an embodiment of the present application, the electrode plate of the storage capacitor C2 arranged in the first pixel circuit 10A and located in the capacitor layer 60 is multiplexed as the second supplementary electrode plate 103, which is beneficial to using the electrode plate of the storage capacitor C2 to apply a shielding effect on the light emission control signal line EMIT in the first metal layer 70 and a part of the first node N1 located in the second metal layer 70. Moreover, the area of the electrode plate of the storage capacitor C2 arranged in the capacitor layer 60 in the first pixel circuit 10A can be set to be larger than that of the electrode plate of the storage capacitor C2 arranged in the capacitor layer 60 in the second pixel circuit 10B, which is beneficial to ensuring that the second supplementary electrode plate 103 obtained by using the storage capacitor C2 effectively reduces the coupling effect between the first node N1 and the light emission control signal line EMIT.

[0054] Figure 10 It is a layout schematic diagram of another pixel circuit provided by an embodiment of the present application.

[0055] In an embodiment of the present application, as Figure 10 shown, in the direction perpendicular to the plane of the display panel 100, the overlapping area between the first node N1 and the light emission control signal line EMIT in the first pixel circuit 10A is smaller than the overlapping area between the first node N1 and the light emission control signal line EMIT in the second pixel circuit 10B, which is beneficial to reducing the coupling capacitance between the first node N1 and the light emission control signal line EMIT. Regarding the first node N1 and the light emission control signal line EMIT as the two electrode plates of the first sub-coupling capacitance C11, when other parameters remain unchanged, the smaller the overlapping area between the two electrode plates, the smaller the first sub-coupling capacitance C11 generated between the first node N1 and the light emission control signal line EMIT.

[0056] Exemplarily, as Figure 10As shown, the overlapping portion of the light emission control signal line EMIT and the first node N1 is located in the active portion of the first light emission control transistor 101A. Therefore, it is proposed that Figure 10 the width of the active portion of the first light emission control transistor 101A in the first pixel circuit 10A shown is smaller than the width of the active portion of the first light emission control transistor 101A in the second pixel circuit 10A, so as to reduce the overlapping area between the first node N1 and the light emission control signal line EMIT.

[0057] Figure 11 This is a layout schematic diagram of another pixel circuit provided by an embodiment of the present application. Figure 12 This is a layout schematic diagram of another pixel circuit provided by an embodiment of the present application.

[0058] In an embodiment of the present application, with continued reference to Figure 10 As shown, the display panel 100 includes a substrate 30, an active layer poly, and a first metal layer 50. The active layer poly is located on one side of the substrate 30 and is used to prepare the active portion of the transistor. The first metal layer 50 is located on the side of the active layer poly away from the substrate 30 and can be used to prepare the gate of the transistor and the light emission control signal line EMIT. The first node N1 electrically connected to the active portion in the light emission control transistor 101 and the first metal layer 50 including the light emission control signal line EMIT are located in adjacent film layers. That is, there is an overlap between the active portion of the first pole of the light emission control transistor 101 and the light emission control signal line EMIT. Also, because the light emission control signal line EMIT is electrically connected to the gate of the light emission control transistor 101, the overlapping portion of the light emission control signal line EMIT and the active portion of the light emission control transistor 101 here can also be reused as the gate of the light emission control transistor. Then, the overlapping portion between the active portion of the light emission control transistor 101 and the light emission control signal line EMIT can represent the size of the light emission control transistor 101.

[0059] Taking the light emission control transistor 101 as the first light emission control transistor 101A as an example, it is found that reducing the size of the light emission control transistor Md in the first pixel circuit 10A to be smaller than the size of the light emission control transistor 101 in the second pixel circuit 10B is beneficial to reducing the overlapping area between the first node N1 and the light emission control signal line MEIT in the first pixel circuit 10A, and can reduce the first sub-coupling capacitance C11.

[0060] Then, in terms of setting to reduce the overlapping area between the first node N1 and the light emission control signal line EMIT, the following solutions are included: Among them, as Figure 10As shown, the width of the active portion of the light-emitting control transistor 101 in the first pixel circuit 10A in the first direction X1 is set to be smaller than the width of the active portion of the light-emitting control transistor 101 in the second pixel circuit 10B in the first direction X1. Here, the first direction X1 is a direction intersecting with the extending direction of the light-emitting control signal line EMIT.

[0061] Or, As Figure 11 shown, the width of the light-emitting control signal line EMIT in the first pixel circuit 10A in the second direction X2 is set to be smaller than the width of the light-emitting control signal line EMIT in the second pixel circuit 10B in the second direction X2. Both the first direction X1 and the second direction X2 are parallel to the plane direction of the display panel 100 and intersect. The second direction X2 is a direction intersecting with the extending direction of the active portion of the light-emitting control transistor 101.

[0062] Or, As Figure 12 shown, the width of the active portion of the light-emitting control transistor 101 in the first pixel circuit 10A in the first direction X1 is set to be smaller than the width of the active portion of the light-emitting control transistor 101 in the second pixel circuit 10B in the first direction X1. Here, the first direction X1 is a direction intersecting with the extending direction of the light-emitting control signal line EMIT.

[0063] And the width of the light-emitting control signal line EMIT in the first pixel circuit 10A in the second direction X2 is set to be smaller than the width of the light-emitting control signal line EMIT in the second pixel circuit 10B in the second direction X2. Both the first direction X1 and the second direction X2 are parallel to the plane direction of the display panel 100 and intersect. The second direction X2 is a direction intersecting with the extending direction of the active portion of the light-emitting control transistor 101.

[0064] In addition, the light-emitting control transistor 101 in the pixel circuit 10 further includes a second light-emitting control transistor 101B. The light-emitting driving current I is output to the light-emitting device 20 through the second light-emitting control current 101B. The second light-emitting control transistor 101B is electrically connected to the second pole of the driving transistor Md, and also has a certain influence on the fluctuation of the light-emitting driving current I. However, there are differences in the coupling effects received at the first light-emitting control transistor 101A and the second light-emitting control transistor 101B.

[0065] Therefore, the relevant technical personnel in the embodiments of the present application made a size difference between the first light-emitting control transistor 101A and the second light-emitting control transistor 101B, and observed how to adjust the sizes of the first light-emitting control transistor 101A and the second light-emitting control transistor 101B to achieve better improvement in the light-emitting effect of the display panel 100. Specifically, the following four cases were considered: (1) setting the size ratio between the first light-emitting control transistor 101A and the second light-emitting control transistor 101B in the pixel circuit electrically connected to the red light-emitting device, the green light-emitting device, and the blue light-emitting device to be 2 / 3; (2) setting the size ratio between the first light-emitting control transistor 101A and the second light-emitting control transistor 101B in the pixel circuit electrically connected to the red light-emitting device and the green light-emitting device to be 2 / 3, and setting the size ratio between the first light-emitting control transistor 101A and the second light-emitting control transistor 101B in the pixel circuit electrically connected to the blue light-emitting device to be 2.5 / 3; (3) setting the size ratio between the first light-emitting control transistor 101A and the second light-emitting control transistor 101B in the pixel circuit electrically connected to the red light-emitting device and the green light-emitting device to be 2.5 / 3, and setting the size ratio between the first light-emitting control transistor 101A and the second light-emitting control transistor 101B in the pixel circuit electrically connected to the blue light-emitting device to be 2 / 3; (4) setting the size ratio between the first light-emitting control transistor 101A and the second light-emitting control transistor 101B in the pixel circuit electrically connected to the red light-emitting device, the green light-emitting device, and the blue light-emitting device to be 2.5 / 3.

[0066] The research shows that in the case of solution (3), reducing the size ratio of the first light-emitting control transistor 101A to the second light-emitting control transistor 101B in the pixel circuit 10 electrically connected to the blue light-emitting device, and making it smaller than the size ratio of the first light-emitting control transistor 101A to the second light-emitting control transistor 101B in the pixel circuit electrically connected to the red light-emitting device and the green light-emitting device, has a better effect on stabilizing the light-emitting drive current I and improving the display uniformity of the display panel 100. It can be seen from solution (3) that this solution can be achieved by reducing the size of the first light-emitting control transistor 101A in the first pixel circuit 10A, that is, the above content proposes a solution to reduce the size of the first light-emitting control transistor 101A in the first pixel circuit 10A.

[0067] In an embodiment of the present application, with continued reference to Figure 2As shown, the light-emitting control transistor 101 includes a second light-emitting control transistor 101B. The first pole of the second light-emitting control transistor 101B is electrically connected to the light-emitting device 20, and the second pole is electrically connected to the driving transistor Md. The gate of the second light-emitting control transistor 101B is also electrically connected to the light-emitting control signal line EMIT. In the embodiment of the present application, the case where the first light-emitting control transistor 101A and the second light-emitting control transistor 101B are controlled to be turned on and off by the same light-emitting control signal line EMIT is taken as an example for description.

[0068] In the light-emitting stage, the light-emitting control signal line EMIT transmits an enabling signal to turn on both the first light-emitting control transistor 101A and the second light-emitting control transistor 101B, so that the path between the first power supply voltage PVDD and the second power supply voltage PVEE is conducted, and the light-emitting driving current I can be transmitted to the light-emitting device 20.

[0069] In the embodiment of the present application, the first node N1 is located between the first pole of the second light-emitting control transistor 101B and the light-emitting device 20. Here, the first node N1 is also prone to coupling with the light-emitting control signal line EMIT, thereby affecting the stability of the light-emitting driving current I output to the light-emitting device 20. By reducing the coupling capacitance between the first node N1 between the first pole of the second light-emitting control transistor 101B and the light-emitting device 20 in the first pixel circuit 10A and the light-emitting control signal line EMIT, it has a significant effect on reducing the fluctuation degree of the light-emitting driving current I of the first pixel circuit, reducing the difference in the fluctuation degree of the light-emitting driving current I generated by the first pixel circuit 10A and the fluctuation degree of the light-emitting driving current I generated by the second pixel circuit 10B, and improving the display uniformity of the display panel 100.

[0070] In terms of reducing the coupling capacitance between the first node N1 between the second light-emitting control transistor 10B and the light-emitting device 20 in the first pixel circuit 10A and the light-emitting control signal line EMIT, the solution for reducing the coupling capacitance between the first node N1 between the first light-emitting control transistor 10A and the driving transistor Md in the first pixel circuit 10A and the light-emitting control signal line EMIT proposed in the above embodiment is also applicable here. For example, when reducing the coupling capacitance between the first node N1 between the second light-emitting control transistor 101B and the light-emitting device 20 in the first pixel circuit 10A and the light-emitting control signal line EMIT, a supplementary electrode plate is provided between the second light-emitting control transistor 101B and the substrate 30 to increase the total coupling capacitance at the first node N1 and reduce the proportion of the coupling influence between the first node N1 and the light-emitting control signal line EMIT; or, a shielding electrode plate is added between the first node N1 and the light-emitting control signal line EMIT.

[0071] Figure 13 It is a layout schematic diagram of another pixel circuit provided by the embodiment of the present application.

[0072] Of course, in some embodiments, the coupling capacitance between the first node N1 electrically connected to the first light-emitting control transistor 101A and the light-emitting control signal line EMIT, and the coupling capacitance between the first node N1 electrically connected to the second light-emitting control transistor 101B and the light-emitting control signal line EMIT can be reduced by adopting the same or different schemes simultaneously. Exemplarily, as Figure 13 shown, the widths of the active portions of the first light-emitting control transistor 101A and the second light-emitting control transistor 101B are both reduced, so that the coupling capacitance between the first node N1 electrically connected to the first control transistor 101A and the light-emitting control signal line EMIT is reduced, and the coupling capacitance between the first node N1 electrically connected to the second control transistor 101B and the light-emitting control transistor EMIT is reduced.

[0073] Alternatively, optionally, in the first pixel circuit 10A, a first supplementary electrode plate 102 is provided at the first node N1 electrically connected to the first light-emitting control transistor 101A, and a shielding electrode plate is provided between the first node N1 electrically connected to the second light-emitting control transistor 101B and the light-emitting control signal line EMIT, which is beneficial to further improving the display uniformity of the display panel 100.

[0074] Figure 14 Schematic diagram of a display device provided by an embodiment of the present application.

[0075] An embodiment of the present application provides a display device 200, as Figure 14 shown, the display device 200 includes the display panel 100 provided in the above embodiment. Optionally, the display device 200 is a device including a display function such as a computer, a television, a mobile phone, etc.

[0076] In the display device 200, the first sub-coupling capacitance C11 between the first light-emitting device 20A and the second light-emitting device 20B is differentiated to reduce the coupling degree between the first node N1 in the first pixel circuit 10A and the light-emitting control signal line EMIT, thereby reducing the difference in the fluctuation degree of the light-emitting driving current I generated by the first pixel circuit 10A and the fluctuation degree of the light-emitting driving current I generated by the second pixel circuit 10B, thereby improving the light-emitting uniformity of the first light-emitting device 20A and the second light-emitting device 20B, and improving the display uniformity of the display panel 100.

[0077] The above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the scope of protection of the present application.

Claims

1. A display panel, characterized in that, Comprising: A pixel circuit, the pixel circuit includes a light-emitting control transistor and a driving transistor, the driving transistor is used to generate a light-emitting driving current, the light-emitting control transistor is electrically connected to the driving transistor, and is used to control the output of the light-emitting driving current to a light-emitting device; the gate of the light-emitting control transistor is electrically connected to a light-emitting control signal line, and the first pole is electrically connected to a first node; The light-emitting device at least includes a first light-emitting device and a second light-emitting device with different colors; the pixel circuit at least includes a first pixel circuit and a second pixel circuit, the first pixel circuit is electrically connected to the first light-emitting device, and the second pixel circuit is electrically connected to the second light-emitting device; During the operation of the pixel circuit, a first coupling capacitor is included at the first node; the first coupling capacitor includes a first sub-coupling capacitor, and the first sub-coupling capacitor is a coupling capacitor between the first node and the light-emitting control signal line; Wherein, the first sub-coupling capacitor in the first pixel circuit is smaller than the first sub-coupling capacitor in the second pixel circuit.

2. The display panel according to claim 1, wherein The light-emitting color of the first light-emitting device is blue.

3. The display panel according to claim 1, wherein The ratio of the first sub-coupling capacitor to the first coupling capacitor in the first pixel circuit is N1; the ratio of the first sub-coupling capacitor to the first coupling capacitor in the second pixel circuit is N2; Wherein, N1 < N2.

4. The display panel according to claim 3, characterized in that, The first coupling capacitor in the first pixel circuit further includes a second sub-coupling capacitor, and the first coupling capacitor in the second pixel circuit does not include the second sub-coupling capacitor; the first coupling capacitor in the first pixel circuit is larger than the first coupling capacitor in the second pixel circuit.

5. The display panel according to claim 4, wherein The display panel includes a substrate, and the pixel circuit is located on one side of the substrate; a first supplementary electrode plate is included between the light-emitting control transistor in the first pixel circuit and the substrate; The second sub-coupling capacitor in the first pixel circuit is a coupling capacitor between the first node and the first supplementary electrode plate.

6. The display panel according to claim 5, wherein The display panel further includes a light-shielding layer, the light-shielding layer is located between the film layer where the light-emitting control transistor is located and the substrate, and at least partially overlaps with the light-emitting control transistor; Wherein, the light-shielding layer is reused as the first supplementary electrode plate, and the area of the light-shielding layer corresponding to the light-emitting control transistor in the first pixel circuit is larger than the area of the light-shielding layer corresponding to the light-emitting control transistor in the second pixel circuit.

7. The display panel according to claim 1 or 3, characterized in that, In a direction perpendicular to the plane where the display panel is located, the first pixel circuit includes a second supplementary electrode plate, and the second supplementary electrode plate is located between the first node of the first pixel circuit and the light-emitting control signal line.

8. The display panel according to claim 7, wherein The display panel includes a substrate, an active layer, a first metal layer, a capacitor layer, and a second metal layer. The active layer is located on one side of the substrate and is used to prepare the active part of the transistor. The first metal layer is located on the side of the active layer away from the substrate and can be used to prepare the gate of the transistor and the light emission control signal line. The capacitor layer is located on the side of the first metal layer away from the substrate and can be used to prepare the capacitor plates. The second metal layer is located on the side of the capacitor layer away from the substrate and can be used to prepare the data signal line; The data signal line is electrically connected to the first node and is used to transmit the data signal to the driving transistor; wherein, the second supplementary plate is located between the second metal layer and the first metal layer.

9. The display panel according to claim 8, wherein The pixel circuit further includes a storage capacitor, and the storage capacitor is electrically connected to the gate of the driving transistor; one of the plates of the storage capacitor is located in the capacitor layer, and the other plate is multiplexed as the gate of the driving transistor; wherein, in the first pixel circuit, the plate of the storage capacitor located in the capacitor layer is multiplexed as the second supplementary plate and has an area larger than that of the plate of the storage capacitor located in the capacitor layer in the second pixel circuit.

10. The display panel according to claim 1, wherein In a direction perpendicular to the plane of the display panel, the overlapping area between the first node and the light emission control signal line in the first pixel circuit is smaller than that between the first node and the light emission control signal line in the second pixel circuit.

11. The display panel according to claim 10, wherein The display panel includes a substrate, an active layer, and a first metal layer. The active layer is located on one side of the substrate and is used to prepare the active part of the transistor. The first metal layer is located on the side of the active layer away from the substrate and can be used to prepare the gate of the transistor and the light emission control signal line; wherein, the width of the active part of the light emission control transistor in the first pixel circuit in the first direction is smaller than the width of the active part of the light emission control transistor in the second pixel circuit in the first direction, and / or, the width of the light emission control signal line in the first pixel circuit in the second direction is smaller than the width of the light emission control signal line in the second pixel circuit in the second direction; both the first direction and the second direction are parallel to the plane of the display panel and intersect.

12. The display panel according to claim 1, wherein The light emission control transistor includes a first light emission control transistor. The first pole of the first light emission control transistor is electrically connected to the driving transistor, and the second pole is electrically connected to the first power supply voltage; the light emitting device is electrically connected to the second power supply voltage, and the light emission control transistor is used to transmit the power supply voltage to the driving transistor to drive the driving transistor to generate a light emission driving current; The first node is located between the first pole of the first light emission control transistor and the driving transistor.

13. The display panel according to claim 1, characterized in that, The light emission control transistor includes a second light emission control transistor. The first pole of the second light emission control transistor is electrically connected to the light emitting device, and the second pole is electrically connected to the driving transistor; The first node is located between the first pole of the second light emission control transistor and the light emitting device.

14. A display device, characterized in that, Comprising a display panel as described in claims 1-13.

Images