Semiconductor device and forming method thereof

Abstract

The method includes forming a redistribution structure over a carrier; attaching the semiconductor die to the redistribution structure using a first conductive connection; dispensing a first underfill into a first gap between the semiconductor die and the redistribution structure; bonding a substrate to the redistribution structure using a second conductive connection, the substrate bonded to a side of the redistribution structure opposite the semiconductor die; and attaching a ring to the substrate, where the ring surrounds the semiconductor die and the first underfill, and where the ring comprises: a first portion comprising a first material having a first coefficient of thermal expansion; and a second portion including a second material having a second coefficient of thermal expansion different from the first coefficient of thermal expansion. The embodiment of the invention relates to a semiconductor device and a forming method thereof.

Description

Technical Field

[0001] Embodiments of the present application relate to semiconductor devices and methods of forming the same. Background Art

[0002] Since the development of integrated circuits (ICs), the semiconductor industry has experienced continuous rapid growth due to the ever-improving integration density of various electronic components (i.e., transistors, diodes, resistors, capacitors, etc.). In most cases, these improvements in integration density have come from the repeated reduction of the minimum feature size, which allows more components to be integrated into a given area.

[0003] These integration improvements are essentially two-dimensional (2D) in nature because the area occupied by the integrated components is substantially on the surface of the semiconductor wafer. The increasing density of integrated circuits and the corresponding reduction in area have generally exceeded the ability to directly bond integrated circuit chips to a substrate. Interposers have been used to redistribute ball contact areas from the ball contact areas of the chips to a larger area of the interposer. In addition, interposers allow for three-dimensional (3D) packages that include multiple chips. Other packages have also been developed to incorporate 3D aspects. Summary of the Invention

[0004] Some embodiments of the present application provide a method of forming a semiconductor device, including: forming a redistribution structure over a carrier; attaching a semiconductor die to the redistribution structure using a first conductive connection; dispensing a first underfill into a first gap between the semiconductor die and the redistribution structure; bonding a substrate to the redistribution structure using a second conductive connection, the substrate being bonded to a side of the redistribution structure opposite to the semiconductor die; and attaching a ring to the substrate, wherein the ring surrounds the semiconductor die and the first underfill, and wherein the ring includes: a first portion including a first material having a first coefficient of thermal expansion; and a second portion including a second material having a second coefficient of thermal expansion different from the first coefficient of thermal expansion.

[0005] Some other embodiments of the present application provide a method of forming a semiconductor device, including: attaching a first die and a second die to a redistribution structure; forming a molding material to fill a gap between adjacent sidewalls of the first die and the second die, wherein the molding material surrounds a periphery of each of the first die and the second die; performing a dicing process to form a first package assembly and a second package assembly, the first package assembly including the first die and a first portion of the redistribution structure, and the second package assembly including the second die and a second portion of the redistribution structure; bonding a substrate to the first package assembly, the substrate bonding to a side of the first portion of the redistribution structure opposite to the first die; and attaching a ring to the substrate, wherein the ring surrounds the first die and the first portion of the redistribution structure, and wherein the ring includes: a first portion of the ring, including a first material; and a second portion of the ring, including a second material different from the first material, wherein each of the second portions of the ring is disposed at a corresponding corner region of the ring.

[0006] Some further embodiments of the present application provide a semiconductor device, including: a package assembly, including: a redistribution structure; and a first die, coupled to the redistribution structure; a substrate, coupled to the redistribution structure, wherein the redistribution structure is disposed between the first die and the substrate; a ring, disposed above the substrate and coupled to the substrate, the ring surrounding the first die and the redistribution structure, and wherein the ring includes: a first portion of the ring, including a first material; and a second portion of the ring, including a second material different from the first material, wherein each of the second portions of the ring is disposed at a corresponding corner region of the ring. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Aspects of the embodiments of the present disclosure are best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, various components are not drawn to scale. In fact, for clarity of discussion, the dimensions of various components may be arbitrarily increased or decreased.

[0008] Figures 1 to 6A A cross-sectional view showing an intermediate stage in the formation of an integrated circuit package according to some embodiments is shown.

[0009] Figure 6B A cross-sectional view showing an integrated circuit die according to some embodiments is shown.

[0010] Figures 7 to 12B A cross-sectional view and a top view showing an intermediate stage in the formation of an integrated circuit package according to some embodiments are shown.

[0011] Figure 12C and Figure 12D shows a cross-sectional view of an intermediate stage in the formation of an integrated circuit package according to other embodiments.

[0012] Figure 13A and Figure 13B shows a cross-sectional view and a top view of an intermediate stage in the formation of an integrated circuit package according to other embodiments.

[0013] Figure 14A and Figure 14B shows a cross-sectional view and a top view of an intermediate stage in the formation of an integrated circuit package according to other embodiments.

[0014] Figure 15A and Figure 15B shows a cross-sectional view and a top view of an intermediate stage in the formation of an integrated circuit package according to other embodiments.

[0015] Figure 16A and Figure 16B shows a cross-sectional view and a top view of an intermediate stage in the formation of an integrated circuit package according to other embodiments.

[0016] Figure 17A and Figure 17B shows a cross-sectional view and a top view of an intermediate stage in the formation of an integrated circuit package according to other embodiments.

[0017] Figure 18A and Figure 18B shows a cross-sectional view and a top view of an intermediate stage in the formation of an integrated circuit package according to other embodiments. DETAILED DESCRIPTION

[0018] The following disclosure provides many different embodiments or examples for implementing different features of the embodiments of the present disclosure. Specific examples of components and arrangements are described below to simplify the embodiments of the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first component above or on a second component may include embodiments in which the first component and the second component are formed in direct contact, and may also include embodiments in which additional components may be formed between the first component and the second component so that the first component and the second component may not be in direct contact. In addition, the embodiments of the present disclosure may repeat reference numerals and / or characters in various instances. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0019] In addition, for ease of description, this document may use spatial relative terms such as "below", "beneath", "lower", "above", "upper", etc. to describe the relationship between one element or component and another (or other) element or component as shown in the figures. In addition to the orientation depicted in the figures, the spatial relative terms are intended to encompass different orientations of the device during use or operation. The device may be oriented otherwise (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein may be interpreted accordingly.

[0020] Each embodiment includes an integrated circuit package and a method of forming the same. The integrated circuit package includes: a package assembly including one or more semiconductor chips bonded to an interposer (also referred to as a redistribution structure); and a package substrate bonded to a side of the interposer opposite the one or more semiconductor chips. A sealing adhesive is dispensed around the periphery of the package substrate, and then a ring is placed on the package substrate. The ring is in contact with the package substrate through the sealing adhesive. When viewed in a top view, the ring may be square or rectangular and may include a first portion including a first material having a first coefficient of thermal expansion (CTE). The ring may also include a second portion including a second material, wherein each of the second portions is disposed at a corner region of the ring. For example, when viewed in a top view, each of the second portions of the ring may have an L shape and may be embedded in the first portion of the ring at a corresponding corner region of the ring. Specifically, each of the second portions of the ring may be disposed at an inner corner region of the ring, wherein the inner corner of the ring is also the inner corner of the corresponding L shape, and wherein the inner corner of the L shape refers to the junction point where the two arms of the L shape meet (e.g., to form a 90° angle between the two arms). The second material may have a second coefficient of thermal expansion (CTE) that is less than the first coefficient of thermal expansion (CTE). Advantageous features of such embodiments include allowing adjustment of the total coefficient of thermal expansion (CTE) of the ring by adjusting, for example, the shape, volume, and position of the second portion of the ring. Accordingly, the total coefficient of thermal expansion (CTE) of the ring can be optimized to minimize thermal stress within the integrated circuit package and to reduce the risk of warping of the package substrate. In addition, such optimization can also reduce thermal stress at the interface of the integrated circuit package, such that the risk of forming cracks or delamination is reduced. Accordingly, package reliability is improved.

[0021] Embodiments will now be described with respect to a system-on-chip-on-wafer (SoCoW) device in a fan-out package. However, the described embodiments are not intended to limit the embodiments, as the ideas presented may be included in a wide range of embodiments, including any suitable technology generation, all of which are fully intended to be included within the scope.

[0022] Figures 1 to 12BShows a cross-sectional view and a top view of an intermediate step during a process for forming a first encapsulation component 100 according to some embodiments. Figures 1 to 5 Shows the formation of a redistribution structure 46 (subsequently shown in Figure 5 . In some embodiments, the redistribution structure 46 may be referred to as an organic interposer. Figure 1 Shows a carrier 20 and a release film 22 formed on the carrier 20. The carrier 20 may be a glass carrier, a silicon wafer, an organic carrier, etc. According to some embodiments, the carrier 20 may have a circular top view shape. The release film 22 may be formed of a polymer-based material and / or a thermally releasable epoxy-based material (such as a light-thermal conversion (LTHC) material) that can decompose under radiation such as a laser beam, so that the carrier 20 can be peeled off from the overlying structure to be formed in subsequent processes. In other embodiments, the release film 22 may be an ultraviolet (UV) glue that loses its stickiness when exposed to UV light. The release film 22 may be dispensed as a liquid and cured, may be a laminated film laminated onto the carrier 20, etc. The top surface of the release film 22 may be flush and may have a high degree of flatness.

[0023] The redistribution structure 46 (subsequently shown in Figure 5 includes a plurality of insulating layers 24 and a plurality of RDLs 26 (e.g., wires) formed above the release film 22. An insulating layer 24-1 is formed on the release film 22, and the insulating layer 24-1 is one of the insulating layers 24. According to some embodiments of the present disclosure, the insulating layer 24-1 is formed of a dielectric material such as silicon oxide, silicon nitride, etc. In an embodiment, the insulating layer 24-1 may include an organic material, which may be a polymer. The organic material may also be a photosensitive material. For example, the insulating layer 24-1 may be formed of or include polyimide, polybenzoxazole (PBO), benzocyclobutene (BCB), etc. The insulating layer 24-1 may be formed by spin coating, lamination, CVD, etc. or a combination thereof.

[0024] An RDL 26-1 is formed on the insulating layer 24-1, and the RDL 26-1 is one of the RDLs 26. The formation of the RDL 26-1 may include: forming a metal seed layer (not shown) above the insulating layer 24-1; forming a patterned mask (not shown), such as a photoresist, above the metal seed layer; and then performing a metal plating process on the exposed metal seed layer. Then, the patterned mask and the portion of the metal seed layer covered by the patterned mask are removed, leaving as Figure 1The RDL 26-1 shown in [Figure 0]. According to some embodiments of the present disclosure, the metal seed layer includes a titanium layer and a copper layer above the titanium layer. In an embodiment, the metal plating includes copper, aluminum, etc. The metal seed layer can be formed using, for example, physical vapor deposition (PVD) or a similar process. The plating can be implemented using, for example, an electroless plating process. Figures 2 to 5 The formation of additional insulating layers 24 (e.g., including insulating layers 24-2, 24-3, 24-4, and 24-5) and additional RDLs 26 (e.g., including RDLs 26-2, 26-3, and 26-4) is shown. In Figure 2 , the insulating layer 24-2 is first formed on the RDL 26-1. The bottom surface of the insulating layer 24-2 contacts the top surface of the RDL 26-1 and the insulating layer 24-1. The insulating layer 24-2 can be formed of a dielectric material such as silicon oxide, silicon nitride, etc. In an embodiment, the insulating layer 24-2 can include an organic material, which can be a polymer. The organic material can also be a photosensitive material. For example, the insulating layer 24-2 can be formed of or include polyimide, polybenzoxazole (PBO), benzocyclobutene (BCB), etc. The insulating layer 24-2 can be formed by spin coating, lamination, CVD, etc. or a combination thereof. Then the insulating layer 24-2 is patterned to form a via opening therein (occupied by the via portion of the subsequently formed RDL 26-2). Thus, some portions of the RDL 26-1 are exposed through the opening in the insulating layer 24-2.

[0025] In Figure 3In this case, RDL 26-2 is formed on the insulating layer 24-2, wherein RDL 26-2 is electrically connected to RDL 26-1. RDL 26-2 includes a via portion extending into an opening in the insulating layer 24-2 and a trace portion (metal line portion) above the insulating layer 24-2. According to some embodiments, the formation of RDL 26-2 may include: depositing a blanket metal seed layer extending into the via opening; and forming and patterning a plating mask (such as photoresist), wherein an opening is formed in the plating mask and is located directly above the via opening. Then, a plating process is performed to plate a metal material, which completely fills the via opening and has some portions above the top surface of the insulating layer 24-2. Then, the plating mask is removed, followed by an etching process to remove the exposed portions of the metal seed layer previously covered by the plating mask. The remaining portions of the metal seed layer and the plated metal material form RDL 26-2. RDL 26-2 includes a metal trace portion and a via portion (also referred to as a via). The trace portion is located above the insulating layer 24-2, and the via portion is located in the insulating layer 24-2. Each of the vias may have a tapered profile, where the upper portion is wider than the corresponding lower portion. The metal seed layer and the plated material may be formed of the same material or different materials. For example, the metal seed layer may include a titanium layer and a copper layer above the titanium layer. The plated metal material of RDL 26-2 may include a metal or a metal alloy, including copper, aluminum, tungsten, etc. or their alloys.

[0026] Figure 4 It is shown that after forming RDL 26-2, more insulating layers and corresponding RDLs may be formed, wherein the upper RDLs are located above and joined to the corresponding lower RDLs. For example, Figure 4 insulating layers 24-3, 24-4, and 24-5 and RDLs 26-3 and 26-4 are shown as examples. It should be understood that in other embodiments, fewer or more insulating layers and RDLs may be formed than Figure 4 shown. The materials of insulating layers 24-3, 24-4, and 24-5 may be selected from the same candidate material group (or a different candidate material group) as insulating layers 24-1 and 24-2, and insulating layers 24-3, 24-4, and 24-5 may be formed using similar formation processes. RDLs 26-3 and 26-4 may also be formed of materials similar to RDLs 26-1 and 26-2 and using formation processes similar to those of RDLs 26-1 and 26-2.

[0027] Acceptable lithography and etching techniques are used to pattern the topmost insulating layer of the insulating layer 24 (e.g., insulating layer 24-5) to form an opening in the insulating layer 24-5 that exposes the topmost RDL of RDL 26 (e.g., RDL 26-4). The position of the opening in the insulating layer 24-5 corresponds to the conductive connector 42 (subsequently in Figure 5The positions to be formed (shown in [figure reference]) are for electrically connecting the redistribution structure 46 to other packaging components in subsequent steps.

[0028] In Figure 5 a conductive connection member 42 can be formed. In an embodiment, the conductive connection member 42 can be a microbump, a ball grid array (BGA) connection member, a solder ball, a metal pillar, a controlled collapse chip connection (C4) bump, a bump formed by electroless nickel - electroless palladium - immersion gold technology (ENEPIG), etc. The conductive connection member 42 can include a conductive material such as solder, copper, aluminum, gold, nickel, silver, palladium, tin, etc. or a combination thereof. In some embodiments, the conductive connection member 42 is formed by initially forming a solder layer through evaporation, electroplating, printing, solder transfer, ball placement, etc. Once the solder layer has been formed on the structure, reflow can be implemented to shape the material into a desired bump shape.

[0029] In another embodiment, the conductive connection member 42 includes metal pillars (such as copper pillars) formed by sputtering, printing, electroplating, electroless plating, CVD, etc. The metal pillars can be solderless and have substantially vertical sidewalls. In some embodiments, a metal covering layer is formed on the top of the metal pillars. The metal covering layer can include nickel, tin, tin - lead, gold, silver, palladium, indium, nickel - palladium - gold, nickel - gold, etc. or a combination thereof, and can be formed by a plating process.

[0030] In other embodiments, the redistribution structure 46 can be replaced by an interposer including a semiconductor (not shown in the figure). The interposer including a semiconductor can include a bulk semiconductor substrate, a silicon - on - insulator (SOI) substrate, a multi - layer semiconductor substrate, etc. The semiconductor material of the substrate can be: silicon; germanium; compound semiconductors including silicon germanium, silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; alloy semiconductors including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and / or GaInAsP; or a combination thereof. Other substrates such as multi - layer or gradient substrates can also be used. The interposer including a semiconductor can include a doped or undoped substrate. In some embodiments, the interposer including a semiconductor will not include active devices, but the interposer including a semiconductor can include passive devices formed in and / or on the first surface of the substrate.

[0031] The interposer including a semiconductor can include through - vias (TVs) extending from the first surface of the substrate to the second surface of the substrate. When the substrate is a silicon substrate, the TV is sometimes also referred to as a through - substrate via or a through - silicon via. The interposer can also include a redistribution structure above the first surface of the substrate, wherein the redistribution structure is electrically connected to the TVs of the substrate. In some embodiments, the redistribution structure can be formed using one or more methods similar to those described above for the redistribution structure 46.

[0032] In Figures 6A to 6B , one or more encapsulation components 50A and one or more encapsulation components 50B are bonded to the redistribution structure 46. For example, in Figure 6A , two encapsulation components 50A and two encapsulation components 50B are shown bonded to the redistribution structure 46. Each encapsulation component 50A may include a semiconductor die. In an embodiment, each encapsulation component 50A may include a system-on-chip (SoC) die, and the SoC die includes multiple device dies encapsulated as a system, etc. The device dies may include logic dies, memory dies, input / output dies, integrated passive devices (IPDs), etc. or a combination thereof. For example, the logic device die of each encapsulation component 50A may be a central processing unit (CPU) die, a graphics processing unit (GPU) die, a mobile application die, a microcontroller unit (MCU) die, a baseband (BB) die, an application processor (AP) die, etc. The memory die of each encapsulation component 50A may include a static random access memory (SRAM) die, a dynamic random access memory (DRAM) die, etc. In other embodiments, each encapsulation component 50A may include an application specific integrated circuit (ASIC) die.

[0033] Figure 6B A detailed view of an exemplary encapsulation component 50A is shown when the encapsulation component 50A is a semiconductor die. The encapsulation component 50A may be formed in a wafer, and the wafer may include different device regions that are divided in subsequent steps to form multiple integrated circuit dies. The encapsulation component 50A may be processed according to an applicable manufacturing process to form an integrated circuit. For example, the encapsulation component 50A includes a semiconductor substrate 152, such as doped or undoped silicon, or an active layer of a semiconductor-on-insulator (SOI) substrate. The semiconductor substrate 152 may include: other semiconductor materials, such as germanium; compound semiconductors, including silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; alloy semiconductors, including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and / or GaInAsP; or a combination thereof. Other substrates, such as multi-layer or gradient substrates, may also be used. The semiconductor substrate 152 has an active surface (e.g., Figure 6B the surface facing up in Figure 6B ) that is sometimes referred to as the front side and a non-active surface (e.g.,

[0034] Devices (represented by transistors) 154 can be formed at the front side of a semiconductor substrate 152. The devices 154 can be active devices (e.g., transistors, diodes, etc.), capacitors, resistors, etc. An interlayer dielectric (ILD) 156 is located above the front side of the semiconductor substrate 152. The ILD 156 surrounds the devices 154 and can cover the devices 154. The ILD 156 can include one or more dielectric layers formed of materials such as phosphosilicate glass (PSG), borosilicate glass (BSG), boron-doped phosphosilicate glass (BPSG), undoped silicate glass (USG), etc.

[0035] Conductive plugs 158 extend through the ILD 156 to electrically and physically couple the devices 154. For example, when the device 154 is a transistor, the conductive plugs 158 can couple the gate and source / drain regions of the transistor. The source / drain regions can refer to the source or the drain, individually or jointly depending on the context. The conductive plugs 158 can be formed of tungsten, cobalt, nickel, copper, silver, gold, aluminum, etc. or combinations thereof. An interconnect structure 160 is located above the ILD 156 and the conductive plugs 158. The interconnect structure 160 interconnects the devices 154 to form an integrated circuit. The interconnect structure 160 can be formed, for example, by a metallization pattern in a dielectric layer on the ILD 156. The metallization pattern includes metal lines and vias formed in one or more low-k dielectric layers. The metallization pattern of the interconnect structure 160 is electrically coupled to the devices 154 through the conductive plugs 158.

[0036] The package assembly 50A further includes pads 162 made for external connections, such as aluminum pads. The pads 162 are located on the active side of the package assembly 50A, such as in and / or on the interconnect structure 160. One or more passivation films 164 are located on the package assembly 50A, such as on portions of the interconnect structure 160 and the pads 162. Openings extend through the passivation film 164 to the pads 162. Die attach members 166, such as conductive pillars (e.g., formed of a metal such as copper), extend through the openings in the passivation film 164 and physically and electrically couple to the corresponding pads 162. The die attach members 166 can be formed, for example, by plating, etc. The die attach members 166 electrically couple the corresponding integrated circuits of the package assembly 50A.

[0037] Optionally, a solder region (e.g., solder balls or solder bumps) can be provided on the pads 162. The solder balls can be used to perform a chip probe (CP) test on the package assembly 50A. The CP test can be performed on the package assembly 50A to determine whether the package assembly 50A is a known good die (KGD). Thus, only the package assembly 50A (which is a KGD) undergoes subsequent processing and packaging, and the dies that fail the CP test are not packaged. After the test, the solder region can be removed in a subsequent processing step.

[0038] The dielectric layer 168 may (or may not) be located on the active side of the package component 50A, such as on the passivation film 164 and the die interconnect 166. The dielectric layer 168 laterally seals the die interconnect 166, and the dielectric layer 168 is laterally co-terminus with the package component 50A. Initially, the dielectric layer 168 may bury the die interconnect 166 such that the topmost surface of the dielectric layer 168 is above the topmost surface of the die interconnect 166. In some embodiments where a solder region is disposed on the die interconnect 166, the dielectric layer 168 may also bury the solder region. Optionally, the solder region may be removed before forming the dielectric layer 168.

[0039] The dielectric layer 168 may be: a polymer, such as PBO, polyimide, BCB, etc.; a nitride, such as silicon nitride, etc.; an oxide, such as silicon oxide, PSG, BSG, BPSG, etc.; etc. or a combination thereof. The dielectric layer 168 may be formed, for example, by spin coating, lamination, chemical vapor deposition (CVD), etc. In some embodiments, during the formation of the package component 50A, the die interconnect 166 is exposed through the dielectric layer 168. In some embodiments, the die interconnect 166 remains buried and is exposed during a subsequent process for packaging the package component 50A. Exposing the die interconnect 166 may remove any solder region that may be present on the die interconnect 166.

[0040] In an embodiment, a conductive interconnect 47 (which may subsequently also be referred to as a UBM and is shown in Figure 6A is formed for external connection to the package component 50A. The conductive interconnect 47 has a bump portion located on and extending along the major surface of the dielectric layer 168, and may have a via portion extending through the dielectric layer 168 for electrical coupling to the interconnect structure 160 and the pad 162. Thus, the conductive interconnect 47 is electrically coupled to the package component 50A. The conductive interconnect 47 may be formed of the same material as the metallization pattern of the interconnect structure 160.

[0041] In some embodiments, the package component 50A is a stacked device including a plurality of semiconductor substrates 152. For example, the package component 50A may be a memory device including a plurality of memory dies, such as a Hybrid Memory Cube (HMC) module, a High Bandwidth Memory (HBM) module, etc. In such embodiments, the package component 50A includes a plurality of semiconductor substrates 152 interconnected by through-substrate vias (TSVs). Each of the semiconductor substrates 152 may (or may not) have an interconnect structure 160.

[0042] Each package component 50B may be similar to that described above with respect to Figure 6BThe semiconductor die of the described packaged component 50A. Each of the packaged components 50B may include a system-on-chip die, a logic die, a DRAM die, an SRAM die, a central processing unit die, an I / O die, a combination thereof, and the like. For example, each of the packaged components 50B may include a memory die, such as a DRAM die (e.g., a high bandwidth memory (HBM) die), and the like. The memory die may be a discrete memory die or may be in the form of a die stack including multiple stacked memory dies. In some embodiments, the packaged component 50B is a bare die (sometimes referred to as a bare chip) and is a semiconductor die without a seal or including a fan-out redistribution structure.

[0043] Further referring Figure 6A , in some embodiments, the packaged component 50A and the packaged component 50B are joined to the redistribution structure 46 using a conductive interconnect 44 such as solder. For example, solder may be placed on the conductive interconnects 47 or 42 of the packaged component 50A and the packaged component 50B, and the packaged component 50A and the packaged component 50B may be placed on the conductive interconnect 42, and a reflow process may be implemented. The conductive interconnect 44 may also include non-solder metal pillars, or metal pillars and solder caps over the non-solder metal pillars, which may also be formed by plating. Other types of joining may also be used, such as metal-to-metal direct joining, hybrid joining (including dielectric-to-dielectric joining and metal-to-metal direct joining), and the like. In an embodiment, after the packaged component 50A and the packaged component 50B are joined to the redistribution structure 46, the top surface of the packaged component 50A may be flush with the top surface of the packaged component 50B. In other embodiments, after the packaged component 50A and the packaged component 50B are joined to the redistribution structure 46, the top surface of the packaged component 50A may be at a different level from the top surface of the packaged component 50B.

[0044] It should be understood that although Figure 6A two packaged components 50A and two packaged components 50B coupled to the redistribution structure 46 are shown, other numbers of packaged components 50A and packaged components 50B may be coupled to the redistribution structure 46.

[0045] In Figure 7In this case, an underfill 56 is formed between the encapsulation component 50A and the redistribution structure 46 and between the encapsulation component 50B and the redistribution structure 46. The underfill 56 can also fill the gap between each encapsulation component 50A and the adjacent encapsulation component 50B. In some embodiments, the underfill 56 includes a base material, such as an epoxy resin and filler particles in the epoxy resin, and can be deposited by a capillary flow process after attaching the encapsulation component 50A and the encapsulation component 50B, or can be formed by a suitable deposition method before attaching the encapsulation component 50A and the encapsulation component 50B. Some exemplary base materials include epoxy amine, epoxy anhydride, epoxy phenol, etc. or combinations thereof. The filler particles can be formed of a dielectric material and can include silica, alumina, boron nitride, etc., which can be in the form of spherical particles. The underfill 56 can undergo a curing process after being formed. Figure 7 An embodiment is shown in which the underfill 56 has a flat top surface flush with the top surfaces of the encapsulation component 50A and the encapsulation component 50B. In some embodiments, the top surface of the underfill 56 may not be flat and may be lower than the top surfaces of the encapsulation component 50A and the encapsulation component 50B.

[0046] In Figure 8 In this case, the encapsulation component 50A and the encapsulation component 50B are sealed in a sealant 60. The sealant 60 can be applied by compression molding, transfer molding, etc., and can be formed above the first encapsulation component 100 so as to bury or cover the encapsulation component 50A and the encapsulation component 50B. The sealant 60 can be applied in a liquid or semi-liquid form and is then cured at a temperature, for example, in the range between about 120 °C and about 180 °C. The sealant 60 can include a molding compound, a molded underfill, an epoxy resin, and / or a resin. The molding compound can include a base material and filler particles in the base material, and the base material can be a polymer, a resin, an epoxy resin, etc. The filler particles can be dielectric particles such as SiO2, Al2O3, silica, etc., and can have a spherical shape. In addition, the spherical filler particles can have the same or different diameters. The sealant 60 can also surround the underfill 56. There can be a distinguishable interface between the underfill 56 and the sealant 60.

[0047] In a subsequent process, a planarization process such as a chemical mechanical polishing (CMP) process or a mechanical grinding process is performed to polish the sealant 60. Due to the planarization process, the top surfaces of the encapsulation component 50A and the encapsulation component 50B can be exposed.

[0048] Figure 9 A carrier exchange and the formation of conductive connectors on the side of the redistribution structure 46 are shown. The carrier 66 is attached to the surface of the sealant 60 and the exposed surfaces of the encapsulation component 50A and the encapsulation component 50B using a release film 68.Figure 8 The carrier 20 shown in Figure 8 is detached from the first encapsulation component 100. The detachment process may include projecting a light beam (such as a laser beam or UV light) onto Figure 8 the release film 22 shown in Figure 8 , and the light beam penetrates the carrier 20, and the carrier 20 may be transparent. Due to the exposure (such as laser scanning), the release film 22 is decomposed by the heat of the light beam, and the carrier 20 can be moved away from the release film 22. The corresponding process is also called peeling.

[0049] Due to the peeling process, the insulating layer 24-1 is exposed. The UBM 70 and the conductive connection 72 are formed on the redistribution structure 46. The forming process may include: patterning the insulating layer 24-1 to form an opening exposing the RDL 26-1; and forming the UBM 70, and the UBM 70 extends into the opening in the insulating layer 24-1. The UBM 70 can be formed by first depositing a conductive metal using any suitable method, for example, sputtering, evaporation, PECVD, etc. Then, using a suitable photolithographic masking and etching process to remove parts of the conductive metal, and the remaining parts of the conductive metal form the UBM 70. The UBM 70 can be formed of or include nickel, copper, titanium, or multiple layers thereof. In some embodiments, each of the UBM 70 includes a titanium layer and a copper layer above the titanium layer.

[0050] The conductive connection 72 is formed on the UBM 70. In an embodiment, the conductive connection 72 may be a controlled collapse chip connection (C4) bump, etc. In some embodiments, the conductive connection 72 is formed by initially forming a solder layer on the exposed part of the UBM 70 by evaporation, electroplating, printing, solder transfer, ball placement, etc. and then reflowing the solder layer. Therefore, the conductive connection 72 is a solder area. The conductive connection 72 may also include non-solder metal pillars, or metal pillars and solder caps above the non-solder metal pillars, which may also be formed by plating.

[0051] In Figure 10 Figure 10 , the carrier 66 is detached from the first encapsulation component 100, leaving the remaining wafer structure 102. The detachment process may include projecting a light beam (such as a laser beam or UV light) onto Figure 9 the release film 68 shown in Figure 9 , and the light beam penetrates the carrier 66, and the carrier 66 may be transparent. Due to the exposure (such as laser scanning), the release film 68 is decomposed by the heat of the light beam, and the carrier 66 can be moved away from the release film 68. The wafer structure 102 is then placed on the tape 73 supported by the frame 75.

[0052] In Figure 11 Figure 11 , (previously shown in Figure 10 Figure 10 ) then between adjacent regions 104P along the scribe line 78 (previously in Figure 10The wafer structure 102 on the dicing tape 73 is shown (in the figure) such that the wafer structure 102 is separated into discrete package structures 103.

[0053] Further referring to Figure 11 , and then each discrete package structure 103 is bonded to the package assembly 82. The bonding is carried out via the conductive connection member 72, and the conductive connection member 72 may include a solder region. The package assembly 82 may be or may include an interposer, a package, a core substrate, a coreless substrate, a printed circuit board, etc. Figure 11 An embodiment is shown in which the package assembly 82 includes a substrate core 93 and bonding pads 98 above the substrate core 93. The substrate core 93 may be made of a semiconductor material such as silicon, germanium, diamond, etc. Optionally, compound materials such as silicon germanium, silicon carbide, gallium arsenide, indium arsenide, indium phosphide, silicon carbide germanium, gallium arsenide phosphide, gallium indium phosphide, combinations of these, etc. may also be used. In addition, the substrate core 93 may be a SOI substrate. Generally, a SOI substrate includes a semiconductor material layer such as epitaxial silicon, germanium, silicon germanium, SOI, SGOI, or a combination thereof. In an alternative embodiment, the substrate core 93 is based on an insulating core such as a glass fiber reinforced resin core. An exemplary core material is a glass fiber resin such as FR4. Optional materials for the core material include bismaleimide-triazine BT resin, or optionally other PCB materials or films. An accumulation film such as ABF or other laminated materials may be used for the substrate core 93.

[0054] The substrate core 93 may include active and passive devices (not shown). A variety of devices such as transistors, capacitors, resistors, combinations of these, etc. may be used to generate the structural and functional requirements for the design of the device stack. The devices may be formed using any suitable method.

[0055] The substrate core 93 may also include metallization layers and vias (not shown), where the bonding pads 98 are physically and / or electrically coupled to the metallization layers and vias. The metallization layers may be formed above the active and passive devices and are designed to connect the individual devices to form a functional circuit. The metallization layers may be formed by alternating layers of a dielectric material (e.g., a low-k dielectric material) and a conductive material (e.g., copper), where the vias interconnect the conductive material layers and may be formed by any suitable process such as deposition, damascene, dual damascene, etc. In some embodiments, the substrate core 93 is substantially free of active and passive devices.

[0056] In some embodiments, a reflow conductive connector 72 attaches the discrete package structure 103 to the bond pad 98. The conductive connector 72 electrically and / or physically couples the package assembly 82 (including the metallization layer in the substrate core 93) to the discrete package structure 103. In some embodiments, a solder mask 96 is formed on the substrate core 93. The conductive connector 72 may be disposed in an opening in the solder mask 96 to electrically and mechanically couple to the bond pad 98. The solder mask 96 may be used to protect regions of the substrate core 93 from external damage.

[0057] The conductive connector 72 has an epoxy flux (not shown) formed thereon, and then at least some epoxy portions of the remaining epoxy flux are reflowed after the discrete package structure 103 is attached to the package assembly 82. This remaining epoxy portion may be used as an underfill to reduce stress and protect the joints created due to the reflow of the conductive connector 72. The underfill 86 may be dispensed into the gap between the redistribution structure 46 and the package assembly 82. The underfill 86 may also be disposed on the sidewalls of the redistribution structure 46 and the discrete package structure 103. According to some embodiments, the underfill 86 includes a base material and filler particles mixed in the base material. The base material may include a resin, an epoxy resin, and / or a polymer. Some exemplary base materials include epoxy amine, epoxy anhydride, epoxy phenol, etc. or combinations thereof. The filler particles are formed of a dielectric material and may include silica, alumina, boron nitride, etc., which may be in the form of spherical particles. The underfill 86 may be dispensed in a flowable form and then cured.

[0058] In Figures 12A to 12B , an adhesive material 94 is dispensed on the package assembly 82, and the ring 95 is coupled to the package assembly 82. Figure 12A A first package assembly 100 is shown along Figure 12BCross-sectional view of line A-A' shown in [figure]. The bonding material 94 can include any material suitable for sealing components such as rings to the encapsulation component 82, such as epoxy resin, polyurethane, polyurethane, silicone elastomer, etc. The bonding material 94 can be dispensed onto the outer portion or periphery of the encapsulation component 82 such that the bonding material 94 is located between the edge of the discrete package structure 103 and the encapsulation component 82. According to some embodiments, the ring 95 is then attached to the encapsulation component 82 using the bonding material 94. The ring 95 can be used to dissipate heat from the first encapsulation component 100 and to provide additional support to the encapsulation component 82 during subsequent manufacturing processes and use. The ring 95 can also be used to control and minimize the thermal stress within the first encapsulation component 100 to reduce the risk of warping of the encapsulation component 82. The ring 95 can be placed on the encapsulation component 82 such that the ring 95 surrounds and encloses the encapsulation component 50A, the encapsulation component 50B, the underfill 56, the underfill 86, and the sealant 60. After the ring 95 is placed on the encapsulation component 82, a curing process can be implemented to cure the bonding material 94 and strengthen the coupling between the ring 95 and the encapsulation component 82. In an embodiment, the ring 95 can include a ring structure that includes a lid.

[0059] When viewed in a top view, the ring 95 can be square or rectangular and can include a first portion of the ring 90 that includes a first material having a first coefficient of thermal expansion (CTE). The ring 95 can also include a second portion of the ring 92 that includes a second material, where each second portion of the ring 92 is disposed at a corresponding corner region of the ring 95. For example, when viewed in a top view, each second portion of the ring 92 can have an L shape and is embedded in the first portion of the ring 90 at the corresponding corner region of the ring 95. Specifically, each second portion of the ring 92 can be disposed at a corresponding inner corner region of the ring 95, where the inner corner of the L shape of the second portion of the ring 92 also serves as the inner corner of the ring 95, and where the inner corner of the L shape refers to the junction point where the two arms of the L shape meet, forming a 90° angle between the two arms. The second material can have a second coefficient of thermal expansion (CTE) that is less than the first coefficient of thermal expansion (CTE). In an embodiment, the first material can include copper, etc., and the second material can include aluminum, etc. In an embodiment, the first CTE can be in the range from 16 ppm / °C to 20 ppm / °C, and the second CTE can be in the range from 8 ppm / °C to 14 ppm / °C. In an embodiment, the ring 95 is formed before attaching the ring 95 to the package assembly 82. For example, the second portion of the ring 92 is combined with the first portion of the ring 90 (e.g., by embedding each second portion of the ring 92 in the first portion of the ring 90 at the corresponding corner region of the ring 95), such that each second portion of the ring 92 and the first portion of the ring 90 are in physical contact before attaching the ring 95 to the package assembly 82. In an embodiment, the height H1 of the first portion of the ring 90 can be the same as the height H2 of the second portion of the ring 92. In an embodiment, the height H1 of the first portion of the ring 90 can be different from the height H2 of the second portion of the ring 92.

[0060] Figure 12B shows Figure 12A a top view of the first package assembly 100 shown in Figure 12BThe first axis (e.g., the x-axis) and the second axis (e.g., the y-axis) are shown, where the first axis and the second axis are orthogonal to each other. The first encapsulation assembly 100 may include four second portions of the ring 92 combined with the first portion of the ring 90 (e.g., by embedding each second portion of the ring 92 into the first portion of the ring 90 at the corresponding corner regions of the ring 95), such that each second portion of the ring 92 and the first portion of the ring 90 are in physical contact. When viewed in a top view, each second portion of the ring 92 may have an L shape, where the four side walls of the second portion of the ring 92 are in physical contact with the first portion of the ring 90. Additionally, each second portion of the ring 92 may be disposed at the corresponding internal corner regions of the ring 95, where the internal corner of the L shape of the second portion of the ring 92 also serves as the internal corner of the ring 95, and where the internal corner of the L shape refers to the junction point where the two arms of the L shape meet, forming a 90° angle between the two arms.

[0061] Due to the method for forming the first encapsulation component 100, advantages can be achieved. The first encapsulation component 100 includes a ring 95 attached to the encapsulation component 82. When observed in a top view, the ring 95 is square or rectangular. The ring 95 includes a first portion of a ring 90, and the first portion of the ring 90 includes a first material (e.g., copper, etc.) having a first CTE in the range from 16 ppm / °C to 20 ppm / °C. The ring 95 also includes a second portion of a ring 92, wherein each second portion of the ring 92 is embedded in the first portion of the ring 90 at a corresponding corner region of the ring 95, and wherein each second portion of the ring 92 is in physical contact with the first portion of the ring 90. When observed in a top view, each second portion of the ring 92 may have an L shape. The second portion of the ring 92 includes a second material (e.g., aluminum, etc.) having a second CTE in the range from 8 ppm / °C to 14 ppm / °C, and the second CTE is lower than the first CTE. These advantages include allowing adjustment of the total coefficient of thermal expansion (CTE) of the ring 95. Thus, the total coefficient of thermal expansion (CTE) of the ring 95 can be optimized to minimize thermal stress within the first encapsulation component 100 and reduce the risk of warping of the encapsulation component 82. In addition, this optimization can also reduce the thermal stress at the interface of the first encapsulation component 100, reducing the risk of forming cracks or delamination (e.g., between the redistribution structure 46 and the discrete encapsulation structure 103). Thus, the reliability of the package is improved. For example, a ring 95 including only the first material having the first CTE may cause the total CTE of the ring 95 to be too high and may generate significant thermal mismatch stress within the first encapsulation component 100 during operation, which increases the risk of delamination or cracks within the first encapsulation component 100. Thus, the reliability of the package may be reduced. In addition, a ring 95 including only the second material having the second CTE may cause the total CTE of the ring 95 to be too low and will increase the risk of warping of the encapsulation component 82. Thus, mechanical stress may be induced in the first encapsulation component 100, which increases the risk of delamination or cracks within the first encapsulation component 100. Thus, it will also adversely affect the reliability of the package.

[0062] In an embodiment, the ring 95 may have a width W1 measured in a direction parallel to the second axis (e.g., the y-axis), and each second portion of the ring 92 may have a width W2 measured in a direction parallel to the second axis (e.g., the y-axis). In an embodiment, the ring 95 may have a length L1 measured in a direction parallel to the first axis (e.g., the x-axis), and each second portion of the ring 92 may have a length L2 measured in a direction parallel to the first axis (e.g., the x-axis). In an embodiment, the length L2 and the width W2 may be the same. In an embodiment, the length L2 and the width W2 are different. In an embodiment, the ratio of the width W2 to the width W1 may be in the range from 0.1 to 0.4. In an embodiment, the ratio of the length L2 to the length L1 may be in the range from 0.1 to 0.4. In an embodiment, the length L2 and the width W2 may be greater than 1 mm.

[0063] Advantages can be achieved by having the ratio of the width W2 of each second portion of the ring 92 to the width W1 of the ring 95 in the range from 0.1 to 0.4. Further advantages can also be achieved by having the ratio of the length L2 of each second portion of the ring 92 to the length L1 of the ring 95 in the range from 0.1 to 0.4. These advantages include allowing adjustment and optimization of the overall coefficient of thermal expansion (CTE) of the ring 95 to minimize thermal stress within the first package component 100 and to reduce the risk of warping of the package component 82. Additionally, such optimization can also reduce the thermal stress at the interface of the first package component 100, reducing the risk of forming cracks or delamination. Thus, package reliability is improved. For example, if the ratio of the width W2 of each second portion of the ring 92 to the width W1 of the ring 95 is less than 0.1, or if the ratio of the length L2 of each second portion of the ring 92 to the length L1 of the ring 95 is less than 0.1, significant thermal mismatch stress may be generated within the first package component 100 during operation (due to the overall CTE of the ring 95 being too high), which increases the risk of delamination (e.g., between the redistribution structure 46 and the discrete package structure 103) or cracks within the first package component 100. Conversely, if the ratio of the width W2 of each second portion of the ring 92 to the width W1 of the ring 95 is greater than 0.4, or if the ratio of the length L2 of each second portion of the ring 92 to the length L1 of the ring 95 is greater than 0.4, the risk of warping of the package component 82 will increase. Thus, mechanical stress may be induced in the first package component 100, increasing the risk of delamination or cracks within the first package component 100. Therefore, package reliability will be adversely affected.

[0064] Advantages can be achieved by making the length L2 and width W2 of each second portion of the ring 92 greater than 1 mm. These advantages include allowing the second portion of the ring 92 to have sufficient surface area at the bottom surface of the second portion of the ring 92 that can be used to firmly attach to the package assembly 82 using the adhesive material 94. For example, a length L2 and / or width W2 less than 1 mm may increase the risk of the second portion of the ring 92 detaching from the package assembly 82 due to the smaller available surface area that is not sufficient to firmly attach to the package assembly 82. Thus, the package reliability may be reduced.

[0065] Figures 12C to 12D A first package assembly 100 according to an alternative embodiment is shown. Unless otherwise noted, like reference numerals in this embodiment (and the embodiments discussed subsequently) represent Figures 1 to 12B the same components formed by the same processes as in the embodiments shown. Thus, the process steps and applicable materials may not be repeated herein. The initial steps of this embodiment are substantially the same as Figures 1 to 11 those shown.

[0066] Figures 12C to 12D The embodiment of Figures 12A to 12B differs from the embodiment of Figures 12C to 12D in that, in the embodiment of Figure 12C , before the first portion of the ring 90 and the second portion of the ring 92 are attached to the package assembly 82, the first portion of the ring 90 and the second portion of the ring 92 are not combined together to form the ring 95. In Figure 12A , the adhesive material 94 is dispensed on the package assembly 82 in a manner similar to that previously described in Figure 12D . According to some embodiments, after the adhesive material 94 is dispensed on the package assembly 82, then the second portion of the ring 92 is attached to the package assembly 82 using the adhesive material 94. The second portion of the ring 92 is attached in place such that when the first portion of the ring 90 is subsequently attached to the package assembly 82, each second portion of the ring 92 will be disposed at the corresponding corner region of the ring 95, as

[0067] shown in Figure 12D .

[0068] In other embodiments, after the adhesive material 94 is dispensed on the package assembly 82, as previously in Figure 12AAs described, the first part of the ring 90 is attached to the encapsulation assembly 82 using the adhesive material 94. After the first part of the ring 90 is attached to the encapsulation assembly 82, the second part of the ring 92 is attached to the first encapsulation assembly 100 using the adhesive material 94, such that the first part of the ring 90 and the second part of the ring 92 are in physical contact and combined to form the ring 95. After the second part of the ring 92 is placed on the encapsulation assembly 82, a curing process can be implemented to cure the adhesive material 94 and strengthen the coupling between the ring 95 and the encapsulation assembly 82.

[0069] Figures 13A to 13B FIG. shows a first encapsulation assembly 100 according to an alternative embodiment. Unless otherwise stated, like reference numerals in this embodiment (and the embodiments discussed subsequently) represent Figures 1 to 12D the same components formed by the same processes as in the embodiments shown. Accordingly, the process steps and applicable materials may not be repeated herein.

[0070] Figure 13A FIG. shows a cross-sectional view of the first encapsulation assembly 100 along Figure 13B the line B-B' shown in FIG. Figure 13B FIG. shows Figure 13A a top view of the first encapsulation assembly 100 shown in FIG. In the Figures 13A to 13B embodiment, the first encapsulation assembly 100 may include four second parts of the ring 92 combined with the first part of the ring 90 (e.g., by embedding each second part of the ring 92 into the first part of the ring 90 at the corresponding corner regions of the ring 95), such that each second part of the ring 92 and the first part of the ring 90 are in physical contact. When viewed in the top view, each second part of the ring 92 may have an L shape, wherein the four side walls of the second part of the ring 92 are in physical contact with the first part of the ring 90. The first part of the ring 90 and the second part of the ring 92 are attached to the encapsulation assembly 82 using the adhesive material 94. Additionally, the first part of the ring 90 may also extend above and overlap with the second part of the ring 92, such that the top surface of each second part of the ring 92 is in physical contact with the first part of the ring 90. In an embodiment, the height H3 of the first part of the ring 90 may be different from the height H4 of the second part of the ring 92. In an embodiment, the height H3 is greater than the height H4.

[0071] Figures 14A to 14B FIG. shows a first encapsulation assembly 100 according to an alternative embodiment. Unless otherwise stated, like reference numerals in this embodiment (and the embodiments discussed subsequently) represent Figures 1 to 13B the same components formed by the same processes as in the embodiments shown. Accordingly, the process steps and applicable materials may not be repeated herein.

[0072] Figure 14Ashows a cross-sectional view of the first encapsulation component 100 along the Figure 14B line C-C' shown in Figure 14B shows Figure 14A a top view of the first encapsulation component 100 shown in Figures 14A to 14B In an embodiment, the first encapsulation component 100 may include four second portions of the ring 92 combined with a first portion of the ring 90 (e.g., by embedding each second portion of the ring 92 into the first portion of the ring 90 at corresponding corner regions of the ring 95), such that each second portion of the ring 92 is in physical contact with the first portion of the ring 90. When viewed in a top view, each second portion of the ring 92 may have an L shape. The first portion of the ring 90 and the second portions of the ring 92 are attached to the encapsulation component 82 using an adhesive material 94. Each second portion of the ring 92 may have a protruding portion 92P and a non-protruding portion 92U, where the protruding portion 92P extends further in a lateral direction from an adjacent sidewall of the discrete encapsulation structure 103 than the non-protruding portion 92U. In an embodiment, the protruding portion may have a width W3, and the non-protruding portion 92U may have a width W4, where the width W3 is greater than the width W4. In an embodiment, the protruding portion 92P is the top portion of the second portion of the ring 92, and the non-protruding portion 92U is the bottom portion of the second portion of the ring 92. In other embodiments, the protruding portion 92P may be provided at any point along the height H2 of the second portion of the ring 92. For example, the protruding portion 92P may be the bottom portion of the second portion of the ring 92, and the non-protruding portion 92U may be the top portion of the second portion of the ring 92. In other embodiments, the protruding portion 92P may be provided between two non-protruding portions 92U, where a first non-protruding portion 92U is provided above the protruding portion 92P, and a second non-protruding portion 92U is provided below the protruding portion 92P.

[0073] Due to the method for forming the first encapsulation component 100, advantages can be achieved. The first encapsulation component 100 includes a ring 95 attached to the encapsulation component 82. When viewed in a top view, the ring 95 is square or rectangular. The ring 95 includes a first portion of the ring 90, and the first portion of the ring 90 includes a first material (e.g., copper, etc.) having a first CTE in the range from 16 ppm / °C to 20 ppm / °C. The ring 95 also includes a second portion of the ring 92. Each second portion of the ring 92 is embedded in the first portion of the ring 90 at a corresponding corner region of the ring 95, and each second portion of the ring 92 is in physical contact with the first portion of the ring 90. When viewed in a top view, each second portion of the ring 92 can have an L shape. The second portion of the ring 92 includes a second material (e.g., aluminum, etc.) having a second CTE in the range from 8 ppm / °C to 14 ppm / °C, and the second CTE is lower than the first CTE. In addition, each second portion of the ring 92 can have one or more protruding portions 92P and one or more non-protruding portions 92U, where the protruding portions 92P extend further in the lateral direction from the adjacent sidewalls of the discrete encapsulation structure 103 than the non-protruding portions 92U. In an embodiment, the protruding portion can have a width W3, and the non-protruding portion 92U can have a width W4, where the width W3 is greater than the width W4. These advantages include allowing the total coefficient of thermal expansion (CTE) of the ring 95 to be adjusted by modifying the width W3 of the protruding portion 92P and the width W4 of the non-protruding portion 92U (e.g., to modify the volume of each second portion of the ring 92). Thus, the total coefficient of thermal expansion (CTE) of the ring 95 can be optimized to minimize the thermal stress within the first encapsulation component 100 and to reduce the risk of warping of the encapsulation component 82. In addition, this optimization can also reduce the thermal stress at the interface of the first encapsulation component 100, reducing the risk of forming cracks or delamination (e.g., between the redistribution structure 46 and the discrete encapsulation structure 103). Thus, the reliability of the package is improved.

[0074] Figures 15A to 15B A first encapsulation component 100 according to an alternative embodiment is shown. Unless otherwise specified, the same reference numerals in this embodiment (and the embodiments discussed subsequently) represent Figures 1 to 14B the same components formed by the same processes as in the embodiments shown. Therefore, the process steps and applicable materials may not be repeated herein.

[0075] Figure 15A A cross-sectional view of the first encapsulation component 100 taken along Figure 15B the line D-D' shown in Figure 15B is shown. Figure 15A A top view of the first encapsulation component 100 shown in Figures 15A to 15BIn an embodiment, the first encapsulation component 100 may include four second portions of the ring 92 combined with the first portion of the ring 90 (e.g., by embedding each second portion of the ring 92 into the first portion of the ring 90 at the corresponding corner regions of the ring 95), such that each second portion of the ring 92 is in physical contact with the first portion of the ring 90. When observed in a top view, each second portion of the ring 92 may have an L shape. The first portion of the ring 90 and the second portions of the ring 92 are attached to the encapsulation component 82 using an adhesive material 94. Each second portion of the ring 92 may have more than one protruding portion 92P and may have more than one non-protruding portion 92U, wherein each protruding portion 92P extends further from the adjacent sidewalls of the discrete encapsulation structure 103 than the non-protruding portion 92U. In an embodiment, the protruding portions 92P and the non-protruding portions 92U may be arranged in an alternating manner.

[0076] Figures 16A to 16B FIG. shows a first encapsulation component 100 according to an alternative embodiment. Unless otherwise specified, the same reference numerals in this embodiment (and the embodiments discussed subsequently) represent Figures 1 to 15B the same components formed by the same processes as those shown in the embodiments. Therefore, the process steps and applicable materials may not be repeated herein.

[0077] Figure 16A FIG. shows a cross-sectional view of the first encapsulation component 100 along Figure 16B the line E-E' shown in FIG. Figure 16B FIG. shows Figure 16A a top view of the first encapsulation component 100 shown in FIG. In Figures 16A to 16B an embodiment, the first encapsulation component 100 may include four second portions of the ring 92 combined with the first portion of the ring 90 (e.g., by embedding each second portion of the ring 92 into the first portion of the ring 90 at the corresponding corner regions of the ring 95), such that each second portion of the ring 92 is in physical contact with the first portion of the ring 90. When observed in a top view, each second portion of the ring 92 may have an L shape. The first portion of the ring 90 and the second portions of the ring 92 are attached to the encapsulation component 82 using an adhesive material 94. Each second portion of the ring 92 may have one or more inclined sidewalls, such that the interface between the first portion of the ring 90 and the second portions of the ring 92 may be inclined at an angle α1. In an embodiment, the width W5 of each second portion of the ring 92 decreases in the direction of moving from the bottom surface of the second portion of the ring 92 towards the top surface of the second portion of the ring 92.

[0078] Due to the method for forming the first encapsulation component 100, advantages can be achieved. The first encapsulation component 100 includes a ring 95 attached to the encapsulation component 82. When observed in a top view, the ring 95 is square or rectangular. The ring 95 includes a first portion of a ring 90. The first portion of the ring 90 includes a first material (e.g., copper, etc.) having a first CTE in the range from 16 ppm / °C to 20 ppm / °C. The ring 95 also includes a second portion of a ring 92. Each second portion of the ring 92 is embedded in the first portion of the ring 90 at a corresponding corner region of the ring 95, and each second portion of the ring 92 is in physical contact with the first portion of the ring 90. When observed in a top view, each second portion of the ring 92 can have an L shape. The second portion of the ring 92 includes a second material (e.g., aluminum, etc.) having a second CTE in the range from 8 ppm / °C to 14 ppm / °C, and the second CTE is lower than the first CTE. In addition, each second portion of the ring 92 can have one or more inclined sidewalls such that the interface between the first portion of the ring 90 and the second portion of the ring 92 can be inclined at an angle α1. In an embodiment, the width W5 of each second portion of the ring 92 decreases in a direction moving from the bottom surface of the second portion of the ring 92 towards the top surface of the second portion of the ring 92. These advantages include allowing adjustment of the total coefficient of thermal expansion (CTE) of the ring 95 by modifying the inclination angle α1 of the interface between the first portion of the ring 90 and the second portion of the ring 92 (e.g., to modify the volume of each second portion of the ring 92). Thus, the total coefficient of thermal expansion (CTE) of the ring 95 can be optimized to minimize the thermal stress within the first encapsulation component 100 and to reduce the risk of warping of the encapsulation component 82. In addition, this optimization can also reduce the thermal stress at the interface of the first encapsulation component 100, reducing the risk of forming cracks or delamination (e.g., between the redistribution structure 46 and the discrete encapsulation structure 103). Thus, the reliability of the package is improved.

[0079] Figures 17A to 17B A first encapsulation component 100 according to an alternative embodiment is shown. Unless otherwise specified, the same reference numerals in this embodiment (and the embodiments discussed subsequently) represent Figures 1 to 16B the same components formed by the same process as in the embodiment shown. Thus, the process steps and applicable materials may not be repeated herein.

[0080] Figure 17A A cross-sectional view of the first encapsulation component 100 taken along Figure 17B the line F - F' shown in Figure 17B is shown. Figure 17A A top view of the first encapsulation component 100 shown in Figures 17A to 17BIn an embodiment, the first encapsulation component 100 may include one or more second portions of the ring 92 (e.g., up to four second portions of the ring 92) combined with the first portion of the ring 90 (e.g., by embedding each second portion of the ring 92 into the first portion of the ring 90 at corresponding corner regions of the ring 95), such that each second portion of the ring 92 is in physical contact with the first portion of the ring 90. When viewed in a top view, each second portion of the ring 92 may have an L shape. The first portion of the ring 90 and the one or more second portions of the ring 92 are attached to the encapsulation component 82 using an adhesive material 94.

[0081] In an embodiment, the ring 95 may include at least one corner region (and up to three corner regions) that does not have a second portion of the ring 92 embedded within the corner region of the ring 95. For example, Figures 17A to 17B The embodiment of shows a first encapsulation component 100 having only one second portion of the ring 92 combined with the first portion of the ring 90 (e.g., by embedding the second portion of the ring 92 into the first portion of the ring 90 at the first corner region of the ring 95). Thus, Figures 17A to 17B The ring 95 shown in has three corner regions that include only the first material of the first portion of the ring 90, and the ring 95 does not have a second portion of the ring 92 embedded within any of these three corner regions. Thus, the inner corner of each of these three corner regions includes the first material of the first portion of the ring 90, and these three corner regions are part of the first portion of the ring 90.

[0082] Due to the method for forming the first encapsulation component 100, advantages can be achieved. The first encapsulation component 100 includes a ring 95 attached to the encapsulation component 82. When observed in a top view, the ring 95 is square or rectangular. The ring 95 includes a first portion of a ring 90. The first portion of the ring 90 includes a first material (such as copper, etc.) having a first CTE in the range from 16 ppm / °C to 20 ppm / °C. The ring 95 also includes one or more second portions of a ring 92. Each second portion of the ring 92 is embedded in the first portion of the ring 90 at a corresponding corner region of the ring 95, and each second portion of the ring 92 and the first portion of the ring 90 are in physical contact. When observed in a top view, each second portion of the ring 92 can have an L shape. The second portion of the ring 92 includes a second material (such as aluminum, etc.) having a second CTE in the range from 8 ppm / °C to 14 ppm / °C, and the second CTE is lower than the first CTE. In addition, at least one corner region (and up to three corner regions) of the ring 95 does not have a second portion of the ring 92 embedded in the corner region of the ring 95. These advantages include allowing local adjustment of the coefficient of thermal expansion (CTE) of different regions of the ring 95 by modifying the position and number of the second portions of the ring 92 embedded in the ring 95. Therefore, the coefficient of thermal expansion (CTE) of different regions of the ring 95 can be optimized to minimize the thermal stress within the first encapsulation component 100 and reduce the risk of warping of the encapsulation component 82. In addition, this optimization can also reduce the thermal stress at the interface of the first encapsulation component 100, reducing the risk of forming cracks or delamination (such as between the redistribution structure 46 and the discrete encapsulation structure 103). Therefore, the reliability of the package is improved.

[0083] Figures 18A to 18B A first encapsulation component 100 according to an alternative embodiment is shown. Unless otherwise specified, the same reference numerals in this embodiment (and the embodiments discussed subsequently) represent Figures 1 to 17B the same components formed by the same process as in the embodiment shown. Therefore, the process steps and applicable materials may not be repeated herein.

[0084] Figure 18A A cross-sectional view of the first encapsulation component 100 along Figure 18B the line G-G' shown in Figure 18B is shown. Figure 18A A top view of the first encapsulation component 100 shown in Figures 18A to 18BIn an embodiment, the first encapsulation component 100 may include one or more second portions of the ring 92 combined with the first portion of the ring 90 such that each second portion of the ring 92 is in physical contact with the first portion of the ring 90. When viewed in a top view, each second portion of the ring 92 may have an L shape, a square shape, or a rectangular shape. The first portion of the ring 90 and the one or more second portions of the ring 92 are attached to the encapsulation component 82 using an adhesive material 94. Each second portion of the ring 92 may be embedded in the first portion of the ring 90 at a corresponding corner region of the ring 95, or may be embedded in the first portion of the ring 90 at any point along the length L1 or width W1 of the ring 95 such that the side walls of the second portion of the ring 92 also serve as the inner edge of the ring 95.

[0085] In an embodiment, the second portion of the ring 92 may be embedded in one or more sides of the ring 95. For example, Figures 18A to 18B it is shown that the second portion of the ring 92 is embedded only in one side of the ring 95 and the remaining three sides of the ring 95 do not have any second portion of the ring 92 embedded therein. In an embodiment, any number of second portions of the ring 92 may be embedded in any number of sides (e.g., up to four sides) of the ring 90.

[0086] Embodiments of the present disclosure have some advantageous features. The embodiments include the formation of an integrated circuit package, the integrated circuit package including: a package assembly including one or more semiconductor chips bonded to an interposer (also referred to as a redistribution structure); and a package substrate bonded to a side of the interposer opposite the one or more semiconductor chips. A sealing adhesive is dispensed around the periphery of the package substrate, and a ring is then placed on the package substrate. The ring is in contact with the package substrate through the sealing adhesive. When viewed in a top view, the ring can be square or rectangular and can include a first portion including a first material having a first coefficient of thermal expansion (CTE). The ring can also include a second portion including a second material, where each of the second portions is disposed at a corner region of the ring. For example, when viewed in a top view, each second portion of the ring can have an L shape and can be embedded in the first portion of the ring at the corresponding corner region of the ring. Specifically, each second portion of the ring can be disposed at an inner corner region of the ring, where the inner corner of the ring is also the inner corner of the corresponding L shape, and where the inner corner of the L shape refers to the junction point where the two arms of the L shape meet (e.g., to form an angle of 90°). The second material can have a second coefficient of thermal expansion (CTE) that is less than the first coefficient of thermal expansion (CTE). Advantageous features of such embodiments include allowing the total coefficient of thermal expansion (CTE) of the ring to be adjusted by adjusting, for example, the shape, volume, and position of the second portion of the ring. Thus, the total coefficient of thermal expansion (CTE) of the ring can be optimized to minimize thermal stress within the integrated circuit package and to reduce the risk of warping of the package substrate. In addition, such optimization can also reduce thermal stress at the interface of the integrated circuit package, such that the risk of forming cracks or delamination is reduced. Thus, package reliability is improved.

[0087] According to an embodiment, the method includes: forming a redistribution structure above a carrier; attaching a semiconductor die to the redistribution structure using a first conductive connector; dispensing a first underfill into a first gap between the semiconductor die and the redistribution structure; bonding a substrate to the redistribution structure using a second conductive connector, the substrate being bonded to a side of the redistribution structure opposite to the semiconductor die; and attaching a ring to the substrate, wherein the ring surrounds the semiconductor die and the first underfill, and wherein the ring includes: a first portion including a first material having a first coefficient of thermal expansion; and a second portion including a second material having a second coefficient of thermal expansion different from the first coefficient of thermal expansion. In an embodiment, each of the second portions of the ring is disposed at a corresponding corner region of the ring. In an embodiment, each of the second portions of the ring is embedded in the first portion of the ring. In an embodiment, the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion. In an embodiment, the first material includes copper and the second material includes aluminum. In an embodiment, when viewed in a top view, the ring has a square shape or a rectangular shape, and when viewed in a top view, each of the second portions of the ring has an L shape. In an embodiment, the method further includes: dispensing a second underfill into a second gap between the redistribution structure and the substrate.

[0088] According to an embodiment, the method includes: attaching a first die and a second die to a redistribution structure; forming a molding material to fill a gap between adjacent sidewalls of the first die and the second die, wherein the molding material surrounds a perimeter of each of the first die and the second die; performing a dicing process to form a first package assembly and a second package assembly, the first package assembly including the first die and a first portion of the redistribution structure, and the second package assembly including the second die and a second portion of the redistribution structure; bonding a substrate to the first package assembly, the substrate bonding to a side of the first portion of the redistribution structure opposite the first die; and attaching a ring to the substrate, wherein the ring surrounds the first die and the first portion of the redistribution structure, and wherein the ring includes: a first portion of the ring, including a first material; and a second portion of the ring, including a second material different from the first material, wherein each of the second portions of the ring is disposed at a corresponding corner region of the ring. In an embodiment, each of the second portions of the ring has at least one inclined sidewall. In an embodiment, a width of each of the second portions of the ring decreases in a direction moving from a bottom surface of the second portion of the ring toward a top surface of the second portion of the ring. In an embodiment, attaching the ring to the substrate includes: dispensing an adhesive material on the substrate; attaching the second portion of the ring to the substrate using the adhesive material; and after attaching the second portion of the ring to the substrate, attaching the first portion of the ring to the substrate using the adhesive material. In an embodiment, attaching the ring to the substrate includes: dispensing an adhesive material on the substrate; attaching the first portion of the ring to the substrate using the adhesive material; and after attaching the first portion of the ring to the substrate, attaching the second portion of the ring to the substrate using the adhesive material. In an embodiment, the first material has a first coefficient of thermal expansion, and the second material has a second coefficient of thermal expansion, and wherein the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion. In an embodiment, the first material includes copper, and the second material includes aluminum. In an embodiment, the first coefficient of thermal expansion is in a range from 16 ppm / °C to 20 ppm / °C, and the second coefficient of thermal expansion is in a range from 8 ppm / °C to 14 ppm / °C.

[0089] According to an embodiment, a semiconductor device includes: a package assembly including: a redistribution structure; and a first die coupled to the redistribution structure; a substrate coupled to the redistribution structure, wherein the redistribution structure is disposed between the first die and the substrate; a ring disposed above the substrate and coupled to the substrate, the ring surrounding the first die and the redistribution structure, and wherein the ring includes: a first portion of the ring including a first material; and a second portion of the ring including a second material different from the first material, wherein each of the second portions of the ring is disposed at a corresponding corner region of the ring. In an embodiment, the first portion of the ring extends above and is in physical contact with the top surface of the second portion of the ring. In an embodiment, when viewed in a top view, each of the second portions of the ring has an L shape. In an embodiment, the first material has a first coefficient of thermal expansion and the second material has a second coefficient of thermal expansion, and wherein the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion. In an embodiment, the first material includes copper and the second material includes aluminum.

[0090] Some embodiments of the present application provide a method of forming a semiconductor device, including: forming a redistribution structure above a carrier; attaching a semiconductor die to the redistribution structure using a first conductive connection; dispensing a first underfill into a first gap between the semiconductor die and the redistribution structure; bonding a substrate to the redistribution structure using a second conductive connection, the substrate being bonded to a side of the redistribution structure opposite to the semiconductor die; and attaching a ring to the substrate, wherein the ring surrounds the semiconductor die and the first underfill, and wherein the ring includes: a first portion including a first material having a first coefficient of thermal expansion; and a second portion including a second material having a second coefficient of thermal expansion different from the first coefficient of thermal expansion.

[0091] In some embodiments, each of the second portions of the ring is disposed at a corresponding corner region of the ring. In some embodiments, each of the second portions of the ring is embedded in the first portion of the ring. In some embodiments, the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion. In some embodiments, the first material includes copper and the second material includes aluminum. In some embodiments, when viewed in a top view, the ring has a square shape or a rectangular shape, and when viewed in the top view, each of the second portions of the ring has an L shape. In some embodiments, the method further includes: dispensing a second underfill into a second gap between the redistribution structure and the substrate.

[0092] Some other embodiments of the present application provide a method of forming a semiconductor device, including: attaching a first die and a second die to a redistribution structure; forming a molding material to fill a gap between adjacent sidewalls of the first die and the second die, wherein the molding material surrounds a perimeter of each of the first die and the second die; performing a dicing process to form a first package assembly and a second package assembly, the first package assembly including the first die and a first portion of the redistribution structure, and the second package assembly including the second die and a second portion of the redistribution structure; bonding a substrate to the first package assembly, the substrate being bonded to a side of the first portion of the redistribution structure opposite to the first die; and attaching a ring to the substrate, wherein the ring surrounds the first die and the first portion of the redistribution structure, and wherein the ring includes: a first portion of the ring, including a first material; and a second portion of the ring, including a second material different from the first material, wherein each of the second portions of the ring is disposed at a corresponding corner region of the ring.

[0093] In some embodiments, each of the second portions of the ring has at least one inclined sidewall. In some embodiments, a width of each of the second portions of the ring decreases in a direction from a bottom surface of the second portion of the ring toward a top surface of the second portion of the ring. In some embodiments, attaching the ring to the substrate includes: dispensing an adhesive material on the substrate; attaching the second portion of the ring to the substrate using the adhesive material; and after attaching the second portion of the ring to the substrate, attaching the first portion of the ring to the substrate using the adhesive material. In some embodiments, attaching the ring to the substrate includes: dispensing an adhesive material on the substrate; attaching the first portion of the ring to the substrate using the adhesive material; and after attaching the first portion of the ring to the substrate, attaching the second portion of the ring to the substrate using the adhesive material. In some embodiments, the first material has a first coefficient of thermal expansion, and the second material has a second coefficient of thermal expansion, and wherein the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion. In some embodiments, the first material includes copper, and the second material includes aluminum. In some embodiments, the first coefficient of thermal expansion is in a range from 16 ppm / °C to 20 ppm / °C, and the second coefficient of thermal expansion is in a range from 8 ppm / °C to 14 ppm / °C.

[0094] Some other embodiments of the present application provide a semiconductor device, comprising: a package assembly, comprising: a redistribution structure; and a first die, coupled to the redistribution structure; a substrate, coupled to the redistribution structure, wherein the redistribution structure is disposed between the first die and the substrate; a ring, disposed above the substrate and coupled to the substrate, the ring surrounding the first die and the redistribution structure, and wherein the ring comprises: a first portion of the ring, comprising a first material; and a second portion of the ring, comprising a second material, the second material being different from the first material, wherein each of the second portions of the ring is disposed at a corresponding corner region of the ring.

[0095] In some embodiments, the first portion of the ring extends above a top surface of the second portion of the ring and is in physical contact with the top surface of the second portion of the ring. In some embodiments, when observed in a top view, each of the second portions of the ring has an L shape. In some embodiments, the first material has a first coefficient of thermal expansion, and the second material has a second coefficient of thermal expansion, and wherein the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion. In some embodiments, the first material comprises copper, and the second material comprises aluminum.

[0096] The features of several embodiments are outlined above so that those skilled in the art can better understand various aspects of the embodiments of the present disclosure. Those skilled in the art should understand that they can easily use the embodiments of the present disclosure as a basis to design or modify other processes and structures for performing the same purposes and / or achieving the same advantages as the embodiments introduced herein. Those skilled in the art should also realize that such equivalent structures do not depart from the spirit and scope of the embodiments of the present disclosure, and that various changes, substitutions, and alterations can be made herein without departing from the spirit and scope of the embodiments of the present disclosure.

Claims

1. A method of forming a semiconductor device, comprising: forming a redistribution structure over a carrier; attaching a semiconductor die to the redistribution structure using a first conductive connector; dispensing a first underfill into a first gap between the semiconductor die and the redistribution structure; bonding a substrate to the redistribution structure using a second conductive connector, the substrate being bonded to a side of the redistribution structure opposite to the semiconductor die; and attaching a ring to the substrate, wherein the ring surrounds the semiconductor die and the first underfill, and wherein the ring comprises: a first portion comprising a first material having a first coefficient of thermal expansion; and a second portion comprising a second material having a second coefficient of thermal expansion different from the first coefficient of thermal expansion.

2. The method according to claim 1, wherein, Each of the second portions of the ring is disposed at a corresponding corner region of the ring.

3. The method according to claim 2, wherein Each of the second portions of the ring is embedded in the first portion of the ring.

4. The method according to claim 3, wherein The first coefficient of thermal expansion is greater than the second coefficient of thermal expansion.

5. The method according to claim 3, wherein, The first material comprises copper, and the second material comprises aluminum.

6. The method according to claim 3, wherein When viewed in a top view, the ring has a square shape or a rectangular shape, and when viewed in the top view, each of the second portions of the ring has an L shape.

7. The method according to claim 3, further comprising: dispensing a second underfill into a second gap between the redistribution structure and the substrate.

8. A method of forming a semiconductor device, comprising: attaching a first die and a second die to a redistribution structure; forming a molding material to fill a gap between adjacent sidewalls of the first die and the second die, wherein the molding material surrounds a perimeter of each of the first die and the second die; performing a dicing process to form a first package assembly and a second package assembly, the first package assembly comprising the first die and a first portion of the redistribution structure, and the second package assembly comprising the second die and a second portion of the redistribution structure; bonding a substrate to the first package assembly, the substrate being bonded to a side of the first portion of the redistribution structure opposite to the first die; and attaching a ring to the substrate, wherein the ring surrounds the first die and the first portion of the redistribution structure, and wherein the ring comprises: a first portion of the ring comprising a first material; and a second portion of the ring comprising a second material different from the first material, wherein each of the second portions of the ring is disposed at a corresponding corner region of the ring.

9. The method according to claim 8, wherein Each of the second portions of the ring has at least one inclined sidewall.

10. A semiconductor device, comprising: a package assembly, comprising: a redistribution structure; and a first die, coupled to the redistribution structure; a substrate, coupled to the redistribution structure, wherein the redistribution structure is disposed between the first die and the substrate; a ring, disposed over the substrate and coupled to the substrate, the ring surrounding the first die and the redistribution structure, and wherein the ring comprises: The first part of the ring, including a first material; and The second part of the ring, including a second material different from the first material, wherein each of the second parts of the ring is disposed at a corresponding corner region of the ring.

Images