Wafer structure for temperature measurement and method for correcting annealing parameters of epitaxial growth equipment

Abstract

The invention provides a wafer structure for temperature measurement and a correction method for annealing parameters of epitaxial growth equipment, the wafer structure comprises a plurality of wafer units arranged in an array, each wafer unit comprises a plurality of grooves, the plurality of grooves are respectively a first groove, a second groove and a third groove, each groove comprises a body part and a doping part, and the body part and the doping part are arranged in the first groove, the second groove and the third groove respectively. The body part is provided with a groove, the doping part is located on the bottom surface of the body part, the first groove is located in the center area of the wafer unit, the second grooves are sequentially arranged on the periphery of the first groove at intervals in a surrounding mode in the direction away from the first groove, and the third groove is connected with the first groove and the second grooves. The doped part of the first groove is in contact with the doped part of the second groove, and the depth-to-width ratio of the grooves is larger than 2. By adopting the wafer structure for measuring the temperature, the problem that the wafer structure cannot reflect the temperature distribution in the reaction chamber of the epitaxial growth equipment is solved.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and more particularly, to a wafer structure for temperature measurement and a method for correcting annealing parameters of an epitaxial growth apparatus. Background Art

[0002] When growing a silicon carbide epitaxial layer on a wafer, the uniformity of the temperature distribution on the wafer surface has a great influence on the doping concentration, film thickness distribution, defect types and defect numbers of the epitaxial layer grown on the wafer. In addition, during the growth of silicon carbide, a by-product 3C-SiC is deposited on the surface of the graphite parts in the chamber. The by-product will directly affect the quality of epitaxial growth. Therefore, in the actual production process, the reaction chamber is regularly opened to clean the by-products on the graphite parts. After reinstalling the cleaned graphite parts, when epitaxial growth is carried out on the wafer again, it may cause a change in the temperature field and affect the stability of the epitaxial process. Therefore, the uniformity of the temperature distribution in the reaction chamber is crucial for maintaining the stability of the epitaxial process.

[0003] Existing high-temperature measurement technologies are divided into contact measurement and non-contact measurement. Among them, in non-contact measurement, the temperature measurement points in the SiC epitaxial furnace are limited and it is difficult to reflect the temperature distribution on the surface of the epitaxial wafer; while in contact measurement, the detector is usually inserted into the reaction chamber for detection, but this will introduce impurities into the reaction chamber, and the existing temperature measurement wafers cannot reflect the temperature distribution in the reaction chamber, resulting in difficulty in accurately controlling the temperature distribution in the reaction chamber, easily causing uneven temperature distribution on the surface of the wafer, making the thickness and doping concentration of the generated epitaxial layer uneven, and generating temperature-related defects such as stacking faults, triangular defects and micropits, etc., which are difficult to effectively control.

[0004] The above information disclosed in the background art section is only used to enhance the understanding of the background art of the technology described in this article. Therefore, the background art may contain certain information that is not prior art known to those skilled in the art in this country. Summary of the Invention

[0005] The main object of the present application is to provide a wafer structure for temperature measurement and a method for correcting annealing parameters of an epitaxial growth apparatus to solve the problem that the existing wafer structure cannot reflect the temperature distribution in the reaction chamber of the epitaxial growth apparatus.

[0006] To achieve the above object, according to one aspect of the present application, there is provided a wafer structure for temperature measurement, including a plurality of wafer units arranged in an array. The wafer units include a plurality of trenches, and the plurality of trenches are respectively a first trench, a second trench, and a third trench. Each trench includes a body portion and a doped portion. The body portion has a groove, and the doped portion is located on the bottom surface of the body portion. The first trench is located in the central region of the wafer unit, and a plurality of the second trenches are sequentially and spacedly disposed around the outer periphery of the first trench in a direction away from the first trench. The third trench connects the first trench and the plurality of second trenches, so that the doped portion of the first trench is connected to the doped portion of the second trench, and the aspect ratio of the trench is greater than 2.

[0007] Optionally, the wafer structure further includes a fourth trench connecting the first trench and the second trench, and the aspect ratio of the fourth trench is greater than the aspect ratio of the third trench.

[0008] Optionally, in the direction away from the first trench, the interval between adjacent second trenches increases. The wafer structure further includes a conductive layer in contact with the doped portion.

[0009] Optionally, a part of the conductive layer is located on the first surface of the wafer unit.

[0010] Optionally, the doping element of the doped portion includes any one or more of P, N, Al, Li, Ga, Be, and Ge.

[0011] Optionally, the minimum distance between the second trench farthest from the first trench and the first trench is greater than or equal to 0.5 mm.

[0012] According to another aspect of the present application, there is provided a method for correcting annealing parameters of an epitaxial growth device. The correction method includes: annealing the wafer structure, where the wafer structure is the wafer structure for temperature measurement; after the annealing treatment, selecting a plurality of wafer units in the wafer structure, and using a detection device to detect the wafer units to obtain a plurality of resistivities of the plurality of wafer units; determining a plurality of actual temperatures of the plurality of wafer units according to a preset relationship and the resistivity, where the preset relationship is the relationship between the resistivity and the temperature of the annealing treatment, and adjusting the annealing parameters of each region of the epitaxial growth device according to the target temperature of the annealing treatment and the plurality of actual temperatures, so that the plurality of actual temperatures of the plurality of wafer units after the annealing treatment all reach the target temperature.

[0013] Optionally, the step of obtaining the preset relationship includes: performing the annealing treatment on the plurality of wafer structures at different temperatures; after the annealing treatment, respectively selecting a plurality of the wafer units in each of the wafer structures, and using the detection device to detect the plurality of wafer units to obtain the resistivity of the plurality of wafer units; obtaining the preset relationship between the temperature and the resistivity according to the temperature of the annealing treatment and the resistivity.

[0014] Optionally, the step of using a detection device to detect the wafer units to obtain the resistivity of the plurality of wafer units includes: using a contact resistance test device to detect the wafer units to obtain the sheet resistance of the doped portion of the wafer units; obtaining the resistivity of the wafer units according to the sheet resistance and the length of the detection line used by the contact resistance test device.

[0015] Optionally, the step of using a detection device to detect the wafer units to obtain the resistivity of the plurality of wafer units includes: using a single-column dielectric resonator to detect the wafer units to obtain the resistivity of the wafer units.

[0016] Applying the technical solution of the present application, a plurality of trenches are provided in the wafer unit, where the plurality of trenches include a first trench, a second trench, and a third trench. The trench includes a body portion and a doped portion. The doped portion is located at the bottom of the groove of the body portion, and the aspect ratio of the trench is greater than or equal to 2, which can, to a certain extent, prevent the gas in the epitaxial process conditions in the reaction chamber from diffusing to the bottom of the trench, and protect the doped portion in the trench from being etched by the high-temperature gas therein under the epitaxial process conditions. The first trench is located in the central region of the wafer. The second trenches are disposed around the outer periphery of the first trench at intervals, and there is an interval between adjacent second trenches. The third trench connects the first trench and the second trenches, so that the plurality of trenches communicate with each other. The doped portion of the first trench is in contact with the doped portion of the second trench, and the doped portion can conduct electricity, so that there is an electric current loop in the wafer unit. When there is an electric current in the wafer unit, its resistivity can be known. Since there is a preset relationship between the resistivity and the annealing temperature of the reaction chamber, the annealing temperature of each region in the reaction chamber can be known according to the resistivity, and then the temperature distribution in the reaction chamber can be known. The above-mentioned wafer structure solves the problem in the prior art that the wafer structure cannot reflect the temperature distribution in the reaction chamber of the epitaxial growth equipment. Description of the Drawings

[0017] The specification drawings constituting a part of the present application are used to provide a further understanding of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation to the present application. In the drawings:

[0018] Figure 1Shows a top - view structural schematic diagram of a wafer structure for temperature measurement proposed in an embodiment of the present application;

[0019] Figure 2 Shows a top - view structural schematic diagram of a wafer unit proposed in an embodiment of the present application;

[0020] Figure 3 Shows a cross - sectional structural schematic diagram of a wafer unit proposed in an embodiment of the present application;

[0021] Figure 4 Shows a top - view structural schematic diagram of another wafer unit proposed in an embodiment of the present application;

[0022] Figure 5 Shows a cross - sectional structural schematic diagram of another wafer unit proposed in an embodiment of the present application;

[0023] Figure 6 Shows a top - view structural schematic diagram of yet another wafer unit proposed in an embodiment of the present application;

[0024] Figure 7 Shows a flowchart of a method for correcting annealing parameters of an epitaxial growth device proposed in an embodiment of the present application.

[0025] Among them, the above - mentioned drawings include the following reference numerals:

[0026] 1, wafer structure; 2, wafer unit; 3, first trench; 4, second trench; 5, third trench; 6, body part; 7, doped part; 8, conductive layer; 9, fourth trench. Detailed implementation manners

[0027] It should be noted that the following detailed descriptions are all illustrative and are intended to provide further explanations for the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present application belongs.

[0028] It should be noted that the terms used herein are only for describing specific implementation manners and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0029] It should be noted that the terms "first", "second", etc. in the description, claims and above-mentioned drawings of the present invention are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances for the embodiments of the present invention described herein. In addition, the terms "comprising" and "having" and any near-synonymous expressions of "comprising" and "having" are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily limit to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0030] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element can be directly on the other element, or there can also be intermediate elements. Moreover, in the description and claims, when an element is described as "connected" to another element, the element can be "directly connected" to the other element, or "connected" to the other element through a third element.

[0031] As introduced in the background art, in the prior art, a detector is usually inserted into the reaction cavity for detection, but this will introduce impurities into the reaction cavity, and the existing temperature-measuring wafers cannot reflect the temperature distribution in the reaction chamber, thus making it difficult to accurately control the temperature distribution in the reaction chamber, easily resulting in uneven surface temperature distribution of the wafer, making the thickness and doping concentration of the grown epitaxial layer uneven, and further resulting in more defects in the epitaxial layer. To solve the problem that the wafer structure in the prior art cannot reflect the temperature distribution in the reaction chamber of the epitaxial growth equipment, the embodiments of the present application provide a wafer structure for temperature measurement and a correction method for the annealing parameters of the epitaxial growth equipment.

[0032] According to one aspect of the present application, as Figures 1 to 3 shown, a wafer structure 1 for temperature measurement is provided, including a plurality of wafer units 2 arranged in an array. The wafer unit 2 includes a plurality of trenches, and the plurality of trenches are respectively a first trench 3, a second trench 4, and a third trench 5. Each trench includes a body portion 6 and a doped portion 7. The body portion 6 has a groove, and the doped portion 7 is located on the bottom surface of the body portion 6, wherein: the first trench 3 is located in the central region of the wafer unit 2; a plurality of second trenches 4 are sequentially and spaced apart around the outer periphery of the first trench 3 in a direction away from the first trench 3; the third trench 5 connects the first trench 3 and the plurality of second trenches 4, and the third trench 5 penetrates through the first trench 3 and the plurality of second trenches 4, so that the doped portion of the first trench 3 and the doped portion 7 of the second trench 4 are connected to each other, and the aspect ratio of the trench is greater than 2. Among them, the body portion 6 and the doped portion 7 can be an integral structure or two separate structures.

[0033] When the existing temperature-measuring wafer detects the annealing temperature under epitaxial conditions in the reaction chamber, it will be etched due to the gas for cleaning the surface of the temperature-measuring wafer. Due to the stability of the temperature-measuring wafer material, the thickness of the conductive layer formed by injection / diffusion in the temperature-measuring wafer is relatively small and will be completely etched under epitaxial conditions. As a result, the conductive layer of the wafer cannot be used to reflect the annealing temperature of the reaction chamber, and it is difficult to directly obtain the temperature distribution of the reaction chamber through the temperature-measuring wafer, and it is thus difficult to adjust the temperature distribution of the reaction chamber. In this application, the third trench of the wafer unit is connected to the first trench and the second trench, so that multiple trenches communicate with each other. The trench includes a body portion and a doped portion, and the doped portion is located at the bottom of the groove of the body portion. Since multiple trenches communicate with each other, the doped portions on the bottom surfaces of the grooves of the body portions in different trenches are also in contact with each other. The doped portions form a closed-loop structure connected end to end, and the doped portions can conduct electricity, so that there is a current loop in the wafer unit. When there is a current in the wafer unit, its resistivity can be known. Since there is a preset relationship between the resistivity and the annealing temperature of the reaction chamber, the annealing temperature of each region in the reaction chamber can be known according to the resistivity, and thus the temperature distribution in the reaction chamber can be known. The above wafer structure solves the problem in the prior art that the wafer structure cannot reflect the temperature distribution in the reaction chamber of the epitaxial growth equipment.

[0034] Figure 1 x and y therein are two coordinate axes set for arranging the wafer units in an array, where the labeling form of the coordinate axes is not limited to this.

[0035] Generally, the epitaxial growth conditions in the reaction chamber need to be carried out under a simulated growth environment. Usually, the temperature is 1500°C to 1700°C, the reaction pressure is 60 to 200 mbar, the annealing atmosphere is H2 (or HCl), Ar or a mixed gas of both, and the flow rate of H2 (or HCl) is 20 to 200 SLM. Among them, H2 (or HCl) will react with the doped part at high temperature and then consume the doped part. When the doped part is prepared by ion implantation process / diffusion process, due to the stable material properties of the SiC wafer, the thickness of the doped part formed by ion implantation / diffusion is relatively small (about 100 nm to 2 μm). And H2 (or HCl) at high temperature has a strong etching effect on the SiC wafer. If the doped part is directly formed by ion implantation on the surface of the wafer unit and then annealed in a high-temperature H2 (or HCl) environment, the high-temperature H2 (or HCl) will directly etch away the doped part with a relatively small thickness, resulting in the destruction of the doped part and causing the temperature measurement data to be distorted. Furthermore, the resistivity of the doped part cannot be read, and the annealing temperature cannot be matched. To alleviate the above problems, the aspect ratio of the trench in this application is limited to be greater than or equal to 2 within this range, which can make it more difficult for H2 (or HCl) to diffuse to the bottom of the trench, resulting in less H2 (or HCl) at the bottom and reducing the etching effect on the doped part. For example, when the width of the trench is relatively large, the depth will be deep enough. In this way, even if the width of the trench is relatively large and H2 (or HCl) is easy to diffuse into the trench, due to the deep depth, the amount of H2 (or HCl) diffusing to the bottom of the trench will be relatively small, and thus the influence on the doped part will be small. Limiting the aspect ratio of the trench within this range can make the width of the trench narrow enough when the depth is relatively small. In this way, due to the narrow width, very little H2 (or HCl) diffuses to the bottom of the trench and contacts the doped part. Even if the depth is relatively shallow, the concentration of H2 (or HCl) contacting the doped part will be relatively small, and thus the influence on the doped part will be small.

[0036] In addition, due to the low concentration of H2 (or HCl) at the bottom of the main body part, it is more difficult for the substances generated by the reaction of H2 (or HCl) with the doped part to be carried away, further reducing the reaction etching rate. The etching rate of the doped part on the surface of a normal planar SiC wafer by H2 (or HCl) is about 50 nm / min, and the etching rate of the doped part at the bottom of the trench is about 2 nm / h, which basically has no impact on the doped part.

[0037] In some alternative embodiments, the doping elements of the doping portion include any one or more of P, N, Al, Li, Ga, Be, and Ge. The above doping elements have a slow diffusion rate after being implanted into the wafer structure and are difficult to diffuse out of the wafer structure, which can prevent the elements from diffusing out during the annealing process and contaminating the chamber. When the epitaxial process temperature is 1500~1800 °C, the above doping elements have a slow diffusion rate, and the resistivity will not be inaccurate due to diffusion. Therefore, it is suitable to use resistivity to reflect temperature changes. The diffusion range of the above doping elements at a high temperature of 1800 °C is 10 -17 ~10 -15 cm 2 / s.

[0038] In some embodiments, the above wafer structure may be a silicon carbide wafer with semi-insulating properties, and the crystal orientation may be 4H-SiC with <0001> or 6H-SiC with <0001>. The resistivity of the wafer structure is greater than 10 12 Ωcm.

[0039] In some embodiments, the above doping portion can be prepared by an ion implantation process (implantation temperature ≤ 500 °C), and can also be prepared by a diffusion process. The thickness of the doping portion can be 50 nm~2000 nm, so that the thickness of the wafer unit can be made relatively thick under the allowable preparation process. A relatively thick thickness can make the doping portion more stable, and even if part of the doping portion is consumed, it will not affect the overall doping portion. The doping concentration can be 1×10 18 ~5×10 20 cm -3 , such as 2×10 18 cm -3 , 3×10 18 cm -3 , 4×10 18 cm -3 , 5×10 18 cm - 3, 3×10 20 cm -3 etc. SiC wafer is a wide-bandgap semiconductor material, and its resistivity depends on the concentration of carriers (free electrons or holes). Introducing doping ions into the SiC wafer can change the conductive properties of the wafer. When the doping concentration increases, the concentration of carriers also increases, and the resistivity of the material decreases accordingly. Using high-concentration doping within the above range for the doping portion can make the influence of temperature on the carrier concentration in the doping portion more sensitive. Even a small change in temperature will cause a large change in the carrier concentration, thereby leading to an obvious change in resistivity, which can better reflect the small change in temperature and more accurately reflect the temperature distribution of the reaction chamber.

[0040] In some alternative embodiments, such as Figure 4 and Figure 5 shown, in the direction away from the first trench 3, the interval between adjacent second trenches 4 increases. The wafer structure further includes a conductive layer 8, and the conductive layer 8 is in contact with the doped portion 7. As Figure 4 shown in the dashed box in , in the direction away from the first trench 3, the spacing between adjacent second trenches 4 gradually increases, and data measurement points of the adjacent second trenches 4 with different spacings can be obtained. Based on more data measurement points, the resistivity of the wafer units in the wafer structure can be obtained more accurately. On the basis of improving the resistivity accuracy, the accuracy of the temperature reflected by the resistivity can also be further improved, thereby improving the accuracy of the finally obtained temperature distribution.

[0041] In some alternative embodiments, such as Figure 6 shown, the wafer structure further includes a fourth trench 9. The fourth trench 9 connects the first trench 3 and the second trench 4. More resistivity measurement points of the wafer structure can be added at the fourth trench 9. Based on more data measurement points, the resistivity of the wafer units in the wafer structure can be obtained more accurately. On the basis of improving the resistivity accuracy, the accuracy of the temperature reflected by the resistivity can also be further improved, thereby improving the accuracy of the finally obtained temperature distribution. The aspect ratio of the fourth trench 9 is greater than that of the third trench 5. By introducing the fourth trench 9 with a doped portion and a larger aspect ratio, by increasing the aspect ratio of the trench, the diffusion of gas to the bottom of the trench can be effectively blocked better, reducing the contact between H2 or (HCl) and the doped portion 7, thereby significantly reducing the etching rate of H2 or (HCl) on the doped portion at high temperature and protecting the integrity of the doped portion 7.

[0042] In some alternative embodiments, such as Figure 2 , Figure 4 and Figure 6 shown, the minimum distance between the second trench 4 farthest from the first trench 3 and the first trench 3 is greater than or equal to 0.5 mm, that is, the diameter D of the second trench 4 farthest from the first trench 3 is greater than or equal to 1 mm. Setting the diameter of the overall structure formed by each trench of the wafer unit 2 to be greater than or equal to 1 mm can not only generate a current loop with a larger current for facilitating the calculation of resistivity, but also ensure that the number of wafer units 2 in the wafer structure is sufficient to reflect the temperature distribution on the surface of the wafer structure, and the overall size of the trenches in each wafer unit 2 is large enough to meet the requirements of various non-contact test technologies including single-column dielectric resonance testing, increasing the flexibility and applicability of the temperature measurement scheme.

[0043] In some embodiments, microfluidic cooling channels are added to the back or side of the wafer structure, and a cooling liquid or gas is filled in the channels. When there are some errors in the calibration of the epitaxial growth equipment, the overall temperature of the wafer structure can be adjusted by circulating the liquid or gas, so as to improve the uneven surface temperature distribution caused by the above errors as much as possible. The microfluidic cooling channels can actively control the wafer temperature, reduce the temperature unevenness caused by heat accumulation, and further improve the temperature controllability of epitaxial growth on the wafer structure.

[0044] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention.

[0045] Figure 7 It is a flowchart of a method for calibrating annealing parameters of an epitaxial growth device according to an embodiment of the present application. As Figure 7 shown, the method includes the following steps:

[0046] Step S201, perform annealing treatment on the wafer structure, where the wafer structure is the above-mentioned wafer structure for temperature measurement;

[0047] Specifically, the wafer structure can be a silicon carbide wafer with semi-insulating properties, 4H-SiC with a crystal orientation of <0001>, or 6H-SiC with a crystal orientation of <0001>. The resistivity of the wafer structure is greater than 10 12 Ωcm. This wafer structure is used to test the annealing parameters at various locations in the epitaxial growth equipment, and the annealing temperature of the above annealing treatment is a known temperature.

[0048] Step S202, after the annealing treatment, select a plurality of wafer units in the wafer structure, and use a detection device to detect the wafer units to obtain the resistivities of the plurality of wafer units;

[0049] Specifically, a plurality of wafer units forming a square array can be selected in the wafer structure, and a plurality of wafer units forming a cross-shaped array can also be selected as test units, and the resistivity of the doped part of the above test units is detected. The above detection device can be a non-contact detection device, such as the test method of a single-post dielectric resonator (SiPDR), or a contact detection device, such as a detection device using the transmission length method.

[0050] Step S203: Determine the actual temperatures of multiple wafer units according to a preset relationship and resistivity. The preset relationship is the relationship between resistivity and the temperature of the annealing process. Then, adjust the annealing parameters of each area of the epitaxial growth equipment according to the target temperature of the annealing process and the multiple actual temperatures, so that the multiple actual temperatures of the multiple wafer units after the annealing process all reach the target temperature.

[0051] Specifically, before the above tests, multiple groups of detections on the annealing situation of the epitaxial growth equipment have been carried out using multiple wafer structures, and a preset relationship between resistivity and annealing temperature has been obtained. According to this preset relationship and the resistivity obtained above, the actual temperature on the surface of each wafer unit is matched to further reflect the actual annealing temperature of the reaction chamber where the wafer unit is located. Then, adjust the actual annealing temperature according to the target temperature to correct the annealing parameters of the reaction chamber in the epitaxial growth equipment.

[0052] Through this embodiment, the resistivity of the doping parts of multiple wafer units is detected. Combining the preset relationship can reflect the temperatures of each area on the surface of the wafer structure, which is equivalent to directly reflecting the actual temperature distribution of the reaction chamber (or the surface of the wafer structure). According to the actual temperature distribution, the annealing temperature of the areas in the reaction chamber that exceed or are lower than the target temperature can be regulated, thereby ensuring the uniformity of the annealing temperature in each area of the reaction chamber. When the regulated reaction chamber performs epitaxial growth on the wafer structure that needs to be epitaxially grown, the surface of the wafer structure can be heated evenly, and then a uniform surface temperature distribution can be obtained, and an epitaxial layer with uniform epitaxial thickness and doping concentration can be formed on the wafer structure. On the other hand, after replacing the internal graphite parts in the epitaxial growth equipment, the epitaxial growth equipment with the new graphite parts can be detected, and the temperature field can be regulated according to the preset relationship between the detected resistivity and the annealing temperature. In this way, after replacing the graphite parts, the annealing temperatures of each area in the reaction chamber of the epitaxial growth equipment can be made uniform. When epitaxial growth is performed on the wafer structure, a uniform temperature distribution can be obtained on the surface of the wafer structure, making the thickness and doping concentration of the generated epitaxial layer more uniform and having fewer defects. The above calibration method using the wafer structure can obtain the resistivity of the wafer structure, and further realize the detection of the annealing temperature distribution of the reaction chamber of the epitaxial processing equipment by the wafer structure, and further adjust it, solving the problem in the prior art that the wafer structure cannot reflect the temperature distribution in the reaction chamber of the epitaxial growth equipment.

[0053] In the specific implementation process, before the above-mentioned step S201, the method further includes: annealing multiple wafer structures at different temperatures; after the annealing treatment, selecting multiple wafer units in each wafer structure respectively, and using a detection device to detect the multiple wafer units to obtain the resistivity of the multiple wafer units; obtaining a preset relationship between temperature and resistivity according to the annealing temperature and the resistivity. In this way, a preset relationship between temperature and resistivity can be obtained, providing a basis for adjusting the epitaxial growth equipment using the wafer structure subsequently.

[0054] In the above implementation process, each test of the resistivity-temperature relationship requires a new temperature measurement unit. This temperature measurement unit is not necessarily the entire wafer structure, but can also be multiple wafer units (with doping parts). The wafer units are formed after the entire wafer structure is laser-cut.

[0055] In some embodiments, multiple wafer structures are placed in an epitaxial growth equipment for annealing treatment. The annealing temperature is known and the annealing temperature of each wafer structure is different. After the annealing treatment is completed, the resistivity of the doping parts of multiple wafer units in each wafer structure can be calculated by using the resistance test method and the magnitude of the current in the above current loop. Then, a preset relationship is established between the above resistivity and temperature. Establishing the preset relationship using the same wafer structure can make the subsequent matching of resistivity and annealing temperature more accurate.

[0056] In order to provide a more accurate detection of the preset relationship between resistivity and temperature, the above-mentioned step S202 of the present application can be implemented through the following steps. The step of using a detection device to detect the wafer units to obtain the resistivity of the multiple wafer units includes: using a contact resistance test device to detect the wafer units to obtain the sheet resistance of the doping parts of the wafer units; obtaining the resistivity of the wafer units according to the sheet resistance and the length of the detection line used by the contact resistance test device. Using a contact detection method is more accurate than a non-contact detection method, so that a preset relationship between resistivity and temperature can be established more accurately.

[0057] The detection method adopted by the above contact resistance testing equipment can be the transmission length method. By measuring the total resistance between the electrodes in the wafer unit that are in contact with the doped part at different spacings, a linear relationship between the total resistance and the spacing can be established (total resistance = contact resistance + bulk resistance × spacing). Among them, the total resistance, contact resistance, and spacing can all be obtained through measurement. Then, by calculating using the expression of the linear relationship, the bulk resistance of the doped part (resistance per unit volume, also called sheet resistance) can be obtained. Then, according to the bulk resistance and the length of the transmission line adopted by the transmission length method, the resistivity of the doped part can be calculated. In the wafer unit of the present application, the spacing between adjacent second trenches increases. Combined with the conductive layer, multiple measurement points can be provided to establish the above linear relationship. Moreover, the resistivity detection of the wafer unit of the present application can adopt non-contact detection methods and contact detection methods, with strong flexibility.

[0058] The expression of the linear relationship between the total resistance and the spacing is:

[0059] R t =2R c +(R sh / W)d,

[0060] Among them, R t is the total resistance between two conductive layers, R c is the contact resistance between the conductive layer and the doped part, R sh is the sheet resistance (resistance per unit volume) of the doped part, d is the spacing between two conductive layers, and W is the width of the part where the conductive layer is in contact with the doped part.

[0061] Through the above expression, Rsh can be calculated, and then the resistivity can be calculated according to the following expression:

[0062] ,

[0063] Among them, is the resistivity, L T is the length of the transmission line adopted by the transmission line length method.

[0064] The resistivity of the doped part is obtained through the transmission line length method or the test method of a single-column dielectric resonator. Then, a preset relationship between the resistivity and the annealing temperature is established according to the annealing temperature. Or after obtaining the resistivity, the activation rate of the doped part of the wafer unit at that place can be further speculated, and then a preset relationship between the activation rate and the annealing temperature information can be obtained. According to this preset relationship, the temperature at each place in the reaction chamber of the subsequent epitaxial growth equipment is adjusted. And the above technical solution enables the wafer structure to adopt both the test method of a single-column dielectric resonator and the transmission line test method, making the use of the wafer structure more flexible.

[0065] In some embodiments, the above step S203 can be specifically implemented through the following steps: The step of using a detection device to detect a wafer unit to obtain the resistivity of multiple wafer units includes: using a single-column dielectric resonator to detect the wafer unit to obtain the resistivity of the wafer unit. The non-contact detection method using a single-column dielectric resonator can reduce manual operations. After selecting the wafer unit to be detected, controlling the mobile device to move the wafer unit directly above the single-column dielectric resonator can perform the detection, and the operation process of this method is simpler.

[0066] In order to enable those skilled in the art to more clearly understand the technical solution of the present application, the implementation process of the method for correcting the annealing parameters of the epitaxial growth equipment of the present application will be described in detail below in conjunction with specific embodiments.

[0067] This embodiment relates to a specific method for correcting the annealing parameters of an epitaxial growth equipment, including the following steps:

[0068] Step S1: Perform annealing treatments with different temperatures on multiple wafer structures.

[0069] Step S2: After the annealing treatment, select multiple wafer units in each wafer structure respectively, and use a detection device to detect the multiple wafer units to obtain the resistivity of the multiple wafer units.

[0070] Step S3: Obtain a preset relationship between temperature and resistivity according to the temperature and resistivity of the annealing treatment.

[0071] Step S4: Perform an annealing treatment on the wafer structure, and the wafer structure is the above-mentioned wafer structure for temperature measurement.

[0072] Step S5: After the annealing treatment, select multiple wafer units in the wafer structure, and use a detection device to detect the wafer units to obtain the multiple resistivities of the multiple wafer units.

[0073] Step S6: Determine the multiple actual temperatures of the multiple wafer units according to the preset relationship and the resistivity. The preset relationship is the relationship between the resistivity and the temperature of the annealing treatment, and adjust the annealing parameters of each region of the epitaxial growth equipment according to the target temperature of the annealing treatment and the multiple actual temperatures, so that the multiple actual temperatures of the multiple wafer units after the annealing treatment all reach the target temperature.

[0074] From the above description, it can be seen that the wafer structure for temperature measurement and the method for correcting the annealing parameters of the epitaxial growth equipment provided by the present application achieve the following technical effects:

[0075] 1) The multiple wafer units in the wafer structure used for temperature measurement in the present application can be used as temperature measurement units for temperature measurement. The wafer structure is placed in an epitaxial growth device that needs to adjust the temperature of the reaction chamber, and the wafer structure is annealed. The resistivity of the doped parts of the multiple wafer units of the wafer structure is detected, and the temperature corresponding to the multiple wafer units is obtained according to the obtained resistivity and the preset relationship between the resistivity and the annealing temperature, and then the temperature distribution of the surface of the wafer structure and the reaction chamber of the epitaxial growth device is obtained. Since the resistivity of the doped part is not detected inside the reaction chamber, impurities will not be introduced into the reaction chamber. The bottom of the above-mentioned groove is deeper than the first surface of the wafer structure, which can make it more difficult for the gas used to remove impurities on the surface of the wafer structure in the epitaxial growth device to diffuse to the bottom of the groove, so that the doped part and the gas basically do not react, ensuring the integrity of the doped part, and then the resistivity test of the doped part can be smoothly performed. The wafer structure used for temperature measurement in the present application solves the problem of detecting the temperature distribution of the reaction chamber and the wafer surface without introducing impurities.

[0076] 2) The wafer structure of the present application is used to establish a preset relationship between resistivity and annealing temperature, which can make the subsequent adjustment of the epitaxial growth equipment more accurate.

[0077] 3) In the method for correcting the annealing parameters of the epitaxial growth equipment of the present application, the resistivity of the doped parts of multiple wafer units is detected, and the temperature of each area on the surface of the wafer structure can be reflected in combination with the preset relationship, which is equivalent to directly reflecting the actual temperature distribution of the reaction chamber and the surface of the wafer structure. According to the actual temperature distribution, the annealing temperature of the area in the reaction chamber that exceeds or is lower than the target temperature can be regulated, thereby ensuring the uniformity of the annealing temperature of each area in the reaction chamber.

[0078] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A wafer structure for temperature measurement, comprising a plurality of wafer units arranged in an array, characterized in that, The wafer unit includes a plurality of trenches, which are respectively a first trench, a second trench, and a third trench. Each trench includes a body portion and a doped portion. The body portion has a groove, and the doped portion is located on the bottom surface of the body portion. The first trench is located in the central region of the wafer unit. A plurality of the second trenches are sequentially and spaced apart around the outer periphery of the first trench in a direction away from the first trench. The third trench connects the first trench and the plurality of second trenches, such that the doped portion of the first trench is in contact with the doped portion of the second trench. The aspect ratio of the trench is greater than 2.

2. The wafer structure for temperature measurement according to claim 1, characterized in that, The wafer structure further includes a fourth trench, which connects the first trench and the second trench. The aspect ratio of the fourth trench is greater than the aspect ratio of the third trench.

3. The wafer structure for temperature measurement according to claim 1, characterized in that, In the direction away from the first trench, the spacing between adjacent second trenches increases. The wafer structure further includes a conductive layer, which is in contact with the doped portion.

4. The wafer structure for temperature measurement according to claim 3, wherein, Part of the conductive layer is located on the first surface of the wafer unit.

5. The wafer structure for temperature measurement according to claim 1, wherein, The doping element of the doped portion includes any one or more of P, N, Al, Li, Ga, Be, and Ge.

6. The wafer structure for temperature measurement according to claim 1, wherein, The minimum distance from the second trench farthest from the first trench to the first trench is greater than or equal to 0.5 mm.

7. A method for correcting annealing parameters of an epitaxial growth device, characterized in that, The calibration method includes: Performing an annealing process on a wafer structure, where the wafer structure is the wafer structure for temperature measurement according to any one of claims 1 to 6; After the annealing process, selecting a plurality of wafer units in the wafer structure and using a detection device to detect the wafer units to obtain the resistivities of the plurality of wafer units; According to a preset relationship and the resistivity, determining the actual temperatures of the plurality of wafer units. The preset relationship is the relationship between the resistivity and the temperature of the annealing process. And according to the target temperature of the annealing process and the plurality of actual temperatures, adjusting the annealing parameters of each region of the epitaxial growth device so that the plurality of actual temperatures of the plurality of wafer units after the annealing process all reach the target temperature.

8. The calibration method according to claim 7, characterized in that The steps of obtaining the preset relationship include: Performing the annealing process with different temperatures on a plurality of the wafer structures; After the annealing process, respectively selecting a plurality of wafer units in each wafer structure and using the detection device to detect the plurality of wafer units to obtain the resistivities of the plurality of wafer units; According to the temperature of the annealing process and the resistivity, obtaining the preset relationship between the temperature and the resistivity.

9. The calibration method according to claim 7, wherein The steps of using a detection device to detect the wafer units to obtain the resistivities of the plurality of wafer units include: Using a contact resistance test device to detect the wafer units to obtain the sheet resistance of the doped portion of the wafer units; According to the sheet resistance and the length of the detection line used by the contact resistance test device, obtaining the resistivity of the wafer units.

10. The calibration method according to claim 7, characterized in that, The steps of using a detection device to detect the wafer units to obtain the resistivities of the plurality of wafer units include: The single-column dielectric resonator is used to detect the wafer unit, and the resistivity of the wafer unit is obtained.

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