Method of manufacturing display device

By etching the space on the component wafer and conducting electrical signal inspection, abnormal light emitting elements are repaired and transferred to the pixel circuit layer, the problem of light emitting elements inspection in display device manufacturing is solved, the defect rate is reduced, and the process efficiency is improved.

CN120356889APending Publication Date: 2025-07-22SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202411688448.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-01-22
Filing Date
2024-11-25
Publication Date
2025-07-22

AI Technical Summary

Technical Problem

During the manufacturing process of the display device, it is difficult to perform an effective inspection process before transferring the light emitting element to the back plate layer, resulting in a high defect rate of the light emitting element and affecting the process efficiency.

Method used

By growing a semiconductor layer on the component wafer and etching it to form a space, a light emitting element module is arranged, electrically connected and applied to check, abnormal light emitting elements are repaired, and finally the light emitting elements are transferred to the pixel circuit layer.

Benefits of technology

The defect rate of the light emitting element is reduced, process efficiency and process reliability are improved, process flow is simplified, and unnecessary costs are reduced.

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Abstract

According to an embodiment of the present disclosure, a method of manufacturing a display device is provided. The method of manufacturing a display device includes: providing a light emitting element module including an element wafer and a light emitting element, at least a portion of the element wafer being removed; inspecting the light-emitting element; and transferring the light emitting element to the pixel circuit layer.
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Description

[0001] Cross - reference to related applications

[0002] This application claims the priority and benefit of Korean Patent Application No. 10 - 2024 - 0009608, filed with the Korean Intellectual Property Office on January 22, 2024, the entire disclosure of which is incorporated herein by reference. Technical field

[0003] This disclosure relates to a method of manufacturing a display device and a display device. Background art

[0004] In recent years, with the increasing interest in information display, research and development of display devices have been continuously carried out.

[0005] A display device may include light - emitting elements. To manufacture a display device, a process of transferring the light - emitting elements onto a backplane layer of the display device, etc. may be performed.

[0006] To ensure the uniform quality of the display device, an inspection process of the light - emitting elements may be performed during the manufacturing process of the display device. To perform the inspection process, it may be suitable to provide an electrical signal to the light - emitting elements so that the light - emitting elements emit light. Therefore, it may be difficult to perform the inspection process before transferring the light - emitting elements onto the backplane layer. Summary of the invention

[0007] One aspect of the present disclosure provides a method of manufacturing a display device and a display device that can improve process efficiency by reducing the defect rate of light - emitting elements.

[0008] Another aspect of the present disclosure provides a method of manufacturing a display device and a display device in which an inspection process for light - emitting elements can be appropriately performed.

[0009] A method of manufacturing a display device according to one or more embodiments of the present disclosure may include: setting a light - emitting element module including an element wafer and light - emitting elements; inspecting the light - emitting elements; and transferring the light - emitting elements to a pixel circuit layer. Setting the light - emitting element module includes: removing at least a part of the element wafer.

[0010] Setting the light - emitting element module may include: growing a semiconductor layer on the element wafer; and etching the semiconductor layer to set light - emitting elements including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer.

[0011] Removing at least a part of the element wafer may include forming a space formed along the thickness direction of the element wafer.

[0012] The space may be cavities that partially penetrate the element wafer and are spaced apart from each other along the plane direction of the element wafer.

[0013] The light-emitting elements may be provided in a plurality, wherein spaces respectively correspond to the light-emitting elements and respectively overlap the light-emitting elements in a plan view.

[0014] The width of the space may correspond to the width of the light-emitting element.

[0015] Removing at least a part of the element wafer may include: removing at least a lower part of the element wafer to reduce the overall thickness of the element wafer.

[0016] Inspecting the light-emitting element may include: electrically connecting the element wafer and a first power supply part; electrically connecting the light-emitting element and a second power supply part; and

[0017] applying an electrical signal to the first power supply part and the second power supply part to supply power to the light-emitting element.

[0018] Inspecting the light-emitting element may include placing a visual inspection device under the second power supply part.

[0019] Inspecting the light-emitting element may include inspecting light from the light-emitting element while coupling the light-emitting element to the element wafer.

[0020] Inspecting the light-emitting element may include obtaining visual information indicating that light is emitted from the light-emitting element.

[0021] The method may further include repairing the light-emitting element after inspecting the light-emitting element and before transferring the light-emitting element.

[0022] The light-emitting elements may be provided in a plurality, wherein inspecting the light-emitting elements includes: determining that one or more of the light-emitting elements are normal light-emitting elements that normally emit light; and determining that one or more other light-emitting elements among the light-emitting elements are abnormal light-emitting elements that operate abnormally, and wherein repairing the light-emitting elements includes separately repairing the abnormal light-emitting elements.

[0023] According to one or more embodiments, a display device manufactured by the method of one or more embodiments described herein is provided.

[0024] The pixel circuit layer may include a pixel circuit electrically connected to the light-emitting element, and the light-emitting element may include a micro light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, are used to explain aspects of the present disclosure.

[0026] Figure 1 is a plan view schematically showing a display device according to one or more embodiments.

[0027] Figure 2 is a cross-sectional view schematically showing a display device according to one or more embodiments.

[0028] Figure 3 is a flowchart showing a method of manufacturing a display device according to one or more embodiments.

[0029] Figures 4 to 13 is a diagram schematically showing process operations for explaining a method of manufacturing a display device according to one or more embodiments.

[0030] Figure 14 and Figure 15 is a diagram schematically showing process operations for explaining a method of manufacturing a display device according to one or more other embodiments. Detailed Embodiments

[0031] Aspects of some embodiments of the present disclosure and methods of implementing them can be more easily understood by referring to the detailed description of the embodiments and the drawings. The described embodiments are provided as examples so that the present disclosure will be thorough and complete, and will fully convey the aspects of the present disclosure to those skilled in the art. Accordingly, processes, elements, and techniques that are redundant, not relevant to the description of the embodiments, or unnecessary for those of ordinary skill in the art to fully understand the aspects of the present disclosure may be omitted. Unless otherwise noted, throughout the drawings and the written description, like reference numerals, characters, or combinations thereof represent like elements, and thus, their repeated description may be omitted.

[0032] The described embodiments may have various modifications and may be implemented in different forms, and should not be construed as limited to the embodiments shown herein. The use of "can," "may," or "may not" in describing the embodiments corresponds to one or more embodiments of the present disclosure.

[0033] Considering the entirety of the present disclosure, those of ordinary skill in the art will appreciate that the present disclosure encompasses all modifications, equivalents, and substitutions within the spirit and scope of the present disclosure, and that each of the features of the embodiments of the present disclosure may be partially or wholly combined with each other, and various interlocks and drives are technically possible, and unless otherwise stated or implied, each embodiment may be implemented independently of each other or may be implemented in association with each other.

[0034] In the accompanying drawings, for clarity and / or for the purposes of description, the relative dimensions of elements, layers, and regions may be exaggerated. Additionally, the use of cross-hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Thus, unless specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement regarding a particular material, material properties, dimensions, ratios, commonality between the elements shown, and / or any other characteristics, attributes, properties, etc. of the elements.

[0035] In this document, various embodiments are described with reference to cross-sectional views that are schematic diagrams of embodiments and / or intermediate structures. Accordingly, variations in the shape of the figures due to, for example, manufacturing techniques and / or tolerances are to be expected. Additionally, the specific structural or functional descriptions disclosed herein are merely illustrative for the purpose of describing embodiments in accordance with the concepts of the present disclosure. Thus, the embodiments disclosed herein should not be construed as limited to the shapes shown for elements, layers, or regions, but should include deviations in shape resulting from, for example, manufacturing.

[0036] For example, an implantation region shown as rectangular will typically have rounded or curved features at its edges and / or a gradient of implantation concentration, rather than a binary change from the implantation region to the non-implantation region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation occurs.

[0037] For ease of explanation, spatial relative terms such as "below", "beneath", "lower", "bottom", "under", "above", "upper", "top", etc. may be used herein to describe the relationship of one element or feature to another (other) element or feature as shown in the figures. It will be understood that, in addition to the orientation depicted in the drawings, the spatial relative terms are intended to encompass different orientations of the device during use or operation. For example, if the device in the drawing is flipped, an element described as "below", "beneath", or "under" other elements or features will then be oriented "above" the other elements or features. Thus, the exemplary terms "below" and "beneath" can encompass both an above and a below orientation. The device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein should be interpreted accordingly. Similarly, when a first part is described as being disposed "on" a second part, this indicates that the first part is disposed at the upper or lower side of the second part, and is not limited to the upper side based on the direction of gravity.

[0038] In addition, the phrase "in a plan view" means when the object part is observed from above, and the phrase "in a schematic cross-sectional view" means when the schematic cross-section obtained by vertically cutting the object part is observed from the side. The term "overlap" or "overlapped" means that the first object can be above or below the second object, or on one side of the second object, and vice versa. Additionally, the term "overlap" can include stacking, facing or being oriented towards, extending over, covering or partially covering, or any other suitable terms as would be appreciated and understood by a person of ordinary skill in the art. The expression "not overlapping" can include meanings such as "separate from", "set beside", "offset from", and any other suitable equivalents as would be appreciated and understood by a person of ordinary skill in the art. The terms "face" and "be oriented towards" can mean that the first object can be directly or indirectly opposite the second object. In the case where a third object is between the first object and the second object, the first object and the second object can be understood to be indirectly opposite each other but still face each other.

[0039] It will be understood that when an element, layer, region or component is referred to as being "formed on", "on", "connected to" or "(operatively or communicatively) coupled to" another element, layer, region or component, it can be directly formed on, directly on, directly connected to or directly coupled to the other element, layer, region or component or indirectly formed on, indirectly on, indirectly connected to or indirectly coupled to the other element, layer, region or component such that there can be one or more intervening elements, layers, regions or components. Additionally, this can collectively mean direct or indirect coupling or connection and integral or non-integral coupling or connection. For example, when a layer, region or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region or component, it can be directly electrically connected or directly electrically coupled to the other layer, region and / or component, or there can be one or more intervening layers, regions or components. One or more intervening components can include switches, resistors, capacitors, etc. In describing embodiments, unless explicitly described as a direct connection, the expression of connection indicates an electrical connection, and "direct connection / direct coupling" or "directly on" means that one component is directly connected or directly coupled to another component or directly on another component without an intermediate component.

[0040] In addition, in this specification, when a part of a layer, film, region, plate, etc. is formed on another part, the forming direction is not limited to the upward direction, but includes forming the part on a side surface or in a downward direction. Conversely, when a part of a layer, film, region, plate, etc. is formed "under" another part, this includes not only the case where the part is "directly under" the other part, but also the case where there is another part between the part and the other part. At the same time, other expressions describing the relationship between components such as "between... and...", "directly between... and...", "adjacent to...", and "directly adjacent to..." can be similarly interpreted. It will be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can also be one or more intermediate elements or layers.

[0041] For the purposes of this disclosure, when an expression such as "at least one of...", "any one of...", or "one or more of..." is located after a list of elements, it modifies the entire list of elements and not an individual element in the list. For example, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, any combination of two or more of X, Y, and Z (such as, for example, XYZ, XY, YZ, and XZ), or any variation thereof. Similarly, the expressions "at least one of A and B" and "at least one of A or B" can include A, B, or A and B. As used herein, "or" generally means "and / or", and the term "and / or" includes any and all combinations of one or more of the associated listed items. For example, the expression "A and / or B" can include A, B, or A and B. Similarly, when an expression such as "at least one of...", "a plurality of", "one of...", and other prepositional phrases is located before / after a list of elements, it modifies the entire list of elements and not an individual element in the list.

[0042] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms do not correspond to a particular order, position or priority, and are only used to distinguish one element, member, component, region, area, layer, section or part from another element, member, component, region, area, layer, section or part. Thus, without departing from the spirit and scope of the present disclosure, the first element, first component, first region, first layer or first section described below may be referred to as a second element, second component, second region, second layer or second section. Describing an element as a "first" element does not require or imply the presence of a second element or other elements. The terms "first", "second", etc. may also be used herein to distinguish different categories or different groups of elements. For the sake of brevity, the terms "first", "second", etc. may respectively represent "first category (or first group)", "second category (or second group)", etc.

[0043] In an example, the X-axis, Y-axis and / or Z-axis are not limited to the three axes of a rectangular coordinate system and may be interpreted in a broader sense. For example, the X-axis, Y-axis and Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. This also applies to the first direction, second direction and / or third direction.

[0044] The terms used herein are for the purpose of describing embodiments only and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "an" are intended to also include the plural forms, while the plural forms are intended to also include the singular forms, unless the context clearly indicates otherwise. It will also be understood that the terms "comprises", "comprising", "have", "having", "includes" and "including" when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0045] When one or more embodiments can be implemented differently, a particular process order may be performed differently from the described order. For example, two consecutively described processes may be performed substantially simultaneously or in an order opposite to the described order.

[0046] As used herein, the terms "substantially", "about", "approximate" and similar terms are used as approximating terms and not as terms of degree, and are intended to account for the inherent deviations in measured or calculated values that would be recognized by a person of ordinary skill in the art. For example, "substantially" may include a range of + / - 5% of the corresponding value. Given the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), as used herein, "about" or "approximate" includes the stated value and means within an acceptable deviation of the particular value determined by a person of ordinary skill in the art. For example, "about" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value. Additionally, the use of "may" in describing embodiments of the present disclosure means "one or more embodiments of the present disclosure".

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the relevant field and / or the context of this specification, and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0048] The present disclosure relates to a method of manufacturing a display device and a display device. Hereinafter, a method of manufacturing a display device and a display device according to an embodiment will be described with reference to the accompanying drawings.

[0049] Reference will be made Figure 1 and Figure 2 to describe a display device DD according to an embodiment.

[0050] Figure 1 is a plan view schematically showing a display device according to one or more embodiments.

[0051] Referring Figure 1 , the display device DD may include a base layer BSL and pixels PXL located on the base layer BSL (as used herein, "located on" may mean "above"). In one or more embodiments, the display device DD may further include a driving circuit unit (e.g., a scan driver and a data driver), wirings, and pads for driving the pixels PXL.

[0052] The display device DD (or the base layer BSL) may include a display area DA and a non-display area NDA. The non-display area NDA may refer to an area other than the display area DA. The non-display area NDA may surround at least a part of the display area DA (e.g., in a plan view).

[0053] The base layer BSL can form the base surface of the display device DD. The base layer BSL can be a rigid or flexible substrate or film. For example, the base layer BSL can be a rigid substrate made of glass or tempered glass, a flexible substrate (or film) made of plastic or metal, or at least one insulating layer. There is no particular limitation on the material and / or physical properties of the base layer BSL.

[0054] The display area DA can refer to the area of the addressed pixels PXL. The non-display area NDA can refer to the area where the pixels PXL are not addressed. The driving circuit units, wirings, and pads of the pixels PXL connected to the display area DA can be located in the non-display area NDA.

[0055] According to one or more embodiments, the pixels PXL (or sub-pixels SPX) can be arranged in an arrangement structure such as stripes or (e.g., RGBG matrix structure, matrix structure, structure or RGBG structure, which is a registered trademark of Samsung Display Co., Ltd. in Korea), but the present disclosure is not limited thereto. Various embodiments can be applied to the present disclosure.

[0056] According to one or more embodiments, the pixels PXL (or sub-pixels SPX) can include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be sub-pixels. At least one first sub-pixel SPX1, at least one second sub-pixel SPX2, and at least one third sub-pixel SPX3 can form a pixel unit configured to emit light of various colors.

[0057] For example, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can emit light of a corresponding color. For example, the first sub-pixel SPX1 can be a red pixel that emits red / first color light, the second sub-pixel SPX2 can be a green pixel that emits green / second color light, and the third sub-pixel SPX3 can be a blue pixel that emits blue / third color light. According to one or more embodiments, the number of the second sub-pixels SPX2 can be greater than the number of the first sub-pixels SPX1 and the number of the third sub-pixels SPX3. However, the colors, types, and / or numbers of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 forming each pixel unit are not limited to any specific examples.

[0058] Figure 2 is a cross-sectional view schematically showing a display device according to one or more embodiments.

[0059] Refer to Figure 2, the display device DD may include a pixel circuit layer PCL (e.g., a backplane layer), a light-emitting element layer LEL, and a cover layer COL.

[0060] The pixel circuit layer PCL may be configured to drive pixels PXL formed by the light-emitting element layer LEL (or light-emitting elements LE included in the light-emitting element layer LEL (see Figure 5 ). The pixel circuit layer PCL may be a layer including pixel circuits electrically connected to the light-emitting elements LE. The pixel circuit layer PCL may include a base layer BSL, a conductive layer for forming pixel circuits, and an insulating layer located on the conductive layer.

[0061] The light-emitting element layer LEL may be located on the pixel circuit layer PCL. According to one or more embodiments, the light-emitting element layer LEL may include light-emitting elements LE. According to one or more embodiments, the light-emitting element LE may include an inorganic light-emitting element including an inorganic material. However, the present disclosure is not necessarily limited thereto.

[0062] According to one or more embodiments, the light-emitting element LE may have a nanoscale or a microscale. For example, the light-emitting element LE may be a micro LED (light-emitting diode). However, the present disclosure is not limited thereto.

[0063] The cover layer COL may be located on the light-emitting element layer LEL. The cover layer COL may transmit light emitted from the light-emitting element layer LEL. The cover layer COL may include a window. The cover layer COL may include a structure (e.g., a film or a layered structure) for preventing reflection of external light. However, the present disclosure is not limited thereto.

[0064] Meanwhile, for the light-emitting elements LE included in the display device DD according to an embodiment, a detailed inspection process may be performed to determine whether they operate normally during the manufacturing process. Accordingly, the defect rate of the light-emitting elements LE may be reduced, and thus the process yield may be significantly improved.

[0065] Regarding this, a method of manufacturing the display device DD including an inspection process for the display device DD will be described with reference to Figure 3 the following drawings.

[0066] First, a method of manufacturing the display device DD according to one or more embodiments will be described with reference to Figures 3 to 13 FIGS.

[0067] Figure 3 are flowcharts showing a method of manufacturing a display device according to one or more embodiments. Figures 4 to 13 are diagrams schematically showing process operations for explaining a method of manufacturing a display device according to one or more embodiments.

[0068] Refer to Figure 3, a method of manufacturing a display device DD may include: providing a light-emitting element module S100 including an element wafer and a light-emitting element; inspecting the light-emitting element S200; repairing the light-emitting element S300; and transferring the light-emitting element S400.

[0069] Reference Figure 3 and Figure 4 , in providing the light-emitting element module S100 including the element wafer and the light-emitting element, semiconductor layers may be sequentially located on the element wafer WAF to fabricate the light-emitting element LE.

[0070] The element wafer WAF may be a growth substrate for forming semiconductor layers. For example, the element wafer WAF may be a structure for epitaxial growth of a certain material.

[0071] According to one or more embodiments, the element wafer WAF may be a sapphire substrate and may include aluminum oxide (AlO x ). However, the present disclosure is not limited thereto.

[0072] In this operation S100, a first base semiconductor layer BSCL1, a base active layer BAL, and a second base semiconductor layer BSCL2 may be sequentially formed (e.g., epitaxially grown) on the element wafer WAF. For example, the first base semiconductor layer BSCL1, the base active layer BAL, and the second base semiconductor layer BSCL2 may be positioned on the element wafer WAF along the Z direction.

[0073] The first base semiconductor layer BSCL1 may include a material for forming a first semiconductor layer SCL1 (see Figure 5 ). The base active layer BAL may include a material for forming an active layer AL (see Figure 5 ). The second base semiconductor layer BSCL2 may include a material for forming a second semiconductor layer SCL2 (see Figure 5 ).

[0074] Reference Figure 3 and Figure 5 , in providing the light-emitting element module S100 including the element wafer and the light-emitting element, at least some of them may be provided as separate light-emitting elements LE.

[0075] In this operation S100, the semiconductor layers BSCL1, BAL, and BSCL2 may be etched, and the first semiconductor layer SCL1, the active layer AL, and the second semiconductor layer SCL2 may be separated and isolated from other parts. In addition, the insulating layer INF may be patterned, and a light-emitting element LE including the first semiconductor layer SCL1, the active layer AL, the second semiconductor layer SCL2, and the insulating layer INF may be fabricated.

[0076] According to one or more embodiments, a component including a light-emitting element LE and an element wafer WAF may be defined as a light-emitting element module LDM.

[0077] The first semiconductor layer SCL1 may include a semiconductor layer different from the second semiconductor layer SCL2. For example, the first semiconductor layer SCL1 may include an N-type semiconductor. The first semiconductor layer SCL1 may include a GaN-based material. For example, the first semiconductor layer SCL1 may include an N-type semiconductor layer including one or more selected from the group consisting of InAlGaN, GaN, AlGaN, or InGaN and doped with a first-conductivity-type dopant such as Si, Ge, and Sn.

[0078] The active layer AL may be located between the first semiconductor layer SCL1 and the second semiconductor layer SCL2. The active layer AL may include a single quantum well structure or a multi-quantum well structure.

[0079] The active layer AL may include a well layer and a barrier layer to form a quantum well structure. For example, the active layer AL may include InGaN as the well layer, and the active layer AL may include GaN as the barrier layer.

[0080] The second semiconductor layer SCL2 may include a semiconductor layer of a type different from the first semiconductor layer SCL1. For example, the second semiconductor layer SCL2 may include a P-type semiconductor. The second semiconductor layer SCL2 may include a GaN-based material. For example, the second semiconductor layer SCL2 may include a P-type semiconductor layer including one or more selected from the group consisting of InAlGaN, GaN, AlGaN, or InGaN and doped with a second-conductivity-type dopant such as Ga, Ba, or Mg.

[0081] The insulating layer INF may be formed (or deposited) by various methods. For example, an atomic layer deposition (ALD) process or a chemical vapor deposition (CVD) process may be used. However, the present disclosure is not necessarily limited thereto. The formed insulating layer INF may be etched to electrically expose at least a part of the second semiconductor layer SCL2.

[0082] According to one or more embodiments, in a plan view, the light-emitting elements LE may be spaced apart from each other on the element wafer WAF.

[0083] Reference Figure 3 and Figures 6 to 8 , in a light-emitting element module S100 including an element wafer and a light-emitting element, at least a part of the element wafer WAF may be removed, and a space WSP may be formed in at least a part of the element wafer WAF.

[0084] The space WSP can be a cavity formed on the lower surface of the device wafer WAF. For example, the space WSP can be an opening formed on the lower surface of the device wafer WAF and partially penetrating a portion of the device wafer WAF along the thickness direction (e.g., the Z direction) of the device wafer WAF.

[0085] When forming the space WSP in the device wafer WAF, a portion of the device wafer WAF can have a relatively thin thickness.

[0086] The space WSP can be fabricated by performing an etching process on the device wafer WAF. However, the present disclosure is not limited thereto. Various processes can be applied in this operation to form the space WSP.

[0087] The space WSP can include multiple space WSPs. According to one or more embodiments, the space WSPs can be spaced apart from each other along a planar direction defined based on the X direction and the Y direction (e.g., the planar direction in which the device wafer WAF is placed). For example, the space WSPs can be formed in a matrix structure along the X direction and the Y direction. However, the present disclosure is not limited thereto.

[0088] The arrangement structure of the space WSPs can correspond to the arrangement structure of the light-emitting elements LE. According to one or more embodiments, the width of the space WSP can correspond to the width of the light-emitting element LE. For example, the positions of the space WSPs can correspond to the positions of the light-emitting elements LE respectively. The space WSP can overlap with the light-emitting element LE along the Z direction. Therefore, the position of the space WSP can correspond to the position of the light-emitting element LE.

[0089] For example, the space WSPs can be formed in a matrix structure along the X direction and the Y direction. Similarly, the light-emitting elements LE can be arranged in a matrix structure along the X direction and the Y direction.

[0090] Therefore, a light-emitting element module LDM including the light-emitting elements LE and the device wafer WAF on which the space WSPs are formed can be manufactured.

[0091] Reference Figure 3 、 Figure 9 and Figure 10 , in the inspection of the light-emitting element S200, an inspection process can be performed on the light-emitting elements LE of the light-emitting element module LDM. That is, the inspection process for the light-emitting elements LE can be performed while the light-emitting elements LE and the device wafer WAF are coupled to each other.

[0092] In this operation S200, an inspection can be performed to determine whether the light-emitting elements LE emit light normally. For example, for inspection, an electrical signal can be applied to the light-emitting elements LE so that the light-emitting elements LE emit light, and visual information can be obtained to determine whether the light-emitting elements LE operate normally.

[0093] According to one or more embodiments, a manufacturing apparatus (or inspection apparatus) for performing a method of manufacturing a display device DD may include a power supply device POW, a first power supply part PS1, and a second power supply part PS2. According to one or more embodiments, a manufacturing apparatus (or inspection apparatus) for performing a method of manufacturing a display device DD may include a vision inspection device CAM.

[0094] According to one or more embodiments, the first power supply part PS1 and the second power supply part PS2 may also be referred to as a first power supply device and a second power supply device. The first power supply part PS1 and the second power supply part PS2 may be a first electrode plate and a second electrode plate.

[0095] According to one or more embodiments, the power supply device POW (e.g., a power source) may supply a voltage (e.g., a predetermined voltage) to the first power supply part PS1 and the second power supply part PS2. The first power supply part PS1 and the second power supply part PS2 may supply an electrical signal to both ends of a light-emitting element LE, and the light-emitting element LE may emit light.

[0096] In this operation S200, the first power supply part PS1 may be located below the element wafer WAF and may be electrically connected to the element wafer WAF. The second power supply part PS2 may be located above the light-emitting element LE and may be electrically connected to the light-emitting element LE (e.g., the second semiconductor layer SCL2). Accordingly, in a plan view based on the X direction and the Y direction, the first power supply part PS1 and the second power supply part PS2 may overlap with the light-emitting element module LDM.

[0097] The first power supply part PS1 and the second power supply part PS2 may include a conductive material. The conductive material is not limited to a specific example. For example, the first power supply part PS1 and the second power supply part PS2 may include a transparent conductive material. The transparent conductive material may include one or more selected from the group consisting of silver nanowires (AgNW), ITO (indium tin oxide), IZO (indium zinc oxide), IGZO (indium gallium zinc oxide), AZO (antimony zinc oxide), ITZO (indium tin zinc oxide), ZnO (zinc oxide), SnO2 (tin oxide), carbon nanotubes, or graphene. However, the present disclosure is not limited thereto.

[0098] In this operation S200, the power supply device POW may supply a direct current (DC) power source to the first power supply part PS1 and the second power supply part PS2 so that the light-emitting element LE emits light. According to one or more embodiments, a relatively low power source may be supplied to the light-emitting element LE through the first power supply part PS1, and a relatively high power source may be supplied to the light-emitting element LE through the second power supply part PS2. Alternatively, according to one or more other embodiments, the power supply device POW may supply an alternating current (AC) power source to the first power supply part PS1 and the second power supply part PS2 so that the light-emitting element LE emits light.

[0099] In this operation S200, at least some of the light-emitting elements LE may emit light. According to one or more embodiments, the light-emitting element LE may emit light normally. If some of the light-emitting elements LE are in an abnormal state, some of the light-emitting elements LE (e.g., the abnormal light-emitting element LD_AB) may not emit light.

[0100] In this operation S200, the vision inspection device CAM may be located below the first power supply part PS1 and may obtain light information based on the light provided by the light-emitting element LE. The vision inspection device CAM may obtain visual information on whether the light-emitting element LE emits light. For example, the vision inspection device CAM may include a camera or the like. However, the present disclosure is not limited thereto.

[0101] According to one or more embodiments, the visual information obtained by the vision inspection device CAM may include information on whether the light-emitting element LE emits light for each position.

[0102] According to one or more embodiments, spaces WSP that partially penetrate at least a part of the element wafer WAF may be formed in the element wafer WAF. The positions of these spaces WSP may correspond to the positions of the light-emitting elements LE. Accordingly, the light emitted by the light-emitting element LE may pass through the spaces WSP and may be provided to the lower region of the vision inspection device CAM of the light-emitting element module LDM. In this case, the light may be provided into the spaces WSP and may pass through a partial region of the element wafer WAF having a relatively thin thickness. Accordingly, damage to the light information may be reduced or minimized. Ultimately, in the method of manufacturing the display device DD according to the embodiment of the present disclosure, the reliability of the inspection process for the light-emitting element LE may be improved.

[0103] According to one or more embodiments, an inspection process may be performed before transferring the light-emitting element LE onto the pixel circuit layer PCL. Experimentally, if the inspection process is performed after transferring the light-emitting element LE, the difficulty of the process may be too high. For example, when the inspection process is performed after transferring the light-emitting element LE, it may be suitable to arrange pins to supply an electrical signal to the end of the light-emitting element LE. In this case, it may be suitable to electrically contact the pins with the end of the light-emitting element LE, but there may be a concern that the pins may not contact the ends of some light-emitting elements LE. In addition, since it may be difficult to normally perform the repair process of the light-emitting element LE in an abnormal state, the process cost may increase.

[0104] However, according to one or more embodiments, a light-emitting element module LDM having a space WSP may be provided so that the inspection process can be appropriately applied. Therefore, the inspection process may be performed before transferring the light-emitting element LE onto the pixel circuit layer PCL. Therefore, an improved or more optimized repair process can be performed, the process equipment can be simplified, and the process reliability can be improved.

[0105] In addition, since the inspection process for the light-emitting element LE can be performed on the light-emitting elements LE transferred to a relatively large area instead of performing the inspection process for each light-emitting element LE individually, the convenience of the process can be improved.

[0106] Reference Figure 3 and Figure 11 In repairing the light-emitting element S300, the light-emitting elements LE (e.g., abnormal light-emitting elements LD_AB) determined (or confirmed) to be operating abnormally can be repaired. Therefore, the abnormal light-emitting elements LD_AB with abnormal operations (abnormal operations) can be replaced with the repaired light-emitting elements LD_RE that can operate normally.

[0107] In this operation S300, a repair process can be performed on the light-emitting element LE. The repair process can be performed before transferring the light-emitting element LE onto the pixel circuit layer PCL. Therefore, unnecessary process costs can be avoided.

[0108] According to one or more embodiments, repaired light-emitting elements LD_RE can be prepared by removing the abnormal light-emitting elements LD_AB determined to be operating abnormally and replacing them with new light-emitting elements LE.

[0109] Reference Figure 3 and Figure 12 In the light-emitting element transfer S400, a carrier wafer CW can be placed on the light-emitting element LE.

[0110] In this operation S400, a carrier wafer CW can be coupled to a light-emitting element LE, and a device wafer WAF can be removed. According to one or more embodiments, a laser lift-off process or the like can be used to remove the device wafer WAF, but the present disclosure is not limited thereto. The carrier wafer CW can be a structure for changing the position of the light-emitting element LE and can include various materials. However, the present disclosure is not limited to specific examples.

[0111] Reference Figure 3 and Figure 13 , in the transfer of the light-emitting element S400, the light-emitting element LE can be transferred onto a pixel circuit layer PCL.

[0112] In this operation S400, when the carrier wafer CW moves, the light-emitting element LE can be located on the pixel circuit layer PCL. According to one or more embodiments, a separate electrode can be provided on the pixel circuit layer PCL, and the light-emitting element LE can be disposed on the electrode. Thereafter, in one or more embodiments, the carrier wafer CW can be removed. Thus, the light-emitting element LE can be configured to emit light by being electrically connected to a pixel circuit included in the pixel circuit layer PCL.

[0113] Thereafter, an upper member such as a window or the like can be positioned on the light-emitting element LE, and a display device DD can be provided.

[0114] Next, reference will be made to Figure 3 , Figure 14 and Figure 15 to describe a method of manufacturing a display device DD according to one or more other embodiments. Contents that may overlap with the above description may be briefly described or omitted.

[0115] Figure 14 and Figure 15 are diagrams schematically showing process operations for explaining a method of manufacturing a display device according to one or more other embodiments.

[0116] The method of manufacturing the display device DD may be different from the method of manufacturing the display device DD according to the above-described embodiments in that an inspection may be performed on the light-emitting element LE after reducing the thickness of the device wafer WAF by removing at least a part of the device wafer WAF without forming a space WSP in the device wafer WAF.

[0117] Reference Figure 3 , the method of manufacturing the display device DD according to one or more other embodiments may further include: providing a light-emitting element module S100 including a device wafer and a light-emitting element; inspecting the light-emitting element S200; repairing the light-emitting element S300; and transferring the light-emitting element S400.

[0118] In a light-emitting element module S100 including an element wafer and a light-emitting element, at least a part of the element wafer WAF can be removed, and the thickness of the element wafer WAF can be reduced.

[0119] For example, in this operation S100, the lower part of the element wafer WAF (e.g., wafer removal region WAF_ET) can be removed, and an element wafer WAF having a reduced (e.g., overall reduced) thickness compared to the thickness of the element wafer WAF when patterning the light-emitting element LE can be prepared. According to one or more embodiments, the wafer removal region WAF_ET can be formed based on an etching process or a polishing process. However, the present disclosure is not limited thereto.

[0120] In this case, when performing the inspection of the light-emitting element S200, similar to one or more embodiments in which a space WSP is formed, the light emitted by the light-emitting element LE can effectively pass through the element wafer WAF and be provided to the visual inspection device CAM. Therefore, the light information regarding whether the light-emitting element LE is operating normally can be provided to the visual inspection device CAM without distortion. Ultimately, the inspection process for the light-emitting element LE can be effectively performed before the process of transferring the light-emitting element LE.

[0121] According to an embodiment of the present disclosure, a method of manufacturing a display device and a display device capable of improving process efficiency by reducing the defect rate of a light-emitting element can be provided.

[0122] According to an embodiment of the present disclosure, a method of manufacturing a display device and a display device capable of appropriately performing an inspection process for a light-emitting element can be provided.

[0123] As described above, improved or optimal embodiments of the present disclosure have been disclosed through detailed descriptions and drawings. However, those skilled in the art or those of ordinary skill in the art will appreciate that various modifications and changes are possible without departing from the spirit and technical scope of the present disclosure as set forth in the appended claims. Therefore, the technical protection scope of the present disclosure is not limited to the detailed description described in the specification, but should be determined by the appended claims (and their functional equivalents should be included therein).

Claims

1. A method of manufacturing a display device, comprising: Providing a light-emitting element module including an element wafer and a light-emitting element; Inspecting the light-emitting element; And Transferring the light-emitting element to a pixel circuit layer, wherein providing the light-emitting element module includes removing at least a part of the element wafer.

2. The method according to claim 1, wherein Providing the light-emitting element module includes: Growing a semiconductor layer on the element wafer; and Etching the semiconductor layer to provide the light-emitting element including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer.

3. The method according to claim 1, wherein Removing at least a part of the element wafer includes forming a space formed along the thickness direction of the element wafer, wherein the space is a cavity that partially penetrates the element wafer and is spaced apart from each other along the plane direction of the element wafer.

4. The method according to claim 3, wherein The light-emitting elements are provided in a plurality, and wherein the space corresponds to the light-emitting element respectively and overlaps with the light-emitting element respectively in a plan view.

5. The method according to claim 3, wherein The width of the space corresponds to the width of the light-emitting element.

6. The method according to claim 1, wherein Removing at least a part of the element wafer includes removing at least the lower part of the element wafer to reduce the overall thickness of the element wafer.

7. The method according to claim 1, wherein, Inspecting the light-emitting element includes: Electrically connecting the element wafer and a first power supply part; Electrically connecting the light-emitting element and a second power supply part; and Applying an electrical signal to the first power supply part and the second power supply part to supply power to the light-emitting element, and wherein inspecting the light-emitting element includes placing a visual inspection device under the second power supply part.

8. The method according to claim 7, wherein Inspecting the light-emitting element includes inspecting the light from the light-emitting element while coupling the light-emitting element to the element wafer, and wherein inspecting the light-emitting element includes obtaining visual information indicating that light is emitted from the light-emitting element.

9. The method according to claim 1, further comprising repairing the light-emitting element after inspecting the light-emitting element and before transferring the light-emitting element.

10. The method according to claim 9, wherein, The light-emitting elements are provided in a plurality, wherein inspecting the light-emitting element includes: Determining that one or more of the light-emitting elements are normal light-emitting elements that emit light normally; and Determining that one or more other light-emitting elements among the light-emitting elements are abnormal light-emitting elements that operate abnormally, and wherein repairing the light-emitting element includes repairing the abnormal light-emitting element individually.

Citation Information

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