Solar cell and photovoltaic module

Abstract

The invention relates to the field of solar cells, in particular to a solar cell and a photovoltaic module. The solar cell includes: a substrate; the passivation layer is arranged on the surface of the substrate, and the passivation layer comprises an intrinsic amorphous silicon layer; the intrinsic silicon oxide layer is arranged on the face, away from the substrate, of the passivation layer, the content range of high-valence silicon oxide in the intrinsic silicon oxide layer is larger than 50% and smaller than or equal to 95%, and the valence state of the silicon element in the high-valence silicon oxide is larger than or equal to positive bivalence; the doped layer comprises a doped microcrystalline silicon layer, and the doped microcrystalline silicon layer is arranged on the face, away from the passivation layer, of the intrinsic silicon oxide layer; the transparent conducting layer is arranged on one surface, deviating from the intrinsic silicon oxide layer, of the doping layer; and the electrode is arranged on the transparent conductive layer. The solar cell can solve the problem of performance restriction of the passivation layer and the doping layer caused by the existence of the incubation layer.

Description

Technical Field

[0001] The present application relates to the field of solar cells, and in particular, to a solar cell and a photovoltaic module. Background Art

[0002] In a heterojunction solar cell, using a doped microcrystalline silicon layer as the doped layer is a better choice than using a doped amorphous silicon layer. However, when a doped microcrystalline silicon layer is disposed on the passivation layer of a heterojunction solar cell, there are mutual restrictions and influences between the performance of the doped microcrystalline silicon layer and the performance of the passivation layer, making it difficult to exert the advantages of using the doped microcrystalline silicon layer and restricting the further improvement of the performance of the heterojunction solar cell. Summary of the Invention

[0003] To solve the above technical problems, the present application discloses a solar cell and a photovoltaic module.

[0004] In a first aspect, the present application provides a solar cell, which includes:

[0005] A substrate;

[0006] A passivation layer disposed on the surface of the substrate, the passivation layer including an intrinsic amorphous silicon layer;

[0007] An intrinsic silicon oxide layer disposed on the side of the passivation layer facing away from the substrate; the content range of high-valence silicon oxide in the intrinsic silicon oxide layer is greater than 50% and less than or equal to 95%, and the valence state of silicon in the high-valence silicon oxide is greater than or equal to +2;

[0008] A doped layer including a doped microcrystalline silicon layer disposed on the side of the intrinsic silicon oxide layer facing away from the passivation layer;

[0009] A transparent conductive layer disposed on the side of the doped layer facing away from the intrinsic silicon oxide layer;

[0010] An electrode disposed on the transparent conductive layer.

[0011] Further, the intrinsic silicon oxide layer is a non-hydrogenated intrinsic silicon oxide layer.

[0012] Further, the pore diameter of the intrinsic silicon oxide layer is 2 nm to 8 nm.

[0013] Further, the doped layer is a hydrogenated doped layer, and oxygen atoms in the intrinsic silicon oxide layer and hydrogen atoms in the doped layer form a dipole moment.

[0014] Further, the passivation layer is a hydrogenated intrinsic amorphous silicon layer.

[0015] Further, the thickness of the passivation layer is 6 nm to 8 nm; and / or,

[0016] When the doping layer is an N-type doping layer, the thickness of the doping layer is 23 nm to 26 nm; and / or,

[0017] When the doping layer is a P-type doping layer, the thickness of the doping layer is 28 nm to 32 nm; and / or,

[0018] The thickness of the intrinsic silicon oxide layer is 0.4 nm to 3 nm.

[0019] Further, when the doping layer is an N-type doping layer, the doping concentration of the doping element in the doping layer is 5% to 7%; and / or,

[0020] When the doping layer is a P-type doping layer, the doping concentration of the doping element in the doping layer is 0.3% to 1%.

[0021] Further, the passivation layer, the intrinsic silicon oxide layer, the doping layer, the transparent conductive layer, and the electrode are symmetrically disposed on the light-receiving surface and the backlight surface of the substrate respectively;

[0022] Wherein, the substrate and the doping layer on one side of the light-receiving surface of the substrate have the same conduction type, and the substrate and the doping layer on one side of the backlight surface of the substrate have opposite conduction types.

[0023] Further, the substrate is an N-type silicon substrate or a P-type silicon substrate; and / or,

[0024] The transparent conductive layer includes one or more layers of an indium tin oxide layer, a fluorine-doped tin oxide layer, an aluminum-doped zinc oxide layer, an indium-doped zinc oxide layer, or a transparent conductive aluminum-fluorine co-doped zinc oxide layer; and / or,

[0025] The electrode is a silver electrode, a copper electrode, an aluminum electrode, or a silver-aluminum electrode.

[0026] In a second aspect, the present application provides a photovoltaic module, which includes the solar cell as described in the first aspect, or the photovoltaic module includes the solar cell prepared by the preparation method as described in the second aspect.

[0027] Compared with the prior art, the present application has at least the following beneficial effects:

[0028] The solar cell of the present application utilizes an intrinsic silicon oxide layer, which is added between a passivation layer and a doped layer having a doped microcrystalline silicon layer, and the content of the high-valence silicon oxide in the intrinsic silicon oxide layer is greater than 50% and less than or equal to 95%. By using the compactness of this intrinsic silicon oxide layer, the rapid nucleation of the microcrystalline silicon layer can be promoted, and then the thickness of the incubation layer can be thinned, thereby solving the problem of performance constraints of the passivation layer and the doped layer caused by the existence of the incubation layer. Brief Description of the Drawings

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0030] Figure 1 It is a schematic structural diagram of the solar cell in the embodiment of the present application.

[0031] Description of the Reference Numerals in the Drawings:

[0032] 1. Substrate; 2. Passivation layer; 3. Intrinsic silicon oxide layer; 4. Doped layer; 41. N-type doped layer; 42. P-type doped layer; 5. Transparent conductive layer; 6. Electrode. Detailed Embodiments

[0033] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0034] In the present application, the orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "vertical", "horizontal", "lateral", "longitudinal", etc. is based on the orientation or positional relationship shown in the drawings. These terms are mainly used to better describe the present application and its embodiments, and are not used to limit that the indicated device, element or component must have a specific orientation, or be constructed and operated in a specific orientation.

[0035] Moreover, in addition to being able to represent the orientation or positional relationship, some of the above terms may also be used to represent other meanings. For example, the term "upper" may also be used to represent a certain attachment relationship or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in the present application can be understood according to the specific situation.

[0036] In addition, the terms "installed", "set up", "provided with", "connected", and "linked" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, or there can be internal communication between two devices, components, or parts. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0037] In addition, terms such as "first", "second", etc. are mainly used to distinguish different devices, components, or parts (specific species and structures may be the same or different), and are not used to indicate or imply the relative importance and quantity of the indicated devices, components, or parts. Unless otherwise specified, the meaning of "a plurality" is two or more.

[0038] A heterojunction solar cell generally includes a substrate, and a passivation layer and a doping layer sequentially disposed on the substrate. Among them, when selecting the material for the doping layer, compared with doping an amorphous silicon layer, doping a microcrystalline silicon layer becomes a better choice for the doping layer due to advantages such as higher doping efficiency.

[0039] However, the formation process of the doped microcrystalline silicon layer usually includes stages such as an incubation stage, a nucleation stage, and a crystal growth stage. During this process, an incubation layer with a certain thickness will inevitably be formed on the side of the doping layer close to the passivation layer as a transition region. The inevitable existence of this incubation layer is not conducive to the respective performance of the passivation layer and the doped microcrystalline silicon layer.

[0040] Taking the deposition of the doped microcrystalline silicon layer by the PECVD process as an example, the formation process of the doped microcrystalline silicon layer includes: first, an amorphous incubation layer is formed on the passivation layer. This incubation layer serves as a transition region with a certain thickness and is the basis for the subsequent incubation to form crystalline silicon. As the deposition progresses, nucleation points of microcrystalline silicon begin to form in the incubation layer as the starting points for crystal growth. Then the crystals gradually grow to form microcrystalline silicon grains, and these microcrystalline silicon grains expand through an island growth mode and finally connect to each other to form a continuous microcrystalline silicon layer.

[0041] Since the amorphous incubation layer in the doped microcrystalline silicon layer often has a relatively thick thickness and characteristics such as many defects and a small bandgap, it will bring various effects such as hindering carrier transport and affecting the longitudinal structure uniformity of the doped microcrystalline silicon layer. Therefore, it is necessary to set the incubation layer thinner to alleviate the above problems. However, reducing the thickness of the incubation layer means that the nucleation and crystal growth of the microcrystalline silicon layer are faster, and the doping elements in the microcrystalline silicon layer are more likely to pass through the grain boundaries and the incubation layer and then enter the passivation layer or even reach the substrate interface, resulting in the de-passivation of the passivation layer and the substrate interface. That is to say, when the thickness of the incubation layer is relatively thick, it will have a greater adverse impact on the performance of the doped microcrystalline silicon layer. It can be seen that there is always a mutually restrictive relationship between the performance of the doped microcrystalline silicon layer and the passivation layer. This restriction makes the application of the doped microcrystalline silicon layer in heterojunction solar cells not able to demonstrate obvious technical advantages, limiting the performance improvement of such heterojunction solar cells with this structure.

[0042] After in-depth analysis and research on the above technical problems, the embodiments of the present application provide a solar cell and a photovoltaic module. By providing an intrinsic silicon oxide layer between the passivation layer and the doped microcrystalline silicon layer, the mutual restriction between the passivation layer and the doped microcrystalline silicon layer is effectively eliminated, enabling both the passivation layer and the doped microcrystalline silicon layer to better exert their respective performances, thereby further improving the performance of the solar cell.

[0043] In the first aspect, as shown in Figure 1 The present application provides a solar cell, including:

[0044] Substrate 1;

[0045] Passivation layer 2, which is disposed on the surface of substrate 1 and includes an intrinsic amorphous silicon layer;

[0046] Intrinsic silicon oxide layer 3, which is disposed on the side of passivation layer 2 facing away from substrate 1; the content range of high-valence silicon oxide in intrinsic silicon oxide layer 3 is greater than 50% and less than or equal to 95%, and the valence state of silicon element in high-valence silicon oxide is greater than or equal to +2;

[0047] Doping layer 4, which includes a doped microcrystalline silicon layer, and the doped microcrystalline silicon layer is disposed on the side of intrinsic silicon oxide layer 3 facing away from passivation layer 2;

[0048] Transparent conductive layer 5, which is disposed on the side of doping layer 4 facing away from intrinsic silicon oxide layer 3;

[0049] Electrode 6, which is disposed on transparent conductive layer 5.

[0050] Among them, the content range of high-valence silicon oxide in the intrinsic silicon oxide layer 3 is greater than 50% and less than or equal to 95%, including any point value within this numerical range. For example, the content range of high-valence silicon oxide in the intrinsic silicon oxide layer 3 is 51%, 55%, 58%, 60%, 65%, 70%, 75%, 80%, 85%, 90% or 95%. The content range of high-valence silicon oxide refers to the mass ratio of high-valence silicon oxide in the intrinsic silicon oxide layer 3. In addition, high-valence silicon oxide is silicon oxide with a valence of silicon greater than or equal to +2. For example, silicon oxide with a valence of silicon of +2, +3 or +4 and mixtures of silicon oxides corresponding to these valences. The above high-valence silicon oxide is oxygen-rich silicon oxide rich in oxygen elements. The higher the content ratio of oxygen-rich silicon oxide in this layer, the better the compactness of the silicon oxide. In addition to the above valences, there is also a case of +1 valence for silicon oxide in the silicon oxide layer. For example, Si2O(Si 1+ ), this does not belong to high-valence silicon oxide.

[0051] In addition, the "intrinsic" in the intrinsic silicon oxide layer 3 means that no special doping element doping operation is performed during the manufacturing process of this layer. Therefore, this layer does not contain doping elements after manufacturing. However, it can be understood that when the doping layer 4 is subsequently manufactured on this layer (especially when a high doping concentration is to be obtained for the doping layer 4), the doping elements in the doping layer 4 may diffuse into the intrinsic silicon oxide layer 3, causing the intrinsic silicon oxide layer 3 to contain trace amounts of doping elements. However, since the concentration of the doping elements is not sufficient to play a normal conduction role, in this application, it is allowed for the intrinsic silicon oxide layer 3 to contain trace amounts of doping elements, but its overall properties still belong to the properties of the intrinsic layer, rather than the properties of the doping layer 4. The same situation applies to the "intrinsic" in the intrinsic amorphous silicon layer, which will not be elaborated further later.

[0052] Among them, the substrate 1 is an N-type silicon substrate 1 or a P-type silicon substrate 1.

[0053] Among them, the passivation layer 2 includes an intrinsic amorphous silicon layer, that is, the passivation layer 2 can be only the intrinsic amorphous silicon layer, or can include the intrinsic amorphous silicon layer and other film layers that can play a passivation role.

[0054] Among them, the doping layer 4 includes a doped microcrystalline silicon layer and is provided on the side of the intrinsic silicon oxide layer 3 facing away from the passivation layer 2. That is, the doping layer 4 can be only the doped microcrystalline silicon layer provided on the intrinsic silicon oxide layer 3, or can include the doped microcrystalline silicon layer close to the intrinsic silicon oxide layer 3 and other doping layers 4 provided far from the intrinsic silicon oxide layer 3. The other doping layers 4 are, for example, doped amorphous silicon layers. Since the doping layer 4 uses a doped microcrystalline silicon layer, that is, there is inevitably a certain thickness of incubation layer on the side of the doping layer 4 close to the intrinsic silicon oxide layer 3, the embodiment of this application adds an intrinsic silicon oxide layer 3 between the passivation layer 2 and the doping layer 4 to mitigate a series of problems caused by the existence of the incubation layer.

[0055] Among them, the transparent conductive layer 5 includes one or more layers of indium tin oxides (ITO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), or indium-doped zinc oxide (IZO).

[0056] Among them, the electrode 6 can be a silver electrode, a copper electrode, an aluminum electrode, or a silver-aluminum electrode.

[0057] In the above solar cell provided by the embodiment of the present application, by adding the intrinsic silicon oxide layer 3 with a relatively high proportion of high-valence silicon oxide between the passivation layer 2 and the doped layer 4 with a doped microcrystalline silicon layer, the thickness of the incubation layer can be reduced, thereby solving the problem of performance constraints of the passivation layer 2 and the doped layer 4 caused by the existence of the incubation layer. Specifically, the intrinsic silicon oxide layer 3 with a high-valence silicon oxide proportion greater than 50% and less than or equal to 95% has the characteristic of better film compactness. It can effectively block the doped elements in the doped layer 4 from entering the passivation layer 2, promote the rapid nucleation of the microcrystalline silicon layer, achieve the purpose of reducing the thickness of the incubation layer without affecting the passivation performance of the passivation layer 2, and thus is beneficial to reducing the hindrance of carrier longitudinal transport, increasing the open-circuit voltage, and improving the carrier transport ability of the doped layer 4. When the content of high-valence silicon oxide is less than or equal to 50%, the compactness of the intrinsic silicon oxide layer 3 is not sufficient to effectively block the doped elements in the doped layer 4. When the content of high-valence silicon oxide reaches 95%, the intrinsic silicon oxide layer 3 not only has high compactness to block doped elements but also can avoid the increase in process difficulty, making the intrinsic silicon oxide layer 3 easier to meet the mass production requirements.

[0058] The following further introduces the intrinsic silicon oxide layer 3 of the solar cell in the embodiment of the present application.

[0059] Preferably, the intrinsic silicon oxide layer 3 is a non-hydrogenated intrinsic silicon oxide layer. In the embodiment of the present application, the non-hydrogenated intrinsic silicon oxide layer 3 is adopted. Compared with the hydrogenated intrinsic silicon oxide layer, the non-hydrogenated intrinsic silicon oxide layer 3 has more Si-Si bonds and fewer Si-H bonds, and a higher film compactness, which is more conducive to more effectively blocking those doped elements that cannot be intercepted by the incubation layer and ensuring that the passivation performance of the passivation layer 2 is not affected by the thinning of the incubation layer.

[0060] Among them, the non-hydrogenation of the intrinsic silicon oxide layer 3 means that no special hydrogen element doping operation is performed during the fabrication of this layer. Therefore, after fabrication, this layer does not contain a high doping content of hydrogen elements. However, it can be understood that when the doped layer 4 is subsequently fabricated on this layer (especially when fabricating the hydrogenated doped layer 4), the hydrogen elements in the doped layer 4 may diffuse into the intrinsic silicon oxide layer 3, causing the intrinsic silicon oxide layer 3 to contain a trace amount of hydrogen elements. However, the concentration of these trace hydrogen elements is not sufficient to reach the properties of a hydrogenated layer. Therefore, the overall properties of the intrinsic silicon oxide layer 3 still belong to the properties of a non-hydrogenated layer.

[0061] Furthermore, the pore size of the intrinsic silicon oxide layer 3 is 2 nm to 8 nm. The pore size of the intrinsic silicon oxide layer 3 being 2 nm to 8 nm includes any point value within this numerical range. Exemplarily, the pore size of the intrinsic silicon oxide layer 3 is 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, or 8 nm. When the pore size of the intrinsic silicon oxide layer 3 is controlled within the above range, it is beneficial to better balance the denseness of the film layer and the carrier transport ability. Among them, for example, the pore size of the intrinsic silicon oxide layer can be obtained by taking a scan electron microscope photograph and measuring.

[0062] Furthermore, the thickness of the intrinsic silicon oxide layer 3 is 0.4 nm to 3 nm. The thickness of the intrinsic silicon oxide layer 3 being 0.4 nm to 3 nm includes any point value within this numerical range. Exemplarily, the thickness of the intrinsic silicon oxide layer 3 is 0.4 nm, 0.8 nm, 1.0 nm, 1.5 nm, 2.0 nm, 2.5 nm, or 3.0 nm. When the thickness of the intrinsic silicon oxide layer 3 is controlled within the above range, it is beneficial to better balance the carrier transport ability and the efficient crystallization nucleation of the doped microcrystalline silicon layer, reducing the influence on carrier transport due to too thick a film layer and the influence on efficient nucleation of crystals on this film layer due to too thin a thickness.

[0063] Furthermore, the doped layer 4 is a hydrogenated doped layer, and a dipole moment is formed between the oxygen atoms in the intrinsic silicon oxide layer 3 and the hydrogen atoms in the doped layer 4. Between the intrinsic silicon oxide layer 3 and the doped layer 4, the dipole moment generated by the longitudinal distribution of oxygen atoms and hydrogen atoms (i.e., the distribution perpendicular to the thickness direction of the doped layer 4) is beneficial to reducing the hole hopping distance, and thus reducing the recombination of holes and electrons.

[0064] The passivation layer 2 of the solar cell according to the embodiment of the present application will be further introduced below.

[0065] Furthermore, the passivation layer 2 is a hydrogenated intrinsic amorphous silicon layer. Through the combined action of the hydrogenated intrinsic amorphous silicon layer, the intrinsic silicon oxide layer 3, and the doped layer 4, the chemical passivation and field passivation effects are better exerted, providing more excellent passivation performance for the solar cell.

[0066] Further, the thickness of the passivation layer 2 is 6 nm to 8 nm. The thickness of the passivation layer 2 being 6 nm to 8 nm includes any point value within this numerical range. Exemplarily, the thickness of the passivation layer 2 is 6 nm, 6.2 nm, 6.5 nm, 6.8 nm, 7 nm, 7.2 nm, 7.5 nm, 7.8 nm, or 8 nm. When the thickness of the passivation layer 2 is controlled within the above range, it is beneficial to better balance the influence on the open-circuit voltage and series resistance of the solar cell.

[0067] The doping layer 4 of the solar cell in the embodiment of the present application will be further introduced below.

[0068] In the embodiment of the present application, the doping layer 4 can be a P-type doping layer 42 and / or an N-type doping layer 41.

[0069] When the doping layer 4 is an N-type doping layer 41, the doping elements in the N-type doping layer 41 include phosphorus, arsenic, antimony, or bismuth. For example, the N-type doping layer 41 is a phosphorus-doped microcrystalline silicon layer. The thickness of the N-type doping layer 41 is 23 nm to 26 nm, and the doping concentration of the N-type doping elements in the N-type doping layer 41 is 5% to 7%. The thickness of the N-type doping layer 41 being 23 nm to 26 nm includes any point value within the above numerical range. For example, the thickness of the N-type doping layer 41 is 23 nm, 24 nm, 24.5 nm, 25 nm, or 26 nm. The doping concentration of the N-type doping elements in the N-type doping layer 41 being 5% to 7% includes any point value within the above numerical range. For example, the doping concentration of the N-type doping elements in the N-type doping layer 41 is 5%, 5.5%, 6%, 6.5%, or 7%.

[0070] When the doping layer 4 is a P-type doping layer 42, the doping elements in the P-type doping layer 42 include boron, gallium, or indium. For example, the P-type doping layer 42 is a boron-doped microcrystalline silicon layer. The thickness of the P-type doping layer 42 is 28 nm to 32 nm, and the doping concentration of the P-type doping elements in the P-type doping layer 42 is 0.3% to 1%. The thickness of the P-type doping layer 42 being 28 nm to 32 nm includes any point value within the above numerical range. For example, the thickness of the P-type doping layer 42 is 28 nm, 29 nm, 30 nm, 31 nm, or 32 nm. The doping concentration of the P-type doping elements in the P-type doping layer 42 being 0.3% to 1% includes any point value within the above numerical range. For example, the doping concentration of the P-type doping elements in the P-type doping layer 42 is 0.3%, 0.5%, 0.6%, 0.8%, or 1%.

[0071] By controlling the thickness and doping element concentration of the above doping layer 4, on the basis of ensuring good carrier transport ability, the thickness of the doping layer 4 can be thinned to reduce the series resistance.

[0072] The solar cell in the embodiment of the present application is a heterojunction solar cell, and its structure will be further described below.

[0073] In the embodiments of the present application, the passivation layer 2, the intrinsic silicon oxide layer 3, the doped layer 4, the transparent conductive layer 5, and the electrode 6 are symmetrically disposed on the light-receiving surface and the backlight surface of the substrate 1, respectively.

[0074] Among them, the substrate 1 and the doped layer 4 on one side of the light-receiving surface of the substrate 1 have the same conductivity type, and the substrate 1 and the doped layer 4 on one side of the backlight surface of the substrate 1 have opposite conductivity types.

[0075] In an optional embodiment, the substrate 1 is an N-type silicon substrate 1. On the light-receiving surface of the silicon substrate 1, a light-receiving surface passivation layer 2, an N-type doped layer 41, a light-receiving surface transparent conductive layer 5, and a light-receiving surface electrode 6 are sequentially disposed. On the backlight surface of the silicon substrate 1, a backlight surface passivation layer 2, a P-type doped layer 42, a backlight surface transparent conductive layer 5, and a backlight surface electrode 6 are sequentially disposed. An intrinsic silicon oxide layer 3 is disposed between the light-receiving surface passivation layer 2 and the N-type doped layer 41, and an intrinsic silicon oxide layer 3 is also disposed between the backlight surface passivation layer 2 and the P-type doped layer 42. It can be understood that the intrinsic silicon oxide layer 3 can also be disposed only on one side of the substrate 1. For example, the intrinsic silicon oxide layer 3 is added only between the light-receiving surface passivation layer 2 and the doped layer 4 on the light-receiving surface.

[0076] In the above structure using an N-type silicon substrate 1 and a PN junction formed on the side where the P-type doped layer 42 is located, when the intrinsic silicon oxide layer 3 is not provided, the energy band matching between the P-type doped layer 42 and the passivation layer 2 is poor. After adding the intrinsic silicon oxide layer 3 between these two layers, by utilizing the characteristic that the bandgap width of the intrinsic silicon oxide layer 3 is relatively wide, the energy band offset at the interface between the P-type doped layer 42 and the passivation layer 2 can be reduced, thereby improving the transport and collection efficiency of hole carriers.

[0077] In another optional embodiment, the substrate 1 is a P-type silicon substrate 1, and the setting manners of other film layers are similar to those in the above embodiment, and the positional relationship between the N-type doped layer 41 and the P-type doped layer 42 can be adjusted according to actual requirements. For example, the P-type doped layer 42 is disposed on the light-receiving surface side and the N-type doped layer 41 is disposed on the backlight surface side, which is also possible.

[0078] The embodiments of the present application further provide a preparation method for the above solar cell, including the following steps:

[0079] Fabricating an intrinsic silicon oxide layer: A gas mixture of silane, hydrogen, and an oxygen source gas is introduced into the semi-finished solar cell using the PECVD process to deposit a non-hydrogenated intrinsic silicon oxide layer on the semi-finished solar cell. The semi-finished solar cell includes a substrate and a passivation layer provided on the substrate. The oxygen source gas includes carbon dioxide and / or nitrous oxide. By controlling the deposition conditions (such as by adjusting the deposition time, deposition temperature, and mass concentration of the introduced oxygen source gas, etc.), the content range of high-valence silicon oxide in the intrinsic silicon oxide layer can be satisfied, and an intrinsic silicon oxide layer with better film thickness and film quality can be obtained.

[0080] A hydrogenated doped layer is deposited on the intrinsic silicon oxide layer by the PECVD process. Although the doped layer includes a doped microcrystalline silicon layer, in the doped microcrystalline silicon layer obtained under the PECVD process, an incubation layer will inevitably be formed on the side close to the amorphous silicon oxide layer. Nevertheless, since the intrinsic silicon oxide layer is prepared first in this application, the thickness of the incubation layer can be reduced when preparing the doped layer.

[0081] A transparent conductive layer and an electrode are fabricated on the doped layer.

[0082] It can be understood that the above-mentioned solar cell of the embodiment of this application can also be fabricated by other fabrication methods in the prior art, and this application places no restrictions on its fabrication method.

[0083] In a second aspect, the embodiment of this application provides a photovoltaic module, which includes the solar cell as described in the first aspect. In this photovoltaic module, a photovoltaic module can be obtained by connecting a plurality of the above-mentioned solar cells in series and / or in parallel, and then encapsulating them using a glue film, a cover plate, etc.

[0084] The technical solutions disclosed in the embodiments of this application have been introduced in detail above. Specific examples are used in this article to elaborate on the principle and implementation manner of this application. The description of the above embodiments is only used to help understand the technical solutions and the core inventive points of the embodiments of this application. At the same time, for those of ordinary skill in the art, according to the idea of this application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to this application.

Claims

1. A solar cell, characterized in that, The solar cell includes: a substrate; a passivation layer provided on the surface of the substrate, the passivation layer including an intrinsic amorphous silicon layer; an intrinsic silicon oxide layer provided on a side of the passivation layer facing away from the substrate; the content range of high-valence silicon oxide in the intrinsic silicon oxide layer is greater than 50% and less than or equal to 95%, and the valence state of silicon element in the high-valence silicon oxide is greater than or equal to +2; a doping layer including a doped microcrystalline silicon layer provided on a side of the intrinsic silicon oxide layer facing away from the passivation layer; a transparent conductive layer provided on a side of the doping layer facing away from the intrinsic silicon oxide layer; an electrode provided on the transparent conductive layer.

2. The solar cell according to claim 1, characterized in that, The intrinsic silicon oxide layer is a non-hydrogenated intrinsic silicon oxide layer.

3. The solar cell according to claim 1, wherein The pore size of the intrinsic silicon oxide layer is 2 nm to 8 nm.

4. The solar cell according to claim 1, wherein The doping layer is a hydrogenated doping layer, and an oxygen atom in the intrinsic silicon oxide layer and a hydrogen atom in the doping layer form a dipole moment.

5. The solar cell according to claim 1, characterized in that, The passivation layer is a hydrogenated intrinsic amorphous silicon layer.

6. The solar cell according to claim 1, characterized in that, The thickness of the passivation layer is 6 nm to 8 nm; and / or, when the doping layer is an N-type doping layer, the thickness of the doping layer is 23 nm to 26 nm; and / or, when the doping layer is a P-type doping layer, the thickness of the doping layer is 28 nm to 32 nm; and / or, the thickness of the intrinsic silicon oxide layer is 0.4 nm to 3 nm.

7. The solar cell according to claim 6, characterized in that, when the doping layer is an N-type doping layer, the doping concentration of the doping element in the doping layer is 5% to 7%; and / or, when the doping layer is a P-type doping layer, the doping concentration of the doping element in the doping layer is 0.3% to 1%.

8. The solar cell according to any one of claims 1 to 7, characterized in that, The passivation layer, the intrinsic silicon oxide layer, the doping layer, the transparent conductive layer, and the electrode are symmetrically provided on the light-receiving surface and the backlight surface of the substrate respectively; wherein, the substrate and the doping layer on one side of the light-receiving surface of the substrate have the same conductivity type, and the substrate and the doping layer on one side of the backlight surface of the substrate have opposite conductivity types.

9. The solar cell according to any one of claims 1 to 7, wherein the substrate is an N-type silicon substrate or a P-type silicon substrate; and / or, the transparent conductive layer includes one or more of an indium tin oxide layer, a fluorine-doped tin oxide layer, an aluminum-doped zinc oxide layer, an indium-doped zinc oxide layer, or a transparent conductive aluminum-fluorine co-doped zinc oxide layer; and / or, the electrode is a silver electrode, a copper electrode, an aluminum electrode, or a silver-aluminum electrode.

10. A photovoltaic module, characterized in that, The photovoltaic module includes the solar cell according to any one of claims 1 to 9.

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