Semiconductor device and display device
By adopting a semiconductor device structure combining oxide semiconductor and low-temperature polysilicon transistors in the display device, the problems of threshold voltage unevenness and long stability time are solved, high definition, improved display quality, faster working speed and reduced power consumption are achieved, and reliability is improved.
Patent Information
- Application Number
- CN202380086525.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-12-28
- Filing Date
- 2023-12-21
- Publication Date
- 2025-07-22
AI Technical Summary
Existing display devices have shortcomings in high definition, display quality, operating speed, power consumption and reliability, especially in the problems of threshold voltage unevenness and long stabilization time.
The semiconductor device structure is adopted, including a transmission unit, an input unit, an output unit and a generation unit. By combining an oxide semiconductor transistor (OS transistor) and a low-temperature polysilicon transistor (LTPS transistor), the correction and pre-charge operation are achieved to achieve the correction of the threshold voltage and the stable transmission of potential, reducing the stability time, and improving the display quality and working speed.
It achieves improvements in high definition and display quality, accelerates working speed, reduces power consumption, and improves the reliability of the device, especially in high temperature environments.
Smart Images

Figure CN120359707A_ABST
Abstract
Description
Technical Field
[0001] One aspect of the present invention relates to a semiconductor device and a display device.
[0002] Note that one aspect of the present invention is not limited to the above technical field. One aspect of the invention disclosed in this specification and the like relates to an object, a method, a driving method, or a manufacturing method. In addition, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. More specifically, as an example of the technical field of one aspect of the invention disclosed in this specification and the like, a semiconductor device, a display device, a light-emitting device, a power storage device, an optical device, a imaging device, a lighting device, an arithmetic device, a control device, a storage device, an input device, an output device, an input / output device, a signal processing device, an arithmetic processing device, a computer, an electronic device, their driving methods, or their manufacturing methods can be cited. Background Art
[0003] For example, display devices applicable to XR (Extended Reality) such as VR (Virtual Reality) or AR (Augmented Reality) are in demand. Specifically, in order to improve the sense of reality and immersion, such display devices are required to have high definition and high color reproducibility.
[0004] For example, a liquid crystal display device, a light-emitting device including a light-emitting element such as an organic EL (Electro Luminescence) element (also referred to as an OLED (Organic Light Emitting Diode)) or a light-emitting diode (LED: Light Emitting Diode), etc. can be used for such display devices.
[0005] For example, an organic EL element has a structure in which a layer containing a light-emitting organic compound is sandwiched between a pair of electrodes. By applying a voltage between the electrodes and causing current to flow through the layer, light emission from the light-emitting organic compound can be obtained. Since a display device using the above organic EL element does not require a backlight such as that required for a liquid crystal display device, etc., a thin, lightweight, high-contrast, and low-power consumption display device can be realized. In addition, since the response speed of the organic EL element is very fast, a display device suitable for displaying images with a fast operation can be realized. Patent Document 1 discloses an example of a display device using an organic EL element.
[0006] In addition, the following circuit structure is disclosed in Patent Document 2, that is, in a pixel circuit for controlling the light emission intensity of an organic EL element, the unevenness of the threshold voltage of transistors can be corrected for each pixel to improve the display quality of a display device. In addition, Patent Document 3 discloses the following circuit structure, that is, in a peripheral driving circuit of a display device, a circuit structure for correcting the unevenness of the threshold voltage of transistors for each circuit to improve the display quality of the display device. [Prior Art Documents] [Patent Documents]
[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-324673 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-132816 [Patent Document 3] Japanese Patent Application Laid-Open No. 2005-266365 Summary of the Invention Technical Problem to be Solved by the Invention
[0008] One of the objectives of one embodiment of the present invention is to provide a high-definition semiconductor device or display device. In addition, one of the objectives of one embodiment of the present invention is to provide a semiconductor device or display device that achieves miniaturization. In addition, one of the objectives of one embodiment of the present invention is to provide a semiconductor device or display device that improves display quality. In addition, one of the objectives of one embodiment of the present invention is to provide a semiconductor device or display device that increases the operating speed. In addition, one of the objectives of one embodiment of the present invention is to provide a semiconductor device or display device with reduced power consumption. In addition, one of the objectives of one embodiment of the present invention is to provide a semiconductor device or display device with high reliability. In addition, one of the objectives of one embodiment of the present invention is to provide a novel semiconductor device or display device. In addition, one of the objectives of one embodiment of the present invention is to provide a driving method for a semiconductor device or a driving method for a display device that can improve display quality. In addition, one of the objectives of one embodiment of the present invention is to provide a driving method for a semiconductor device or a driving method for a display device that can increase the operating speed. In addition, one of the objectives of one embodiment of the present invention is to provide a driving method for a semiconductor device or a driving method for a display device that can reduce power consumption. In addition, one of the objectives of one embodiment of the present invention is to provide a driving method for a semiconductor device or a driving method for a display device that can improve reliability. In addition, one of the objectives of one embodiment of the present invention is to provide a novel driving method for a semiconductor device or a driving method for a display device.
[0009] In addition, the description of the above object does not preclude the existence of other objects. Note that one aspect of the present invention does not need to achieve all of the above objects. Other objects other than the above can be obviously seen and extracted from the description in the present specification, the drawings, the claims, etc. Means for solving technical problems (1) One aspect of the present invention is a semiconductor device including a transmission unit, an input unit, an output unit, a generation unit, a first wiring, and a second wiring. The transmission unit includes a first transistor. The gate of the first transistor is electrically connected to the first wiring through the input unit. One of the source and the drain of the first transistor is electrically connected to the second wiring through the output unit. The first wiring is electrically connected to the second wiring through the generation unit and the output unit. The transmission unit has a function as a source follower that outputs a first potential to one of the source and the drain of the first transistor according to the potential input to the gate of the first transistor. The generation unit has a function of generating a second potential corresponding to the potential of the first wiring. The input unit has a function of holding a voltage equivalent to the threshold voltage of the first transistor and a function of transmitting a potential corresponding to the potential of the first wiring to the gate of the first transistor. The output unit has a function of transmitting the first potential to the second wiring and a function of transmitting the second potential to the second wiring. (2) One aspect of the present invention is a semiconductor device, which includes a transmission section, an input section, an output section, a generation section, a first wiring, a second wiring, a third wiring, a fourth wiring, a fifth wiring, a sixth wiring, a seventh wiring, an eighth wiring, a ninth wiring, a tenth wiring, an eleventh wiring, a twelfth wiring, a thirteenth wiring, and a fourteenth wiring. The transmission section includes a first transistor and a second transistor. The input section includes a third transistor, a fourth transistor, a fifth transistor, and a first capacitor. The output section includes a sixth transistor and a seventh transistor. The generation section includes an eighth transistor and a ninth transistor. The gate of the first transistor is electrically connected to one of the source and drain of the fifth transistor and one terminal of the first capacitor. One of the source and drain of the first transistor is electrically connected to one of the source and drain of the second transistor, one of the source and drain of the fourth transistor, and one of the source and drain of the sixth transistor. The other of the source and drain of the first transistor is electrically connected to the third wiring. The gate of the second transistor is electrically connected to the fourth wiring. The other of the source and drain of the second transistor is electrically connected to the fifth wiring. The gate of the third transistor is electrically connected to the sixth wiring. One of the source and drain of the third transistor is electrically connected to the other of the source and drain of the fourth transistor and the other terminal of the first capacitor. The other of the source and drain of the third transistor is electrically connected to the gate of the eighth transistor and the first wiring. The gate of the fourth transistor is electrically connected to the seventh wiring. The gate of the fifth transistor is electrically connected to the eighth wiring. The other of the source and drain of the fifth transistor is electrically connected to the ninth wiring. The gate of the sixth transistor is electrically connected to the tenth wiring. The other of the source and drain of the sixth transistor is electrically connected to one of the source and drain of the seventh transistor and the second wiring. The gate of the seventh transistor is electrically connected to the eleventh wiring. The other of the source and drain of the seventh transistor is electrically connected to one of the source and drain of the eighth transistor and one of the source and drain of the ninth transistor. The other of the source and drain of the eighth transistor is electrically connected to the twelfth wiring. The gate of the ninth transistor is electrically connected to the thirteenth wiring. The other of the source and drain of the ninth transistor is electrically connected to the fourteenth wiring. (3) In addition, in the above (2), the first capacitor may also have a function of holding a voltage equivalent to the threshold voltage of the first transistor. (4) In addition, in the above (3), there may be a first state in which the fourth transistor, the fifth transistor, and the seventh transistor are in an on state and the third transistor and the sixth transistor are in an off state. (5) In addition, in any one of the above (1) to (4), the first transistor may include a semiconductor layer, and the semiconductor layer may contain an oxide semiconductor. (6) In addition, in the above (5), at least a part of the semiconductor layer may also be provided inside an opening formed in the insulating layer. (7) In addition, in the above (6), the transistors included in each of the transmission unit, the input unit, the output unit, and the generation unit may also be formed by the same process as the first transistor. (8) One aspect of the present invention is a display device including the semiconductor device according to any one of the above (1) to (4) and pixels, wherein the pixels include a tenth transistor, and one of the source and drain of the tenth transistor is electrically connected to the second wiring. (9) In addition, in the above (8), the first transistor may also include a semiconductor layer, and the semiconductor layer may also contain an oxide semiconductor. (10) In addition, in the above (9), at least a part of the semiconductor layer may also be provided inside an opening formed in the insulating layer. (11) In addition, in the above (10), the transistors included in each of the transmission unit, the input unit, the output unit, the generation unit, and the pixels may also be formed by the same process as the first transistor. Advantageous Effects of the Invention
[0021] One aspect of the present invention can provide a high-definition semiconductor device or display device. In addition, one aspect of the present invention can provide a semiconductor device or display device that achieves miniaturization. In addition, one aspect of the present invention can provide a semiconductor device or display device that improves display quality. In addition, one aspect of the present invention can provide a semiconductor device or display device that increases the operating speed. In addition, one aspect of the present invention can provide a semiconductor device or display device with reduced power consumption. In addition, one aspect of the present invention can provide a semiconductor device or display device with high reliability. In addition, one aspect of the present invention can provide a novel semiconductor device or display device. In addition, one aspect of the present invention can provide a driving method for a semiconductor device or a display device that can improve display quality. In addition, one aspect of the present invention can provide a driving method for a semiconductor device or a display device that can increase the operating speed. In addition, one aspect of the present invention can provide a driving method for a semiconductor device or a display device that can reduce power consumption. In addition, one aspect of the present invention can provide a driving method for a semiconductor device or a display device that can improve reliability. In addition, one aspect of the present invention can provide a novel driving method for a semiconductor device or a display device.
[0022] Note that the description of the above effects does not preclude the existence of other effects. Note that one aspect of the present invention does not necessarily have all of the above effects. Note that other effects other than the above can be obvious from the description in the present specification, the drawings, or the claims, and other effects other than the above can be extracted from the description in the present specification, the drawings, or the claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figures 1A to 1C is a circuit diagram showing a structural example of a semiconductor device. Figure 2A and Figure 2B is a timing diagram showing an operation example of a semiconductor device. Figure 3 is a circuit diagram showing an operation example of a semiconductor device. Figure 4 is a circuit diagram showing an operation example of a semiconductor device. Figure 5 is a circuit diagram showing an operation example of a semiconductor device. Figure 6 is a circuit diagram showing a structural example of a semiconductor device. Figures 7A to 7F is a circuit diagram showing a structural example of a semiconductor device. Figures 8A to 8E is a block diagram showing a structural example of a display device. Figure 9 is a circuit diagram showing a structural example of a semiconductor device. Figure 10 is a timing diagram showing an operation example of a semiconductor device. Figure 11 is a circuit diagram showing a structural example of a semiconductor device. Figure 12 is a circuit diagram showing a structural example of a semiconductor device. Figure 13 is a circuit diagram showing a structural example of a semiconductor device. Figure 14 is a circuit diagram showing a structural example of a semiconductor device. Figure 15 is a circuit diagram showing a structural example of a semiconductor device. Figure 16 is a circuit diagram showing a structural example of a semiconductor device. Figure 17 is a circuit diagram showing a structural example of a semiconductor device. Figure 18 is a circuit diagram showing a structural example of a semiconductor device. Figures 19A to 19C and Figure 19EIt is a circuit diagram showing a structural example of a semiconductor device. Figure 19D It is a timing diagram showing an operating example of a semiconductor device. Figures 20A to 20C and Figure 20E It is a circuit diagram showing a structural example of a semiconductor device. Figure 20D It is a timing diagram showing an operating example of a semiconductor device. Figures 21A to 21C It is a circuit diagram showing a structural example of a semiconductor device. Figure 22 It is a circuit diagram showing a structural example of a semiconductor device. Figures 23A to 23C and Figure 23E It is a circuit diagram showing a structural example of a semiconductor device. Figure 23D It is a timing diagram showing an operating example of a semiconductor device. Figure 24 It is a circuit diagram showing a structural example of a semiconductor device. Figures 25A to 25F It is a circuit diagram showing a structural example of a semiconductor device. Figure 26 It is a timing diagram showing an operating example of a semiconductor device. Figures 27A to 27C It is a circuit diagram showing a structural example of a semiconductor device. Figure 28A It is a top view showing a structural example of a semiconductor device. Figure 28B and Figure 28C It is a cross-sectional view showing a structural example of a semiconductor device. Figure 29A It is a top view showing a structural example of a semiconductor device. Figure 29B It is a cross-sectional view showing a structural example of a semiconductor device. Figure 30A It is a top view showing a structural example of a semiconductor device. Figure 30B and Figure 30C It is a cross-sectional view showing a structural example of a semiconductor device. Figure 31 It is a cross-sectional view showing a structural example of a semiconductor device. Figure 32A and Figure 32B It is a cross-sectional view showing a structural example of a semiconductor device. Figure 33A and Figure 33B It is a cross-sectional view showing a structural example of a semiconductor device. Figure 34A and Figure 34B It is a circuit diagram showing a structural example of a semiconductor device. Figure 34C It is a top view showing a structural example of a semiconductor device. Figure 35 is a cross-sectional view showing an example of the structure of a semiconductor device. Figure 36A and Figure 36B is a circuit diagram showing an example of the structure of a semiconductor device. Figure 36C is a top view showing an example of the structure of a semiconductor device. Figure 37 is a cross-sectional view showing an example of the structure of a semiconductor device. Figure 38A is a perspective view showing an example of the structure of a display device. Figures 38B to 38F is a top view showing an example of the arrangement of pixels. Figure 39A and Figure 39B is a cross-sectional view showing an example of the structure of a display device. Figure 40A and Figure 40B is a cross-sectional view showing an example of the structure of a display device. Figures 41A to 41D is a view showing an example of an electronic device. Figures 42A to 42F is a view showing an example of an electronic device. Figures 43A to 43G is a view showing an example of an electronic device. Modes for Carrying Out the Invention
[0024] In this specification and the like, a semiconductor device refers to a device that utilizes semiconductor characteristics, for example, a circuit including semiconductor elements (e.g., transistors, diodes, or thyristors, etc.) or a device including such a circuit. In addition, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. For example, as examples of semiconductor devices, there are integrated circuits including semiconductor elements, chips including integrated circuits, electronic components in which chips are housed in packages, or electronic devices in which electronic components are mounted. In addition, for example, display devices, light-emitting devices, power storage devices, optical devices, imaging devices, lighting devices, arithmetic devices, control devices, storage devices, input devices, output devices, input / output devices, signal processing devices, electronic computers, or electronic devices themselves are semiconductor devices and sometimes include semiconductor devices.
[0025] Hereinafter, embodiments will be described with reference to the drawings. Note that the embodiments can be implemented in multiple different forms. Thus, it can be easily understood by those of ordinary skill in the art that the manner and details can be transformed into various forms without departing from the spirit and scope. Therefore, one embodiment of the present invention should not be construed as being limited only to the content described in the embodiments.
[0026] In addition, in this specification and the like, the structures shown in each embodiment can be appropriately combined with the structures shown in other embodiments to form one mode of the present invention. Further, when multiple structures are shown in one embodiment, these structures can be appropriately combined and regarded as one mode of the present invention.
[0027] Note that regarding the drawings illustrating the embodiments, in the structure of the invention, the same reference numerals are sometimes used in different drawings to denote the same parts or parts having the same functions, thereby omitting repeated descriptions. Further, in the drawings, when denoting parts having the same functions, sometimes the same hatching is used, for example, without particularly attaching reference numerals. For example, in a perspective view or a top view (also referred to as a "plan view") or the like, for the sake of clarity, sometimes the illustration of some constituent elements is omitted. For example, sometimes the description of some hidden lines in the drawings is omitted. Additionally, for example, sometimes the description of hatching or the like in the drawings is omitted.
[0028] In the drawings, for the sake of clear illustration, sometimes the sizes, layer thicknesses, or regions are exaggerated. Therefore, the drawings are not limited to, for example, the sizes or aspect ratios in the drawings. Further, in the drawings, ideal examples are schematically shown, and thus the present invention is not limited to, for example, the shapes or numerical values shown in the drawings. For example, in an actual manufacturing process, sometimes layers or resist masks or the like are unintentionally thinned due to processing such as etching, but sometimes this is not reflected in the drawings for the sake of clarity. Additionally, for example, in an actual circuit operation, sometimes voltage or current or the like becomes uneven due to noise or timing deviation or the like, but sometimes they are not reflected in the drawings for the sake of clarity.
[0029] In this specification, the drawings, and the like, the constituent elements are classified according to functions and represented as independent constituent elements. However, it is difficult to classify the constituent elements according to functions, and sometimes one circuit relates to multiple functions or multiple circuits relate to one function. Therefore, the constituent elements shown in this specification, the drawings, and the like are not limited to their descriptions, and can be appropriately rephrased according to circumstances.
[0030] In this specification, the drawings, and the like, when the same reference numeral is used for multiple constituent elements and it is necessary to distinguish them, sometimes identification symbols such as "A", "b", "_1", "[n]", or "[m, n]" are attached to the reference numeral. Additionally, when describing the common content among multiple constituent elements to which identification symbols are attached or when it is not necessary to distinguish them, sometimes they are described without attaching identification symbols.
[0031] Note that in this specification and the like, the "conductive state" or "on state" of a transistor means, for example, a state where the source and drain of the transistor can be regarded as being electrically short-circuited or a state where current can flow between the source and drain. For example, the following state is sometimes referred to as the "conductive state" or "on state": in an n-channel transistor, a state where the voltage between the gate and the source is higher than the threshold voltage; or in a p-channel transistor, a state where the voltage between the gate and the source is lower than the threshold voltage. In addition, the "non-conductive state", "off state" or "closed state" of a transistor means a state where the source and drain of the transistor can be regarded as being electrically disconnected. For example, the following state is sometimes referred to as the "non-conductive state", "off state" or "closed state": in an n-channel transistor, a state where the voltage between the gate and the source is lower than the threshold voltage; or in a p-channel transistor, a state where the voltage between the gate and the source is higher than the threshold voltage.
[0032] In addition, in this specification and the like, the voltage between the gate and the source (gate-source voltage) is sometimes referred to as the "gate voltage", the voltage between the drain and the source (drain-source voltage) is sometimes referred to as the "drain voltage", and the voltage between the back gate and the source (back gate-source voltage) is sometimes referred to as the "back gate voltage". In addition, the current flowing between the drain and the source is sometimes referred to as the "drain current". Note that descriptions such as a high gate voltage, a high drain voltage, and a high back gate voltage of an n-channel transistor can be appropriately converted into descriptions such as a low gate voltage, a low drain voltage, and a low back gate voltage of a p-channel transistor. In addition, descriptions such as a low gate voltage, a low drain voltage, and a low back gate voltage of an n-channel transistor can be appropriately converted into descriptions such as a high gate voltage, a high drain voltage, and a high back gate voltage of a p-channel transistor.
[0033] In addition, in this specification and the like, unless otherwise specified, the "off-state current" of a transistor means the drain current when the transistor is in the off state. Note that in this specification and the like, the off-state current and the current flowing between the gate and the source and drain (also referred to as the gate leakage current) are sometimes referred to as leakage currents.
[0034] (Embodiment 1) A semiconductor device according to one embodiment of the present invention will be described with reference to the accompanying drawings. In addition, a display device according to one embodiment of the present invention will be described with reference to the accompanying drawings. This semiconductor device can be used, for example, as a part of this display device.
[0035] <Structural example of a semiconductor device> Figure 1A It is a circuit diagram showing a structural example of a semiconductor device according to one embodiment of the present invention.
[0036] AsFigure 1A As shown, the semiconductor device 60 includes a transmission unit 61, an input unit 62, an output unit 63, and a generation unit 64. The transmission unit 61 is electrically connected to the wiring IN11 through the input unit 62 and is electrically connected to the wiring OUT11 through the output unit 63. The wiring IN11 is electrically connected to the wiring VL15 through the generation unit 64, and the wiring VL15 is electrically connected to the wiring OUT11 through the output unit 63.
[0037] The transmission unit 61 has a function of outputting a potential corresponding to the input potential. The input unit 62 has a function of transmitting the potential corresponding to the potential of the wiring IN11 to the transmission unit 61. In addition, the input unit 62 has a function of correcting the potential input to the transmission unit 61. The output unit 63 has a function of transmitting the potential output by the transmission unit 61 to the wiring OUT11. In addition, the output unit 63 has a function of transmitting the potential of the wiring VL15 to the wiring OUT11. The generation unit 64 has a function of generating a potential corresponding to the potential of the wiring IN11 and supplying it to the wiring VL15.
[0038] The transmission unit 61 includes a transistor M11 and a transistor M12. The input unit 62 includes a transistor M13, a transistor M14, a transistor M15, and a capacitor C11. The output unit 63 includes a transistor M16 and a transistor M17.
[0039] One of the source and drain of the transistor M11 is electrically connected to one of the source and drain of the transistor M12. The other of the source and drain of the transistor M11 is electrically connected to the wiring VL11. The other of the source and drain of the transistor M12 is electrically connected to the wiring VL12. The gate of the transistor M12 is electrically connected to the wiring VL13.
[0040] The transistor M11 has a function of outputting a potential corresponding to the potential supplied to the gate to one of the source and drain. In addition, the transistor M12 has a function of acting as a current source that allows a drain current corresponding to the potential supplied to the gate to flow. Therefore, the transmission unit 61 has a function of acting as a source follower that uses the gate of the transistor M11 as an input terminal and one of the source and drain of the transistor M11 as an output terminal. Note that in this specification and the like, a transistor having a function like that of the transistor M11 is sometimes referred to as a "driving transistor". In addition, a transistor having a function like that of the transistor M12 is sometimes referred to as a "load transistor". In addition, the transmission unit 61 can be used as a source-grounded amplifier circuit. In addition, the transistor M12 used as a load transistor can be replaced with a resistor, for example.
[0041] One of the source and drain of transistor M13 is electrically connected to one terminal of capacitor C11 and one of the source and drain of transistor M14. The other of the source and drain of transistor M13 is electrically connected to wiring IN11. The gate of transistor M13 is electrically connected to wiring SW11. Transistor M13 has the function (function as a switch) of making the connection between one terminal of capacitor C11 and wiring IN11 conductive or non-conductive according to the potential of wiring SW11.
[0042] The other of the source and drain of transistor M14 is electrically connected to one of the source and drain of transistor M11. The gate of transistor M14 is electrically connected to wiring SW12. Transistor M14 has the function (function as a switch) of making the connection between one terminal of capacitor C11 and one of the source and drain of transistor M11 conductive or non-conductive according to the potential of wiring SW12.
[0043] One of the source and drain of transistor M15 is electrically connected to the other terminal of capacitor C11 and the gate of transistor M11. The gate of transistor M15 is electrically connected to wiring SW13. The other of the source and drain of transistor M15 is electrically connected to wiring VL14. Transistor M15 has the function (function as a switch) of making the connection between the other terminal of capacitor C11 and wiring VL14 conductive or non-conductive according to the potential of wiring SW13.
[0044] Capacitor C11 has the function of maintaining the potential difference (voltage) between a pair of terminals (between one terminal and the other terminal). In other words, capacitor C11 has, for example, the function of changing the potential of the other terminal according to the change in the potential of one terminal. That is to say, for example, the change in the potential of one terminal (which is one of the source and drain of transistor M13) can be transmitted to the other terminal (which is the gate of transistor M11) through capacitor C11. In addition, capacitor C11 has, for example, the function of maintaining the potential difference between the gate of transistor M11 and one of the source and drain. That is to say, for example, a voltage equivalent to the threshold voltage of transistor M11 can be maintained in capacitor C11.
[0045] One of the source and drain of transistor M16 is electrically connected to one of the source and drain of transistor M17 and wiring OUT11. The other of the source and drain of transistor M16 is electrically connected to one of the source and drain of transistor M11. The gate of transistor M16 is electrically connected to wiring SW14. Transistor M16 has the function (function as a switch) of making the connection between wiring OUT11 and one of the source and drain of transistor M11 conductive or non-conductive according to the potential of wiring SW14.
[0046] Another one of the source and drain of transistor M17 is electrically connected to wiring VL15. The gate of transistor M17 is electrically connected to wiring SW15. Transistor M17 has a function (function as a switch) of bringing wiring OUT11 and wiring VL15 into a conductive state or a non-conductive state according to the potential of wiring SW15.
[0047] Figure 1B It is a circuit diagram illustrating an example of the structure of generation unit 64.
[0048] As Figure 1B shown, generation unit 64a includes buffer unit 65. Buffer unit 65 has a function of generating a potential corresponding to the potential of wiring IN11 and supplying it to wiring VL15.
[0049] Figure 1C It is a circuit diagram illustrating an example of the structure of buffer unit 65.
[0050] As Figure 1C shown, buffer unit 65a includes transistor M18 and transistor M19.
[0051] One of the source and drain of transistor M18 is electrically connected to one of the source and drain of transistor M19 and wiring VL15. The other of the source and drain of transistor M18 is electrically connected to wiring VL16. The gate of transistor M18 is electrically connected to wiring IN11. The other of the source and drain of transistor M19 is electrically connected to wiring VL17. The gate of transistor M19 is electrically connected to wiring VL18.
[0052] Transistor M18 has a function of outputting a potential corresponding to the potential supplied to the gate to one of the source and drain. In addition, transistor M19 has a function as a current source that allows a drain current corresponding to the potential supplied to the gate to flow. Therefore, buffer unit 65a has a function as a source follower that uses the gate of transistor M18 as an input terminal and one of the source and drain of transistor M18 as an output terminal. In other words, it can also be said that transistor M18 is used as a driving transistor and transistor M19 is used as a load transistor. In addition, buffer unit 65a can also be used as a source-grounded amplifier circuit. In addition, transistor M19 used as a load transistor can be replaced with a resistor, for example.
[0053] In the present embodiment and the like, unless otherwise stated, the transistors (transistors M11 to M19) constituting semiconductor device 60 are enhancement-type (normally-off type) n-channel transistors. Therefore, their threshold voltage is greater than 0V.
[0054] Note that one aspect of the present invention is not limited to this. Semiconductor device 60 can be constituted by using various transistors.
[0055] For example, part or all of the transistors constituting the semiconductor device 60 may also be p-channel transistors.
[0056] As the transistors constituting the semiconductor device 60, transistors including various semiconductors can be used. For example, transistors including single-crystal semiconductors, polycrystalline semiconductors, microcrystalline semiconductors, or amorphous semiconductors in the channel formation region can be used. In addition, as this semiconductor, in addition to single semiconductors (e.g., silicon or germanium, etc.) whose main components are composed of a single element, for example, compound semiconductors (e.g., silicon germanium or gallium arsenide, etc.) or oxide semiconductors, etc. can be used.
[0057] In addition, as the transistors constituting the semiconductor device 60, various transistors can be used. For example, MOS field-effect transistors, junction field-effect transistors, or bipolar transistors, etc. can be used.
[0058] In addition, as the transistors constituting the semiconductor device 60, transistors with various structures can be used. For example, transistors with various structures such as planar type, staggered type, FIN (fin) type, TRI-GATE (tri-gate) type, top-gate type, bottom-gate type, or double-gate type (a structure in which gates are arranged on both sides (e.g., up and down) sandwiching the channel formation region) can be used. In addition, as the transistors constituting the semiconductor device 60, vertical transistors (transistors in which at least a part of the semiconductor layer including the channel formation region is provided along the side surface of the insulating layer formed in the opening of the insulating layer) are preferably used.
[0059] Note that in vertical transistors, the source electrode and the drain electrode are at different heights, so in the channel formation region of the semiconductor layer, current flows in the height direction (also referred to as the longitudinal direction, the depth direction when viewed from above, or the direction perpendicular to the formed surface). That is to say, the channel length direction includes a component in the height direction.
[0060] Vertical transistors have a structure in which at least a part of the source region, the channel formation region, and the drain region can overlap when viewed from above, so the occupied area (also referred to as the footprint area) can be reduced. In addition, because they have a structure that can make the channel length smaller and the channel width larger, the on-resistance can be reduced (the on-current can be increased).
[0061] In addition, as a modified example of the above vertical transistor, the following structure may be adopted: the source electrode and the drain electrode are located at the same height, and current flows in the circumferential direction (lateral direction) in the channel formation region of the semiconductor layer. In other words, the channel width direction may have a component in the height direction (vertical direction). A transistor having the above structure may be referred to as a VLFET (Vertical Lateral Field Effect Transistor) or the like. The VLFET can increase the channel length while reducing the occupied area. For example, the occurrence of short-channel effects such as drain induced barrier lowering (DIBL) can be reduced.
[0062] In one embodiment of the present invention, as part or all of the transistors constituting the semiconductor device 60, vertical transistors are preferably used. In particular, as the transistors used as switches (transistors M13 to M17), vertical transistors are preferably used.
[0063] In addition, as the driving transistors (transistors M11 and M18) and the load transistors (transistors M12 and M19), transistors with high saturation (small change in drain current with respect to drain voltage in the saturation region of the transistor) are preferably used. For example, transistors with a large channel length can be used. For example, the above VLFET can also be used.
[0064] In one embodiment of the present invention, as the transistors constituting the semiconductor device 60, OS transistors (transistors including an oxide semiconductor in the channel formation region) are preferably used.
[0065] Since the bandgap of the oxide semiconductor forming the channel is 2 eV or more, the OS transistor has the characteristic of extremely small off-state current. The off-state current value of an OS transistor with a channel width of 1 μm per channel at room temperature can be 1 aA (1×10 -18 A) or less, 1 zA (1×10 -21 A) or less, or 1 yA (1×10 -24 A) or less. Note that in an Si transistor (a transistor including silicon in the channel formation region), the off-state current value per channel width of 1 μm at room temperature is 1 fA (1×10 -15 A) or more and 1 pA (1×10 -12 A) or less. Therefore, it can also be said that the off-state current of the OS transistor is about 10 orders of magnitude smaller than that of the Si transistor.
[0066] Therefore, by using, for example, OS transistors as the transistors serving as switches among the transistors constituting the semiconductor device 60, such as transistors M13 to M15, the charge stored in the capacitor C11 can be retained for a long time. That is to say, for example, the capacitor C11 can retain a voltage equivalent to the threshold voltage of the transistor M11 for a long time. In other words, for example, in the input unit 62, the correction frequency of the potential input to the transmission unit 61 can be reduced. Thereby, the power consumption of this semiconductor device can be reduced.
[0067] In addition, for example, by using OS transistors as the transistors serving as switches among the transistors constituting the semiconductor device 60, such as transistors M16 and M17, the potential of the wiring OUT11 can be retained for a long time.
[0068] Furthermore, even in a high-temperature environment, the off-state current of the OS transistor hardly increases. Specifically, even in an environment where the temperature is above room temperature and below 200 °C, the off-state current hardly increases. In addition, even in a high-temperature environment, the on-state current of the OS transistor is not easily decreased. On the other hand, in a high-temperature environment, the on-state current of the Si transistor decreases. That is to say, in a high-temperature environment, the on-state current of the OS transistor is larger than that of the Si transistor. In addition, even in an environment where the temperature is above 125 °C and below 150 °C, the ratio of the on-state current to the off-state current of the OS transistor is large, so good switching operation can be performed. Therefore, the semiconductor device using the OS transistor operates stably and has high reliability even in a high-temperature environment. That is to say, by using the OS transistor as the transistor constituting the semiconductor device 60, the reliability of the semiconductor device can be improved.
[0069] In addition, the breakdown voltage between the source and drain of the OS transistor (also referred to as the drain breakdown voltage) is high. Therefore, the semiconductor device using the OS transistor operates stably and has high reliability even when driven at a high voltage. That is to say, for example, by using OS transistors as transistors M11 and M12 among the transistors constituting the semiconductor device 60, even when the potential difference (voltage) between the potential supplied to the wiring VL11 and the potential supplied to the wiring VL12 is large, the operation of the semiconductor device 60 can be made stable. In addition, by using OS transistors as transistors M18 and M19, even when the potential difference (voltage) between the potential supplied to the wiring VL16 and the potential supplied to the wiring VL17 is large, the operation of the semiconductor device 60 can be made stable. Therefore, the reliability of this semiconductor device can be improved.
[0070] Note that, in one embodiment of the present invention, the structure of the semiconductor device 60 is not limited to the structure using OS transistors, and a structure using a plurality of transistors including different semiconductor materials may also be employed. For example, the semiconductor device 60 may also be composed of a transistor (LTPS transistor) containing low-temperature polycrystalline silicon (LTPS: Low Temperature Poly Silicon) in the channel formation region and an OS transistor. The LTPS transistor has a high field-effect mobility and good frequency characteristics. Sometimes, the structure combining the LTPS transistor and the OS transistor is referred to as LTPO.
[0071] For example, as the transistors (transistors M13 to M17) serving as switches among the transistors constituting the semiconductor device 60, OS transistors can be used, and as the driving transistors (transistors M11 and M18) and load transistors (transistors M12 and M19), LTPS transistors can be used. By using both the LTPS transistors and the OS transistors to constitute the semiconductor device 60, the power consumption of the semiconductor device can be reduced and the driving ability can be improved.
[0072] When the semiconductor device 60 has a structure using a plurality of transistors including different semiconductor materials, the transistors may also be arranged in different layers according to the types of the transistors. For example, when the semiconductor device 60 is composed of Si transistors and OS transistors, the layer including Si transistors and the layer including OS transistors may be overlapped. By having such a structure, the occupied area of the semiconductor device 60 can be reduced.
[0073] Among the transistors constituting the semiconductor device 60 in one embodiment of the present invention, as the transistors (transistors M13 to M17) serving as switches, vertical OS transistors can also be used, and as the driving transistors (transistors M11 and M18) and load transistors (transistors M12 and M19), double-gate OS transistors can also be used. For specific structural examples of such a semiconductor device including both vertical transistors and double-gate transistors, refer to the description of Embodiment 2 described later.
[0074] <Operating Example of Semiconductor Device> Next, the operation of the semiconductor device 60 will be described.
[0075] Note that in this specification and the like, the potential difference (voltage) between the gate of a transistor and the source of the transistor is sometimes referred to as the "gate voltage". That is, "the gate voltage of the transistor = the potential of the gate of the transistor - the potential of the source of the transistor". In addition, the potential difference (voltage) between the back gate of the transistor and the source of the transistor is sometimes referred to as the "back gate voltage". That is, "the back gate voltage of the transistor = the potential of the back gate of the transistor - the potential of the source of the transistor".
[0076] Figure 2A is a timing chart illustrating an operation example of the semiconductor device 60. Figures 3 to 5 is a circuit diagram illustrating an operation example of the semiconductor device 60. Note that Figures 3 to 5 the semiconductor device 60 shown is structured as follows: in Figure 1A the semiconductor device 60 shown, it further includes Figure 1B the generation unit 64a shown and Figure 1C the buffer unit 65a shown.
[0077] In the following operation description, the wiring IN11 is supplied with the potential Vin. The wirings VL11 and VL16 are supplied with the potential Vsfd, the wirings VL12 and VL17 are supplied with the potential Vsfs, the wirings VL13 and VL18 are supplied with the potential Vsfb, and the wiring VL14 is supplied with the potential Vpre. In addition, the wirings SW11, SW12, SW13, SW14, and SW15 are each supplied with the potential H or the potential L.
[0078] The potential Vsfs is, for example, a potential lower than the lower limit of the potential range in which the potential Vin can exist. The potential Vsfd is, for example, a potential higher than the upper limit of the potential range in which the potential Vin can exist. The potential Vsfb is, for example, a potential higher than the potential Vsfs and lower than the potential Vsfd. The potential Vpre is, for example, a potential higher than the potential Vsfs and lower than the potential Vsfd. In addition, the transistors M11, M12, M18, and M19 are respectively supplied with the potentials Vsfs, Vsfd, and Vsfb so that the above-mentioned transistors operate in the saturation region.
[0079] The potential H is a potential higher than the potential L. For example, the difference between the potential H and the potential L is preferably larger than the threshold voltage of the transistor. Here, the potential H is a potential that turns on (conducts) the transistor when it is supplied to the gate of the transistor constituting the semiconductor device 60. In addition, the potential L is a potential that turns off (non-conducts) the transistor when it is supplied to the gate of the transistor constituting the semiconductor device 60.
[0080] In addition, for the sake of convenience in explanation, the threshold voltages of the transistors constituting the semiconductor device 60 are all set to the same value (voltage Vth).
[0081] Therefore, the potential of the wiring VL15 is "potential Vin - voltage Vth".
[0082] Figure 2A The timing chart shown shows the respective potentials (potential H or potential L) supplied to the wirings SW11, SW12, SW13, SW14, and SW15 during each period of operation (period T61 to period T63).
[0083] Note that in this specification, the drawings, etc., when the potential changes, for example, due to loads (parasitic capacitance and parasitic resistance) such as wirings, rise times and fall times are generated. This time is, for example, greater than 0 seconds and less than 1000 nanoseconds, less than 100 nanoseconds, less than 10 nanoseconds, or less than 1 nanosecond.
[0084] In addition, for example, even if the timings of two different operations are shown to be the same, it does not necessarily mean exactly the same timing. For example, even if there is a slight time lag caused by signal delays, etc. in the wiring, it may sometimes be regarded as the same timing. This time lag is, for example, greater than 0 seconds and less than 1000 nanoseconds, less than 100 nanoseconds, less than 10 nanoseconds, or less than 1 nanosecond. Therefore, an expression such as "the same timing" can be converted into an expression such as "almost the same timing", "substantially the same timing", or "essentially the same timing", etc. Therefore, "the same timing" sometimes means, for example, "the same timing or substantially the same timing".
[0085] In addition, the potential H or potential L supplied to each of the multiple wirings does not need to be the same potential between the wirings. For example, different potentials can be set for the wirings in consideration of the threshold voltage of the transistors to which the potential is supplied, etc.
[0086] In addition, in the timing chart, the respective periods are sometimes shown with the same length, but the lengths of the respective periods can also be different. For example, for the sake of explanation, in Figure 2A the timing chart shown, the respective periods (period T61 to period T63) are shown with the same length, but the lengths of the respective periods can also be different.
[0087] In addition, in Figures 3 to 5 sometimes, for example, notations indicating potentials (also called potential notations) such as "H", "L", "Vin", or "Vpre" are recorded in a framed form at positions adjacent to the respective wirings or nodes. In addition, an "×" symbol is sometimes attached overlapping a transistor in the off state.
[0088] During period T61 shown in Figure 2, the following operations (calibration operations) are performed: The input unit 62 acquires a voltage for calibrating the threshold voltage of the transistor M11 included in the transmission unit 61, and holds this voltage in the capacitor C11. In addition, the following operations (pre-charge operations) are also performed: In the generation unit 64, a potential corresponding to the potential of the wiring IN11 is generated, and this potential is supplied to the wiring OUT11 through the output unit 63. Next, during period T62, the following operations (input operations) are performed: The potential of the wiring IN11 is input to the transmission unit 61 through the input unit 62. Next, during period T63, the following operations (output operations) are performed: The potential output from the transmission unit 61 is supplied to the wiring OUT11 through the output unit 63.
[0089] In the transmission unit 61 included in the semiconductor device 60, the potential of one of the source and drain of the transistor M11 is a value obtained by subtracting the threshold voltage of the transistor M11 from the potential of the gate of the transistor M11. Therefore, for example, in a display device including a plurality of semiconductor devices 60, even if the same potential is supplied to the gates of the transistors M11 in each semiconductor device 60, when the threshold voltages of the transistors M11 are different, the potential of one of the source and drain of the transistors M11 in each semiconductor device 60 is different. Therefore, the non-uniformity of the threshold voltage of the transistor M11 causes a reduction in the display quality of the display device.
[0090] Then, in the semiconductor device 60, by performing the calibration operations described below, the transmission unit 61 can output a potential independent of the threshold voltage. Thereby, the display quality of the display device including the semiconductor device 60 can be improved.
[0091] On the other hand, when performing the output operation of supplying the potential output from the transmission unit 61 to the wiring OUT11 with the transistor M16 in the on state in the output unit 63, there is a time (also referred to as the stabilization time) until the potential of the wiring OUT11 becomes stable. Especially when the potential of the wiring OUT11 becomes smaller, the stabilization time increases. Therefore, this causes a reduction in the operating speed of the display device including the semiconductor device 60.
[0092] In addition, as a method for reducing the stabilization time, for example, the following methods can be cited: By increasing the channel width of the transistor M11 and the transistor M12, the on-current of the transistor is increased. In addition, for example, the following method can also be cited: By increasing the potential supplied to the gate of the transistor M12 (the potential Vsfb supplied to the wiring VL13), the current flowing through the transistor M12 used as a current source is increased. However, when the above methods are adopted, for example, the occupied area and power consumption of the semiconductor device 60 increase. Therefore, there is a trade-off relationship between the improvement of the operating speed of the display device including the semiconductor device 60 and high definition and low power consumption.
[0093] Thus, in the semiconductor device 60, by performing the pre-charge operation described below, the potential of the wiring OUT11 can be made close to the potential of the wiring IN11 before the output operation. Thereby, when performing the input operation, the difference between the potential output from the transmission unit 61 and the potential of the wiring OUT11 can be reduced, so that the stabilization time in the subsequent output operation can be reduced. Therefore, the operating speed of the display device including the semiconductor device 60 can be increased while suppressing an increase in the occupied area and power consumption of the semiconductor device 60.
[0094] 〔Correction operation and pre-charge operation〕 Before entering the period T61, the wiring SW11, the wiring SW12, the wiring SW13, and the wiring SW15 are supplied with the potential L, and the wiring SW14 is supplied with the potential H. Therefore, the transistors M13, M14, M15, and M17 are in the off state, and the transistor M16 is in the on state. In other words, the output operation is performed at this time. Note that in the following operation description, the potential of each wiring is maintained as it was in the previous period when not otherwise specified.
[0095] In the period T61, first, the output operation is stopped and the pre-charge operation is started. Specifically, the wiring SW14 is supplied with the potential L, and the wiring SW15 is supplied with the potential H. At this time, the transistor M16 is in the off state, and the transistor M15 is in the on state. Thereby, the potential of the wiring OUT11 becomes "potential Vin - voltage Vth".
[0096] Next, the correction operation is started. Specifically, the wiring SW12 and the wiring SW13 are supplied with the potential H. Thereby, the transistors M14 and M15 are in the on state. Thereby, the potential of the gate of the transistor M11 becomes "potential Vpre", and the potential of one of the source and drain of the transistor M11 becomes "potential Vpre - voltage Vth". That is, the potential of one terminal of the capacitor C11 becomes "potential Vpre - voltage Vth", and the potential of the other terminal of the capacitor C11 becomes "potential Vpre". In other words, a "voltage Vth" equal to the threshold voltage of the transistor M11 is applied across the pair of terminals of the capacitor C11.
[0097] That is, the parallel correction operation and pre-charge operation. Figure 3 Shows the state of the semiconductor device 60 at this time.
[0098] Then, the correction operation ends. Specifically, the wiring SW12 and the wiring SW13 are supplied with the potential L. Thereby, the transistors M14 and M15 are in the off state. Therefore, the state where a "voltage Vth" is applied across the pair of terminals of the capacitor C11 is maintained. In addition, the pre-charge operation continues.
[0099] 〔Input operation〕 During period T62, the input operation starts. Specifically, potential H is supplied to wiring SW11. As a result, transistor M13 is in an ON state. Therefore, the potential of one of the source and drain of transistor M13, which is also the potential of one terminal of capacitor C11, becomes "potential Vin". At this time, the potential of the other terminal of capacitor C11, which is also the potential of the gate of transistor M11, becomes "potential Vin + voltage Vth". As a result, the potential of one of the source and drain of transistor M11 becomes "potential Vin".
[0100] That is, the parallel input operation and the pre-charge operation are performed. Figure 4 The state of semiconductor device 60 at this time is shown.
[0101] Then, the input operation ends. Specifically, potential L is supplied to wiring SW11. As a result, transistor M13 is in an OFF state. Therefore, the state where the potential of the gate of transistor M11 is maintained at "potential Vin + voltage Vth" and the potential of one of the source and drain is "potential Vin" is maintained. In addition, the pre-charge operation continues.
[0102] 〔Output operation〕 During period T63, the pre-charge operation stops and the output operation starts. Specifically, potential H is supplied to wiring SW14 and potential L is supplied to wiring SW15. As a result, transistor M16 is in an ON state and transistor M15 is in an OFF state. As a result, the potential of wiring OUT11 becomes "potential Vin".
[0103] Figure 5 The state of semiconductor device 60 at this time is shown.
[0104] In semiconductor device 60 according to one embodiment of the present invention, as described above, the pre-charge operation is performed before the output operation, and the correction operation and the input operation are performed during the pre-charge operation. As a result, it is possible to simultaneously improve the display quality and the operation speed of the display device including semiconductor device 60.
[0105] Note that one embodiment of the present invention is not limited to the above operation examples.
[0106] Figure 2B is a timing chart for explaining other operation examples of semiconductor device 60. In Figure 2B the timing chart shown, the potential supplied to wiring SW15 changes simultaneously with the potentials supplied to wiring SW12 and wiring SW13, which is different from the timing chart shown in Figure 2A That is,[[]] Figure 2BThe timing chart shown below shows the following working example: calibration work is performed during the pre-charge work, and input work is performed during the period after the pre-charge work is stopped and before the output work starts.
[0107] <Other structural examples of the semiconductor device> One embodiment of the present invention is not limited to the structural examples of the semiconductor device described above.
[0108] Figure 6 It is a circuit diagram of a semiconductor device 60a that illustrates a modified example of the semiconductor device 60. The semiconductor device 60a includes an input section 62a instead of the input section 62. The input section 62a does not include the capacitor C11 and includes a transistor M1A, a transistor M1B, and a capacitor C1A, and is different from the input section 62 in these points.
[0109] One of the source and drain of the transistor M13 is electrically connected to one of the source and drain of the transistor M1B and one terminal of the capacitor C1A. One of the source and drain of the transistor M14 is electrically connected to one of the source and drain of the transistor M1A and the other terminal of the capacitor C1A. One of the source and drain of the transistor M15 is electrically connected to the other of the source and drain of the transistor M1B and the gate of the transistor M11. The other of the source and drain of the transistor M1A is electrically connected to the wiring VL1A. The gate of the transistor M1A is electrically connected to the wiring SW1A. The gate of the transistor M1B is electrically connected to the wiring SW1B.
[0110] In the semiconductor device 60a, for example, during the calibration work and the input work, first, the wirings SW11, SW12, and SW13 are supplied with the potential H, and the wirings SW1A and SW1B are supplied with the potential L. Then, the wirings SW12 and SW13 are supplied with the potential L, and the wiring SW1B is supplied with the potential H. Next, the wiring SW11 is supplied with the potential L, and the wiring SW1A is supplied with the potential H. Note that the pre-charge work and the output work are the same as the working example of the above semiconductor device 60.
[0111] Figure 7AThis is a circuit diagram of generation unit 64b which illustrates another structural example of generation unit 64. Generation unit 64b includes comparator unit 66 and transistor M61. The inverting input terminal of comparator unit 66 is electrically connected to wiring IN11. The non-inverting input terminal of comparator unit 66 is electrically connected to wiring VL62. The output terminal of comparator unit 66 is electrically connected to the gate of transistor M61. One of the source and drain of transistor M61 is electrically connected to wiring VL15. The other of the source and drain of transistor M61 is electrically connected to wiring VL61. Generation unit 64b has a function of supplying the potential of wiring VL61 to wiring VL15 when the potential of wiring IN11 is lower than the potential of wiring VL62. In addition, as comparator unit 66, a circuit structure of a general comparator can be adopted. For example, it can be constituted by both an n-channel transistor and a p-channel transistor, or can be constituted by only an n-channel transistor or a p-channel transistor.
[0112] Figure 7B This is a circuit diagram of generation unit 64c which illustrates another structural example of generation unit 64. Generation unit 64c has a structure formed by combining generation unit 64a and generation unit 64b. Generation unit 64c has a function of supplying a potential corresponding to the potential of wiring IN11 to wiring VL15 when the potential of wiring IN11 is lower than the potential of wiring VL62.
[0113] Figure 7C This is a circuit diagram of generation unit 64d which illustrates another structural example of generation unit 64. Generation unit 64d includes comparator unit 66 and AND operation unit 67. The inverting input terminal of comparator unit 66 is electrically connected to wiring IN11. The non-inverting input terminal of comparator unit 66 is electrically connected to wiring VL62. The output terminal of comparator unit 66 is electrically connected to one input terminal of AND operation unit 67. The other input terminal of AND operation unit 67 is electrically connected to wiring SW61. The output terminal of AND operation unit 67 is electrically connected to wiring SW15. Generation unit 64d has a function of supplying the potential of wiring SW61 (for example, potential H or potential L) to wiring SW15 when the potential of wiring IN11 is lower than the potential of wiring VL62, or a function of supplying potential L to wiring SW15 when the potential of wiring IN11 is higher than the potential of wiring VL62. In addition, as AND operation unit 67, a circuit structure of a general AND gate can be adopted. For example, it can be constituted by both an n-channel transistor and a p-channel transistor, or can be constituted by only an n-channel transistor or a p-channel transistor.
[0114] Figure 7DThis is a circuit diagram of a generation unit 64e that illustrates another structural example of the generation unit 64. The generation unit 64e has a structure formed by combining the generation unit 64a and the generation unit 64d. The generation unit 64d has a function of supplying the potential corresponding to the potential of the wiring IN11 to the wiring VL15, and also has a function of supplying the potential of the wiring SW61 (for example, potential H or potential L) to the wiring SW15 when the potential of the wiring IN11 is lower than the potential of the wiring VL62, or a function of supplying potential L to the wiring SW15 when the potential of the wiring IN11 is higher than the potential of the wiring VL62.
[0115] Figure 7E This is a circuit diagram of a buffer unit 65b that illustrates another structural example of the buffer unit 65. The buffer unit 65b includes an operational amplifier unit 68. The non-inverting input terminal of the operational amplifier unit 68 is electrically connected to the wiring IN11. The output terminal of the operational amplifier unit 68 is electrically connected to the inverting input terminal of the operational amplifier unit 68 and the wiring VL15. Therefore, the buffer unit 65b has a function as a voltage follower. In addition, as the operational amplifier unit 68, a circuit structure of a general operational amplifier can be adopted. For example, it can be constituted by both an n-channel transistor and a p-channel transistor, or can be constituted by only an n-channel transistor or a p-channel transistor.
[0116] Figure 7F This is a circuit diagram of a buffer unit 65c that illustrates another structural example of the buffer unit 65. The buffer unit 65c includes a transistor M1C in addition to the buffer unit 65a. One of the source and drain of the transistor M1C is electrically connected to the other of the source and drain of the transistor M18. The other of the source and drain of the transistor M1C is electrically connected to the wiring VL16. The gate of the transistor M1C is electrically connected to the wiring SW1C. The transistor M1C has a function of making the other of the source and drain of the transistor M18 and the wiring VL16 in a conductive state or a non-conductive state according to the potential of the wiring SW1C (function as a switch).
[0117] Note that a structure in which the transistor M1C is provided between the other of the source and drain of the transistor M18 and the wiring VL16 is shown here, but it is not limited to this. For example, a structure in which the transistor M1C is provided between the other of the source and drain of the transistor M19 and the wiring VL17 can also be adopted.
[0118] The potential supplied to the wiring SW1C is preferably the same as the potential supplied to the wiring SW15, for example. That is, when the transistor M17 is in the on state, the transistor M1C is also in the on state, and when the transistor M17 is in the off state, the transistor M1C is also in the off state. By adopting the above structure, current can be supplied to the transistors M18 and M19 only during the period when the potential of the wiring VL15 is supplied to the wiring OUT11, and the supply of current can be stopped during the period other than this period. Therefore, power consumption can be reduced.
[0119] Note that one embodiment of the present invention is not limited to the structure of the semiconductor device 60 described above. In one embodiment of the present invention, for example, a structure in which the generation unit 64 is provided outside the semiconductor device 60 can be adopted.
[0120] <Structural example of a display device> Figures 8A to 8E It is a block diagram for explaining a structural example of a display device according to one embodiment of the present invention.
[0121] As Figure 8A shown, the display device 40 includes a display unit 42, a first drive circuit unit 43, and a second drive circuit unit 44. The display unit 42 includes, for example, a plurality of pixels 41 arranged in a matrix of m rows and n columns (both m and n are integers of 2 or more). In Figure 8A this, the pixel 41 arranged in the first row and the first column is denoted as pixel 41[1, 1], the pixel 41 arranged in the first row and the nth column is denoted as pixel 41[1, n], the pixel 41 arranged in the mth row and the first column is denoted as pixel 41[m, 1], and the pixel 41 arranged in the mth row and the nth column is denoted as pixel 41[m, n]. Note that the pixel 41 arranged in the u-th row and the v-th column (u is an integer of 1 or more and m or less, and v is an integer of 1 or more and n or less) is sometimes denoted as pixel 41[u, v].
[0122] In addition, the display device 40 includes m wirings 45, which are arranged parallel or substantially parallel to each other and whose potentials are controlled by circuits in the first drive circuit unit 43. The potential of one wiring 45 is supplied to n pixels 41 arranged in the row direction. Note that one wiring 45 may include a plurality of wirings depending on the structure of the pixel 41. Figure 8B The display device 40A shown in
[0123] shows a structural example in which one wiring 45 includes two wirings. In addition, the display device 40 includes n wirings 46, which are arranged parallel or substantially parallel to each other and whose potentials are controlled by circuits in the second drive circuit unit 44. The potential of one wiring 46 is supplied to m pixels 41 arranged in the column direction. Note that one wiring 46 may include a plurality of wirings depending on the structure of the pixel 41.
[0124] The pixel 41, for example, has a function of writing a data potential to a pixel circuit that selects a potential according to the wiring 45 through the wiring 46, and causing the light-emitting element to emit light with a light-emitting intensity corresponding to the data potential. A specific structural example of the pixel 41 will be described later.
[0125] The circuit in the first driving circuit unit 43 is used, for example, as a scan line driving circuit (sometimes also referred to as a gate line driving circuit, gate driver, scan driver, or line driver).
[0126] The circuit in the second driving circuit unit 44 is used, for example, as a signal line driving circuit (sometimes also referred to as a source line driving circuit, source driver, data driver, or column driver). In addition, for example, it may have a function of converting data (image data) of an image displayed on the display device 40 into a data potential (digital-to-analog conversion).
[0127] In addition, in the pixel 41, for example, the current flowing through the light-emitting element can be output to a monitoring line. For example, the current output to the monitoring line can be converted into an analog voltage (current-to-voltage conversion) or a digital signal (analog-to-digital conversion) in the second driving circuit unit 44 and output to the outside of the display device 40. For example, the analog voltage or the digital signal can be used to correct image data (also referred to as external correction) outside the display device.
[0128] In this specification and the like, the circuits in the first driving circuit unit 43 and the second driving circuit unit 44 are sometimes collectively referred to as "peripheral driving circuits".
[0129] The peripheral driving circuit can be constituted by various constituent circuits. As the constituent circuits, for example, a shift register circuit, a flip-flop circuit, a latch circuit, a buffer circuit, an inverter circuit, and a level converter circuit can be cited. In addition, for example, a multiplexer circuit, a demultiplexer circuit, a source follower circuit, a source-grounded amplifier circuit, a sample-and-hold circuit, and a switch circuit (for example, a transmission gate and an analog switch, etc.) can be cited. In addition, for example, a current-to-voltage conversion circuit, an analog-to-digital conversion circuit, a digital-to-analog conversion circuit, an operational amplifier circuit, a comparator circuit, a transmission transistor logic circuit, an encoder circuit, a decoder circuit, and a gate circuit (for example, an AND circuit, an OR circuit, and a NOT circuit, etc.) can be cited. In addition, a circuit formed by combining these circuits can be cited. In addition, these constituent circuits can be constituted by, for example, transistors and capacitors.
[0130] Specific structural examples of the respective constituent circuits that can be used for the peripheral driving circuit will be described later.
[0131] In addition, as at least a part of the peripheral drive circuit, the above-described semiconductor device 60 can be used. For example, as at least a part of the second drive circuit unit 44, the semiconductor device 60 can be used. At this time, for example, the second drive circuit unit 44 includes n semiconductor devices 60, and it is sufficient that the wiring OUT11 included in each semiconductor device 60 corresponds to the wiring 46.
[0132] In one aspect of the present invention, as the transistors constituting the peripheral drive circuit, various transistors can be used in the same manner as the above-described semiconductor device 60. For example, vertical transistors can be used as part or all of the transistors constituting the peripheral drive circuit.
[0133] By using vertical OS transistors as part or all of the transistors constituting the peripheral drive circuit, for example, the occupied area of a buffer circuit or the like constituting a gate driver can be reduced. As a result, for example, a narrow bezel of the display device can be achieved. In addition, for example, the occupied area of a demultiplexer and a source follower or the like constituting a source driver can be reduced. As a result, high resolution and high definition of the display device can be achieved.
[0134] In addition, as part or all of the transistors constituting the peripheral drive circuit, for example, Si transistors can also be used. In addition, for example, both OS transistors and Si transistors can be used. The operating speed of Si transistors is faster than that of OS transistors. In addition, by electrically connecting the gates of n-channel transistors and the gates of p-channel transistors, a CMOS circuit (for example, a circuit that operates complementarily, a CMOS logic gate, or a CMOS logic circuit, etc.) can be formed.
[0135] In one aspect of the present invention, various structures can be used as modified examples of the display device 40. For example, as Figures 8C to 8E shown, the first drive circuit unit 43L and the first drive circuit unit 43R can also be arranged so as to face each other with the display unit 42 interposed therebetween.
[0136] Figure 8C The display device 40B shown includes a structure example including m wirings 45L whose potentials are controlled by the circuits in the first drive circuit unit 43L and m wirings 45R whose potentials are controlled by the circuits in the first drive circuit unit 43R. The potentials of one wiring 45L and one wiring 45R are each supplied to n pixels 41 arranged in the row direction.
[0137] Figure 8DThe display device 40C shown shows a structural example including m wirings 45 whose potentials are controlled by both the circuits in the first driving circuit section 43L and the circuits in the first driving circuit section 43R. The potential of one wiring 45 is supplied to n pixels 41 arranged in the row direction. By adopting such a structure, for example, the load (parasitic capacitance and parasitic resistance) of the wirings can be substantially reduced to Figure 8B 1 / 4 of the load of the wirings of the display device 40A shown. Therefore, for example, high speed, high definition, high resolution, narrow bezel, and large screen of the display device can be achieved.
[0138] Figure 8E The display device 40D shown shows a structural example including m / 2 wirings 45L whose potentials are controlled by the circuits in the first driving circuit section 43L and m / 2 wirings 45R whose potentials are controlled by the circuits in the first driving circuit section 43R. The potential of one wiring 45L is supplied to n pixels 41 arranged in the row direction in odd rows. The potential of one wiring 45R is supplied to n pixels 41 arranged in the row direction in even rows. By adopting such a structure, for example, the number of stages of the shift register can be reduced to 1 / 2. Therefore, for example, high speed, high definition, high resolution, narrow bezel, and large screen of the display device can be achieved.
[0139] In addition, although not shown, for example, two second driving circuit sections 44 can be arranged to face each other with the display section 42 interposed therebetween.
[0140] In one aspect of the present invention, in addition to the display devices 40 having the above various structures, for example, a sensor section can be provided so as to overlap the display section 42 in a plan view. The sensor section can have functions such as a touch sensor, a non-touch sensor, or a fingerprint sensor, for example. In addition, these sensors can adopt, for example, a capacitive type or an optical type.
[0141] In addition, in the display device 40 provided with the sensor section, the first driving circuit section 43 (or the first driving circuit section 43L and the first driving circuit section 43R) can include, for example, a circuit having a function of driving the sensor section. In addition, the second driving circuit section 44 can include, for example, a circuit having a function of outputting the signal detected by the sensor section to the outside of the display device.
[0142] <Structural example of a pixel> Figure 9 is a circuit diagram illustrating a structural example of a semiconductor device that can be used for the pixel 41.
[0143] As Figure 9As shown, the semiconductor device 20A includes a pixel circuit 31A and a light-emitting element 32. The pixel circuit 31A includes transistors M1, M2, M3, M4, M5, M6, capacitor C1, and capacitor C2.
[0144] The gate of transistor M1 is electrically connected to wiring GLa. One of the source and drain of transistor M1 is electrically connected to the gate of transistor M2. The other of the source and drain of transistor M1 is electrically connected to wiring DL. Transistor M1 has a function of making the gate of transistor M2 and wiring DL in a conductive state or a non-conductive state (function as a switch).
[0145] The gate of transistor M2 is electrically connected to one terminal of capacitor C1. One of the source and drain of transistor M2 is electrically connected to the other terminal of capacitor C1. The other of the source and drain of transistor M2 is electrically connected to wiring 21. In addition, transistor M2 includes a back gate. The back gate of transistor M2 is electrically connected to one terminal of capacitor C2. In addition, the other terminal of capacitor C2 is electrically connected to one of the source and drain of transistor M2.
[0146] The gate of transistor M3 is electrically connected to wiring GLb. One of the source and drain of transistor M3 is electrically connected to one terminal of capacitor C1. The other of the source and drain of transistor M3 is electrically connected to the other terminal of capacitor C1. Transistor M3 has a function of making the gate of transistor M2 and one of the source and drain of transistor M2 in a conductive state or a non-conductive state (function as a switch).
[0147] The gate of transistor M4 is electrically connected to wiring GLb. One of the source and drain of transistor M4 is electrically connected to one terminal of capacitor C2. The other of the source and drain of transistor M4 is electrically connected to wiring 24. Transistor M4 has a function of making one terminal of capacitor C2 and wiring 24 in a conductive state or a non-conductive state (function as a switch).
[0148] The gate of transistor M5 is electrically connected to wiring GLc. One of the source and drain of transistor M5 is electrically connected to one of the source and drain of transistor M2. The other of the source and drain of transistor M5 is electrically connected to one terminal (e.g., an anode terminal) of the light-emitting element 32. Transistor M5 has a function of making one of the source and drain of transistor M2 and one terminal of the light-emitting element 32 in a conductive state or a non-conductive state (function as a switch).
[0149] The gate of transistor M6 is electrically connected to wiring GLa. One of the source and drain of transistor M6 is electrically connected to one of the source and drain of transistor M2. The other of the source and drain of transistor M6 is electrically connected to wiring 23. Transistor M6 has a function (function as a switch) of making one of the source and drain of transistor M2 and wiring 23 in a conducting state or a non-conducting state.
[0150] The other terminal (for example, the cathode terminal) of the light-emitting element 32 is electrically connected to wiring 22.
[0151] The light-emitting element 32 emits light with a light-emitting intensity corresponding to the amount of current flowing through the light-emitting element 32. As the light-emitting element 32, for example, an EL (electroluminescence) element (an EL element including organic and inorganic substances, an organic EL element, or an inorganic EL element), a light-emitting diode (LED: Light Emitting Diode), a micro LED (for example, an LED with an emission light area of 10,000 μm 2 or less), an OLED (organic light-emitting diode), a QLED (Quantum-dot Light Emitting Diode), or an electron-emitting element and other various elements can be used.
[0152] Transistor M2 can change the drain current according to the potential supplied to its gate. Therefore, in the pixel circuit 31A, transistor M2 has a function of controlling the amount of current flowing through the light-emitting element 32. That is, transistor M2 has a function of controlling the light-emitting intensity of the light-emitting element 32. In this specification and the like, a transistor having a function like transistor M2 is sometimes referred to as a "driving transistor".
[0153] In addition, transistor M2 can change the threshold voltage according to the potential supplied to its back gate. Therefore, the pixel circuit 31A can correct the threshold voltage of transistor M2 according to the potential supplied to the back gate (node ND2) of transistor M2. That is, in a display device using the pixel circuit 31A, the unevenness of the threshold voltage of transistor M2 can be corrected for each pixel circuit 31A. In this specification and the like, a pixel circuit that can correct the threshold voltage of a driving transistor (transistor M2) like the pixel circuit 31A is also referred to as a pixel circuit equipped with an "internal correction circuit". By installing an internal correction circuit, the display quality of the display device can be improved.
[0154] The region where one of the source and drain of transistor M2, the other of the source and drain of transistor M3, one of the source and drain of transistor M5, one of the source and drain of transistor M6, the other terminal of capacitor C1, and the other terminal of capacitor C2 are electrically connected to each other is sometimes referred to as node ND1.
[0155] The region where one of the back gate of transistor M2, the source and drain of transistor M4, and one terminal of capacitor C2 are electrically connected to each other is sometimes referred to as node ND2.
[0156] The region where the gate of transistor M2, one of the source and drain of transistor M1, one of the source and drain of transistor M3, and one terminal of capacitor C1 are electrically connected to each other is sometimes referred to as node ND3.
[0157] Capacitor C1, for example, has a function of maintaining the potential difference (voltage) between one of the source and drain of transistor M2 and the gate of transistor M2 when node ND3 is in a floating state.
[0158] Capacitor C2, for example, has a function of maintaining the potential difference (voltage) between one of the source and drain of transistor M2 and the back gate of transistor M2 when node ND2 is in a floating state.
[0159] The wirings GLa, GLb, and GLc are sometimes referred to as gate lines, scan lines, selection lines, etc. The wiring DL is sometimes referred to as a source line, data line, signal line, etc.
[0160] In the present embodiment and the like, unless otherwise stated, the transistors (transistors M1 to M6) constituting the pixel circuit 31A are enhancement-type (normally-off type) n-channel transistors. Therefore, their threshold voltage is greater than 0V.
[0161] Note that one aspect of the present invention is not limited to this. The pixel circuit 31A can be constituted by various transistors in the same manner as the above-described semiconductor device 60.
[0162] For example, a part or all of the transistors constituting the pixel circuit 31A can also be p-channel transistors.
[0163] In addition, vertical transistors can also be used as the transistors constituting the pixel circuit 31A.
[0164] By using vertical transistors for the pixel circuit, for example, the definition (also referred to as pixel density) of the display device using this pixel circuit can be improved. In addition, for example, a stripe arrangement can be adopted as the pixel arrangement instead of the Pentile arrangement without reducing the definition of the display device. In addition, for example, an internal correction circuit can be mounted without reducing the definition of the display device.
[0165] In one aspect of the present invention, as a part or all of the transistors constituting the pixel circuit 31A, vertical transistors are preferably used. In particular, as the transistors used as switches (transistors M1 and M3 to M6), vertical transistors are preferably used.
[0166] Note that, as the driving transistor (transistor M2), a transistor with high saturation is preferably used. For example, a transistor with a large channel length can be used. For example, the above-mentioned VLFET can also be used.
[0167] In addition, in one aspect of the present invention, as the transistors constituting the pixel circuit 31A, OS transistors with extremely small off-state currents are preferably used.
[0168] For example, among the transistors constituting the pixel circuit 31A, OS transistors are used as the transistors serving as switches (transistors M1 and M3 to M6), whereby the charges stored in the capacitor C1 and the capacitor C2 can be maintained for a long time.
[0169] Therefore, for example, in a display device using this pixel circuit, when displaying a static image that does not need to be rewritten for each frame, the image can continue to be displayed even if the operation of the peripheral driving circuit for driving this pixel circuit is stopped. In this specification and the like, the driving method of stopping the operation of the peripheral driving circuit when displaying a static image is also referred to as "idle-stop driving". By performing idle-stop driving, the power consumption of this display device can be reduced.
[0170] In addition, for example, in a display device using this pixel circuit, the potential supplied to the back gate of the driving transistor can be maintained for a long time. Therefore, there is no need to correct the threshold voltage of the driving transistor for each frame. For example, even if the correction work is performed at a frequency of once every several frames or once every few seconds, the display quality of this display device can be improved.
[0171] Note that, in one aspect of the present invention, the structure of the pixel circuit 31A is not limited to the structure using OS transistors, and a structure using multiple transistors including different semiconductor materials can also be adopted. For example, the pixel circuit 31A can also be constituted by using LTPO (i.e., both LTPS transistors and OS transistors).
[0172] For example, among the transistors constituting the pixel circuit 31A, OS transistors and LTPS transistors can be used as the transistors serving as switches (transistors M1 and M3 to M6) and the driving transistor (transistor M2), respectively. When the pixel circuit 31A is constituted by both LTPS transistors and OS transistors, the power consumption of the display device using this pixel circuit can be reduced and the driving ability can be improved.
[0173] In addition, in the case where the pixel circuit 31A has a structure using a plurality of transistors including different semiconductor materials, the transistors may be provided on different layers according to the types of the transistors. For example, in the case where the pixel circuit 31A is composed of Si transistors and OS transistors, the layer including Si transistors and the layer including OS transistors may be overlapped and provided. By having such a structure, the occupied area of the pixel circuit 31A can be reduced.
[0174] Among the transistors constituting the pixel circuit 31A in the semiconductor device 20A according to one embodiment of the present invention, vertical OS transistors are used as the transistors (transistors M1 and M3 to M6) serving as switches, and double-gate OS transistors are used as the driving transistors (transistor M2). For a specific structural example of such a semiconductor device including both vertical transistors and double-gate transistors, refer to the description of Embodiment 2 described later.
[0175] <Operation example of pixel> Next, the operation of the semiconductor device 20A will be described.
[0176] Figure 10 It is a timing chart illustrating an operation example of the semiconductor device 20A.
[0177] In the following operation description, the wiring DL is supplied with the data potential Vdata. The wiring 21 is supplied with the potential Va, the wiring 22 is supplied with the potential Vc, the wiring 23 is supplied with the potential V0, and the wiring 24 is supplied with the potential V1. In addition, the wirings GLa, GLb, and GLc are supplied with the potential H or the potential L, respectively. The potential H is a potential higher than the potential L. For example, the difference between the potential H and the potential L is preferably larger than the threshold voltage of the transistor. Here, the potential H is a potential that turns on (conducts) the transistor when it is supplied to the gate of the transistor constituting the semiconductor device 20A. In addition, the potential L is a potential that turns off (non-conducts) the transistor when it is supplied to the gate of the transistor constituting the semiconductor device 20A.
[0178] The potential Va is the anode potential, and the potential Vc is the cathode potential. The potential V0 can be, for example, a potential that can turn off the transistor M2 when it is supplied to the gate of the transistor M2. The potential V1 can be, for example, a potential that can reduce the threshold voltage to a potential that keeps the transistor M2 in a normally-on state (also referred to as negative drift) when it is supplied to the back gate of the transistor M2. The potential V0 is, for example, 0V or the potential L. The potential V1 is, for example, a potential higher than the potential V0 and lower than the potential H.
[0179] In the semiconductor device 20A, the light emission intensity of the light emitting element 32 is controlled according to the magnitude of the current Ie flowing through the light emitting element 32. The pixel circuit 31A has a function of controlling the magnitude of the current Ie according to the data potential Vdata supplied to the wiring DL.
[0180] In Figure 10 In the timing chart shown, the respective potentials (potential H or potential L) supplied to the wiring GLa, the wiring GLb, and the wiring GLc are shown for each period of operation (periods T11 to T16). In addition, the potential changes of the nodes ND1, ND2, and ND3 are shown.
[0181] In addition, in the timing chart, the respective periods are sometimes shown with the same length, but the lengths of the respective periods may also be different. For example, for the sake of explanation, in Figure 10 In the timing chart shown, the respective periods (periods T11 to T16) are shown with the same length, but the lengths of the respective periods may also be different.
[0182] [Correction of the threshold voltage of the driving transistor (threshold voltage correction operation)] In Figure 10 In the periods T11 to T13 shown, the following operation is performed, in which a voltage for correcting the threshold voltage of the transistor M2 is obtained and this voltage is held in the capacitor C2.
[0183] The current Ie flowing through the light emitting element 32 is mainly determined by the data potential Vdata and the threshold voltage of the transistor M2. Therefore, in a display device including a plurality of pixel circuits 31A, when the same data potential Vdata is supplied to each pixel circuit 31A and the threshold voltages of the transistors M2 in the respective pixel circuits 31A are different, different currents Ie flow through the respective pixel circuits 31A. Therefore, the non-uniformity of the threshold voltage of the transistor M2 is one of the causes of the deterioration of the display quality of the display device.
[0184] Then, by correcting in such a way that the threshold voltages of the transistors M2 of the respective pixel circuits 31A are the same, the non-uniformity of the current Ie can be reduced. Here, as an example, a method will be described: correction is performed by changing the potential supplied to the back gate of the transistor M2 so that the threshold voltage of the transistor M2 becomes 0V (or near it).
[0185] Just before entering the period T11, the wiring GLa and the wiring GLb are supplied with the potential L, and the wiring GLc is supplied with the potential H. Therefore, the transistors M1, M3, M4, and M6 are in the off state, and the transistor M5 is in the on state. Note that in the following description of the operation, when the potential of each wiring is not involved, it can be regarded as maintaining the potential of the immediately preceding period.
[0186] During period T11, reset (initialization) work is performed. Specifically, the wiring GLb is supplied with the potential H. At this time, the transistor M3 and the transistor M4 are in the on state.
[0187] Therefore, the potential of the node ND1 becomes the potential Ve0. Also, through the transistor M3, the potential of the node ND3 also becomes the potential Ve0. Here, the potential Ve0 is higher than the voltage drop of the light-emitting element 32 from the potential Vc. In addition, the node ND2 is supplied with the potential V1 through the transistor M4. When "the potential V1 - the potential Ve0" is applied as the back gate voltage of the transistor M2, the transistor M2 is in the always-on state.
[0188] During period T12, the wiring GLc is supplied with the potential L. At this time, the transistor M5 becomes the off state.
[0189] Immediately after the transistor M5 becomes the off state, "the potential V1 - the potential Ve0" is applied as the back gate voltage of the transistor M2, so the transistor M2 is in the always-on state. Therefore, charge is supplied from the wiring 21 to the node ND1 through the transistor M2. Therefore, the potential of the node ND1 rises over time. Also, since the transistor M3 is in the on state, the potential of the node ND3 also rises similarly. Here, as the potential of the node ND1 gradually rises, the back gate voltage of the transistor M2 gradually decreases. That is, the threshold voltage of the transistor M2 gradually rises (also called forward drift). Then, when the threshold voltage of the transistor M2 approaches 0V infinitely, the transistor M2 becomes the off state, and the potential of the node ND1 stops rising. At this time, the back gate voltage that makes the threshold voltage of the transistor M2 0V is set as the correction voltage Vb. That is, when the potential of the node ND1 stops rising, the potential of the node ND1 is "the potential V1 - the correction voltage Vb".
[0190] During period T13, the wiring GLb is supplied with the potential L. At this time, the transistor M3 and the transistor M4 become the off state.
[0191] Therefore, the node ND2 and the node ND3 are in the floating state, and the charge of each node is held. That is, the state in which the correction voltage Vb obtained during the period T12 is applied as the back gate voltage of the transistor M2 is maintained.
[0192] By performing the operations during the periods T11 to T13, correction can be performed in such a way that the threshold voltage of the transistor M2 becomes 0V and the corrected state can be maintained. Note that in this specification and the like, such a correction method is sometimes referred to as "internal correction".
[0193] 〔Writing of display data (data writing operation)〕 In Figure 10During the periods T14 and T15 shown, the operation of writing the data potential Vdata to the pixel circuit 31A is performed.
[0194] During period T14, the wiring GLa is supplied with the potential H. At this time, the transistors M1 and M6 become in the on state.
[0195] Therefore, the node ND3 is supplied with the data potential Vdata, and the node ND1 is supplied with the potential V0. That is, "data potential Vdata - potential V0" is applied as the gate voltage of the transistor M2.
[0196] Here, the node ND2 is in a floating state, and the nodes ND1 and ND2 are capacitively coupled through the capacitor C2. Therefore, when the potential of the node ND1 becomes the potential V0, the potential of the node ND2 also becomes "potential V0 + correction voltage Vb" accordingly. That is, the data potential Vdata can be written while maintaining the state where the correction voltage Vb is applied as the back gate voltage of the transistor M2 and the threshold voltage of the transistor M2 is corrected to 0V.
[0197] During period T15, the wiring GLa is supplied with the potential L. At this time, the transistors M1 and M6 become in the off state.
[0198] Therefore, the node ND3 is in a floating state, and the charge of the node ND3 is held. In addition, charge is supplied from the wiring 21 to the node ND1 through the transistor M2, whereby the potential of the node ND1 gradually rises.
[0199] Here, the node ND3 is in a floating state, and the nodes ND1 and ND3 are capacitively coupled through the capacitor C1. Therefore, as the potential of the node ND1 rises, the potential of the node ND3 also rises. That is, the state where "data potential Vdata - potential V0" is applied as the gate voltage of the transistor M2 is maintained. Similarly, the node ND2 is in a floating state, and the nodes ND1 and ND2 are capacitively coupled through the capacitor C2. Therefore, as the potential of the node ND1 rises, the potential of the node ND2 also rises. That is, the state where the correction voltage Vb is applied as the back gate voltage of the transistor M2 is maintained.
[0200] 〔Light emission of the light-emitting element (light-emitting operation)〕 In Figure 10 During the period T16 shown, the operation of causing the light-emitting element 32 to emit light is performed.
[0201] During period T16, the wiring GLc is supplied with the potential H. At this time, the transistor M5 becomes in the on state.
[0202] Therefore, current flows from wiring 21 through transistor M2, transistor M5, and light-emitting element 32 to wiring 22. That is, current Ie flows through light-emitting element 32, and light-emitting element 32 emits light with a light-emitting intensity according to current Ie.
[0203] Since current Ie flows from wiring 21 to wiring 22, a voltage drop occurs in light-emitting element 32. Therefore, the potential of node ND1 becomes potential Ve1. At this time, nodes ND2 and ND3 are in a floating state, so similar to the above period T15, as the potential of node ND1 changes, the potentials of nodes ND2 and ND3 also change. That is, the state in which "data potential Vdata - potential V0" is applied as the gate voltage of transistor M2 is maintained. In addition, the state in which the correction voltage Vb is applied as the back gate voltage of transistor M2 is maintained.
[0204] Note that the operation in period T16 can also be performed in the same timing as the operation in period T15. That is, the timing at which wiring GLa is supplied with potential L and the timing at which wiring GLc is supplied with potential H can also be the same.
[0205] In one aspect of the present invention, by performing the above-described threshold voltage correction operation (periods T11 to T13) in semiconductor device 20A, correction can be performed in such a manner that the threshold voltage of transistor M2 becomes 0V. At this time, by using an OS transistor having extremely low off-state current characteristics as transistor M4, the state in which correction is performed in such a manner that the threshold voltage of transistor M2 becomes 0V (that is, the state in which the correction voltage Vb is applied as the back gate voltage of transistor M2) can be maintained for a long time.
[0206] Here, in semiconductor device 20A, the amount of current Ie flowing through light-emitting element 32 is proportional to the square of "gate voltage of transistor M2 - threshold voltage of transistor M2". Therefore, when correction is performed in such a manner that the threshold voltage of transistor M2 becomes 0V, the amount of current Ie is proportional to the square of "data potential Vdata - potential V0". That is, the amount of current Ie does not depend on the threshold voltage of transistor M2. Therefore, the state in which current Ie flows without depending on the threshold voltage of transistor M2 can be maintained for a long time.
[0207] Therefore, in one aspect of the present invention, in the semiconductor device 20A, the frequency of performing the above-described threshold voltage correction operation (periods T11 to T13) can be set lower than the frequency of performing the data writing operation and the light emitting operation (periods T14 to T16). For example, in the semiconductor device 20A, even if the threshold voltage correction operation is performed once every multiple times of performing the data writing operation and the light emitting operation, the state in which the threshold voltage of the transistor M2 is corrected to 0V can be maintained. Therefore, in a display device using this semiconductor device, the display quality can be improved and the power consumption can be reduced.
[0208] <Other structural examples of pixels> Note that one aspect of the present invention is not limited to the above-described structural example of the semiconductor device.
[0209] Figure 11 It is a circuit diagram of a semiconductor device 20B that illustrates a modified example of the semiconductor device 20A. The semiconductor device 20B includes a pixel circuit 31B instead of the pixel circuit 31A. The difference between the pixel circuit 31B and the pixel circuit 31A is that the transistors M1 and M3 to M6 each include a back gate. In each of the transistors M1 and M3 to M6 of the semiconductor device 20B, the back gate of the transistor is electrically connected to the gate of the transistor. In this way, the same potential is supplied to the back gate and the gate in the transistor including the back gate, thereby reducing the on-resistance.
[0210] Note that the potential that can be supplied to the back gate in the transistor including the back gate is not limited to the same potential as the gate. For example, by supplying the same potential as the source to the back gate, the electric field generated outside the transistor is less likely to affect the channel formation region, so the electrical characteristics become stable and the reliability can be improved. For example, by supplying an arbitrary potential to the back gate, the threshold voltage can be changed. Note that the potential supplied to the back gate is not limited to a fixed potential. In addition, the potential supplied to the back gate can be different or the same for each transistor.
[0211] Figure 12 It is a circuit diagram of a semiconductor device 20C that illustrates a modified example of the semiconductor device 20A. The semiconductor device 20C includes a pixel circuit 31C instead of the pixel circuit 31A. The difference between the pixel circuit 31C and the pixel circuit 31A is that it does not include the transistor M6. In the operation of the semiconductor device 20C, when performing the data writing operation, for example, the transistor M5 is turned on, so that the potential of the node ND1 can be increased according to the voltage drop in the light emitting element 32. And the semiconductor device 20C may not include the wiring 23. Therefore, the occupied area of the pixel circuit 31C can be reduced.
[0212] Figure 13This is a circuit diagram of a semiconductor device 20D, which is a modified example of the semiconductor device 20A. The semiconductor device 20D includes a pixel circuit 31D instead of the pixel circuit 31A. The difference between the pixel circuit 31D and the pixel circuit 31A is that it does not include the transistor M5. Therefore, one of the source and drain of the transistor M2 is electrically connected to one terminal of the light-emitting element 32. In the operation of the semiconductor device 20D, when performing the threshold voltage correction operation, for example, a potential Va is supplied to the wiring 22 so that no current flows through the light-emitting element 32. Also, the semiconductor device 20D may not include the wiring GLc. Therefore, the occupied area of the pixel circuit 31D can be reduced.
[0213] Figure 14 This is a circuit diagram of a semiconductor device 20E, which is a modified example of the semiconductor device 20D. The semiconductor device 20E includes a pixel circuit 31E instead of the pixel circuit 31D. The difference between the pixel circuit 31E and the pixel circuit 31D is that it does not include the transistors M3, M4, and the capacitor C2. In addition, in the pixel circuit 31E, the transistor M2 may not include a back gate. In other words, the pixel circuit 31E does not include an internal correction circuit. Also, the semiconductor device 20E may not include the wiring GLb and the wiring 24. Therefore, the occupied area of the pixel circuit 31E can be reduced.
[0214] Figure 15 This is a circuit diagram of a semiconductor device 20F, which is a modified example of the semiconductor device 20A. The semiconductor device 20F includes a pixel circuit 31F instead of the pixel circuit 31A. The difference between the pixel circuit 31F and the pixel circuit 31A is that it includes the transistors M7, M8, and the capacitor C3 instead of the transistors M3, M4, M6, the capacitors C1, and C2. Additionally, in the pixel circuit 31F, the transistor M2 may not include a back gate. The pixel circuit 31F includes an internal correction circuit different from that of the pixel circuit 31A.
[0215] One of the source and drain of the transistor M1 is electrically connected to one terminal of the capacitor C3. The gate of the transistor M2 is electrically connected to one of the source and drain of the transistor M7. One of the source and drain of the transistor M2 is electrically connected to the other terminal of the capacitor C3.
[0216] The gate of the transistor M7 is electrically connected to the wiring GLa. The other of the source and drain of the transistor M7 is electrically connected to the wiring 25. The transistor M7 has a function (function as a switch) of making the gate of the transistor M2 and the wiring 25 in a conductive state or a non-conductive state.
[0217] The gate of transistor M8 is electrically connected to wiring GLb. One of the source and drain of transistor M8 is electrically connected to the gate of transistor M2. The other of the source and drain of transistor M8 is electrically connected to one terminal of capacitor C3. Transistor M8 has a function (function as a switch) of bringing the gate of transistor M2 and one terminal of capacitor C3 into a conductive state or a non-conductive state.
[0218] Sometimes, the region where one of the gate of transistor M2, one of the source and drain of transistor M7, and one of the source and drain of transistor M8 are electrically connected to each other is referred to as node ND3.
[0219] Sometimes, the region where one of the source and drain of transistor M1, the other of the source and drain of transistor M8, and one terminal of capacitor C3 are electrically connected to each other is referred to as node ND4.
[0220] Capacitor C3, for example, has a function of maintaining the potential difference (voltage) between one of the source and drain of transistor M2 and one of the source and drain of transistor M1 when node ND4 is in a floating state.
[0221] In semiconductor device 20F, for example, in the threshold voltage correction operation, data write operation, and light emission operation, first, potential L is supplied to wiring GLa and wiring GLb, and potential H is supplied to wiring GLc. Then, potential H is supplied to wiring GLa. Next, potential L is supplied to wiring GLc. Then, potential L is supplied to wiring GLa. Next, potential H is supplied to wiring GLb and wiring GLc.
[0222] Figure 16 It is a circuit diagram of semiconductor device 20G which is a modified example of semiconductor device 20A. Semiconductor device 20G includes pixel circuit 31G instead of pixel circuit 31A. Pixel circuit 31G includes transistor M9 and capacitor C4 in addition to the components of pixel circuit 31A.
[0223] The gate of transistor M5 is electrically connected to one terminal of capacitor C4. The other of the source and drain of transistor M5 is electrically connected to the other terminal of capacitor C4.
[0224] The gate of transistor M9 is electrically connected to wiring 26. One of the source and drain of transistor M9 is electrically connected to the gate of transistor M5. The other of the source and drain of transistor M9 is electrically connected to wiring GLc.
[0225] Sometimes, the region where the gate of transistor M5, one of the source and drain of transistor M9, and one terminal of capacitor C4 are electrically connected to each other is referred to as node ND5.
[0226] The capacitor C4, for example, has a function of maintaining the potential difference (voltage) between the source and drain of the transistor M5 and the gate of the transistor M5 when the node ND5 is in a floating state.
[0227] In the semiconductor device 20G, for example, when the potential of one terminal of the light-emitting element 32 (i.e., the other of the source and drain of the transistor M5) rises during the light-emitting operation, the potential of the node ND5 (i.e., the gate of the transistor M5) also rises due to capacitive coupling through the capacitor C4. Therefore, during the light-emitting operation, the transistor M5 can be surely turned on. Thus, current can be stably supplied to the light-emitting element 32. In addition, the capacitor C4 is sometimes referred to as a bootstrap capacitor.
[0228] Figure 17 It is a circuit diagram of a semiconductor device 20H that illustrates a modified example of the semiconductor device 20F. The semiconductor device 20H includes a pixel circuit 31H instead of the pixel circuit 31F. The pixel circuit 31H includes a transistor M9 and a capacitor C4 in addition to the components of the pixel circuit 31F. That is, the pixel circuit 31H has a structure that combines the internal correction circuit of the pixel circuit 31F and the bootstrap capacitor of the pixel circuit 31G.
[0229] Figure 18 It is a circuit diagram of a semiconductor device 20I. The semiconductor device 20I includes a pixel circuit 31I and a liquid crystal element 33. The pixel circuit 31I includes a transistor M1 and a capacitor C5. The pixel circuit 31I includes a transistor M1 and a capacitor C5.
[0230] The gate of the transistor M1 is electrically connected to the wiring GLa. One of the source and drain of the transistor M1 is electrically connected to one terminal of the liquid crystal element 33. The other of the source and drain of the transistor M1 is electrically connected to the wiring DL. The transistor M1 has a function of making the connection between one terminal of the capacitor C5 and the wiring DL conductive or non-conductive (function as a switch).
[0231] The other terminal of the liquid crystal element 33 is electrically connected to the wiring 22. The light transmittance of the liquid crystal element 33 changes according to the potential difference (voltage) between a pair of terminals (between one terminal and the other terminal).
[0232] One terminal of the capacitor C5 is electrically connected to one of the source and drain of the transistor M1. The other terminal of the capacitor C5 is electrically connected to the wiring 27.
[0233] The region where one of the source and drain of the transistor M1, one terminal of the capacitor C5, and one terminal of the liquid crystal element 33 are electrically connected to each other is sometimes referred to as the node ND6.
[0234] The capacitor C5 has a function of maintaining the potential difference between a pair of terminals of the liquid crystal element 33 when the node ND6 is in a floating state.
[0235] <Structural example of the peripheral drive circuit> Next, a structural example of each constituent circuit of the peripheral drive circuit that can be used in the display device 40 will be described.
[0236] 〔Shift register〕 Figures 19A to 19E and Figures 20A to 20E is a circuit diagram showing a structural example of a semiconductor device that can be used in the peripheral drive circuit. This semiconductor device can be used, for example, as a part of the gate driver. Additionally, for example, it can be used as a part of the shift register.
[0237] Figure 19A The semiconductor device 70A shown includes m register units 71 and m buffer units 72. Additionally, the semiconductor device 70A is electrically connected to m wirings GLa and m wirings GLb. Each of the m register units 71 is electrically connected to each other through each of the m wirings SR. In Figure 19A a part of the semiconductor device 70A is shown, showing the register unit 71_u to the register unit 71_u+2, the buffer unit 72_u to the buffer unit 72_u+2, the wiring SR_u-1 to the wiring SR_u+4, the wiring GLa_u to the wiring GLa_u+2, and the wiring GLb_u to the wiring GLb_u+2. Note that m is an integer of 2 or more and corresponds to the number of rows m of the pixels 41 arranged in a matrix in the above display device 40. Additionally, u is an integer of 1 or more and m or less.
[0238] Figure 19B is a circuit diagram showing a structural example of the register unit 71 and the buffer unit 72. Figure 19C is a circuit block corresponding to the register unit 71 and the buffer unit 72. The register unit 71 can be used as each of the register units 71_1 to 71_m. The buffer unit 72 can be used as each of the buffer units 72_1 to 72_m. That is, for example, in the register unit 71_u, the wiring IN21 is electrically connected to the wiring SR_u-1, the wiring IN22 is electrically connected to the wiring SR_u+2, and the wiring OUT21 is electrically connected to the wiring SR_u. Additionally, for example, in the buffer unit 72_u, the wiring OUT31 is electrically connected to the wiring GLa_u, and the wiring OUT32 is electrically connected to the wiring GLb_u. Note that in Figure 19A and Figure 19CIn the figure, descriptions of the wirings IN21, IN31, IN32, VLD, and VLS are omitted. Note that the same applies to register units 71_1 to 71_u-1 and register units 71_u+1 to 71_m. Also, the same applies to buffer units 72_1 to 72_u-1 and buffer units 72_u+1 to 72_m.
[0239] That is, in the semiconductor device 70A, the wiring OUT21 in the register unit 71_u-1 is electrically connected to the wiring IN21 in the register unit 71_u through the wiring SR_u-1, and the wiring OUT21 in the register unit 71_u is electrically connected to the wiring IN21 in the register unit 71_u+1 through the wiring SR_u. By adopting such a structure, each of the register units 71_1 to 71_m is sequentially selected, and in the buffer unit 72_u electrically connected to the selected register unit 71_u, desired potentials can be supplied to the wirings GLa_u and GLb_u, respectively. Note that in the buffer unit 72_u of the semiconductor device 70A that is electrically connected to the unselected register unit 71_u, the potentials of the wirings GLa_u and GLb_u are both supplied with the potential of the wiring VLS.
[0240] Figure 19B The register unit 71 shown includes transistors M21, M22, M23, M24, M25, and M26. The transistor M21 has a function of making the wiring VLD and the wiring NL21 in a conductive state or a non-conductive state according to the potential of the wiring IN21. The transistor M22 has a function of making the wiring VLD and the wiring NL22 in a conductive state or a non-conductive state according to the potential of the wiring IN22. The transistor M23 has a function of making the wiring VLS and the wiring NL21 in a conductive state or a non-conductive state according to the potential of the wiring NL22. The transistor M24 has a function of making the wiring VLS and the wiring NL22 in a conductive state or a non-conductive state according to the potential of the wiring IN21. The transistor M25 has a function of making the wiring IN23 and the wiring OUT21 in a conductive state or a non-conductive state according to the potential of the wiring NL21. The transistor M26 has a function of making the wiring VLS and the wiring OUT21 in a conductive state or a non-conductive state according to the potential of the wiring NL22.
[0241] In addition, Figure 19BThe buffer section 72 shown includes a transistor M31, a transistor M32, a transistor M33, and a transistor M34. The transistor M31 has a function of making the connection between the wiring IN31 and the wiring OUT31 conductive or non-conductive according to the potential of the wiring NL21. The transistor M32 has a function of making the connection between the wiring IN32 and the wiring OUT32 conductive or non-conductive according to the potential of the wiring NL21. The transistor M33 has a function of making the connection between the wiring VLS and the wiring OUT31 conductive or non-conductive according to the potential of the wiring NL22. The transistor M34 has a function of making the connection between the wiring VLS and the wiring OUT32 conductive or non-conductive according to the potential of the wiring NL22.
[0242] Figure 19D is an illustration Figure 19B of the operation example of the register section 71 and the buffer section 72 shown.
[0243] In the following operation description, the wiring VLD is supplied with the potential H, and the wiring VLS is supplied with the potential L. In addition, the wirings IN21, IN22, IN23, IN31, and IN32 are supplied with the potential H or the potential L.
[0244] Figure 19D The timing chart shown shows the respective potentials (potential H or potential L) supplied to the wirings IN21, IN22, IN23, IN31, and IN32 during each period (periods T71 to T73) of the operation. In addition, the potential changes of the wirings NL21, NL22, OUT21, OUT31, and OUT32 are shown.
[0245] During the period T71, the wirings IN21 and IN22 are supplied with the potential L. In addition, the potential of the wiring NL22 is the potential H. Therefore, the wiring NL21 is supplied with the potential L. At this time, the transistors M25, M31, and M32 are all in the off state (non-conductive state), and the transistors M26, M33, and M34 are all in the on state (conductive state). Therefore, the potential L is supplied to the wirings OUT21, OUT31, and OUT32 respectively regardless of the respective potentials (potential H or potential L) of the wirings IN23, IN31, and IN32. Note that in the following operation description, when the potential of each wiring is not involved, it can be regarded as maintaining the potential of the immediately preceding period.
[0246] During period T72, since the potential H is supplied to the wiring IN21, the potential of the wiring NL22 becomes the potential L, and the potential of the wiring NL21 becomes the potential H. At this time, the transistors M25, M31, and M32 all become in the on state, and the transistors M26, M33, and M34 all become in the off state. Therefore, the potentials (potential H or potential L) of the wirings IN23, IN31, and IN32 are respectively supplied to the wirings OUT21, OUT31, and OUT32 through the transistors M25, M31, and M32. Note that even if the potential L is supplied to the wiring IN21 thereafter, the potentials of the wirings NL22 and NL21 are maintained.
[0247] During period T73, since the potential H is supplied to the wiring IN22, the potential of the wiring NL22 becomes the potential H, and the potential of the wiring NL21 becomes the potential L. At this time, the transistors M25, M31, and M32 all become in the off state, and the transistors M26, M33, and M34 all become in the on state. Therefore, the potential L is supplied to the wirings OUT21, OUT31, and OUT32 respectively regardless of the potentials (potential H or potential L) of the wirings IN23, IN31, and IN32. Note that even if the potential L is supplied to the wiring IN22 thereafter, the potentials of the wirings NL22 and NL21 are maintained.
[0248] Figure 19E is a circuit diagram illustrating a modified example of the register unit 71 and the buffer unit 72. Figure 19E The difference between the shown register unit 71a and buffer unit 72a and the register unit 71 and buffer unit 72 is that they include a bootstrap circuit. That is, the register unit 71a includes the transistor M27 and the capacitor C21 in addition to the register unit 71, and the buffer unit 72a includes the transistors M35, M36, the capacitors C31, and C32 in addition to the buffer unit 72. Note that the capacitors C21, C31, and C32 are sometimes referred to as bootstrap capacitors.
[0249] The gate of the transistor M27 is electrically connected to the wiring VLD. The gate of the transistor M25 is electrically connected to the wiring NL21 through the source and drain of the transistor M27. In addition, the gate of the transistor M25 is electrically connected to the wiring OUT21 through the capacitor C21.
[0250] The gate of the transistor M35 is electrically connected to the wiring VLD. The gate of the transistor M31 is electrically connected to the wiring NL21 through the source and drain of the transistor M35. In addition, the gate of the transistor M31 is electrically connected to the wiring OUT31 through the capacitor C31.
[0251] The gate of transistor M36 is electrically connected to wiring VLD. The gate of transistor M32 is electrically connected to wiring NL21 through the source and drain of transistor M36. In addition, the gate of transistor M32 is electrically connected to wiring OUT32 through capacitor C32.
[0252] Here, in register unit 71, when a potential H is transferred from wiring IN23 to wiring OUT21, the potential of transistor M25 drops due to the threshold voltage. Thus, by adopting a bootstrap circuit as in register unit 71a, transistor M25 can maintain its on-state by using the capacitive coupling of the bootstrap capacitor. Therefore, the potential H can be supplied to wiring OUT21 in a state where the threshold voltage does not cause a potential drop.
[0253] Similarly, also in register unit 72, when a potential H is transferred from wiring IN31 to wiring OUT31, the potential of transistor M31 drops due to the threshold voltage, and when a potential H is transferred from wiring IN32 to wiring OUT32, the potential of transistor M32 drops due to the threshold voltage. Thus, by adopting a bootstrap circuit as in register unit 72a, both transistor M31 and transistor M32 can maintain their on-states by using the capacitive coupling of the bootstrap capacitor. Therefore, the potential H can be transferred to wiring OUT31 and wiring OUT32 in a state where the threshold voltage does not cause a potential drop.
[0254] Figure 20A The semiconductor device 70B shown includes m register units 71 and m inverter units 73. In addition, the semiconductor device 70B is electrically connected to m wirings GLc. Each of the m register units 71 is electrically connected to each other through each of the m wirings SR. In Figure 20A a part of the semiconductor device 70B is shown, showing register units 71_u to 71_u+2, inverter units 73_u to 73_u+2, wirings SR_u-1 to SR_u+4, and wirings GLc_u to GLc_u+2.
[0255] Figure 20B is a circuit diagram illustrating a structural example of the inverter unit 73. Figure 20C is a circuit block corresponding to the inverter unit 73. The inverter unit 73 can be used as each of the inverter units 73_1 to 73_m. That is, for example, in inverter unit 73_u, wiring IN41 is electrically connected to wiring SR_u, wiring IN42 is electrically connected to wiring SR_u+2, and wiring OUT41 is electrically connected to wiring GLc_u. Note that in Figure 20A and Figure 20C the descriptions of wiring VLD and wiring VLS are omitted. Note that the same applies to inverter units 73_1 to 73_u-1 and inverter units 73_u+1 to 73_m.
[0256] That is, similar to the semiconductor device 70A, in the semiconductor device 70B, each of the register units 71_1 to 71_m is sequentially selected, and in the inverter unit 73_u electrically connected to the selected register unit 71_u, a desired potential can be supplied to the wiring GLc_u. Note that in the inverter unit 73_u of the semiconductor device 70B that is electrically connected to the unselected register unit 71_u, the wiring GLc_u is supplied with the potential of the wiring VLD.
[0257] Figure 20B The illustrated inverter unit 73 includes a transistor M41, a transistor M42, a transistor M43, and a transistor M44. The transistor M41 has a function of making the wiring VLD and the wiring NL41 in a conductive state or a non-conductive state according to the potential of the wiring IN42. The transistor M42 has a function of making the wiring VLS and the wiring NL41 in a conductive state or a non-conductive state according to the potential of the wiring IN41. The transistor M43 has a function of making the wiring VLD and the wiring OUT41 in a conductive state or a non-conductive state according to the potential of the wiring NL41. The transistor M44 has a function of making the wiring VLS and the wiring OUT41 in a conductive state or a non-conductive state according to the potential of the wiring IN41.
[0258] Figure 20D It is an explanation Figure 20B The timing chart showing the operation example of the illustrated inverter unit 73.
[0259] In the following operation description, the wiring VLD is supplied with the potential H, and the wiring VLS is supplied with the potential L. In addition, the wiring IN41 and the wiring IN42 are respectively supplied with the potential H or the potential L.
[0260] Figure 20D The illustrated timing chart shows the respective potentials (potential H or potential L) supplied to the wiring IN41 and the wiring IN42 during each period (periods T74 to T76) of the operation. In addition, the potential changes of the wiring NL41 and the wiring OUT41 are shown.
[0261] During the period T74, the wiring IN41 and the wiring IN42 are supplied with the potential L. In addition, the potential of the wiring NL41 is the potential H. At this time, the transistor M43 is in the on state (conductive state), and the transistor M44 is in the off state (non-conductive state). Therefore, the wiring OUT41 is supplied with the potential H. Note that in the following operation description, when the potential of each wiring is not involved, it can be regarded as maintaining the potential of the immediately preceding period.
[0262] During period T75, since wiring IN41 is supplied with potential H, the potential of wiring NL41 becomes potential L. At this time, transistor M43 turns off and transistor M44 turns on. Therefore, wiring OUT41 is supplied with potential L. Additionally, then, since wiring IN41 is supplied with potential L, transistor M44 turns off accordingly. At this time, the potentials of wiring NL41 and wiring OUT41 are maintained.
[0263] During period T76, since wiring IN42 is supplied with potential H, the potential of wiring NL41 becomes potential H. At this time, transistor M43 turns on. Therefore, wiring OUT41 is supplied with potential H. Note that even if wiring IN42 is supplied with potential L thereafter, the potentials of wiring NL41 and wiring OUT41 are maintained.
[0264] Figure 20E It is a circuit diagram illustrating a modified example of the inverter section 73. Figure 20E The difference between the shown inverter section 73a and the inverter section 73 is that it includes a bootstrap circuit. That is, the inverter section 73a includes transistor M45 and capacitor C41 in addition to the inverter section 73. Note that capacitor C41 is sometimes referred to as a bootstrap capacitor.
[0265] The gate of transistor M45 is electrically connected to wiring VLD. The gate of transistor M43 is electrically connected to wiring NL41 through the source and drain of transistor M45. Additionally, the gate of transistor M43 is electrically connected to wiring OUT41 through capacitor C41.
[0266] Here, in the inverter section 73, when transmitting potential H from wiring VLD to wiring OUT41, the potential of transistor M43 drops due to the threshold voltage. Thus, by adopting a bootstrap circuit as in the inverter section 73a, transistor M43 can maintain the on state by utilizing the capacitive coupling of the bootstrap capacitor. Therefore, potential H can be transmitted to wiring OUT41 without the potential drop caused by the threshold voltage.
[0267] In one aspect of the present invention, semiconductor devices 70A and 70B can be used in the display device 40. For example, in the display device 40, semiconductor devices 70A and 70B can be used for a part of the gate driver. At this time, each of wirings GLa_1 to GLa_m corresponds to wiring GLa in the pixels 41 arranged in m rows and using semiconductor device 20A. Similarly, each of wirings GLb_1 to GLb_m corresponds to wiring GLb, and each of wirings GLc_1 to GLc_m corresponds to wiring GLc.
[0268] Note that one embodiment of the present invention is not limited to the structures of the semiconductor devices 70A and 70B described above, and the structure can be appropriately changed within the range where the above-described display device can be implemented.
[0269] 〔Demultiplexer〕 Figures 21A to 21C It is a circuit diagram illustrating an example of the structure of a semiconductor device that can be used for a peripheral drive circuit. This semiconductor device can be used, for example, as part of a source driver. Additionally, for example, it can be used as part of a demultiplexer.
[0270] Figure 21A The semiconductor device 80 shown includes n / 2 selector units 81. Additionally, the semiconductor device 80 is electrically connected to a wiring SMP1, a wiring SMP2, n / 2 wirings SL, and n wirings DL. In FIG. 21, a part of the semiconductor device 80 is abstracted to show the selector unit 81_1 and the selector unit 81_2, the selector unit 81_n / 2, the wiring SMP1, the wiring SMP2, the wirings SL_1 and SL_2, the wiring SL_n / 2, the wirings DL_1 to DL_4, the wirings DL_n-1 and DL_n. Note that n is an integer of 2 or more and corresponds to the number of columns n of the pixels 41 arranged in a matrix in the above-described display device 40.
[0271] Figure 21B and Figure 21C They are a circuit diagram and a block diagram respectively illustrating an example of the structure of the selector unit 81. The selector unit 81 can be used for each of the selector units 81_1 to 81_n / 2. That is, for example, in the selector unit 81_1, the wiring IN51 is electrically connected to the wiring SL_1, the wiring SW51 is electrically connected to the wiring SMP1, the wiring SW52 is electrically connected to the wiring SMP2, the wiring OUT51 is electrically connected to the wiring DL_1, and the wiring OUT52 is electrically connected to the wiring DL_2. Additionally, for example, in the selector unit 81_n / 2, the wiring IN51 is electrically connected to the wiring SL_n / 2, the wiring SW51 is electrically connected to the wiring SMP1, the wiring SW52 is electrically connected to the wiring SMP2, the wiring OUT51 is electrically connected to the wiring DL_n-1, and the wiring OUT52 is electrically connected to the wiring DL_n. The same applies to the selector units 81_2 to 81_n / 2-1.
[0272] Figure 21B The selector unit 81 shown includes a transistor M51 and a transistor M52. The transistor M51 has a function of making the wiring IN51 and the wiring OUT51 conductive or non-conductive according to the potential of the wiring SW51. The transistor M52 has a function of making the wiring IN51 and the wiring OUT52 conductive or non-conductive according to the potential of the wiring SW52.
[0273] That is, the selector unit 81 has a function of transferring the potential of the wiring IN51 to either the wiring OUT51 or the wiring OUT52 according to the potential of the wiring SW51 and the potential of the wiring SW52. In other words, the selector unit 81 includes one input (wiring IN51) and two outputs (wiring OUT51 and wiring OUT52).
[0274] In one aspect of the present invention, the semiconductor device 80 can be used in the display device 40. For example, in the display device 40, the semiconductor device 80 can be used as a part of the source driver. At this time, each of the wirings DL_1 to DL_n corresponds to the wiring DL in the pixel 41 arranged in n columns and employing the semiconductor device 20A.
[0275] By using the semiconductor device 80 in the display device 40, a source driver IC with an output number less than the number of columns n of the pixels 41 can be used. For example, when using the above semiconductor device 80, a source driver IC with an output number of n / 2 can be used. Therefore, for example, miniaturization and cost reduction of the display device can be achieved. In addition, it can also be said that a display device including pixels in a number of columns larger than the output number of the source driver IC can be driven. Therefore, for example, high resolution of the display device can be achieved.
[0276] Note that a structure in which the selector unit 81 included in the semiconductor device 80 has two outputs is shown here, but it is not limited thereto, and it may include three or more outputs. For example, when adopting a structure including three outputs, a source driver IC with an output number of n / 3 can be used.
[0277] 〔Source driver〕 Figures 22 to 25F It is a circuit diagram showing a structural example of a semiconductor device that can be used in a peripheral drive circuit. Figure 26 It is a timing diagram showing an operation example of this semiconductor device. This semiconductor device can be used, for example, as a part of a source driver.
[0278] Figure 22 The shown semiconductor device 90 includes a shift register unit 90A, a latch unit 90B, a latch unit 90C, and a source follower unit 90D.
[0279] The shift register section 90A is electrically connected to a plurality of wirings CLK, a plurality of wirings PWC, and a wiring SP. In addition, the shift register section 90A is electrically connected to the latch section 90B through n / h wirings SMP (sometimes denoted as wirings SMP[1:n / h]). The latch section 90B is electrically connected to h wirings DAT (sometimes denoted as wirings DAT[1:h]). In addition, the latch section 90B is electrically connected to the latch section 90C through n wirings LAT1 (sometimes denoted as wirings LAT1[1:n]). The latch section 90C is electrically connected to the wiring SW1 and the wiring SW2. In addition, the latch section 90C is electrically connected to the source follower section 90D through n wirings LAT2 (sometimes denoted as wirings LAT2[1:n]). The source follower section 90D is electrically connected to the wiring SW3, the wiring SW4, the wiring SW5, and the wiring SW6. In addition, the source follower section is electrically connected to n wirings DL (sometimes denoted as wirings DL[1:n]).
[0280] Note that n is an integer of 2 or more, for example, corresponding to the number of columns n of the pixels 41 arranged in a matrix in the above-described display device 40. In addition, h is an integer of 1 or more, for example, corresponding to the number of data channels input from the outside of the display device 40 to the second drive circuit section 44 in the above-described display device 40.
[0281] The shift register section 90A has a function of sequentially outputting signals to the wirings SMP[1:n / h] according to signals input through the plurality of wirings CLK, the plurality of wirings PWC, and the wiring SP, respectively. The plurality of wirings CLK are wirings supplied with clock signals whose potentials periodically change in different phases from each other. The plurality of wirings PWC are wirings supplied with clock signals whose potentials periodically change in different phases from each other. The wiring SP is a wiring supplied with a start pulse signal, which is a trigger signal for starting the operation of sequentially outputting signals.
[0282] The latch section 90B has a function of storing and holding the potential input through the wirings DAT[1:h] with the signals sequentially output to the wirings SMP[1:n / h] as trigger signals, and outputting the potential to the wirings LAT1[1:n]. That is, the latch section 90B has the function of a sample-and-hold circuit. The wirings DAT[1:h] are wirings supplied with data potentials corresponding to the data of the image displayed on the display device 40.
[0283] The latch unit 90C has the following functions: storing and holding the potential of the wiring LAT1[1:n] with the signal input through the wiring SW1 as a trigger signal, and outputting this potential to the wiring LAT2[1:n]. That is to say, the latch unit 90C has the function of a sample-and-hold circuit. In addition, the latch unit 90C can also have a function of resetting (initializing) the potential of the wiring LAT2[1:n] according to the signal input through the wiring SW2, for example.
[0284] The source follower unit 90D has the function of outputting a potential corresponding to the potential of the wiring LAT2[1:n] to the wiring DL[1:n]. Even when the load (parasitic capacitance) of the wiring DL[1:n] is large, the source follower unit 90D can reduce the time of the potential change of the wiring DL[1:n] caused by the potential change of the wiring LAT2[1:n] by reducing the output impedance. In other words, the source follower unit 90D has the function of impedance conversion. In addition, the source follower unit 90D can also have a function of controlling the input from the wiring LAT2[1:n] according to the signals input through each of the wiring SW3 and the wiring SW4. For example, it can also have a function of correcting the potential input from the wiring LAT2[1:n]. In addition, it can also have a function of controlling the output to the wiring DL[1:n] according to the signals input through each of the wiring SW5 and the wiring SW6. For example, it can also have a function of precharging the wiring DL[1:n] to an arbitrary potential.
[0285] Next, a structural example of the shift register unit 90A, the latch unit 90B, the latch unit 90C, and the source follower unit 90D will be described.
[0286] Figure 23A It is a circuit diagram for explaining the structural example of the shift register unit 90A. The shift register unit 90A includes n / h register units 91. In addition, the shift register unit 90A is electrically connected to n / h wirings SMP, a plurality of wirings CLK, a plurality of wirings PWC, and the wiring SP. Each of the n / h register units 91 is electrically connected to each other through each of the n / h wirings SR. In Figure 23A it, a part of the shift register unit 90A is abstracted and the register unit 91_1, the register unit 91_w, and the register unit 91_w+1, the wiring SR_1, the wiring SR_2, the wirings SR_w-1 to SR_w+2, the wiring SMP_1, the wiring SMP_w, and the wiring SMP_w+1 are shown. Note that w is an integer of 1 or more and n / h or less.
[0287] Figure 23B It is a circuit diagram for explaining the structural example of the register unit 91. Figure 23Cis a circuit block corresponding to the register unit 91. The register unit 91 can be used as each of the register units 91_1 to 91_n / h. That is, for example, in the register unit 91_w, the wiring IN71 is electrically connected to the wiring SR_w - 1, the wiring IN72 is electrically connected to the wiring SR_w + 1, the wiring IN73 is electrically connected to any one of the plurality of wirings CLK, and the wiring OUT71 is electrically connected to the wiring SR_w. In addition, the wiring IN7A is electrically connected to any one of the plurality of wirings PWC, and the wiring OUT7A is electrically connected to the wiring SMP_w. Further, in the register unit 91_1, the wiring IN71 is electrically connected to the wiring SP. Further, in Figure 23A and Figure 23C the description of the wiring VLD and the wiring VLS is omitted. Note that the same applies to the register units 91_2 to 91_w - 1 and the register units 91_w + 2 to 91_n / h.
[0288] That is, in the shift register unit 90A, the wiring OUT71 in the register unit 91_w - 1 is electrically connected to the wiring IN71 in the register unit 91_w through the wiring SR_w - 1, and the wiring OUT71 in the register unit 91_w is electrically connected to the wiring IN71 in the register unit 91_w + 1 through the wiring SR_w. By adopting the above structure, each of the register units 91_1 to 91_n / h can be sequentially selected, and a desired potential can be supplied to the wiring SMP_w electrically connected to the selected register unit 91_w. Further, in the shift register unit 90A, the potential of the wiring VLS is supplied to the wiring SMP_w electrically connected to the unselected register unit 91_w.
[0289] Figure 23B The register unit 91 shown includes transistors M71, M72, M73, M74, M75, and M76. The transistor M71 has a function of making the wiring VLD and the wiring NL71 in a conductive state or a non - conductive state according to the potential of the wiring IN71. The transistor M72 has a function of making the wiring VLD and the wiring NL72 in a conductive state or a non - conductive state according to the potential of the wiring IN72. The transistor M73 has a function of making the wiring VLS and the wiring NL71 in a conductive state or a non - conductive state according to the potential of the wiring NL72. The transistor M74 has a function of making the wiring VLS and the wiring NL72 in a conductive state or a non - conductive state according to the potential of the wiring IN71. The transistor M75 has a function of making the wiring IN73 and the wiring OUT71 in a conductive state or a non - conductive state according to the potential of the wiring NL71. The transistor M76 has a function of making the wiring VLS and the wiring OUT71 in a conductive state or a non - conductive state according to the potential of the wiring NL72.
[0290] In addition, the register unit 91 includes a transistor M7A and a transistor M7B. The transistor M7A has a function of making the wiring IN7A and the wiring OUT7A conductive or non-conductive according to the potential of the wiring NL71. The transistor M7B has a function of making the wiring VLS and the wiring OUT7A conductive or non-conductive according to the potential of the wiring NL72.
[0291] Figure 23D is to illustrate Figure 23B a timing chart of an operation example of the register unit 91 shown.
[0292] In the following operation description, the wiring VLD is supplied with the potential H, and the wiring VLS is supplied with the potential L. In addition, the wirings IN71, IN72, IN73, and IN7A are supplied with the potential H or the potential L.
[0293] Figure 23D The timing chart shown shows the respective potentials (potential H or potential L) supplied to the wirings IN71, IN72, IN73, and IN7A during each period (periods T91 to T93) of the operation. In addition, the potential changes of the wirings NL71, NL72, OUT71, and OUT7A are shown.
[0294] During the period T91, the wirings IN71 and IN72 are supplied with the potential L. In addition, the potential of the wiring NL72 is the potential H. Therefore, the wiring NL71 is supplied with the potential L. At this time, both the transistor M75 and the transistor M7A are in the off state (non-conductive state), and both the transistor M76 and the transistor M7B are in the on state (conductive state). Therefore, the potential L is supplied to the wirings OUT71 and OUT7A respectively regardless of the respective potentials (potential H or potential L) of the wirings IN73 and IN7A. Note that in the following operation description, in the case where the potential of each wiring is not involved, it can be regarded as maintaining the potential of the immediately preceding period.
[0295] During the period T92, since the wiring IN71 is supplied with the potential H, the potential of the wiring NL72 becomes the potential L, and the potential of the wiring NL71 becomes the potential H. At this time, both the transistor M75 and the transistor M7A are in the on state, and both the transistor M76 and the transistor M7B are in the off state. Therefore, the respective potentials (potential H or potential L) of the wirings IN73 and IN7A are supplied to the wirings OUT71 and OUT7A through the transistor M75 and the transistor M7A respectively. Note that even if the wiring IN71 is supplied with the potential L thereafter, the potentials of the wirings NL72 and NL71 are maintained.
[0296] During period T93, since the potential H is supplied to the wiring IN72, the potential of the wiring NL72 becomes the potential H, and the potential of the wiring NL71 becomes the potential L. At this time, both the transistor M75 and the transistor M7A are in the off state, and both the transistor M76 and the transistor M7B are in the on state. Therefore, the potential L is supplied to the wiring OUT71 and the wiring OUT7A respectively regardless of the potentials (the potential H or the potential L) of the wiring IN73 and the wiring IN7A. Note that even if the potential L is supplied to the wiring IN72 thereafter, the potentials of the wiring NL72 and the wiring NL71 are maintained.
[0297] Figure 23E It is a circuit diagram illustrating a modified example of the register unit 91. Figure 23E The register unit 91a shown is different from the register unit 91 in that it includes a bootstrap circuit. That is, the register unit 91a includes, in addition to the register unit 91, a transistor M77, a capacitor C71, a transistor M7C, and a capacitor C7A. Note that the capacitors C71 and C7A are sometimes referred to as bootstrap capacitors.
[0298] The gate of the transistor M77 is electrically connected to the wiring VLD. The gate of the transistor M75 is electrically connected to the wiring NL71 through the source and drain of the transistor M77. In addition, the gate of the transistor M75 is electrically connected to the wiring OUT71 through the capacitor C71.
[0299] The gate of the transistor M7C is electrically connected to the wiring VLD. The gate of the transistor M7A is electrically connected to the wiring NL71 through the source and drain of the transistor M7C. In addition, the gate of the transistor M7A is electrically connected to the wiring OUT7A through the capacitor C7A.
[0300] Here, in the register unit 91, when the potential H is transmitted from the wiring IN73 to the wiring OUT71, the potential of the transistor M75 drops due to the threshold voltage. Then, by adopting a bootstrap circuit as in the register unit 91a, the transistor M75 can maintain the on state by using the capacitive coupling of the bootstrap capacitor. Therefore, the potential H can be supplied to the wiring OUT71 in a state where the threshold voltage does not cause a potential drop.
[0301] Similarly, in the register unit 91, when the potential H is transmitted from the wiring IN7A to the wiring OUT7A, the potential of the transistor M7A drops due to the threshold voltage. Then, by adopting a bootstrap circuit as in the register unit 91a, the transistor M7A can maintain the on state by using the capacitive coupling of the bootstrap capacitor. Therefore, the potential H can be supplied to the wiring OUT7A in a state where the threshold voltage does not cause a potential drop.
[0302] Figure 24This is a circuit diagram showing an example of the structures of the latch section 90B, the latch section 90C, and the source follower section 90D. The latch section 90B includes n latch cell sections 92. The latch section 90C includes n latch cell sections 93. The source follower section 90D includes n source follower cell sections 94. In Figure 24 a part of the summary latch section 90B, the latch cell section 92_1, the latch cell section 92_h, the latch cell section 92_n-h+1, and the latch cell section 92_n are shown. Further, a part of the summary latch section 90C, the latch cell section 93_1, the latch cell section 93_h, the latch cell section 93_n-h+1, and the latch cell section 93_n are shown. Further, a part of the summary source follower section 90D, the source follower cell section 94_1, the source follower cell section 94_h, the source follower cell section 94_n-h+1, and the source follower cell section 94_n are shown. Further, a part of the summary wiring SMP[1:n / h], the wiring SMP_1 and the wiring SMP_n / h are shown. Further, a part of the summary wiring DAT[1:h], the wiring DAT_1 and the wiring DAT_h are shown. Further, a part of the summary wiring LAT1[1:n], the wiring LAT1_1, the wiring LAT1_h, the wiring LAT1_n-h+1, and the wiring LAT1_n are shown. Further, a part of the summary wiring LAT2[1:n], the wiring LAT2_1, the wiring LAT2_h, the wiring LAT2_n-h+1, and the wiring LAT2_n are shown. Further, a part of the summary wiring DL[1:n], the wiring DL_1, the wiring DL_h, the wiring DL_n-h+1, and the wiring DL_n are shown.
[0303] Note that in this specification and the like, for example, when indicating any one of a plurality of wirings shown with an appended "[1:n]" or "[1:h]" etc., sometimes an appended "_1", "_n", or "_h" etc. is used.
[0304] Each of the n latch unit parts 92 is electrically connected to the n wirings LAT1. In addition, each of the h latch unit parts 92 is electrically connected to any one of the n / h wirings SMP. In addition, each of the h latch unit parts 92 is electrically connected to the h wirings DAT. For example, the latch unit part 92_1 is electrically connected to the wiring LAT1_1, the latch unit part 92_h is electrically connected to the wiring LAT1_h, the latch unit part 92_n-h+1 is electrically connected to the wiring LAT1_n-h+1, and the latch unit part 92_n is electrically connected to the wiring LAT1_n. Furthermore, for example, the latch unit part 92_1 and the latch unit part 92_h are electrically connected to the wiring SMP_1, and the latch unit part 92_n-h+1 and the latch unit part 92_n are electrically connected to the wiring SMP_n / h. Furthermore, for example, the latch unit part 92_1 and the latch unit part 92_n-h+1 are electrically connected to the wiring DAT_1, and the latch unit part 92_h and the latch unit part 92_n are electrically connected to the wiring DAT_h.
[0305] Each of the n source follower unit parts 93 is electrically connected to the n wirings LAT1 and the n wirings LAT2. In addition, each of the n source follower unit parts 93 is also electrically connected to the wiring SW1 and the wiring SW2. For example, the source follower unit part 93_1 is electrically connected to the wirings LAT1_1, LAT2_1, SW1, and SW2, the source follower unit part 93_h is electrically connected to the wirings LAT1_h, LAT2_h, SW1, and SW2, the source follower unit part 93_n-h+1 is electrically connected to the wirings LAT1_n-h+1, LAT2_n-h+1, SW1, and SW2, and the source follower unit part 93_n is electrically connected to the wirings LAT1_n, LAT2_n, SW1, and SW2.
[0306] Each of the n source follower unit parts 94 is electrically connected to the n wirings LAT2 and the n wirings DL. In addition, each of the n source follower unit parts 94 is also electrically connected to the wirings SW3, SW4, SW5, and SW6. For example, the source follower unit part 94_1 is electrically connected to the wirings LAT2_1, DL_1, SW3, SW4, SW5, and SW6, the source follower unit part 94_h is electrically connected to the wirings LAT2_h, DL_h, SW3, SW4, SW5, and SW6, the source follower unit part 94_n-h+1 is electrically connected to the wirings LAT2_n-h+1, DL_n-h+1, SW3, SW4, SW5, and SW6, and the source follower unit part 94_n is electrically connected to the wirings LAT2_n, DL_n, SW3, SW4, SW5, and SW6.
[0307] Figure 25A It is a circuit diagram illustrating an example of the structure of the latch unit section 92. Figure 25B It is a circuit block corresponding to the latch unit section 92. The latch unit section 92 can be used as each of the latch unit sections 92_1 to 92_n. That is, for example, in the latch unit section 92_1, the wiring IN81 is electrically connected to the wiring DAT_1, the wiring SW81 is electrically connected to the wiring SMP_1, and the wiring OUT81 is electrically connected to the wiring LAT1_1. In addition, for example, in the latch unit section 92_n, the wiring IN81 is electrically connected to the wiring DAT_h, the wiring SW81 is electrically connected to the wiring SMP_n / h, and the wiring OUT81 is electrically connected to the wiring LAT1_n. Note that in Figure 24 and Figure 25B the description of the wiring VL81 is omitted. Additionally, the same applies to the latch unit sections 92_2 to 92_n-1.
[0308] Figure 25A The latch unit section 92 shown includes a transistor M81 and a capacitor C81. The transistor M81 has a function of making the connection between the wiring IN81 and the wiring OUT81 conductive or non-conductive according to the potential of the wiring SW81. The capacitor C81 has a function of, for example, maintaining the potential difference (voltage) between the wiring OUT81 and the wiring VL81 when the wiring OUT81 is in a floating state.
[0309] In other words, the latch unit section 92 has a function of storing the potential of the wiring IN81 in the wiring OUT81 according to the potential of the wiring SW81 and a function of maintaining the potential of the wiring OUT81. That is, the latch unit section 92 has the function of a sample-and-hold circuit.
[0310] Figure 25C It is a circuit diagram illustrating an example of the structure of the latch unit section 93. Figure 25D It is a circuit block corresponding to the latch unit section 93. The latch unit section 93 can be used as each of the latch unit sections 93_1 to 93_n. That is, for example, in the latch unit section 93_1, the wiring IN82 is electrically connected to the wiring LAT1_1, the wiring SW82 is electrically connected to the wiring SW1, the wiring SW83 is electrically connected to the wiring SW2, and the wiring OUT82 is electrically connected to the wiring LAT2_1. In addition, for example, in the latch unit section 93_n, the wiring IN82 is electrically connected to the wiring LAT1_n, the wiring SW82 is electrically connected to the wiring SW1, the wiring SW83 is electrically connected to the wiring SW2, and the wiring OUT82 is electrically connected to the wiring LAT2_n. Note that in Figure 24 and Figure 25DIn this case, the description of the wirings VL82 and VL83 is omitted. Similarly, the latch unit sections 93_2 to 93_n-1 are also the same.
[0311] Figure 25C The latch unit section 93 shown includes a transistor M82, a transistor M83, and a capacitor C82. The transistor M82 has a function of making the wiring IN82 and the wiring OUT82 in a conductive state or a non-conductive state according to the potential of the wiring SW82. The transistor M83 has a function of making the wiring VL83 and the wiring OUT82 in a conductive state or a non-conductive state according to the potential of the wiring SW83. The capacitor C82 has a function of maintaining the potential difference (voltage) between the wiring OUT82 and the wiring VL82 when the wiring OUT82 is in a floating state, for example.
[0312] In other words, the latch unit section 93 has a function of storing the potential of the wiring IN82 in the wiring OUT82 according to the potential of the wiring SW82 and a function of maintaining the potential of the wiring OUT82. That is to say, the latch unit section 93 has the function of a sample-and-hold circuit.
[0313] Figure 25E It is a circuit diagram for explaining an example of the structure of the source follower unit section 94. Figure 25F It is a circuit block corresponding to the source follower unit section 94. The source follower unit section 94 can be used as each of the source follower unit sections 94_1 to 94_n. That is to say, for example, in the source follower unit section 94_1, the wiring IN83 is electrically connected to the wiring LAT2_1, the wiring SW84 is electrically connected to the wiring SW3, the wiring SW85 is electrically connected to the wiring SW4, the wiring SW86 is electrically connected to the wiring SW5, the wiring SW87 is electrically connected to the wiring SW6, and the wiring OUT83 is electrically connected to the wiring DL_1. In addition, for example, in the source follower unit section 94_n, the wiring IN83 is electrically connected to the wiring LAT2_n, the wiring SW84 is electrically connected to the wiring SW3, the wiring SW85 is electrically connected to the wiring SW4, the wiring SW86 is electrically connected to the wiring SW5, the wiring SW87 is electrically connected to the wiring SW6, and the wiring OUT83 is electrically connected to the wiring DL_n. Note that in Figure 24 and Figure 25F the wirings VL8A, VL8B, VL8C, VL84, and VL85 are omitted. Similarly, the source follower unit sections 94_2 to 94_n-1 are also the same.
[0314] Figure 25EThe source follower unit section 94 shown includes a transistor M8A, a transistor M8B, a transistor M84, a transistor M85, a transistor M86, a transistor M87, a transistor M88, and a capacitor C83.
[0315] The gate of the transistor M8A is electrically connected to the wiring NL81. One of the source and the drain of the transistor M8A is electrically connected to one of the source and the drain of the transistor M8B and the wiring NL82, and the other of the source and the drain of the transistor M8A is electrically connected to the wiring VL8A. The other of the source and the drain of the transistor M8B is electrically connected to the wiring VL8B. The gate of the transistor M8B is electrically connected to the wiring VL8C. The transistors M8A and M8B have a function as a source follower that uses the gate of the transistor M8A as an input terminal and one of the source and the drain of the transistor M8A as an output terminal. That is, the transistor M8A is used as a driving transistor, and the transistor M8B is used as a load transistor. In addition, the transistors M8A and M8B can also be used as a source-grounded amplifier circuit. In addition, the transistor M8B used as a load transistor can be replaced with a resistor, for example.
[0316] The transistor M84 has a function of making the wiring NL82 and the wiring IN83 conductive or non-conductive according to the potential of the wiring SW85. The transistor M85 has a function of making the wiring VL84 and the wiring NL81 conductive or non-conductive according to the potential of the wiring SW85. The transistor M88 has a function of making the wiring IN83 and the wiring NL81 conductive or non-conductive according to the potential of the wiring SW84. The capacitor C83 has a function of holding the potential difference (voltage) between the wiring NL81 and the wiring IN83 when the wiring NL81 is in a floating state, for example.
[0317] The transistor M86 has a function of making the wiring NL82 and the wiring OUT83 conductive or non-conductive according to the potential of the wiring SW86. The transistor M87 has a function of making the wiring VL85 and the wiring OUT83 conductive or non-conductive according to the potential of the wiring SW87.
[0318] In addition, the structures of the latch unit section 93 and the source follower unit section 94 can correspond to the above semiconductor device 60 ( Figures 1A to 1CThe structure shown). At this time, transistor M82 is equivalent to transistor M13, transistor M8A is equivalent to transistor M11, transistor M8B is equivalent to transistor M12, transistor M84 is equivalent to transistor M14, transistor M85 is equivalent to transistor M15, transistor M86 is equivalent to transistor M16, transistor M87 is equivalent to transistor M17, and capacitor C83 is equivalent to capacitor C11. In addition, wiring IN82 is equivalent to wiring IN11, and wiring OUT83 is equivalent to wiring OUT11.
[0319] In addition, in the latch unit section 93 and the source follower unit section 94, the generation section 64 included in the semiconductor device 60 can also be used. That is, by providing the generation section 64 between the wiring IN82 and the wiring VL85, a potential corresponding to the potential of the wiring IN82 can also be generated and supplied to the wiring VL85. At this time, the wiring VL85 is equivalent to the wiring VL15.
[0320] Figure 26 is a timing chart illustrating an operation example of the semiconductor device 90.
[0321] In the following operation description, the multiple wirings CLK are four wirings, namely, wiring CLK_1, wiring CLK_2, wiring CLK_3, and wiring CLK_4 (i.e., four clock signals are supplied), and the multiple wirings PWC are four wirings, namely, wiring PWC_1, wiring PWC_2, wiring PWC_3, and wiring PWC_4 (i.e., four clock signals are supplied). The wirings CLK_1 to CLK_4, the wirings PWC_1 to PWC_4, and the wiring SP are each supplied with a potential H or a potential L. In addition, the wirings SW1, SW2, SW3, SW4, SW5, and SW6 are each supplied with a potential H or a potential L. In addition, the wiring VLD is supplied with the potential H, and the wiring VLS is supplied with the potential L. In addition, the wirings VL81, VL82, VL83, VL84, and VL85 are each supplied with a constant potential (for example, a potential between the potential H and the potential L). In addition, each of the wirings VL8A, VL8B, and VL8C is supplied with a constant potential (a potential for using the source follower unit section 94 as a source follower).
[0322] In addition, appropriately refer to the operation example of the register section 91 (refer to Figure 23D ) and the operation example of the semiconductor device 60 corresponding to the structures of the latch unit section 93 and the source follower unit section 94 (refer to Figure 2A ).
[0323] Figure 26The timing chart shown shows the potential (potential H or potential L) supplied to each of wirings CLK_1 to CLK_4, wirings PWC_1 to PWC_4, and wiring SP during respective periods of operation (period T9A and period T9B). In addition, potential changes in each of wirings SMP[1] and SMP[n / h] are also shown. In addition, data potential Vd supplied to wiring DAT[1:h] is also shown. In addition, potential changes in each of wirings LAT1[1:h] and LAT1[n-h+1:n] are also shown. In addition, the potential (potential H or potential L) supplied to each of wirings SW1, SW2, SW3, SW4, SW5, and SW6 is also shown. In addition, potential changes in each of wirings LAT2[1:h], LAT2[n-h+1:n], wirings DL[1:h], and wirings DL[n-h+1:n] are also shown.
[0324] Note that in this specification and the like, for example, when indicating any h wirings out of n wirings to which "[1:n]" is added, sometimes "[1:h]" or "[n-h+1:n]" or the like is added to the above-mentioned wirings. That is to say, for example, when adding "[1:h]", it indicates the h wirings from the first to the h-th, and when adding "[n-h+1:n]", it indicates the h wirings from the (n-h+1)-th to the n-th. In other words, for example, the description of "[1:h]" corresponds to the description from "_1" to "_h", and the description of "[n-h+1:n]" corresponds to the description from "_n-h+1" to "_n". In addition, for example, when indicating any 1 wiring out of n / h wirings to which "[1:n / h]" is added, sometimes "[1]" or "[n / h]" or the like is added to the above-mentioned wiring. That is to say, for example, when adding "[1]", it indicates the first wiring, and when adding "[n / h]", it indicates the n / h-th wiring. In other words, for example, the description of "[1]" corresponds to the description of "_1", and the description of "[n / h]" corresponds to the description of "_n / h".
[0325] During period T9A, the shift register unit 90A sequentially outputs signals to wirings SMP[1] to SMP[n / h]. At this time, the latch unit 90B stores and holds the potential input through wiring DAT[1:h] using the signals sequentially output to wirings SMP[1] to SMP[n / h] as trigger signals, and outputs this potential to wiring LAT1[1:n].
[0326] Figure 26It shows the following cases: During T9A, the data potential Vd_1 input through the wirings DAT[1:h] is stored and held with the signal output to the wiring SMP[1] as a trigger signal and output to the wiring LAT1[1:h]; and the data potential Vd_n / h input through the wirings DAT[1:h] is stored and held with the signal output to the wiring SMP[n / h] as a trigger signal and output to the wiring LAT1[n - h + 1:n].
[0327] In addition, during T9A, the wirings SW1, SW2, SW3, SW4, and SW6 are supplied with the potential L, and the wiring SW5 is supplied with the potential H.
[0328] During T9B, first, the wiring SW5 is supplied with the potential L, and the wiring SW6 is supplied with the potential H. Thereby, the source follower section 90D pre-charges the wirings DL[1:n] to the potential of the wiring VL85 (this operation corresponds to the pre-charge operation of the semiconductor device 60).
[0329] Next, the wiring SW2 is supplied with the potential H and then with the potential L after a fixed period. During this period, the latch section 90C resets the potential of the wiring LAT2[1:n] to the potential of the wiring VL83 (initialization).
[0330] Next, the wiring SW4 is supplied with the potential H and then with the potential L after a fixed period. During this period, in the source follower section 90D, an operation is performed to correct the potential input from the wiring LAT2[1:n] (this operation corresponds to the correction operation of the semiconductor device 60).
[0331] Next, the wiring SW1 is supplied with the potential H and then with the potential L after a fixed period. During this period, in the latch section 90C, the potentials of the wirings LAT1_1 to LAT1_n are stored and held, and this potential is output to the wirings LAT2_1 to LAT2_n (this operation corresponds to the input operation of the semiconductor device 60).
[0332] Next, the wiring SW5 is supplied with the potential H, and the wiring SW6 is supplied with the potential L. During this period, the source follower section 90D outputs the potential corresponding to the potentials of the wirings LAT2_1 to LAT2_n to the wirings DL_1 to DL_n (this operation corresponds to the output operation of the semiconductor device 60).
[0333] In addition, during Figure 26During the period T9B shown, the wiring SW4 can also be supplied with the potential L, and the wiring SW3 can also be supplied with the potential H. In this case, the correction operation is not performed in the source follower unit section 94, and the potential of the wiring IN83 is supplied to the wiring NL81. Therefore, the operating speed of the semiconductor device 90 can be increased.
[0334] In one aspect of the present invention, the semiconductor device 90 can be used in the display device 40. For example, in the display device 40, the semiconductor device 90 can be used as a part of the source driver. At this time, each of the wirings DL_1 to DL_n corresponds to the wiring DL in the pixels 41 arranged in n columns and each employing the semiconductor device 20A.
[0335] By using the semiconductor device 90 in the display device 40, the number of data channels input from the outside of the display device 40 can be made smaller than the number of columns n of the pixels 41. Therefore, for example, miniaturization and cost reduction of the display device can be achieved.
[0336] Note that one aspect of the present invention is not limited to the structure of the semiconductor device 90 described above, and the structure can be appropriately changed within the range capable of realizing the above display device.
[0337] 〔Series connection of transistors〕 Figures 27A to 27C It is a circuit diagram for explaining the series connection of transistors.
[0338] In one aspect of the present invention, the transistors constituting the pixel circuit and the peripheral driver circuit can be either single-gate transistors having one gate between the source and the drain or double-gate transistors. Figure 27A An example of the circuit symbol of the double-gate transistor TrA is shown.
[0339] The transistor TrA has a structure in which the transistor Tr1 and the transistor Tr2 are connected in series. In Figure 27A the transistor TrA shown, one of the source and the drain of the transistor Tr1 is electrically connected to the terminal S. In addition, the other of the source and the drain of the transistor Tr1 is electrically connected to one of the source and the drain of the transistor Tr2. The other of the source and the drain of the transistor Tr2 is electrically connected to the terminal D. Further, in Figure 27A the transistor TrA shown, the gates of the transistor Tr1 and the transistor Tr2 are electrically connected to each other and to the terminal G.
[0340] Figure 27A the transistor TrA shown has a function of switching the conduction state or non-conduction state between the terminal S and the terminal D by changing the potential of the terminal G. Therefore, the transistor TrA of the double-gate transistor includes the transistor Tr1 and the transistor Tr2 and is used as one transistor. It can also be said that inFigure 27A In Figure 27A , one of the source and drain of transistor TrA is electrically connected to terminal S, the other of the source and drain is electrically connected to terminal D, and the gate is electrically connected to terminal G.
[0341] In addition, the transistors constituting the pixel circuit and the peripheral driving circuit may also be triple-gate transistors. Figure 27B An example of the circuit symbol of the triple-gate transistor TrB is shown.
[0342] Transistor TrB has a structure in which transistors Tr1, Tr2, and Tr3 are connected in series. In Figure 27B In the shown transistor TrB, one of the source and drain of transistor Tr1 is electrically connected to terminal S. In addition, the other of the source and drain of transistor Tr1 is electrically connected to one of the source and drain of transistor Tr2. Further, the other of the source and drain of transistor Tr2 is electrically connected to one of the source and drain of transistor Tr3. Additionally, the other of the source and drain of transistor Tr3 is electrically connected to terminal D. In addition, in Figure 27B In the shown transistor TrB, the gates of transistor Tr1, transistor Tr2, and transistor Tr3 are electrically connected to each other and to terminal G.
[0343] Figure 27B The shown transistor TrB has a function of switching the conduction state or non-conduction state between terminal S and terminal D by changing the potential of terminal G. Therefore, the triple-gate transistor TrB includes transistors Tr1, Tr2, and Tr3 and is used as one transistor. It can also be said that in Figure 27B In Figure 27B , one of the source and drain of transistor TrB is electrically connected to terminal S, the other of the source and drain is electrically connected to terminal D, and the gate is electrically connected to terminal G.
[0344] In addition, the transistors constituting the pixel circuit and the peripheral driving circuit may also have a structure in which four or more transistors are connected in series. Figure 27C The shown transistor TrC has a structure in which six transistors (transistors Tr1 to Tr6) are connected in series. In addition, in Figure 27C In the shown transistor TrC, the gates of the six transistors are electrically connected to each other and to terminal G.
[0345] Figure 27C The shown transistor TrC has a function of switching the conduction state or non-conduction state between terminal S and terminal D by changing the potential of terminal G. Therefore, transistor TrC includes transistors Tr1 to Tr6 and is used as one transistor. That is, it can be said that in Figure 27CIn this case, one of the source and drain of the transistor TrC is electrically connected to the terminal S, the other of the source and drain is electrically connected to the terminal D, and the gate is electrically connected to the terminal G.
[0346] Sometimes, a transistor including a plurality of gates that are electrically connected to each other, such as the transistors TrA, TrB, and TrC, is referred to as a "multi-gate transistor" or a "multi-gate FET".
[0347] In one aspect of the present invention, by using a multi-gate transistor, a transistor having a large effective channel length can be realized. Therefore, the off-state current can be reduced and the drain breakdown voltage can be increased (that is, the reliability can be improved). In addition, a characteristic with high saturation can be obtained. By using such a transistor with high saturation, for example, an ideal current source circuit and an active load having an extremely high resistance value can be realized. Therefore, for example, a differential circuit and a current mirror circuit with excellent characteristics can be realized.
[0348] In one aspect of the present invention, a vertical OS transistor can be used as the transistor constituting the above various constituent circuits. By using a vertical OS transistor as part or all of the transistors constituting each constituent circuit, the occupied area of the circuit can be reduced. As a result, for example, a narrow bezel, high resolution, and high definition of a display device can be realized.
[0349] Note that the semiconductor device and the display device according to one aspect of the present invention are not limited to the semiconductor device and the display device described in this embodiment. At least a part of the structural examples, operation examples, and the drawings corresponding to these examples shown in this embodiment can be appropriately combined with other structural examples, other operation examples, other drawings, and other embodiments shown in other parts of this specification.
[0350] (Embodiment 2) In this embodiment, a semiconductor device according to one aspect of the present invention will be described with reference to FIGS. 28 to Figure 37 A semiconductor device according to one aspect of the present invention includes a transistor and a first insulating layer.
[0351] One aspect of the present invention is a semiconductor device including a transistor and a first insulating layer.
[0352] The transistor includes a first conductive layer, a second conductive layer having an area overlapping with the first conductive layer via a first insulating layer, a semiconductor layer, a gate insulating layer, and a gate electrode. The second conductive layer has a first opening in an area overlapping with the first conductive layer. The first insulating layer has a second opening reaching the first conductive layer in an area overlapping with the first opening. The semiconductor layer contacts the top surface of the first conductive layer, the side surface of the first insulating layer, and the side surface of the second conductive layer in the first opening and the second opening. A gate insulating layer is provided on the semiconductor layer, and a gate electrode is provided on the gate insulating layer. In the transistor, the first conductive layer is used as one of the source electrode and the drain electrode, and the second conductive layer is used as the other of the source electrode and the drain electrode. In the transistor, the source electrode, the semiconductor layer having a channel formation area, and the drain electrode can be overlapped, so that the occupied area can be reduced. In addition, the area of the semiconductor layer in contact with the first insulating layer is used as the channel formation area. As a result, the channel length of the transistor can be made smaller than the limiting resolution of the exposure device, and a transistor with a large on-state current can be realized.
[0353] The semiconductor layer preferably contains a metal oxide. In addition, the first insulating layer preferably uses a material that releases oxygen. Thus, oxygen can be supplied from the first insulating layer to the semiconductor layer (especially, the channel formation region), so that oxygen vacancies (also called V O :Oxygen Vacancy).
[0354] In a transistor with a small channel length, the more oxygen is supplied from the first insulating layer to the semiconductor layer, the better. In addition, the oxygen diffusion coefficient of the first insulating layer is preferably large. Specifically, the oxygen diffusion coefficient of the first insulating layer at 350°C is preferably 5×10 -12 cm 2 / sec or more. As a result, the diffusion rate of oxygen in the first insulating layer is increased, and oxygen can be effectively supplied to the semiconductor layer. Therefore, even a transistor with a small channel length can have excellent electrical characteristics and high reliability at the same time.
[0355] <Structural Example 1> A semiconductor device according to one embodiment of the present invention will be described. Figure 28A A top view (also referred to as a plan view) of the semiconductor device 10 is shown. Figure 28B Shown along Figure 28A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Figure 28C A cross-sectional view along the dot-dash line B1-B2 is shown. Figure 28A In the diagram, a portion of the components of the semiconductor device 10 (such as an insulating layer) is omitted. Figure 28A Similarly, some components are omitted in the following drawings.
[0356] The semiconductor device 10 includes a transistor 100, a transistor 200, a capacitor element 150, and an insulating layer 110. The transistor 100, the transistor 200, and the capacitor element 150 are provided on a substrate 102. The transistor 100 and the transistor 200 have different structures. In addition, the transistor 100, the transistor 200, and the capacitor element 150 can be formed by making some processes common.
[0357] The transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b. In the transistor 100, the conductive layer 104 is used as a gate electrode (also referred to as a first gate electrode). A part of the insulating layer 106 is used as a gate insulating layer (also referred to as a first gate insulating layer). The conductive layer 112a is used as one of a source electrode and a drain electrode, and the conductive layer 112b is used as the other of the source electrode and the drain electrode. Each layer constituting the transistor 100 may have a single-layer structure or a stacked structure.
[0358] The conductive layer 112a is provided on the substrate 102, and the insulating layer 110 is provided on the conductive layer 112a. The insulating layer 110 is provided so as to cover the top surface and the side surface of the conductive layer 112a. The insulating layer 110 has an opening 141 reaching the conductive layer 112a in a region overlapping with the conductive layer 112a. It can also be said that the conductive layer 112a is exposed in the opening 141.
[0359] The conductive layer 112b is provided on the insulating layer 110. The conductive layer 112b has a region overlapping with the conductive layer 112a with the insulating layer 110 therebetween. The conductive layer 112b has an opening 143 in a region overlapping with the conductive layer 112a. The opening 143 is provided in a region overlapping with the opening 141.
[0360] The opening 141 and the opening 143 have a columnar shape with a circular or approximately circular top surface. By adopting the above structure, for example, miniaturization, high integration, high density, and small size of the semiconductor device can be achieved. In addition, the side surfaces of the opening 141 and the opening 143 are preferably perpendicular to the top surface of the conductive layer 112a.
[0361] At least a part of the semiconductor layer 108 is disposed so as to cover the opening 141 and the opening 143. The semiconductor layer 108 has regions in contact with the top surface and the side surface of the conductive layer 112b, the side surface of the insulating layer 110, and the top surface of the conductive layer 112a. The semiconductor layer 108 is electrically connected to the conductive layer 112a through the opening 141 and the opening 143. The semiconductor layer 108 has a shape along the top surface and the side surface of the conductive layer 112b, the side surface of the insulating layer 110, and the top surface of the conductive layer 112a. The semiconductor layer 108 has a region overlapping with the conductive layer 112a with the insulating layer 110 therebetween. It can also be said that the insulating layer 110 has a region sandwiched between the conductive layer 112a and the semiconductor layer 108. That is to say, a part of the semiconductor layer 108 is disposed inside the opening 141 and the opening 143.
[0362] The region of the semiconductor layer 108 in contact with the conductive layer 112a is used as one of the source region and the drain region, and the region in contact with the conductive layer 112b is used as the other of the source region and the drain region. In the semiconductor layer 108, a channel formation region is provided between the source region and the drain region.
[0363] At least a part of the insulating layer 106 is disposed so as to cover the opening 141 and the opening 143. The insulating layer 106 is disposed on the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110. The insulating layer 106 has regions in contact with the top surface and the side surface of the semiconductor layer 108, the top surface and the side surface of the conductive layer 112b, and the top surface of the insulating layer 110. The insulating layer 106 has a shape along the top surface and the side surface of the semiconductor layer 108, the top surface and the side surface of the conductive layer 112b, and the top surface of the insulating layer 110.
[0364] The conductive layer 104 is disposed on the insulating layer 106 and includes a region in contact with the top surface of the insulating layer 106. The conductive layer 104 includes a region overlapping with the semiconductor layer 108 with the insulating layer 106 therebetween. The conductive layer 104 has a shape along the top surface shape of the insulating layer 106. In addition, the conductive layer 104 may be disposed so as to fill the opening 141 and the opening 143.
[0365] The transistor 100 is a so-called top-gate transistor including a gate electrode above the semiconductor layer 108. Furthermore, since the bottom surface of the semiconductor layer 108 is in contact with the conductive layers 112a and 112b serving as the source electrode and the drain electrode, it can be said to be a TGBC (Top Gate Bottom Contact) type transistor. In addition, in the transistor 100, the heights of the source electrode and the drain electrode with respect to the surface of the substrate 102 of the formed surface are different from each other, and a drain current flows in the longitudinal direction (also referred to as the height direction, the depth direction when viewed from above, or the direction perpendicular to the formed surface (the surface of the substrate 102)). It can also be said that the channel length direction in the transistor 100 includes a component in the longitudinal direction. Therefore, a transistor such as the transistor 100 according to one embodiment of the present invention can be referred to as a longitudinal transistor, a vertical transistor, a vertical channel transistor, a vertical channel type transistor, or a VFET (Vertical Field Effect Transistor), etc.
[0366] The channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 (specifically, the insulating layer 110b) provided between the conductive layer 112a and the conductive layer 112b. Therefore, a transistor having a channel length smaller than the limit resolution of the exposure apparatus used to manufacture the transistor can be manufactured with high precision. In addition, the characteristic non-uniformity between the plurality of transistors 100 can be reduced. Therefore, the operation of the semiconductor device including the transistor 100 is stable, and the reliability can be improved. In addition, when the characteristic non-uniformity is reduced, the degree of freedom in circuit design of the semiconductor device is increased, and the operating voltage of the semiconductor device can also be reduced. Thereby, the power consumption of the semiconductor device can be reduced.
[0367] Since the source electrode, the semiconductor layer having the channel formation region, and the drain electrode can be overlapped and arranged, the occupied area of the transistor 100 can be made much smaller than that of a so-called planar transistor in which the semiconductor layer having the channel formation region is arranged in a planar shape.
[0368] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can all be used as wirings, and the transistor 100 can be provided in the region where these wirings overlap. That is, in a circuit including the transistor 100 and the wirings, the occupied areas of the transistor 100 and the wirings can be reduced. Therefore, the occupied area of the circuit can be reduced to realize a small semiconductor device.
[0369] The transistor 200 includes a conductive layer 204, conductive layers 212a and 212b, an insulating layer 106, a semiconductor layer 208, an insulating layer 120, and a conductive layer 202. In the transistor 200, the conductive layer 204 is used as a gate electrode (also referred to as a first gate electrode). A part of the insulating layer 106 is used as a gate insulating layer (also referred to as a first gate insulating layer). The conductive layer 202 is used as a back gate electrode (also referred to as a second gate electrode), and a part of the insulating layer 120 is used as a back gate insulating layer (also referred to as a second gate insulating layer). The conductive layer 212a is used as one of a source electrode and a drain electrode, and the conductive layer 212b is used as the other of the source electrode and the drain electrode. Each layer constituting the transistor 200 may have a single-layer structure or a laminated structure. Note that the transistor 200 may not include the conductive layer 202.
[0370] In the semiconductor layer 208, the entire region overlapping with the gate electrode across the gate insulating layer between the source electrode and the drain electrode is used as a channel formation region. The semiconductor layer 208 has a pair of regions 208L sandwiching the channel formation region and a pair of regions 208D outside thereof.
[0371] The regions 208L and 208D are regions containing impurity elements. As such impurity elements, one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, magnesium, silicon, or noble gases, etc. can be used. As typical examples of noble gases, helium, neon, argon, krypton, and xenon can be cited. As impurity elements, one or more of boron, phosphorus, aluminum, magnesium, and silicon are particularly preferably used.
[0372] The impurity elements are supplied (also referred to as added or implanted) to the semiconductor layer 208 using the conductive layer 204, the conductive layer 212a, and the conductive layer 212b as masks. Thus, in the semiconductor layer 208, the region 208D is formed in a region not overlapping with any of the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the insulating layer 106, and the region 208L is formed in a region not overlapping with any of the conductive layer 204, the conductive layer 212a, and the conductive layer 212b and overlapping with the insulating layer 106.
[0373] The region in the semiconductor layer 208 that contacts the conductive layer 212a and the adjacent region 208D are used as one of a source region and a drain region. The region in the semiconductor layer 208 that contacts the conductive layer 212b and the adjacent region 208D are used as the other of the source region and the drain region.
[0374] The conductive layer 202 is provided on the insulating layer 110, and the insulating layer 120 is provided on the conductive layer 202. The insulating layer 120 is provided so as to cover the top surface and the side surfaces of the conductive layer 202. The insulating layer 120 has a portion protruding beyond the end of the conductive layer 202. The end of the insulating layer 120 contacts the top surface of the insulating layer 110.
[0375] A semiconductor layer 208 is provided on the insulating layer 120. The semiconductor layer 208 has a region overlapping with the conductive layer 202 with the insulating layer 120 therebetween. The semiconductor layer 208 may use the same material as the semiconductor layer 108. Additionally, the semiconductor layer 208 may be formed by the same process as the semiconductor layer 108. For example, a film that becomes the semiconductor layer 108 and the semiconductor layer 208 is formed and processed, whereby the semiconductor layer 108 and the semiconductor layer 208 can be formed.
[0376] An insulating layer 106 is provided on the semiconductor layer 208. A part of the insulating layer 106 is used as the gate insulating layer of the transistor 100, and another part of the insulating layer 106 is used as the gate insulating layer of the transistor 200. The insulating layer 106 has openings 147a and 147b in the region overlapping with the semiconductor layer 208.
[0377] A conductive layer 204, a conductive layer 212a, and a conductive layer 212b are provided on the insulating layer 106. The conductive layer 204 has a region overlapping with the semiconductor layer 208 with the insulating layer 106 therebetween. Additionally, the conductive layer 204 has a region overlapping with the conductive layer 202 with the semiconductor layer 208 therebetween. The conductive layer 212a and the conductive layer 212b are provided so as to cover the openings 147a and 147b. The conductive layer 212a is electrically connected to the semiconductor layer 208 through the opening 147a, and the conductive layer 212b is electrically connected to the semiconductor layer 208 through the opening 147b. The conductive layer 204, the conductive layer 212a, and the conductive layer 212b may use the same material as the conductive layer 104. Additionally, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b may be formed by the same process as the conductive layer 104. For example, a film that becomes the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b is formed and processed, whereby the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed.
[0378] The transistor 200 is a planar transistor in which the semiconductor layer 208 is arranged in a planar shape. The transistor 200 is a so-called top-gate type transistor having a gate electrode above the semiconductor layer 208. For example, by adding impurity elements to the semiconductor layer 208 using the conductive layer 204 serving as a mask, regions 208D serving as source regions and drain regions can be formed in a self-aligned manner. The transistor 200 can be said to be a TGSA (Top Gate Self-Aligned) type transistor.
[0379] The transistor 200 can control the channel length by the length of the conductive layer 204. Thus, the channel length of the transistor 200 is a value above the limit resolution of the exposure apparatus used in the manufacture of the transistor. That is to say, the channel length of the transistor 200 can be made larger than the channel length of the transistor 100. By increasing the channel length, a transistor with high saturation can be realized.
[0380] Portions of the transistor 100 with a small channel length and the transistor 200 with a large channel length can be formed together on the same substrate. For example, by using the transistor 100 as a transistor that requires a large on-state current and using the transistor 200 as a transistor that requires high saturation, a high-performance semiconductor device can be realized.
[0381] For example, when the semiconductor device according to one embodiment of the present invention is used in a pixel circuit of a display device, the occupied area of the pixel circuit can be reduced, and a high-definition display device can be realized. Further, for example, when the semiconductor device according to one embodiment of the present invention is used in a driving circuit of a display device (for example, one or both of a gate line driving circuit and a source line driving circuit), the occupied area of the driving circuit can be reduced, and thus a display device with a narrow border can be realized.
[0382] The capacitor element 150 includes the conductive layer 112b and the conductive layer 202 serving as a pair of electrodes, and the insulating layer 120. The conductive layer 112b is used as the other of the source electrode and the drain electrode of the transistor 100, and is also used as one of the pair of electrodes of the capacitor element 150. The conductive layer 202 is used as the back gate electrode of the transistor 200, and is also used as the other of the pair of electrodes of the capacitor element 150. The region between the conductive layer 112b and the conductive layer 202 sandwiching the insulating layer 120 is used as the dielectric of the capacitor element 150. By forming the conductive layer 112b and the conductive layer 202 by different processes, the capacitor element 150 including these conductive layers as a pair of electrodes can be formed. Further, by forming the conductive layer 112b and the conductive layer 202 by different processes, the range of material selection can be expanded by using different materials.
[0383] In Figure 28AAmong others, an example in which the capacitive element 150 is composed of the conductive layer 112b, the conductive layer 202, and the insulating layer 120 is described, but the structure of the capacitive element 150 is not particularly limited. As other structures of the capacitive element 150, for example, an example composed of the conductive layer 212a (or the conductive layer 212b), the conductive layer 112b, and the insulating layer 106 can be cited. In addition, for example, an example composed of the conductive layer 202, the conductive layer 112a, and the insulating layer 110 can be cited. Further, the semiconductor device 10 may not include the capacitive element 150. Note that when the capacitive element 150 composed of the conductive layer 112b, the conductive layer 202, and the insulating layer 120 is not provided, the conductive layer 112b and the conductive layer 202 can be formed by the same process.
[0384] In Figure 28A Among others, the other one of the source electrode and the drain electrode of the transistor 100 is electrically connected to one of the pair of electrodes of the capacitive element 150, and one of the source electrode and the drain electrode of the transistor 200 is electrically connected to the other one of the pair of electrodes of the capacitive element 150, but the electrical connection relationship among the transistor 100, the transistor 200, and the capacitive element 150 is not particularly limited.
[0385] The insulating layer 195 is provided so as to cover the transistor 100, the transistor 200, and the capacitive element 150. The insulating layer 195 is used as a protective layer for the transistor 100, the transistor 200, and the capacitive element 150.
[0386] There is no particular limitation on the semiconductor material used for the semiconductor layer 108 and the semiconductor layer 208. For example, a semiconductor composed of a single element or a compound semiconductor can be used. As the semiconductor composed of a single element, for example, silicon and germanium can be cited. As the compound semiconductor, for example, gallium arsenide and silicon germanium can be cited. In addition, as the compound semiconductor, for example, an organic semiconductor, a nitride semiconductor, and an oxide semiconductor can be cited. Note that these semiconductor materials may also contain impurities as dopants.
[0387] There is no particular limitation on the crystallinity of the semiconductor material used for the semiconductor layer 108 and the semiconductor layer 208, and an amorphous semiconductor, a single crystal semiconductor, or a semiconductor having crystallinity other than single crystal (microcrystalline semiconductor, polycrystalline semiconductor, or a semiconductor having a crystal region in a part thereof) can be used. When a single crystal semiconductor or a semiconductor having crystallinity is used, deterioration of the characteristics of the transistor can be suppressed, which is preferable.
[0388] Both the semiconductor layer 108 and the semiconductor layer 208 can use silicon. Examples of silicon include single-crystalline silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low-temperature polycrystalline silicon (LTPS: Low Temperature PolySilicon). A transistor using amorphous silicon in the channel formation region can be formed on a large glass substrate and can be manufactured at low cost. A transistor using polycrystalline silicon in the channel formation region has a high field-effect mobility and can operate at high speed. In addition, a transistor using microcrystalline silicon in the channel formation region has a higher field-effect mobility than a transistor using amorphous silicon and can operate at high speed.
[0389] Both the semiconductor layer 108 and the semiconductor layer 208 preferably contain a metal oxide (also referred to as an oxide semiconductor) that exhibits semiconductor characteristics.
[0390] The bandgap of the metal oxide used for the semiconductor layer 108 and the semiconductor layer 208 is preferably 2.0 eV or more, and more preferably 2.5 eV or more.
[0391] Compared with a transistor using amorphous silicon, the field-effect mobility of a transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) is very high. In addition, the off-state current of the OS transistor is extremely small, and the charge stored in a capacitor connected in series with the transistor can be maintained for a long time. In addition, by using an OS transistor, the power consumption of the semiconductor device can be reduced.
[0392] [Transistor 100] Use Figures 28A to 28C , Figure 29A And Figure 29B To describe the detailed structure of the transistor 100. Figure 29A And Figure 29B Is Figure 28A And Figure 28B An enlarged view of the transistor 100 shown in
[0393] The insulating layer 110 preferably has one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitridosilicates. Examples of oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, gallium zinc oxide, and hafnium aluminate. Examples of nitrides include silicon nitride and aluminum nitride. Examples of oxynitrides include silicon oxynitride, aluminum oxynitride, gallium oxynitride, yttrium oxynitride, and hafnium oxynitride. Examples of oxynitridosilicates include silicon oxynitridosilicate and aluminum oxynitridosilicate.
[0394] Note that in this specification and the like, an oxynitride refers to a material having more oxygen than nitrogen in its composition. A nitride oxide refers to a material having more nitrogen than oxygen in its composition.
[0395] In the transistor 100, the insulating layer 110 has a region in contact with the semiconductor layer 108. When a metal oxide is used as the semiconductor layer 108, in order to improve the interface characteristics between the semiconductor layer 108 and the insulating layer 110, at least a part of the region of the insulating layer 110 in contact with the semiconductor layer 108 preferably contains oxygen. Specifically, the region of the insulating layer 110 in contact with the channel formation region of the semiconductor layer 108 preferably contains oxygen. One or more of an oxide and an oxynitride can be used for the region of the insulating layer 110 in contact with the channel formation region of the semiconductor layer 108.
[0396] The insulating layer 110 preferably has a stacked structure. Figure 28B Examples in which the insulating layer 110 includes an insulating layer 110a, an insulating layer 110b on the insulating layer 110a, and an insulating layer 110c on the insulating layer 110b are shown.
[0397] The region of the semiconductor layer 108 in contact with the insulating layer 110b is used as a channel formation region. The insulating layer 110b preferably contains oxygen, and one or more of the above-described oxides and oxynitrides are preferably used. Specifically, one or both of silicon oxide and silicon oxynitride can be used for the insulating layer 110b.
[0398] The insulating layer 110b is more preferably a film that releases oxygen by heating. Since the insulating layer 110b releases oxygen due to the heat applied in the manufacturing process of the transistor 100, oxygen can be supplied to the semiconductor layer 108. By supplying oxygen from the insulating layer 110b to the semiconductor layer 108, particularly to the channel formation region, oxygen vacancies (V O ) are repaired, and oxygen vacancies (V O ) can be reduced. Thereby, a transistor having good electrical characteristics and high reliability can be realized.
[0399] For example, by performing a heat treatment in an oxygen-containing atmosphere or a plasma treatment in an oxygen-containing atmosphere, oxygen can be supplied to the insulating layer 110b. Alternatively, an oxide film can be formed on the top surface of the insulating layer 110b by sputtering in an oxygen-containing atmosphere to supply oxygen. Then, the oxide film can be removed.
[0400] In addition, it is preferable to minimize hydrogen in the semiconductor layer 108, particularly hydrogen in the channel formation region. Hydrogen in the semiconductor layer 108 bonds with oxygen vacancies to form V OH (defects formed by hydrogen entering oxygen vacancies), so the transistor characteristics (e.g., the initial Id-Vg characteristics of the transistor or the Id-Vg characteristics in long-term reliability tests, etc.) may deteriorate. Therefore, as the material surrounding the semiconductor layer 108, for example, the material of the insulating layer (e.g., insulating layer 110a, insulating layer 110b, insulating layer 110c, and insulating layer 106, etc.) used to contact the semiconductor layer 108, a material with low hydrogen release is preferably used.
[0401] The insulating layer 110b is preferably formed by a deposition method such as sputtering or plasma-enhanced chemical vapor deposition (PECVD: Plasma Enhanced Chemical Vapor Deposition). In particular, by forming it by using the sputtering method and not using hydrogen gas as the deposition gas, a film with extremely low hydrogen content can be achieved. Therefore, the supply of hydrogen to the channel formation region can be suppressed, and the electrical characteristics of the transistor 100 can be stabilized.
[0402] It is preferred that substances diffuse easily in the insulating layer 110b. In other words, the diffusion coefficient of substances in the insulating layer 110b is preferably large. Particularly preferably, oxygen diffuses easily in the insulating layer 110b. That is, the oxygen diffusion coefficient in the insulating layer 110b is preferably large. The oxygen diffusion in the insulating layer 110b supplies oxygen to the semiconductor layer 108 through the interface between the insulating layer 110b and the semiconductor layer 108. By using the insulating layer 110b in which oxygen diffuses easily, oxygen in the insulating layer 110b can be efficiently supplied to the semiconductor layer 108 (especially, the channel formation region).
[0403] The oxygen diffusion coefficient of the insulating layer 110b at 350 °C is preferably 5×10 -12 cm 2 / sec or more, more preferably 1×10 -11 cm 2 / sec or more, further preferably 5×10 -11 cm 2 / sec or more, still further preferably 1×10 -10 cm 2 / sec or more. Thus, oxygen in the insulating layer 110b can be efficiently supplied to the semiconductor layer 108. Since the diffusion coefficient is preferably large, no particular upper limit is set. In the calculation of the diffusion coefficient, for example, thermal desorption spectroscopy (TDS: Thermal Desorption Spectroscopy) can be used. Or, secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry) can also be used.
[0404] Here, by using a material with high conductivity for the semiconductor layer 108, a transistor with a large on-state current can be realized. However, when using a material with high conductivity, oxygen vacancies (V O ) are easily formed. When the number of oxygen vacancies (V O ) in the channel formation region increases, sometimes the threshold voltage of the transistor drifts and the drain current flowing when the gate voltage is 0 V (hereinafter, also referred to as the cut-off current) increases. For example, in an n-channel transistor, when the threshold voltage drifts negatively, sometimes the cut-off current increases. By providing the insulating layer 110b, oxygen is supplied at least to the region in the semiconductor layer 108 that contacts the insulating layer 110b, that is, the channel formation region. Therefore, the oxygen vacancies (V O ) in the channel formation region can be reduced. As a result, the threshold voltage drift can be suppressed, so a transistor with a small cut-off current and a large on-state current can be realized. Thus, a semiconductor device with low power consumption and high performance can be realized.
[0405] In the semiconductor layer 108, the region in contact with the conductive layer 112a is used as one of the source region and the drain region of the transistor 100, and the region in contact with the conductive layer 112b is used as the other of the source region and the drain region. The source region and the drain region are regions having a lower resistance than the channel formation region. The source region and the drain region can also be said to be regions with a higher carrier concentration or a higher oxygen vacancy density than the channel formation region.
[0406] The insulating layer 110a is provided between the insulating layer 110b and the conductive layer 112a. The insulating layer 110c is provided between the insulating layer 110b and the conductive layer 112b. Preferably, the amount of impurities (for example, hydrogen and water) released from the insulating layer 110a and the insulating layer 110c is small and impurities are not easily permeated. As a result, the diffusion of impurities in the insulating layer 110a and the insulating layer 110c into the channel formation region can be suppressed. Therefore, a transistor with good electrical characteristics and high reliability can be realized.
[0407] Both the insulating layer 110a and the insulating layer 110c are preferably made of a film that does not easily permeate oxygen. As a result, the oxygen in the insulating layer 110b can be suppressed from diffusing through the insulating layer 110a to the conductive layer 112a. Similarly, the oxygen in the insulating layer 110b can be suppressed from diffusing through the insulating layer 110c to the conductive layer 112b. As a result, the increase in the resistance of the conductive layer 112a and the conductive layer 112b can be suppressed. At the same time, the diffusion of oxygen in the insulating layer 110b to the insulating layer 110a side and the insulating layer 110c side can be suppressed. Therefore, the amount of oxygen supplied from the insulating layer 110b to the channel formation region increases, and the oxygen vacancies and V O H in the channel formation region can be reduced.
[0408] By using a film through which oxygen does not easily diffuse for each of the insulating layer 110a and the insulating layer 110c, oxygen can be effectively supplied from the insulating layer 110b to the channel formation region. Note that either one or both of the insulating layer 110a and the insulating layer 110c may not be provided.
[0409] Both the insulating layer 110a and the insulating layer 110c preferably contain nitrogen, and one or more of the above-mentioned nitrides and oxynitrides are preferably used. For example, both the insulating layer 110a and the insulating layer 110c can use silicon nitride or silicon oxynitride. In addition, one or more of oxides and oxynitrides can also be used as one or both of the insulating layer 110a and the insulating layer 110c. For example, both the insulating layer 110a and the insulating layer 110c can use aluminum oxide. Note that the insulating layer 110a can use the same material as the insulating layer 110c or a different material.
[0410] Note that in this specification and the like, different materials refer to materials in which part or all of the constituent elements are different or materials in which the constituent elements are the same but the composition is different.
[0411] The thickness T110a of the insulating layer 110a can be, for example, 3 nm or more, 5 nm or more, 10 nm or more, 20 nm or more, 50 nm or more, or 70 nm or more and less than 1 μm, 500 nm or less, 400 nm or less, 300 nm or less, 200 nm or less, 150 nm or less, or 120 nm or less. As Figure 29B shown, the thickness T110a can be set to the shortest distance between the formed surface of the insulating layer 110a (here, the top surface of the conductive layer 112a) and the bottom surface of the insulating layer 110b in a cross-sectional view.
[0412] When the thickness T110a of the insulating layer 110a is large, sometimes the amount of impurities released by the insulating layer 110a increases and the amount of impurities diffused into the channel formation region increases. On the other hand, when the thickness T110a is small, sometimes the amount of oxygen in the insulating layer 110b diffuses through the insulating layer 110a to the side of the conductive layer 112a and the amount of oxygen supplied to the channel formation region decreases. By setting the thickness T110a within the above range, oxygen vacancies (V O ) and V O H in the channel formation region can be reduced. In addition, oxidation of the conductive layer 112a caused by oxygen in the insulating layer 110b can be suppressed and the resistance of the conductive layer 112a can be prevented from increasing.
[0413] The thickness T110c of the insulating layer 110c can be, for example, 3 nm or more, 5 nm or more, 10 nm or more, 15 nm or more, or 20 nm or more and 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 150 nm or less, 120 nm or less, or 100 nm or less. AsFigure 29B As shown, the thickness T110c can be set to the shortest distance between the formed surface of the insulating layer 110c (here, the top surface of the insulating layer 110b) and the bottom surface of the conductive layer 112b in a cross-sectional view.
[0414] When the thickness T110c of the insulating layer 110c is large, sometimes the amount of impurities released by the insulating layer 110c increases and the amount of impurities diffused into the channel formation region increases. On the other hand, when the thickness T110c is small, sometimes the amount of oxygen in the insulating layer 110b diffuses through the insulating layer 110c to the conductive layer 112b side and the amount of oxygen supplied to the channel formation region decreases. By setting the thickness T110c within the above range, the oxygen vacancies (V O ) and V O H in the channel formation region can be reduced. In addition, oxidation of the conductive layer 112b caused by oxygen in the insulating layer 110b can be suppressed and the resistance of the conductive layer 112b can be prevented from increasing.
[0415] At least one of the region of the semiconductor layer 108 in contact with the insulating layer 110a and the region in contact with the insulating layer 110c may also be a region having a lower resistance than the channel formation region (hereinafter, also referred to as a low-resistance region). This region can also be said to be a region with a higher carrier concentration or a higher oxygen vacancy density than the channel formation region. When a material that releases impurities (e.g., water and hydrogen) is used for the insulating layer 110a, the region in contact with the insulating layer 110a can be a low-resistance region. The semiconductor layer 108 may also have a low-resistance region between the region in contact with the conductive layer 112a (one of the source region and the drain region) and the channel formation region. Similarly, when a material that releases impurities is used for the insulating layer 110c, the region in contact with the insulating layer 110c can be a low-resistance region. The semiconductor layer 108 may have a low-resistance region between the region in contact with the conductive layer 112b (the other of the source region and the drain region) and the channel formation region. The low-resistance region can also be used as a buffer region for mitigating the drain electric field. Note that these low-resistance regions can also be used as the source region or the drain region.
[0416] By providing a low-resistance region between the drain region and the channel formation region, a high electric field is less likely to be generated near the drain region, suppressing the generation of hot carriers, and thus deterioration of the transistor can be suppressed. For example, when the conductive layer 112a is used as the drain electrode and the conductive layer 112b is used as the source electrode, by using the region of the semiconductor layer 108 in contact with the insulating layer 110a as the low-resistance region, a high electric field is less likely to be generated near the drain region, suppressing the generation of hot carriers, and thus deterioration of the transistor can be suppressed. When the conductive layer 112a is used as the source electrode and the conductive layer 112b is used as the drain electrode, by using the region of the semiconductor layer 108 in contact with the insulating layer 110c as the low-resistance region, a high electric field is less likely to be generated near the drain region, suppressing the generation of hot carriers, and thus deterioration of the transistor can be suppressed.
[0417] As described above, when the amount of impurities released by the insulating layer 110a and the insulating layer 110c is excessive, the impurities may diffuse into the channel formation region. Even when a material that releases impurities is used for the insulating layer 110a and the insulating layer 110c, the amount of impurities released is preferably small.
[0418] Note that the insulating layer 110 preferably includes at least the insulating layer 110b. For example, it may not include one or both of the insulating layer 110a and the insulating layer 110c. In addition, the insulating layer 110 may have a stacked structure of two or four or more layers, or may have a single-layer structure.
[0419] There is no limitation on the top surface shape of the opening 141 and the opening 143. For example, it may be circular, elliptical, triangular, quadrilateral (including rectangle, rhombus, square), pentagon, or other polygons, or a shape in which the corners of these polygons are rounded. In addition, the polygon may be a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles less than 180 degrees). As Figure 28A shown, etc., the top surface shape of the opening 141 and the opening 143 is preferably circular. By making the top surface shape of the opening circular, the processing accuracy when forming the opening can be improved, and a fine opening can be formed. Note that in this specification, etc., a circle is not limited to a perfect circle.
[0420] When the top surface shapes of the opening 141 and the opening 143 are formed into a circular or approximately circular shape, the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 are arranged in a concentric shape. As a result, the distance between the conductive layer 104 and the semiconductor layer 108 becomes uniform or substantially uniform, and thus the gate electric field of the semiconductor layer 108 can be applied uniformly or substantially uniformly.
[0421] In this specification and the like, the top surface shape of the opening 141 refers to the shape of the top surface end portion on the side of the opening 141 of the insulating layer 110. The top surface shape of the opening 143 refers to the shape of the bottom surface end portion on the side of the opening 143 of the conductive layer 112b.
[0422] As Figure 28A shown, etc., the top surface shape of the opening 141 and the top surface shape of the opening 143 can be made to be the same or substantially the same. At this time, as Figure 28B and Figure 28C shown, etc., the bottom surface end portion on the side of the opening 143 of the conductive layer 112b and the top surface end portion on the side of the opening 141 of the insulating layer 110 are preferably the same or substantially the same. The bottom surface of the conductive layer 112b refers to the surface on the side of the insulating layer 110. The top surface of the insulating layer 110 refers to the surface on the side of the conductive layer 112b.
[0423] In addition, the top surface shape of the opening 141 and the top surface shape of the opening 143 can also be different. Further, when the top surface shapes of the openings 141 and 143 are circular, the openings 141 and 143 can be either concentric or non-concentric.
[0424] Refer to Figure 29A and Figure 29B to describe the channel length and channel width of the transistor 100. Figure 29A and Figure 29B are Figure 28A and Figure 28B the enlarged views of the transistor 100 shown.
[0425] In Figure 29B , the channel length L100 of the transistor 100 is indicated by a dotted double arrow. The channel length L100 of the transistor 100 corresponds to the length of the side surface on the side of the opening 141 of the insulating layer 110b during cross-section. That is to say, the channel length L100 is determined by the thickness T110b of the insulating layer 110b and the angle θ110 formed by the side surface on the side of the opening 141 of the insulating layer 110b and the formed surface of the insulating layer 110b (here, the top surface of the insulating layer 110a). Therefore, the channel length L100 can be set to a value smaller than the limit resolution of the exposure apparatus, and a micro transistor can be realized. Specifically, a transistor with an extremely small channel length that is difficult to achieve by the exposure apparatuses used in the mass production of existing flat panel displays (for example, with a minimum line width of about 2 μm or 1.5 μm) can be realized. In addition, a transistor with a channel length less than 10 nm can also be realized without using the very expensive exposure apparatuses used in the most advanced LSI technologies.
[0426] The channel length L100 can be, for example, 1 nm or more, 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less. For example, the channel length L100 can be set to 100 nm or more and 1 μm or less.
[0427] By shortening the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100, a circuit capable of operating at high speed can be fabricated. Furthermore, the occupied area of the circuit can be reduced. Therefore, a small semiconductor device can be realized. For example, in the case where the semiconductor device according to one embodiment of the present invention is used in a large display device or a high-definition display device, even when the number of wirings increases, the signal delay of each wiring can be reduced, thereby suppressing display unevenness. In addition, since the occupied area of the circuit can be reduced, the bezel of the display device can be reduced.
[0428] By adjusting the thickness T110b and the angle θ110 of the insulating layer 110b, the channel length L100 can be controlled. Note that, in Figure 29B , the thickness T110b of the insulating layer 110b is indicated by a dotted double arrow.
[0429] The thickness T110b of the insulating layer 110b can be, for example, 1 nm or more, 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less.
[0430] The side surface of the insulating layer 110 on the opening 141 side is preferably perpendicular or tapered. The angle θ110 is preferably 90 degrees or less. By reducing the angle θ110, the coverage of the layer formed on the insulating layer 110 (for example, the semiconductor layer 108) can be improved. In addition, the smaller the angle θ110, the larger the channel length L100 can be, and the larger the angle θ110, the smaller the channel length L100 can be.
[0431] The angle θ110 can be, for example, 30 degrees or more, 35 degrees or more, 40 degrees or more, 45 degrees or more, 50 degrees or more, 55 degrees or more, 60 degrees or more, 65 degrees or more, or 70 degrees or more and 90 degrees or less, 85 degrees or less, or 80 degrees or less. The angle θ110 can also be 75 degrees or less, 70 degrees or less, 65 degrees or less, or 60 degrees or less.
[0432] Note that in Figure 29B etc., a structure is shown in which the shape of the side surface on the opening 141 side of the insulating layer 110 in a cross-sectional view is a straight line, but one embodiment of the present invention is not limited thereto. In a cross-sectional view, the shape of the side surface on the opening 141 side of the insulating layer 110 can be a curve, or can have both a region where the side surface shape is a straight line and a region where the side surface shape is a curve.
[0433] Here, the conductive layer 112b is preferably not provided inside the opening 141. Specifically, the conductive layer 112b preferably does not have a region in contact with the side surface on the opening 141 side of the insulating layer 110. When the conductive layer 112b is also provided inside the opening 141, the channel length L100 of the transistor 100 is shorter than the length of the side surface of the insulating layer 110b, so that the control of the channel length L100 may become difficult. Therefore, it is preferable that the top surface shape of the opening 143 is the same as the top surface shape of the opening 141 or the opening 143 has the opening 141 in a top view.
[0434] In Figure 29A and Figure 29B the width D141 of the opening 141 is indicated by a double-dashed double arrow. Figure 29A An example in which the top surface shape of the opening 141 is a circle is shown. At this time, the width D141 corresponds to the diameter of the circle, and the channel width W100 of the transistor 100 corresponds to the length of the circumference of the circle. That is, the channel width W100 is π×D141. Thus, when the top surface shape of the opening 141 is a circle, a transistor with a smaller channel width W100 can be realized compared to other shapes.
[0435] In addition, when the opening 141 has a top surface shape other than a circle (for example, an approximate circle or a quadrilateral with rounded corners, etc.), for example, the maximum width of the top surface shape can be set as the width D141.
[0436] The width D141 of the opening 141 may vary in the depth direction. As the width D141 of the opening 141, for example, the average value of the diameter at the highest position, the diameter at the lowest position, and the diameter at the position of the midpoint of the insulating layer 110b (or the insulating layer 110) in a cross-sectional view can be used. Or, as the diameter of the opening 141, for example, any one of the diameter at the highest position, the diameter at the lowest position, and the diameter at the position of the midpoint of the insulating layer 110b (or the insulating layer 110) in a cross-sectional view can also be used.
[0437] When forming the opening 141 by photolithography, the width D141 of the opening 141 is above the limit resolution of the exposure apparatus. In the case of using an exposure apparatus for mass production of existing flat panel displays, the width D141 can be, for example, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more and less than 5 μm, 4.5 μm or less, 4 μm or less, 3.5 μm or less, 3 μm or less, 2.5 μm or less, 2 μm or less, 1.5 μm or less, or 1 μm or less. Alternatively, in the case of using an extremely expensive exposure apparatus used in the most advanced LSI technology, the width D141 can be, for example, 5 nm or more, 10 nm or more, or 20 nm or more and 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, or 30 nm or less.
[0438] The channel length L100 of the transistor 100 is preferably at least less than the channel width W100 of the transistor 100. The channel length L100 of the transistor 100 is 0.1 times or more and 0.99 times or less of the channel width W100 of the transistor 100, and preferably 0.5 times or more and 0.8 times or less. By adopting the above structure, a transistor having good electrical characteristics and high reliability can be realized.
[0439] When shortening the channel length L100 of the transistor 100, the insulating layer 110a and the insulating layer 110c preferably use materials that release less hydrogen by themselves. When using a hydrogen-releasing material as the insulating layer 110a and the insulating layer 110c even in a small amount, their thickness is preferably small. For example, when the channel length L100 is 100 nm or less, the thickness T110a of the insulating layer 110a and the thickness T110c of the insulating layer 110c are both preferably 1 nm or more, 3 nm or more, or 5 nm or more and 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. Thereby, the amount of impurities diffused into the channel formation region can be reduced, and a transistor having good electrical characteristics and high reliability even when the channel length L100 is short can be realized.
[0440] Note that here, a structure in which the region in the semiconductor layer 108 that contacts the insulating layer 110b is used as the channel formation region is described as an example, but one aspect of the present invention is not limited thereto. The region in the semiconductor layer 108 that contacts the insulating layer 110a can also be used as the channel formation region. Similarly, the region that contacts the insulating layer 110c can also be used as the channel formation region.
[0441] Figure 28BExamples are shown in which the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 cover the opening 141 and the opening 143 in the transistor 100, but one embodiment of the present invention is not limited thereto. Further, a structure may be provided in which a step is formed by the insulating layer 110 and the conductive layer 112a, and the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 are provided along the step.
[0442] [Transistor 200] Next, Figures 30A to 30C the detailed structure of the transistor 200 will be described. Figures 30A to 30C is Figures 28A to 28C an enlarged view of the transistor 200 shown.
[0443] The channel length of the transistor 200 is the length of the region where the semiconductor layer 208 and the conductive layer 204 overlap between the pair of regions 208D. In Figure 30A and Figure 30B , the channel length L200 of the transistor 200 is indicated by a double-dashed arrow. The channel length L200 of the transistor 200 is determined according to the length of the conductive layer 204 and is a value equal to or greater than the limit resolution of the exposure apparatus used in the manufacture of the transistor. For example, the channel length L200 may be 1.5 μm or more. By increasing the channel length, a transistor with high saturation can be realized.
[0444] The conductive layer 202 serving as the back gate electrode of the transistor 200 preferably extends beyond the end of the channel formation region. Specifically, the conductive layer 202 preferably has a portion protruding beyond the end of the conductive layer 204 in the channel length direction.
[0445] In this specification and the like, for the sake of convenience of explanation, the portion of the semiconductor layer 208 that overlaps with the conductive layer 204 is sometimes referred to as the channel formation region, but in some cases, a channel may also be formed in a portion that does not overlap with the conductive layer 204 but overlaps with the conductive layer 202.
[0446] The channel width of the transistor 200 is the width of the region where the semiconductor layer 208 and the conductive layer 204 overlap in a direction orthogonal to the channel length direction. In Figure 30A and Figure 30C , the channel width W200 of the transistor 200 is indicated by a dotted double arrow.
[0447] As described above, the channel length L100 of the transistor 100 can be set to a value smaller than the limit resolution of the exposure apparatus, and the channel length L200 of the transistor 200 can be set to a value equal to or greater than the limit resolution of the exposure apparatus. For example, by using the transistor 100 as a transistor that needs to have a large on-state current and using the transistor 200 as a transistor that needs to have a high saturation property, a high-performance semiconductor device 10 that utilizes the advantages of each transistor can be realized. Also, some processes can be made common to form the transistor 100 and the transistor 200. Specifically, the semiconductor layer 108 and the semiconductor layer 208 can be formed by the same process. A part of the insulating layer 106 is used as the gate insulating layer of the transistor 100, and another part of the insulating layer 106 is used as the gate insulating layer of the transistor 200. The conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed by the same process. Therefore, the productivity of the semiconductor device 10 can be improved and the manufacturing cost can be reduced.
[0448] As Figure 30A and Figure 30C shown, it is preferable that the conductive layer 204 and the conductive layer 202 protrude outside the end of the semiconductor layer 208 in the channel width direction of the transistor 200. At this time, as Figure 30C shown, the entire semiconductor layer 208 in the channel width direction is covered by the conductive layer 204 and the conductive layer 202 with the insulating layer 106 and the insulating layer 120 therebetween. By adopting such a structure, the electric field generated by a pair of gate electrodes can surround the semiconductor layer 208.
[0449] In Figure 30A and Figure 30C , the conductive layer 204 (i.e., the gate electrode) and the conductive layer 202 (i.e., the back gate electrode) are not electrically connected. A constant potential may be supplied to one of the gate electrode and the back gate electrode, and a signal for driving the transistor 200 may be supplied to the other. At this time, when driving the transistor 200 using the signal supplied to the other of the gate electrode and the back gate electrode, the threshold voltage can be controlled by the potential supplied to one of the gate electrode and the back gate electrode.
[0450] The conductive layer 204 and the conductive layer 202 may also be electrically connected to each other. By supplying the same potential to the gate electrode and the back gate electrode, an electric field for causing a channel can be effectively applied to the semiconductor layer 208, and the on-state current of the transistor 200 can be increased. Therefore, a miniaturized transistor 200 can be realized. For example, an opening reaching the conductive layer 202 may be formed in the insulating layer 106 and the insulating layer 120, and the conductive layer 204 may be formed so as to cover the opening.
[0451] The conductive layer 202 can also be electrically connected to the conductive layer 212a or the conductive layer 212b (i.e., the source electrode or the drain electrode). For example, an opening reaching the conductive layer 202 can be provided in the insulating layer 120, and the conductive layer 212a or the conductive layer 212b can be formed so as to cover the opening.
[0452] The insulating layer 120 provided in contact with the top surface and the side surface of the conductive layer 202 can use the material that can be used for the insulating layer 110.
[0453] The insulating layer 120 preferably has a laminated structure. Figure 30B Structures such as those showing a laminated structure of the insulating layer 120a and the insulating layer 120b on the insulating layer 120a are shown. Both the insulating layer 120a and the insulating layer 120b can use the material that can be used for the insulating layer 110.
[0454] More preferably, a film that releases oxygen by heating is used for the insulating layer 120b in contact with the channel formation region of the semiconductor layer 208. Since the insulating layer 120b releases oxygen due to the heat applied in the manufacturing process of the transistor 200, oxygen can be supplied to the semiconductor layer 208, particularly to the channel formation region of the semiconductor layer 208. Oxygen diffusion in the insulating layer 120b occurs in the insulating layer 120b and is supplied to the semiconductor layer 208 through the interface between the insulating layer 120b and the semiconductor layer 208. By supplying oxygen from the insulating layer 120b to the semiconductor layer 208, particularly to the channel formation region, oxygen vacancies (V O ) can be repaired, and oxygen vacancies (V O ) can be reduced. Thereby, a transistor having good electrical characteristics and high reliability can be realized.
[0455] The oxygen diffusion coefficient of the insulating layer 120b at 350 °C is preferably 1×10 -12 cm 2 / sec or more, and more preferably 5×10 -12 cm 2 / sec or more.
[0456] The insulating layer 120b can use the material that can be used for the insulating layer 110b. The insulating layer 120b preferably contains oxygen and can use one or more of oxides and oxynitrides. Specifically, the insulating layer 120b can use, for example, silicon oxide or silicon oxynitride.
[0457] Here, compared with the transistor 100 having a small channel length, in the transistor 200 having a large channel length, oxygen vacancies (V O ) and V OThe influence of H on the electrical characteristics is very small. Therefore, the amount of oxygen supplied from the insulating layer 120b to the semiconductor layer 208 can also be less than the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108. The amount of oxygen released from the insulating layer 120b can also be less than the amount of oxygen released from the insulating layer 110b.
[0458] The diffusion coefficient of the substance in the insulating layer 110b is preferably larger than the diffusion coefficient of the substance in the insulating layer 120b. In particular, the oxygen diffusion coefficient in the insulating layer 110b is preferably larger than the oxygen diffusion coefficient in the insulating layer 120b. Thus, the transistor 100 with a small channel length can also be a transistor with good electrical characteristics and high reliability.
[0459] The insulating layer 120a in contact with the conductive layer 202 is preferably made of a material in which the metal elements contained in the conductive layer 202 do not easily diffuse. Thus, it is possible to suppress the metal elements contained in the conductive layer 202 from diffusing through the insulating layer 120 into the channel formation region of the semiconductor layer 208.
[0460] The insulating layer 120a is preferably made of a material that can be used for the insulating layer 110a and the insulating layer 110c. The insulating layer 120a preferably contains nitrogen and can use one or more of nitrides and oxynitrides. Specifically, the insulating layer 120a can use, for example, silicon nitride. Alternatively, the insulating layer 120a can also use one or more of oxides and oxynitrides. The insulating layer 120a can use, for example, aluminum oxide. Note that the insulating layer 120a, the insulating layer 110a, and the insulating layer 110c can use the same material or different materials.
[0461] Preferably, the impurities (such as water and hydrogen) released from the insulating layer 120a itself are few. Thus, it is possible to suppress the impurities contained in the insulating layer 120a from diffusing through the insulating layer 120b into the channel formation region of the semiconductor layer 208, and a transistor with good electrical characteristics and high reliability can be realized.
[0462] Note that the case where the insulating layer 120 has a stacked structure of two layers is shown here, but one embodiment of the present invention is not limited thereto. The insulating layer 120 can have a stacked structure of three or more layers or a single-layer structure.
[0463] The insulating layer 120 is preferably provided in at least the region in contact with the channel formation region of the semiconductor layer 208 and is provided so as to cover the top surface and the side surface of the conductive layer 202. Figure 30BAmong others, the semiconductor layer 208 has a portion protruding beyond the end of the insulating layer 120. The semiconductor layer 208 has a region in contact with the side surface of the insulating layer 120. A part of the end of the semiconductor layer 208 is in contact with the top surface of the insulating layer 120, and another part is in contact with the top surface of the insulating layer 110. It can also be said that a part of the bottom surface of the semiconductor layer 208 is in contact with the top surface of the insulating layer 120, and another part is in contact with the top surface of the insulating layer 110. Alternatively, the insulating layer 120 can be disposed in the region where the semiconductor layer 208 is provided so that the entire bottom surface of the semiconductor layer 208 is in contact with the top surface of the insulating layer 120.
[0464] Note that Figure 30B Examples such as those shown indicate that the thickness of the semiconductor layer 208 is uniform at any position, but one embodiment of the present invention is not limited thereto. The thickness can also be different between the region of the semiconductor layer 208 overlapping with the insulating layer 106 and the region not overlapping with the insulating layer 106. For example, when forming the openings 147a and 147b, sometimes a part of the semiconductor layer 208 is removed, and the thickness of the region of the semiconductor layer 208 not overlapping with the insulating layer 106 is smaller than the thickness of the region overlapping with the insulating layer 106. Alternatively, the thickness can also be different between the region of the semiconductor layer 208 overlapping with any one of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b and the region not overlapping with any one of them. For example, when forming the conductive layers 212a and 212b, sometimes a part of the semiconductor layer 208 is removed, and the thickness of the region of the semiconductor layer 208 not overlapping with any one of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b is smaller than the thickness of the region overlapping with any one of them. Alternatively, the thickness can also be different between the region of the semiconductor layer 208 overlapping with the insulating layer 106, the region overlapping with any one of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b, and the region not overlapping with any one of them.
[0465] In the semiconductor layer 208, the region 208D is a region with a lower resistance than the channel formation region. The region 208D can be said to be a region with a higher carrier concentration, a higher oxygen vacancy density, or a higher impurity concentration than the channel formation region.
[0466] The region 208L is a region with an equal or lower resistance than the channel formation region. The region 208L can also be said to be a region with an equal or higher carrier concentration, an equal or higher oxygen vacancy density, or an equal or higher impurity concentration than the channel formation region. And, the region 208L is a region with an equal or higher resistance than the region 208D. The region 208L can also be said to be a region with an equal or lower carrier concentration, an equal or lower oxygen vacancy density, or an equal or lower impurity concentration than the region 208D.
[0467] Region 208L is used as a buffer region for alleviating the drain electric field. Since region 208L does not overlap with the conductive layer 204, hardly any channel is formed when a gate voltage is supplied to the conductive layer 204. The carrier concentration in region 208L is preferably higher than that in the channel formation region. Thus, region 208L can be used as an LDD (Lightly Doped Drain) region. By providing region 208L, which serves as an LDD region, between the channel formation region and region 208D, a transistor 200 with high drain breakdown voltage can be realized.
[0468] The carrier concentration of the semiconductor layer 208 preferably has the following distribution: the lowest in the channel formation region, and increasing in the order of region 208L and region 208D. By providing region 208L between the channel formation region and region 208D, even if impurities such as hydrogen diffuse from region 208D during the manufacturing process, the carrier concentration in the channel formation region can be maintained extremely low.
[0469] Note that the carrier concentration in region 208L may also be non-uniform, and sometimes has a gradient that is lower on the side closer to the channel formation region from the side of region 208D. For example, it may also have a gradient in which one or both of the hydrogen concentration and the oxygen vacancy (V O ) concentration in region 208L is lower on the side closer to the channel formation region from the side of region 208D.
[0470] In addition, when impurity elements are added to the semiconductor layer 208 to form regions 208L and 208D, the conductive layer 104 can also be used as a mask and the impurity elements can be supplied to the semiconductor layer 108 through the insulating layer 106. Thus, region 108L is formed in the region of the semiconductor layer 108 that does not overlap with the conductive layer 104. Note that in the transistor 100, the region of the semiconductor layer 108 that contacts the conductive layer 112b is used as a source region or a drain region. Region 108L is formed in a part of this source region or drain region. Note that the impurity element concentration of region 108L may also be different from that of region 208L. In addition, region 108L may not be formed. For example, when the conductive layer 104 extends and covers the end of the semiconductor layer 108, the entire semiconductor layer 108 is covered by the conductive layer 104, so the semiconductor layer 108 is not supplied with impurity elements and region 108L is not formed.
[0471] As Figure 30A and Figure 30BAs shown, a part of the ends of the conductive layers 212a and 212b is preferably located inside the openings 147a and 147b. In other words, in the openings 147a and 147b, a part of the ends of the conductive layers 212a and 212b preferably contacts the semiconductor layer 208. Thereby, the region in contact with the conductive layer 212a can be adjacent to one of the pair of regions 208D, and similarly, the region in contact with the conductive layer 212b can be adjacent to the other of the pair of regions 208D.
[0472] Note that there is no particular limitation on the top surface shape of the openings 147a and 147b. The top surface shape of the openings 147a and 147b can be a shape usable for the openings 141 and 143. Figure 30A FIGS. etc. show that the top surface shapes of the openings 147a and 147b are different from the top surface shapes of the openings 141 and 143, that is, a structure with a quadrangle having rounded corners, but one embodiment of the present invention is not limited thereto. The top surface shapes of the openings 147a and 147b can also be the same as the top surface shapes of the openings 141 and 143.
[0473] In addition, a structure is shown here in which the conductive layers 212a and 212b are formed by the same process as the conductive layer 204, but one embodiment of the present invention is not limited thereto. The conductive layers 212a and 212b can also be formed by a process different from that of the conductive layer 204. For example, the conductive layers 104 and 204 are formed on the insulating layer 106, and the conductive layer 204 is used as a mask to supply impurity elements to the semiconductor layer 208, thereby forming the source region and the drain region. The insulating layer 195 can be formed on the conductive layers 104 and 204, and openings reaching the source region and openings reaching the drain region are formed in the insulating layer 106 and the insulating layer 195, and the conductive layers 212a and 212b are formed so as to cover these openings.
[0474] 〔Semiconductor Layers 108 and 208〕 The metal oxides that can be used for semiconductor layer 108 and semiconductor layer 208 will be specifically described. Examples of the metal oxides include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains at least indium or zinc. In addition, the metal oxide preferably contains two or three selected from indium, element M, and zinc. Note that element M is a metal element or a metalloid element with a high bond energy with oxygen, for example, a metal element or a metalloid element with a higher bond energy with oxygen than indium. Specific examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and further preferably one or more of gallium and tin. Note that in this specification and the like, metal elements and metalloid elements are sometimes collectively referred to as "metal elements", and the "metal elements" described in this specification and the like sometimes include metalloid elements.
[0475] For semiconductor layer 108 and semiconductor layer 208, for example, indium oxide (In oxide), indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide, also denoted as ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (In-W oxide, also denoted as IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also denoted as GZO), aluminum zinc oxide (Al-Zn oxide, also denoted as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also denoted as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also denoted as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also denoted as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also denoted as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also denoted as IGAZO, IGZAO, or IAGZO), etc. can be used. Alternatively, indium tin oxide containing silicon (also denoted as ITSO), gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc. can be used. In addition, materials not containing Zn, such as indium oxide, have a high affinity with the Si process and are therefore preferred. On the other hand, materials containing Zn can improve crystallinity and are therefore preferred.
[0476] When increasing the proportion of the number of indium atoms to the sum of the number of atoms of all metal elements in the metal oxide, the field-effect mobility of the transistor can be increased. In addition, a transistor with a large on-state current can be achieved.
[0477] Note that the metal oxide may also replace indium or contain one or more metal elements with a large period number in addition to indium. There is a tendency that the larger the orbital overlap of the metal element, the greater the carrier conduction in the metal oxide. Therefore, by including a metal element with a large period number, the field-effect mobility of the transistor can sometimes be increased. As the metal element with a large period number, a metal element belonging to the fifth period and a metal element belonging to the sixth period etc. can be cited. Specifically, as this metal element, yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium etc. can be cited. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.
[0478] The metal oxide may also contain one or more non-metal elements. When the metal oxide contains a non-metal element, sometimes the carrier concentration increases or the bandgap becomes narrow etc., and the field-effect mobility of the transistor can be increased. As the non-metal element, for example, carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen etc. can be cited.
[0479] When the ratio of the number of zinc atoms to the sum of the number of atoms of all metal elements in the metal oxide is increased, the metal oxide has high crystallinity, and impurity diffusion in the metal oxide can be suppressed. Therefore, variations in the electrical characteristics of the transistor are suppressed and the reliability can be improved.
[0480] When the ratio of the number of atoms of element M to the sum of the number of atoms of all metal elements in the metal oxide is increased, formation of oxygen vacancies (V O ) in the metal oxide can be suppressed. Therefore, generation of carriers due to the oxygen vacancies (V O ) is suppressed, and a transistor with a small off-state current can be formed. In addition, variations in the electrical characteristics of the transistor are suppressed and the reliability can be improved.
[0481] Depending on the composition of the metal oxide used for the semiconductor layer 108 and the semiconductor layer 208, the electrical characteristics and reliability of the transistor are different. Therefore, by varying the composition of the metal oxide according to the electrical characteristics and reliability required for the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be realized.
[0482] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. Examples of the atomic ratios of the metal elements in such an In-M-Zn oxide include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:3, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, In:M:Zn = 6:1:6, In:M:Zn = 10:1:1, In:M:Zn = 10:1:3, In:M:Zn = 10:1:4, In:M:Zn = 10:1:6, In:M:Zn = 10:1:7, In:M:Zn = 10:1:8, In:M:Zn = 5:2:5, In:M:Zn = 10:1:10, In:M:Zn = 20:1:10, In:M:Zn = 40:1:10, and compositions in the vicinity thereof. In addition, the compositions in the vicinity include the range of ±30% of the desired atomic ratio. By increasing the atomic ratio of indium in the metal oxide, the on-state current of the transistor can be increased or the field-effect mobility can be improved, etc.
[0483] The atomic ratio of In in the In-M-Zn oxide can also be less than the atomic ratio of M. Examples of the atomic ratios of the metal elements in such an In-M-Zn oxide include In:M:Zn = 1:3:2, In:M:Zn = 1:3:3, In:M:Zn = 1:3:4, and compositions in the vicinity thereof. By increasing the proportion of the atomic number of M in the metal oxide, the generation of oxygen vacancies (V O ) can be suppressed.
[0484] Note that when multiple metal elements are included as element M, the total of the atomic ratios of the metal elements can be the atomic ratio of element M.
[0485] In this specification, etc., the atomic ratio of indium to the sum of the atomic numbers of all the contained metal elements is sometimes referred to as the indium content rate. The same applies to other metal elements.
[0486] By using a material with a high indium content rate for the semiconductor layer 108 and the semiconductor layer 208, the on-state current of the transistor can be increased or the field-effect mobility can be improved, etc. And by including element M, the generation of oxygen vacancies (V O)。The content ratio of element M (the ratio of the number of atoms of element M to the sum of the number of atoms of all the contained metal elements) is preferably 0.1% or more and 3% or less, more preferably 0.1% or more and 2% or less. Thereby, a transistor with good electrical characteristics can be realized. For example, metal oxides such as In:M:Zn = 40:1:10 and those around it are preferably used. Element M is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium. Specifically, metal oxides such as In:Sn:Zn = 40:1:10 and those around it can be used. Alternatively, metal oxides such as In:Al:Zn = 40:1:10 and those around it can be used.
[0487] Here, when a polycrystalline metal oxide is used for the semiconductor layer 108 and the semiconductor layer 208, grain boundaries become recombination centers and trap carriers, so the on-state current of the transistor sometimes becomes small. When using a metal oxide having a composition that easily becomes a polycrystalline structure, an element that hinders crystallization is preferably included. For example, indium tin oxide containing silicon (ITSO) is less likely to become a polycrystalline structure compared to indium tin oxide (ITO), so it can be used for the semiconductor layer 108 and the semiconductor layer 208. When using ITSO, the content ratio of silicon (the ratio of the number of atoms of silicon to the sum of the number of atoms of all the contained metal elements) is preferably 1% or more and 20% or less, more preferably 3% or more and 20% or less, more preferably 3% or more and 15% or less, more preferably 5% or more and 15% or less. Specifically, metal oxides such as In:Sn:Si = 45:5:4, In:Sn:Si = 95:5:8, and those around them can be used.
[0488] In the composition analysis of the semiconductor layer 108 and the semiconductor layer 208, for example, energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectrometry (XPS), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma atomic emission spectrometry (ICP-AES) can be used. Alternatively, multiple of the above methods can also be combined for analysis. Note that elements with low content ratios are sometimes affected by the analysis accuracy, and the actual content ratio is different from the content ratio obtained by analysis. For example, when the content ratio of element M is low, the content ratio of element M obtained by analysis is sometimes lower than the actual content ratio.
[0489] The metal oxide can be formed by a sputtering method or an atomic layer deposition (ALD) method. Note that when the metal oxide is formed by the sputtering method, the composition of the formed metal oxide is sometimes different from that of the sputtering target. In particular, the content rate of zinc in the formed metal oxide sometimes decreases to about 50% of the sputtering target.
[0490] The semiconductor layer 108 and the semiconductor layer 208 may also have a stacked structure including two or more metal oxide layers. The compositions of the two or more metal oxide layers included in the semiconductor layer 108 and the semiconductor layer 208 may be the same as or substantially the same as each other. By adopting a stacked structure of metal oxide layers having the same composition, for example, it can be formed using the same sputtering target, and thus the manufacturing cost can be reduced.
[0491] The compositions of the two or more metal oxide layers included in the semiconductor layer 108 and the semiconductor layer 208 may also be different from each other. For example, a stacked structure of a first metal oxide layer having a composition of In:M:Zn = 1:3:4 [atomic ratio] or around it and a second metal oxide layer having a composition of In:M:Zn = 1:1:1 [atomic ratio] or around it provided on the first metal oxide layer can be used. In addition, gallium, aluminum, or tin is particularly preferably used as the element M. The element M in the first metal oxide layer and the second metal oxide layer may be the same or different from each other. For example, the first metal oxide layer and the second metal oxide layer may also be IGZO layers having different compositions from each other.
[0492] For example, a stacked structure of a first metal oxide layer having a composition of In:Zn = 4:1 [atomic ratio] or around it and a second metal oxide layer having a composition of In:M:Zn = 1:1:1 [atomic ratio] or around it provided on the first metal oxide layer can be used.
[0493] For example, a stacked structure selected from any one of indium oxide, indium gallium oxide, and IGZO and any one of IAZO, IAGZO, and ITZO (registered trademark) can be used.
[0494] Note that when having a stacked structure including a first metal oxide layer containing a first metal oxide and a second metal oxide layer containing a second metal oxide and the composition of the first metal oxide is the same as or substantially the same as that of the second metal oxide, it is sometimes difficult to clearly confirm the boundary (interface) between the first metal oxide layer and the second metal oxide layer.
[0495] The semiconductor layer 108 and the semiconductor layer 208 preferably include a crystalline metal oxide. As the structure of the crystalline metal oxide, for example, a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, or a nano-crystal (nc) structure can be cited. By using a crystalline metal oxide layer, the density of defect states in the semiconductor layer 108 and the semiconductor layer 208 can be reduced, and thus a highly reliable semiconductor device can be realized.
[0496] By using a metal oxide with high crystallinity in the channel formation region, the density of defect states in the channel formation region can be reduced. On the other hand, by using a metal oxide with low crystallinity, a transistor capable of flowing a large current can be realized.
[0497] When forming a metal oxide by sputtering, the higher the substrate temperature during formation, the more a metal oxide with high crystallinity can be formed. The substrate temperature during formation can be adjusted, for example, according to the temperature of the stage on which the substrate is placed during formation. In addition, the higher the flow ratio of oxygen gas to the total deposition gas used during formation (hereinafter, also referred to as the oxygen flow ratio) or the oxygen partial pressure in the processing chamber, the more a metal oxide with high crystallinity can be formed.
[0498] The crystallinity of the semiconductor layer 108 and the semiconductor layer 208 can be analyzed, for example, by an X-ray diffraction (XRD) pattern, a transmission electron microscope (TEM) image, or an electron diffraction (ED) pattern. Alternatively, multiple of the above methods can be combined for analysis.
[0499] When using a metal oxide for the semiconductor layer 108 and the semiconductor layer 208, it is preferable to minimize V O H in the channel formation region to make it highly pure intrinsic or substantially highly pure intrinsic. To obtain such a metal oxide with sufficiently reduced V O H, it is important to remove impurities such as water and hydrogen in the metal oxide (sometimes referred to as dehydration or dehydrogenation treatment); and supply oxygen to the metal oxide to repair oxygen vacancies (V O ). By using a metal oxide with sufficiently reduced impurities such as V O H in the channel formation region of a transistor, stable electrical characteristics can be imparted. Note that the treatment of supplying oxygen to the metal oxide to repair oxygen vacancies (V O ) is sometimes referred to as an oxidation treatment.
[0500] When using a metal oxide for the semiconductor layer 108 and the semiconductor layer 208, the carrier concentration in the channel formation region is preferably 1×1018 cm -3 Hereinafter, it is more preferably less than 1×10 17 cm -3 and further preferably less than 1×10 16 cm -3 and further preferably less than 1×10 13 cm -3 and further preferably less than 1×10 12 cm -3 Note that there is no limitation on the lower limit value of the carrier concentration in the channel formation region. For example, it can be 1×10 -9 cm -3 .
[0501] The OS transistor has small electrical characteristic variations caused by irradiated radiation, that is, it has high tolerance to radiation. Therefore, it can be used even in an environment where radiation may be incident. The OS transistor can also be said to have high reliability for radiation. For example, the OS transistor can be used in the pixel circuit of an X-ray flat panel detector. In addition, the OS transistor can be used in semiconductor devices used in outer space. As the radiation, electromagnetic radiation (e.g., X-rays and γ-rays) and particle radiation (e.g., α-rays, β-rays, proton radiation, and neutron radiation) can be cited.
[0502] The semiconductor layer 108 and the semiconductor layer 208 may also contain a layered material used as a semiconductor. The layered material is a general term for a group of materials having a layered crystal structure. The layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked by a bond weaker than covalent bonds or ionic bonds such as van der Waals bonding. The layered material has high conductivity in the unit layer, that is, it has high two-dimensional conductivity. By using a material used as a semiconductor and having high two-dimensional conductivity for the channel formation region, a transistor with a large on-state current can be provided.
[0503] As the above-mentioned layered material, for example, graphene, silicene, chalcogenide, etc. can be cited. Chalcogenide is a compound containing a chalcogen element (belonging to Group 16 elements). In addition, as chalcogenide, transition metal chalcogenide, Group 13 chalcogenide, etc. can be cited. As the transition metal chalcogenide that can be used in the channel formation region of a transistor, specifically, molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), etc. can be cited.
[0504] [[Conductive layer 112a, conductive layer 112b, conductive layer 104, conductive layer 204, conductive layer 212a, conductive layer 212b, conductive layer 202]] The conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202 can have either a single-layer structure or a laminated structure of two or more layers. As materials that can be used for the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, and alloys containing one or more of the above metals as components can be cited. A low-resistance conductive material containing one or more of copper, silver, gold, and aluminum can be used for the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202. Among them, copper or aluminum is particularly advantageous in terms of mass productivity and is therefore preferred.
[0505] The conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202 can use a conductive metal oxide (oxide conductor). As the oxide conductor (OC: Oxide Conductor), for example, indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (also referred to as ITO or ITSO containing silicon), zinc oxide doped with gallium, and In-Ga-Zn oxide can be cited. In particular, a conductive oxide containing indium is preferably used because of its high conductivity.
[0506] Oxygen vacancies (V O ) are formed in a metal oxide having semiconductor characteristics, and hydrogen is added to the oxygen vacancies (V O ) to form donor energy levels near the conduction band. As a result, the conductivity of the metal oxide increases and it becomes a conductor. The metal oxide that becomes a conductor can be called an oxide conductor.
[0507] As the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202, a laminated structure of a conductive film containing the above oxide conductor (metal oxide) and a conductive film containing a metal or an alloy can also be adopted. By using a conductive film containing a metal or an alloy, the wiring resistance can be reduced.
[0508] As the conductive layers 112a, 112b, 104, 204, 212a, 212b, and 202, a Cu-X alloy film (where X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can also be applied. By using a Cu-X alloy film, processing can be performed by a wet etching method, thereby reducing the manufacturing cost.
[0509] Note that the materials for the conductive layers 112a, 112b, 104, 204, 212a, 212b, and 202 can be the same or different.
[0510] The conductive layers 112a and 112b have regions in contact with the semiconductor layer 108. In the case where a metal oxide is used as the semiconductor layer 108, there is a concern that when a metal that is easily oxidized (e.g., aluminum) is used as the conductive layers 112a and 112b, an insulating oxide (e.g., aluminum oxide) is formed between the conductive layer 112a and the semiconductor layer 108 and between the conductive layer 112b and the semiconductor layer 108, hindering their conduction. Therefore, the conductive layers 112a and 112b are preferably made of a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or an oxide conductive material.
[0511] As the conductive layers 112a and 112b, for example, titanium, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, and an oxide containing lanthanum and nickel are preferably used. Since these materials are conductive materials that are not easily oxidized or materials that maintain a low resistance even when oxidized, they are preferred. Note that when the conductive layer 112a has a stacked structure, at least the layer in contact with the semiconductor layer 108 is preferably made of a conductive material that is not easily oxidized.
[0512] The conductive layers 112a and 112b can use the above-mentioned oxide conductors. Specifically, conductive oxides such as indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn oxide containing silicon, or zinc oxide added with gallium can be used.
[0513] The conductive layers 112a and 112b can also use nitride conductors. Examples of nitride conductors include tantalum nitride and titanium nitride.
[0514] Here, in the capacitive element 150, a conductive layer 112b is provided on the insulating layer 120b. As described above, the conductive layer 112b preferably uses a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or an oxide conductive material. Also, the amount of oxygen released from the insulating layer 120b is less than the amount of oxygen released from the insulating layer 110b. Therefore, the possibility that the conductive layer 112b in the region in contact with the insulating layer 120b is oxidized and the resistance of the conductive layer 112b becomes high is very low.
[0515] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 may each have a laminated structure. For example, the conductive layer 112a may have a two-layer structure. That is, the conductive layer 112a may have, for example, a laminated structure of a conductive layer 112a_1 (not shown) and a conductive layer 112a_2 (not shown) on the conductive layer 112a_1.
[0516] The conductive layer 112a_2 in the region in contact with the semiconductor layer 108 preferably uses a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or an oxide conductive material. The materials that can be used for the conductive layer 112a_2 can be referred to the description of the conductive layer 112a.
[0517] The conductive layer 112a_1 does not have a region in contact with the semiconductor layer 108, so there is no particular limitation on the material used. For example, the conductive layer 112a_1 preferably uses a material having a lower resistivity than the conductive layer 112a_2. Thereby, the resistance of the conductive layer 112a can be reduced. For example, the conductive layer 112a_2 can use In-Sn-Si oxide (ITSO), and the conductive layer 112a_1 can use copper or tungsten.
[0518] In addition, the thickness of the conductive layer 112a_1 and the thickness of the conductive layer 112a_2 may be the same or substantially the same, or may be different. For example, a material having a lower resistivity than the conductive layer 112a_2 can be used for the conductive layer 112a_1 and the thickness of the conductive layer 112a_1 can be made larger than the thickness of the conductive layer 112a_2. Thereby, the resistance of the conductive layer 112a can be reduced.
[0519] The end of the conductive layer 112a_2 and the end of the conductive layer 112a_1 may be aligned or substantially aligned, or may not be aligned. For example, the conductive layer 112a_2 may be provided so as to cover the conductive layer 112a_1. That is, the conductive layer 112a_2 is in contact with the top surface and the side surface of the conductive layer 112a_1. It can also be said that the conductive layer 112a_2 has a portion protruding from the end of the conductive layer 112a_1.
[0520] In addition, the structure of the conductive layer 112a described above can also be used for other structural examples.
[0521] 〔Insulating layer 106〕 The insulating layer 106 may have a single-layer structure or a laminated structure of two or more layers. The insulating layer 106 preferably includes one or more inorganic insulating films. As materials that can be used for the inorganic insulating film, for example, oxides, nitrides, oxynitrides, and nitrogen oxides can be cited. The insulating layer 106 can use the materials that can be used for the insulating layer 110.
[0522] The insulating layer 106 has regions in contact with the semiconductor layer 108 and the semiconductor layer 208. When the semiconductor layer 108 and the semiconductor layer 208 use metal oxides, at least the film in the insulating layer 106 that is in contact with the semiconductor layer 108 and the semiconductor layer 208 preferably uses any one of the above-mentioned oxides and oxynitrides. In addition, the insulating layer 106 preferably uses a film that releases oxygen by heating.
[0523] Specifically, when the insulating layer 106 has a single-layer structure, the insulating layer 106 preferably uses an oxide or an oxynitride. Specifically, the insulating layer 106 can use silicon oxide or silicon oxynitride.
[0524] When the insulating layer 106 has a laminated structure, preferably, the insulating film on the side in contact with the semiconductor layer 108 and the semiconductor layer 208 contains an oxide or an oxynitride, and the insulating film on the side in contact with the conductive layer 104 and the conductive layer 204 contains a nitride or a nitrogen oxide. As the oxide or oxynitride, for example, silicon oxide or silicon oxynitride can be used. As the nitride or nitrogen oxide, for example, silicon nitride or silicon oxynitride can be used.
[0525] Silicon nitride and silicon oxynitride have the characteristics that the amount of impurities released from themselves (for example, water and hydrogen) is small and it is not easy for oxygen and hydrogen to permeate, so they can be used as the insulating layer 106. Since the diffusion of impurities from the insulating layer 106 to the semiconductor layer 108 and the semiconductor layer 208 is suppressed, the electrical characteristics and reliability of the transistor can be improved.
[0526] Note that in a micro transistor, when the thickness of the gate insulating layer is small, sometimes the gate leakage current increases. By using a material with a relatively high relative dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to achieve low voltage during transistor operation while maintaining the physical thickness. As high-k materials that can be used for the insulating layer 106, for example, gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium can be cited.
[0527] 〔Insulating layer 195〕 The insulating layer 195 used as a protective layer for the transistor 100, the transistor 200, and the capacitive element 150 preferably uses a material in which impurities do not easily diffuse. By providing the insulating layer 195, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, thereby improving the reliability of the semiconductor device. Examples of the impurities include water and hydrogen.
[0528] The insulating layer 195 may be an insulating layer containing an inorganic material or an insulating layer containing an organic material. For example, the insulating layer 195 may use an inorganic material such as an oxide, an oxynitride, a nitride oxide, or a nitride. More specifically, one or more of silicon nitride, silicon oxynitride, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate may be used. As the organic material, for example, one or more of an acrylic resin and a polyimide resin may be used. A photosensitive material may also be used as the organic material. In addition, two or more of the above insulating films may be laminated and used. The insulating layer 195 may also have a laminated structure of an insulating layer containing an inorganic material and an insulating layer containing an organic material.
[0529] 〔Substrate 102〕 Although there is no particular limitation on the material of the substrate 102, it is at least necessary to have heat resistance capable of withstanding subsequent heat treatment. For example, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate made of silicon germanium or the like, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate may be used as the substrate 102. In addition, semiconductor elements may be provided on the substrate 102. Note that the shapes of the semiconductor substrate and the insulating substrate may be circular or angular.
[0530] As the substrate 102, a flexible substrate may also be used, and the transistor 100 or the like may be directly formed on the flexible substrate. Alternatively, a release layer may be provided between the substrate 102 and the transistor 100 or the like. By providing the release layer, after manufacturing a part or all of the semiconductor device on the release layer, it can be separated from the substrate 102 and transferred to another substrate. At this time, the transistor 100 or the like may also be transferred to a substrate with low heat resistance or a flexible substrate.
[0531] In one aspect of the present invention, for example, in the semiconductor device 60 shown in Embodiment 1, at least one of the transistors constituting the semiconductor device 60 preferably uses a vertical transistor such as the transistor 100. In addition, for example, the transistor 200 may be used as the driving transistors (transistors M11 and M18) and the load transistors (transistors M12 and M19), and the capacitive element 150 may be used as the capacitor C11.
[0532] In one aspect of the present invention, for example, in the semiconductor device 20A shown in Embodiment 1, vertical transistors such as transistor 100 are preferably used as transistors M1 and transistors M3 to M6. For example, transistor 200 may be used as transistor M2, and capacitive elements 150 may be used as capacitors C1 and C2.
[0533] <Structural Example 2> Figure 31 A cross-sectional view of transistor 100A of a semiconductor device that can be used in one aspect of the present invention is shown. The main difference between transistor 100A and Figure 28B the transistor 100 shown, etc., is that it includes a back gate. Note that the description of the above transistor 100 can be referred to, and thus detailed description is omitted.
[0534] Transistor 100A includes conductive layer 112a, conductive layer 103, insulating layer 107, insulating layer 110, semiconductor layer 108, conductive layer 112b, insulating layer 106, and conductive layer 104. Each layer constituting transistor 100A may have a single-layer structure or a stacked structure.
[0535] Conductive layer 112a is provided on substrate 102. Conductive layer 112a is used as one of the source electrode and the drain electrode of transistor 100A.
[0536] Insulating layer 107 is located on conductive layer 112a. Insulating layer 107 is provided so as to cover the top surface and side surfaces of conductive layer 112a.
[0537] Conductive layer 103 is located on insulating layer 107. Conductive layer 112a and conductive layer 103 are electrically insulated from each other by insulating layer 107. An opening 148 reaching insulating layer 107 is provided in the region of conductive layer 103 that overlaps conductive layer 112a.
[0538] Insulating layer 110 is provided on insulating layer 107 and conductive layer 103. Insulating layer 110 is provided so as to cover the top surface and side surfaces of conductive layer 103 and the top surface of insulating layer 107.
[0539] Insulating layer 110 preferably has a stacked structure. Figure 31 An example of a stacked structure of insulating layer 110 having insulating layer 110a, insulating layer 110b on insulating layer 110a, and insulating layer 110c on insulating layer 110b is shown.
[0540] Insulating layer 110a is located on insulating layer 107 and conductive layer 103. Insulating layer 110a is provided so as to cover the top surface and side surfaces of conductive layer 103. Insulating layer 110a is provided so as to cover a part of opening 148. Insulating layer 110a is in contact with insulating layer 107 through this opening 148.
[0541] An insulating layer 110b is provided on the insulating layer 110a, and an insulating layer 110c is provided on the insulating layer 110b. An opening 141 reaching the conductive layer 112a is provided in the insulating layer 107 and the insulating layer 110.
[0542] The conductive layer 112b is located on the insulating layer 110c. An opening 143 overlapping the opening 141 is provided in the conductive layer 112b. The conductive layer 112b is used as the other of the source electrode and the drain electrode of the transistor 100A. The conductive layer 112b has a region overlapping the conductive layer 112a with the insulating layer 107 and the insulating layer 110 therebetween.
[0543] In this specification and the like, the top surface shape of the opening 148 refers to the shape of the top surface end portion or the bottom surface end portion on the side of the opening 148 of the conductive layer 103. Note that, similar to the openings 141 and 143, there is no limitation on the top surface shape of the opening 148.
[0544] When the top surface shapes of the openings 141 and 148 are circular, the openings 141 and 148 are preferably concentric. Thereby, the shortest distances between the semiconductor layer 108 and the conductive layer 103 on the left and right sides of the opening 141 can be made equal in a cross-sectional view. Additionally, the openings 141 and 148 are sometimes not concentric.
[0545] The semiconductor layer 108 is in contact with the top surface of the conductive layer 112a, the side surfaces of the insulating layer 107, the side surfaces of the insulating layer 110, and the top surface and side surfaces of the conductive layer 112b. The semiconductor layer 108 is provided so as to cover the openings 141 and 143. The semiconductor layer 108 is provided so as to be in contact with the side surfaces on the side of the opening 141 in the insulating layer 107 and the insulating layer 110 and the end portions (which can also be said to be a part of the top surface and the side surfaces on the side of the opening 143) on the side of the opening 143 in the conductive layer 112b. The semiconductor layer 108 is in contact with the conductive layer 112a through the openings 141 and 143.
[0546] Figure 31 An example where the end portion of the semiconductor layer 108 is in contact with the top surface of the conductive layer 112b is shown, but one aspect of the present invention is not limited thereto. The semiconductor layer 108 may also cover the end portion of the conductive layer 112b, and the end portion of the semiconductor layer 108 may also be in contact with the top surface of the insulating layer 110c.
[0547] The insulating layer 106 is located on the insulating layer 110c, the semiconductor layer 108, and the conductive layer 112b. The insulating layer 106 is provided so as to cover the openings 141 and 143 with the semiconductor layer 108 therebetween. A part of the insulating layer 106 is used as the gate insulating layer of the transistor 100A.
[0548] The conductive layer 104 is located on the insulating layer 106. The conductive layer 104 overlaps with the semiconductor layer 108 across the insulating layer 106. The conductive layer 104 is used as the gate electrode of the transistor.
[0549] In the transistor 100A, the semiconductor layer 108 has a region that overlaps with the conductive layer 104 across the insulating layer 106 and overlaps with the conductive layer 103 across a part of the insulating layer 110 (specifically, the insulating layer 110a and the insulating layer 110b). In other words, there is a region in the semiconductor layer 108 that is clamped by the conductive layer 104 and the conductive layer 103, where the insulating layer 106 is sandwiched between the semiconductor layer 108 and the conductive layer 104 and a part of the insulating layer 110 (specifically, the insulating layer 110a and the insulating layer 110b) is sandwiched between the semiconductor layer 108 and the conductive layer 103.
[0550] The conductive layer 103 is used as the back gate electrode of the transistor 100A. In addition, a part of the insulating layer 110 is used as the back gate insulating layer of the transistor 100A.
[0551] By providing a back gate electrode in the transistor 100A, the potential of the back channel side of the semiconductor layer 108 can be fixed, and the saturation of the transistor 100A can be improved.
[0552] Since the transistor 100A includes a back gate electrode, the potential of the back channel side of the semiconductor layer 108 can be fixed, and the drift of the threshold voltage can be suppressed. Here, when the threshold voltage of the transistor drifts, the drain current flowing when the gate voltage is 0V (hereinafter, also referred to as the cut-off current) sometimes becomes large. By suppressing the drift of the threshold voltage of the transistor 100A, a transistor with a small cut-off current can be realized. Note that the state with a small cut-off current is sometimes referred to as normally off.
[0553] Note that Figure 31 An example in which the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 cover the openings 141 and 143 is shown, but one embodiment of the present invention is not limited thereto. It is also possible to form a step by the insulating layer 107, the insulating layer 110, and the conductive layer 112b and the conductive layer 112a, and arrange the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 along the step.
[0554] <Structural Example 3> Figure 32A A longitudinal sectional view of the transistor 100B1 of the semiconductor device that can be used in one embodiment of the present invention passing through the center of the opening 141 is shown. In addition, Figure 32B A cross-sectional view of the conductive layer 112b including the opening 143 of the transistor 100B1 when viewed from the top surface side is shown.
[0555] On one side of the opening 141 of the insulating layer 110 in the transistor 100B1, the side surface has a vertical shape, and it is mainly different from the Figure 28B transistor 100 shown, etc. That is to say, the transistor 100B1 has a Figure 29B structure in which the angle θ110 in it is 90 degrees. In addition, the main difference between the transistor 100B1 and the Figure 28B transistor 100 shown, etc. is that in the former, the insulating layer 110 is a single layer; the conductive layer 104 is arranged in a manner of filling the opening 141 and the opening 143; and the conductive layer 104 extends to and covers the end of the semiconductor layer 108 (that is, the region 108L is not formed). Note that the description of the above transistor 100 can be referred to, so the detailed description is omitted.
[0556] <Structural Example 4> Figure 33A A longitudinal sectional view of the transistor 100B2 of the semiconductor device that can be used in one embodiment of the present invention passing through the center of the opening 141 and including the conductive layer 112b is shown. In addition, Figure 33B A cross-sectional view of the conductive layer 112b including the opening 143 of the transistor 100B2 is shown when viewed from the top surface side. The main difference between the transistor 100B2 and the transistor 100B1 is that the former does not include the conductive layer 112a; the former is arranged on the insulating layer 105; the former includes the conductive layer 112b1 and the conductive layer 112b2 instead of the conductive layer 112b; the shape of the semiconductor layer 108. The conductive layer 112b1 is used as one of the source electrode and the drain electrode, and the conductive layer 112b2 is used as the other of the source electrode and the drain electrode.
[0557] The semiconductor layer 108 has an annular shape. Specifically, the semiconductor layer 108 has a region in contact with the side surface of the conductive layer 112b1, a region in contact with the side surface of the conductive layer 112b2, and a region in contact with the side surface of the insulating layer 110 in the opening 141 and the opening 143. Here, the semiconductor layer 108 does not contact the top surfaces of the conductive layer 112b1 and the conductive layer 112b2. The semiconductor layer 108 of this shape can be formed, for example, by using anisotropic etching.
[0558] As Figure 33B shown, the widths H112b of the conductive layer 112b1 and the conductive layer 112b2 are smaller than the width D141 of the opening 141 and the opening 143. At this time, the circumferential direction of the opening 141 and the opening 143 corresponds to the channel length direction of the transistor 100B2. Here, since the semiconductor layer 108 has an annular shape, there are two current paths (i.e., channels) from the conductive layer 112b1 to the conductive layer 112b2. In addition, the semiconductor layer 108 only needs to contact both the conductive layer 112b1 and the conductive layer 112b2, and does not need to have an annular shape.
[0559] The channel length can be controlled according to the shapes and sizes of the openings 141 and 143. For example, in the case of increasing the channel length, it is sufficient to increase the perimeters of the openings 141 and 143. Additionally, although an example is shown in which the openings 141 and 143 are circular when viewed from the top surface, one aspect of the present invention is not limited thereto. The openings 141 and 143 when viewed from the top surface may have shapes other than circular, such as an ellipse or a quadrilateral with rounded corners, for example. Further, for example, they may have a regular polygon such as an equilateral triangle, a square, or a regular pentagon, or a polygon other than a regular polygon. Further, for example, when a concave polygon such as a star-shaped polygon having at least one interior angle exceeding 180 degrees is employed, the channel width can be increased. In addition to this, for example, an ellipse, a polygon with rounded corners, or a closed curve formed by combining a straight line and a curve, etc. At this time, the maximum width of the openings 141 and 143 is preferably appropriately calculated according to the shape of the uppermost part of the openings 141 and 143. For example, in the case where the opening when viewed from the top surface is a square or a rectangle, the maximum width of the openings 141 and 143 is preferably the length of the diagonal of the uppermost part of the openings 141 and 143.
[0560] In addition, as Figure 33A shown, the height of the semiconductor layer 108 is the channel width W100 of the transistor 100B2. Therefore, the channel width W100 of the transistor 100B2 can be controlled according to the thickness of the insulating layer 110. Therefore, the channel width of the transistor 100B2 can be set to an extremely fine structure below the exposure limit of photolithography (for example, 1 nm or more, 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less).
[0561] In the transistor 100B2, the heights of the source electrode and the drain electrode with respect to the surface of the substrate 102 as the formation surface are the same, and the drain current flows in a direction parallel or substantially parallel to the surface of the substrate 102. In the transistor 100B2, it can also be said that the drain current flows in the lateral direction or a substantially lateral direction. Therefore, the transistor 100B2 of one aspect of the present invention can be referred to as, for example, a VLFET (Vertical Lateral Field Effect Transistor), etc.
[0562] In the transistor 100B1, the channel length can be made extremely small and the channel width can be increased. As a result, a large on-current can be achieved. On the other hand, in the transistor 100B2, the chann...
Claims
1. A semiconductor device, comprising: A transmission section; An input section; An output section; A generation section; A first wiring; And A second wiring, Wherein, the transmission section includes a first transistor, The gate of the first transistor is electrically connected to the first wiring through the input section, One of the source and drain of the first transistor is electrically connected to the second wiring through the output section, The first wiring is electrically connected to the second wiring through the generation section and the output section, The transmission section has a function as a source follower that outputs a first potential to one of the source and drain of the first transistor according to the potential input to the gate of the first transistor, The generation section has a function of generating a second potential corresponding to the potential of the first wiring, The input section has a function of holding a voltage equivalent to the threshold voltage of the first transistor and a function of transmitting a potential corresponding to the potential of the first wiring to the gate of the first transistor, And, the output section has a function of transmitting the first potential to the second wiring and a function of transmitting the second potential to the second wiring.
2. A semiconductor device, comprising: A transmission section; An input section; An output section; A generation section; A first wiring; A second wiring; A third wiring; A fourth wiring; A fifth wiring; A sixth wiring; A seventh wiring; An eighth wiring; A ninth wiring; A tenth wiring; An eleventh wiring; A twelfth wiring; A thirteenth wiring; and A fourteenth wiring, Wherein, the transmission section includes a first transistor and a second transistor, The input section includes a third transistor, a fourth transistor, a fifth transistor and a first capacitor, The output section includes a sixth transistor and a seventh transistor, The generation section includes an eighth transistor and a ninth transistor, The gate of the first transistor is electrically connected to one of the source and drain of the fifth transistor and one terminal of the first capacitor, One of the source and drain of the first transistor is electrically connected to one of the source and drain of the second transistor, one of the source and drain of the fourth transistor and one of the source and drain of the sixth transistor, The other of the source and drain of the first transistor is electrically connected to the third wiring, The gate of the second transistor is electrically connected to the fourth wiring, The other of the source and drain of the second transistor is electrically connected to the fifth wiring, The gate of the third transistor is electrically connected to the sixth wiring, One of the source and drain of the third transistor is electrically connected to the other of the source and drain of the fourth transistor and the other terminal of the first capacitor, The other of the source and drain of the third transistor is electrically connected to the gate of the eighth transistor and the first wiring, The gate of the fourth transistor is electrically connected to the seventh wiring, The gate of the fifth transistor is electrically connected to the eighth wiring, The other of the source and drain of the fifth transistor is electrically connected to the ninth wiring, The gate of the sixth transistor is electrically connected to the tenth wiring, The other of the source and drain of the sixth transistor is electrically connected to one of the source and drain of the seventh transistor and the second wiring. The gate of the seventh transistor is electrically connected to the eleventh wiring. The other of the source and drain of the seventh transistor is electrically connected to one of the source and drain of the eighth transistor and one of the source and drain of the ninth transistor. The other of the source and drain of the eighth transistor is electrically connected to the twelfth wiring. The gate of the ninth transistor is electrically connected to the thirteenth wiring. And, the other of the source and drain of the ninth transistor is electrically connected to the fourteenth wiring.
3. The semiconductor device according to claim 2, wherein the first capacitor has a function of holding a voltage equivalent to the threshold voltage of the first transistor.
4. The semiconductor device according to claim 3, wherein there is a first state in which the fourth transistor, the fifth transistor, and the seventh transistor are in an on state and the third transistor and the sixth transistor are in an off state.
5. The semiconductor device according to any one of claims 1 to 4, wherein the first transistor includes a semiconductor layer, and the semiconductor layer contains an oxide semiconductor.
6. The semiconductor device according to claim 5, wherein at least a part of the semiconductor layer is provided inside an opening formed in an insulating layer.
7. The semiconductor device according to claim 6, wherein the transistors included in each of the transfer portion, the input portion, the output portion, and the generation portion are formed by the same process as the first transistor.
8. A display device, comprising: The semiconductor device according to any one of claims 1 to 4; and a pixel, wherein the pixel includes a tenth transistor, and one of the source and drain of the tenth transistor is electrically connected to the second wiring.
9. The display device according to claim 8, wherein the first transistor includes a semiconductor layer, and the semiconductor layer contains an oxide semiconductor.
10. The display device according to claim 9, wherein at least a part of the semiconductor layer is provided inside an opening formed in an insulating layer.
11. The display device according to claim 10, wherein the transistors included in each of the transfer portion, the input portion, the output portion, the generation portion, and the pixel are formed by the same process as the first transistor.
Citation Information
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