Arc fault detection method based on digital phase-locked loop

Through digital phase-locked loop technology combined with SOGI virtual orthogonal signal and discrete wavelet transformation, the problems of high error rate and response hysteresis in arc fault detection are solved, and efficient and reliable detection of arc faults are achieved.

CN120370110APending Publication Date: 2025-07-25CHINA THREE GORGES UNIV
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Patent Information

Application Number
CN202510501571.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-21
Publication Date
2025-07-25

AI Technical Summary

Technical Problem

In the prior art, arc fault detection methods have high error judgment rate, poor response hysteresis and poor environmental adaptability, making it difficult to effectively integrate the dynamic tracking ability of the digital phase-locked loop and multi-dimensional analysis of arc characteristics, resulting in insufficient detection reliability.

Method used

The arc fault detection method based on digital phase-locking loop is adopted, and the current signal is collected through the current transformer, and the rectangular stationary coordinate system is constructed using the SOGI virtual orthogonal signal algorithm to perform synchronous rotation coordinate transformation and the PI controller locking phase. The high-frequency coefficient is analyzed in combination with discrete wavelet transformation, and the threshold is set to judge the arc fault.

Benefits of technology

It realizes the accurate distinction between normal zero-off and abnormal current changes caused by arc fault detection, improves the accuracy and reliability of detection, and can trigger alarms in a timely manner.

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Abstract

The invention discloses an arc fault detection method based on a digital phase-locked loop technology, and the method comprises the steps: obtaining the current of a distribution line through a current transformer, and converting the current into a processable electric signal; constructing a two-phase right-angle static coordinate system by using an SOGI virtual orthogonal signal algorithm, and converting a current signal into two paths of orthogonal signals; synchronous rotation coordinate transformation is carried out, and phase locking at the zero point of the current signal is realized through a PI controller; discrete wavelet transform is carried out to analyze the obtained wavelet coefficient, and feature information related to the arc fault is extracted; according to the method, normal zeroing and current abnormal change caused by the arc fault can be effectively distinguished during arc fault detection; wavelet transformation can well capture the high-frequency components and focus the high-frequency components to local features of the signals, so that arc fault detection is more accurate and reliable.
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Description

Technical Field

[0001] The present invention belongs to the field of fault detection and early warning, and particularly relates to an arc fault detection method based on a digital phase-locked loop. Background Art

[0002] In recent years, digital phase-locked loops have been widely used in the fields of power synchronization and signal processing due to their high-precision phase tracking, strong anti-interference ability, and algorithm programmability. However, arc faults are a serious safety hazard in power systems and may cause electrical fires or equipment damage. Traditional arc fault detection methods rely on current amplitude thresholds, fixed-band filtering, or single-parameter analysis, resulting in high false alarm rates, response lags, and poor adaptability to complex working conditions. Analog phase-locked loops are limited by hardware drift and insufficient dynamic performance, making it difficult to accurately track phase mutations. Although digital phase-locked loops have the advantages of high-precision phase synchronization and anti-interference, the existing technologies have not effectively integrated their dynamic tracking ability with multi-dimensional analysis of arc characteristics, resulting in insufficient detection reliability.

[0003] Therefore, it is necessary to propose an arc fault detection method based on a digital phase-locked loop to solve the above problems. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide an arc fault detection method based on a digital phase-locked loop, aiming to solve the problems of high false alarm rate, response lag, and poor environmental adaptability in traditional solutions. By using high-precision phase synchronization, adaptive frequency-domain analysis, and multi-parameter fusion technologies, the safety and reliability of the power system are improved.

[0005] To solve the above technical problems, the technical solution adopted by the present invention is: An arc fault detection method based on a digital phase-locked loop, comprising the following steps: S1, Collect the current signal. Install a current transformer at the data acquisition point of the distribution line to ensure that it can accurately measure the current in the distribution line; connect the output end of the current transformer to the input end of the acquisition circuit, and then condition and convert the current signal to obtain the current signal of the distribution line; S2, Lock the phase at the signal zero point; S3, Determine the signal phase range: Integrate ω to obtain the synchronous rotation angle θ, and set the phase range as ; S4, Perform discrete wavelet transform. Use the MCU to perform discrete wavelet transform on the input signal and then analyze the signal: S5, Detection of arc faults: The modulus value of the high-frequency coefficient at each scale and the set threshold at to within a range for comparison. If within to the high-frequency coefficient modulus value exceeds the set threshold , it indicates the existence of an arc fault, and then triggers the alarm device.

[0006] Preferably, step S2 specifically includes: Input current signal , using the method of virtual orthogonal signals based on SOGI to construct a two-phase rectangular stationary coordinate system, and converting the line current signal into two orthogonal current signals through the orthogonal signal algorithm, namely the current signal in phase with the input signal and the current signal lagging degrees ; Perform a synchronous rotational coordinate transformation on the vector formed by the two signals to obtain and in the rotational coordinate system; Continuously adjust the angular velocity of the rotational coordinate system through a PI controller until equals to complete the phase locking of the zero-crossing moment of the current signal.

[0007] Preferably, step S4 specifically includes: According to the characteristics of the arc current signal, select an appropriate mother wavelet , determine the decomposition scale and the translation parameter ; Use the selected mother wavelet , decomposition scale and translation parameter to perform a discrete wavelet transform on the arc current signal, thereby generating a series of signal feature wavelet coefficients at different scales and different positions ; Analyze the obtained wavelet coefficients and extract the characteristic information related to the arc fault, including identifying abnormal high-frequency coefficients; Calculate the modulus value of the high-frequency coefficients at each scale to quantify its magnitude; Set a reasonable threshold according to the signal characteristics and application requirements.

[0008] Preferably, in step S2, a two-phase rectangular stationary coordinate system is constructed. For the virtual orthogonal signal algorithm based on SOGI, respectively for the transfer function is: ; ; Wherein, is the resonance frequency, is a complex variable, are respectively the Laplace transforms of is a variable parameter of the entire virtual orthogonal signal algorithm. As increases, both the gain and bandwidth of the controller increase.

[0009] Furthermore, in the transfer function and Bode plot, the amplitude gain of the system at the resonance frequency is . The system reduces the interference of the harmonic signal on the phase-locked loop by attenuating the harmonic amplitude of the input signal.

[0010] Preferably, the phase-frequency characteristic in step S2 shows that the signals and have phase shift angles of and respectively with the input current signal, and are two virtual orthogonal signals; after the above synchronous rotation coordinate transformation, is converted to and in the rotating coordinate system; wherein, is the axis component in the rotating coordinate system, is axis component; by continuously adjusting the angular velocity of the rotating coordinate system, finally is equal to , and at this time, it is considered that the phase locking is successful at the zero point of the current signal.

[0011] Preferably, step S3 includes performing an integration operation on to obtain the synchronous rotation angle , and setting the phase range to be between and , where does not include the phase value at the zero point moment; the formula for discrete wavelet transform is: ; ; Wherein, is a normalization factor used to ensure that the energy of the wavelet transform remains consistent at different scales; is a wavelet function obtained by stretching and translating the mother wavelet, is the converted current digital signal.

[0012] Preferably, when performing one-dimensional discrete wavelet transform on a signal, for an original signal with a sampling frequency of , the following conditions are satisfied: For the low-frequency signal of the th layer, the corresponding frequency band range is: ; For the high-frequency signal of the th layer, the corresponding frequency band range is: .

[0013] Preferably, the device in the current arc detection process in step S5 is composed of a current transformer, a DC power supply, a broadband differential amplifier, and a composite signal integrated circuit.

[0014] Preferably, the arc current signal is converted into a voltage signal by a current transformer and transmitted to a broadband differential amplifier, and the processed voltage signal is input into the composite signal integrated circuit for processing and operation.

[0015] Preferably, in step S1, signal conditioning includes attenuation, amplification, filtering, and isolation; conversion means converting an analog signal into a digital signal through an analog-to-digital converter for easy processing by a microprocessor; if the CT output is AC, rectification or RMS calculation is required.

[0016] Furthermore, when connecting the secondary output terminal of the CT to the input terminal of the acquisition circuit, pay attention to impedance matching to avoid high-voltage danger caused by open circuit. And the secondary side of the CT is prohibited from being open-circuited and needs to be reliably grounded.

[0017] The beneficial effects of the present invention are as follows: In an AC power control circuit, although there is a zero-crossing current interruption phenomenon, the digital phase-locked loop can lock the phase at the zero point of the current signal and reconstruct a standard sine signal with the same frequency and phase as the input AC signal. The above method can effectively distinguish normal zero-crossing interruption and abnormal current changes caused by arc faults during arc fault detection. When an arc fault occurs, the current signal will exhibit abnormal conditions such as additional high-frequency components and amplitude mutations. When the modulus value of the high-frequency coefficient is higher than the set threshold, it is determined that an arc fault has occurred, and wavelet transform can well capture these high-frequency components and focus on the local characteristics of the signal, thus making the arc fault detection more accurate and reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a schematic diagram of the program steps of the method of the present invention; Figure 2 is a schematic diagram of the flow of the method of the present invention; Figure 3 is a block diagram of a second-order generalized integrator (SOGI) algorithm; Figure 4 is the in-phase component of the input signal obtained through the quadrature signal algorithm The transfer function of the input signal Bode of Figure 1 ; Figure 5 is the in-phase component of the input signal obtained by the quadrature signal algorithm The transfer function of the input signal Bode of Figure 2 ; Figure 6 is the block diagram of the phase-locked loop system based on the SOGI algorithm; Figure 7 is the modulus diagram of the high-frequency coefficient; Figure 8 is the schematic diagram of the structure composition of the current arc detection device. Specific implementation mode

[0019] Example 1: As Figure 1 and Figure 2 shown, an arc fault detection method based on a digital phase-locked loop includes the following steps: S1. Collect the current signal. Install the current transformer at the data collection point of the distribution line to ensure that it can accurately measure the current in the distribution line; connect the output end of the current transformer to the input end of the collection circuit, and then condition and convert the current signal to obtain the current signal of the distribution line; S2. Lock the phase at the signal zero point; S3. Determine the signal phase range: Integrate ω to obtain the synchronous rotation angle θ, and set the phase range as ; S4. Perform discrete wavelet transform. Use the MCU to perform discrete wavelet transform on the input signal and then analyze the signal: S5. Detection of arc fault: Compare the modulus of the high-frequency coefficient at each scale with the set threshold in the range from to . If within the range from to , the modulus of the high-frequency coefficient exceeds the set threshold , it indicates the existence of an arc fault, and then triggers the alarm device.

[0020] As Figure 3 shown, preferably, step S2 specifically includes: Input current signal , using the method of virtual orthogonal signals based on SOGI, construct a two-phase rectangular stationary coordinate system, and convert the line current signal into two orthogonal current signals through the orthogonal signal algorithm, that is, the current signal in phase with the input signal and lag degree current signal ; Synchronously rotate the coordinate transformation of the vector composed of two signals to obtain and in the rotating coordinate system; Continuously adjust the angular velocity of the rotating coordinate system through the PI controller until is equal to to complete the phase locking of the zero point moment of the current signal.

[0021] Preferably, step S4 specifically includes: According to the characteristics of the arc current signal, select an appropriate mother wavelet , determine the decomposition scale and translation parameter ; Use the selected mother wavelet , decomposition scale and translation parameter to perform discrete wavelet transform on the arc current signal, and then generate a series of signal feature wavelet coefficients at different scales and different positions ; Analyze the obtained wavelet coefficients and extract the characteristic information related to the arc fault, including identifying abnormal high-frequency coefficients; Calculate the modulus value of the high-frequency coefficients at each scale to quantify its size; set a reasonable threshold according to the signal characteristics and application requirements.

[0022] Preferably, in step S2, a two-phase rectangular stationary coordinate system is constructed. For the virtual orthogonal signal algorithm based on SOGI, respectively for The transfer functions are: ; ; where is the resonant frequency, is the complex variable, are respectively The Laplace transform of; is the variable parameter of the entire virtual orthogonal signal algorithm.

[0023] Such asFigure 4 and Figure 5 as shown when is when for the Bode plot of the transfer function shows that as increases, both the gain and bandwidth of the controller increase; considering the variation of the normal grid frequency between and the harmonic suppression effect, the present invention takes as .

[0024] In the transfer function and the Bode plot, the amplitude gain of the system at the resonant frequency is , and the system reduces the interference of the harmonic signal on the phase-locked loop by attenuating the harmonic amplitude of the input signal.

[0025] Preferably, the phase-frequency characteristic in step S2 shows that the signals and have phase shift angles of and respectively with the input current signal, and they are two virtual orthogonal signals; after the above synchronous rotating coordinate transformation, as Figure 6 shown, is converted to and in the rotating coordinate system; where is the axis component in the rotating coordinate system, is axis component; by continuously adjusting the angular velocity of the rotating coordinate system, finally making equal to , at this time it is considered that the phase-locking is successful at the zero point of the current signal.

[0026] Preferably, step S3 includes performing an integral operation on to obtain the synchronous rotation angle , setting the phase range to be between and , where does not include the phase value at the zero point moment; the formula for discrete wavelet transform is: ; ; where is the normalization factor, used to ensure that the energy of the wavelet transform remains consistent at different scales; is the wavelet function, obtained by stretching and translating the mother wavelet, is the converted current digital signal.

[0027] Preferably, when performing one-dimensional discrete wavelet transform on a signal, for an original signal with a sampling frequency of , the following conditions are satisfied: The frequency band range corresponding to the low-frequency signal of the th layer is: The frequency band range corresponding to the high-frequency signal of the th layer is:

[0028] Preferably, the device in the current arc detection process in step S5 is composed of a current transformer, a DC power supply, a broadband differential amplifier, and a composite signal integrated circuit.

[0029] Preferably, the arc current signal is converted into a voltage signal by the current transformer and transmitted to the broadband differential amplifier, and the processed voltage signal is input into the composite signal integrated circuit for processing and operation.

[0030] Preferably, in step S1, signal conditioning includes attenuation, amplification, filtering, and isolation; conversion means converting the analog signal into a digital signal through an analog-to-digital converter for easy processing by the microprocessor. If the CT output is AC, rectification or RMS calculation is required.

[0031] When connecting the secondary output terminal of the CT to the input terminal of the acquisition circuit, pay attention to impedance matching to avoid high voltage danger caused by open circuit. And the secondary side of the CT is prohibited from being open-circuited and needs to be reliably grounded.

[0032] Embodiment 2: The structure of the current arc detection device is as Figure 8 shown. The device is installed near the power socket and is composed of a current transformer, a DC power supply, a broadband differential amplifier, and a composite signal integrated circuit. First, the DC power supply provides a stable DC voltage for the broadband differential amplifier and the integrated circuit, and the current transformer is connected in series in the main circuit. The arc current signal is converted into a voltage signal by the current transformer and transmitted to the broadband differential amplifier for processing. The processed voltage signal is input into the composite signal integrated circuit for analog-to-digital conversion, and the arc fault characteristics are extracted through discrete wavelet transform. By comparing with the preset threshold, the fault flag is triggered to achieve the early warning function.

[0033] The present invention content specifically introduces an arc fault detection method based on digital phase-locked loop technology. The method mainly includes: First, obtain the distribution line current through a current transformer and convert it into a processable electrical signal; Second, use the SOGI virtual orthogonal signal algorithm to construct a two-phase rectangular stationary coordinate system and convert the current signal into two orthogonal signals; Then, perform synchronous rotational coordinate transformation and achieve phase locking at the zero point of the current signal through a PI controller; Finally, perform discrete wavelet transform to analyze the obtained wavelet coefficients, extract characteristic information related to arc faults, including identifying abnormal high-frequency coefficients, according to the modulus value of the high-frequency coefficients and the set threshold for comparison to judge arc faults and trigger alarms; The processing results are as Figure 7 shown in Figure 7 and Table 1. Figure

[0034] represents the modulus value diagram of the high-frequency coefficients, and Table 1 is the frequency range corresponding to the time-domain waveform diagram after wavelet decomposition and reconstruction.

[0035] As shown in Table 1 and Figure 7 shown, in the AC power regulation circuit, although there is a zero-crossing rest zero phenomenon of the current, the digital phase-locked loop can lock the phase at the zero point of the current signal and reconstruct a standard sine signal with the same frequency and phase as the input AC signal. The above method can effectively distinguish normal rest zero and abnormal current changes caused by arc faults during arc fault detection; When an arc fault occurs, the current signal will have abnormal conditions such as additional high-frequency components and amplitude mutations. When the modulus value of the high-frequency coefficient is higher than the set threshold, it is determined that an arc fault has occurred, and wavelet transform can well capture these high-frequency components and focus on the local characteristics of the signal, thus making arc fault detection more accurate and reliable.

Claims

1. An arc fault detection method based on a digital phase-locked loop, characterized in that, Including the following steps: S1. Collect the current signal, and install the current transformer at the data collection point of the distribution line; Connect the output end of the current transformer to the input end of the acquisition circuit, then condition and convert the current signal to obtain the current signal of the distribution line; S2. Perform phase locking at the signal zero point; S3. Determine the signal phase range: Integrate ω to obtain the synchronous rotation angle θ, and set the phase range as ; S4. Perform discrete wavelet transform, and use the MCU to perform discrete wavelet transform on the input signal and then analyze the signal: S5. Detection of arc fault: The modulus value of the high-frequency coefficient at each scale is compared with the set threshold in the range from to . If within the range from to , the modulus value of the high-frequency coefficient exceeds the set threshold , it indicates the existence of an arc fault, and then triggers the alarm device.

2. The arc fault detection method based on a digital phase-locked loop according to claim 1, characterized in that The specific content of step S2 includes: Input current signal , using the method of virtual orthogonal signals based on SOGI, construct a two-phase right-angle stationary coordinate system, and convert the line current signal into two orthogonal current signals through the orthogonal signal algorithm, that is, the current signal in phase with the input signal and lag -degree current signal ; A vector composed of two signals is subjected to a synchronous rotation coordinate transformation to obtain and in the rotating coordinate system; Continuously adjust the angular velocity of the rotating coordinate system through a PI controller , until equals to complete the phase locking of the zero moment of the current signal.

3. The arc fault detection method based on a digital phase-locked loop according to claim 1, wherein The specific content of step S4 includes: Select a suitable mother wavelet according to the characteristics of the arc current signal , and determine the decomposition scale and the translation parameter ; Using the selected mother wavelet , the decomposition scale and the translation parameter , perform discrete wavelet transform on the arc current signal, and then generate a series of signal feature wavelet coefficients at different scales and different positions ; Analyze the obtained wavelet coefficients, extract the characteristic information related to arc faults, including identifying abnormal high-frequency coefficients; Calculate the modulus value of the high-frequency coefficients at each scale to quantify its magnitude; set a reasonable threshold according to the signal characteristics and application requirements .

4. A method for detecting arc faults based on a digital phase-locked loop according to claim 1, characterized in that In the step S2, a two-phase right-angle stationary coordinate system is constructed. For the virtual orthogonal signal algorithm based on SOGI, it is obtained that Respectively for The transfer function is: ; ; Among them, is the resonant frequency, is a complex variable, are respectively the Laplace transforms of; is a variable parameter of the entire virtual orthogonal signal algorithm. As increases, both the gain and bandwidth of the controller increase.

5. A method for detecting arc faults based on a digital phase-locked loop according to claim 1, characterized in that The phase-frequency characteristic in step S2 indicates that the signals and have phase shift angles of and respectively with the input current signal, and they are two virtual orthogonal signals; after the above synchronous rotating coordinate transformation, is transformed into and in the rotating coordinate system; among them, is the axis component in the rotating coordinate system, and is the axis component; by continuously adjusting the angular velocity of the rotating coordinate system, finally is made equal to , and at this time, it is considered that the phase locking is successful at the zero point of the current signal.

6. The arc fault detection method based on a digital phase-locked loop according to claim 1, characterized in that The step S3 includes performing an integration operation to obtain the synchronous rotation angle , setting the phase range to be to , where does not include the phase value at the zero moment; the formula for discrete wavelet transform is: ; ; Among them, is a normalization factor used to ensure that the energy of the wavelet transform remains consistent at different scales; is a wavelet function obtained by dilating and translating the mother wavelet, is the converted digital current signal.

7. According to the arc fault detection method based on a digital phase-locked loop described in claim 6, characterized in that When performing a one-dimensional discrete wavelet transform on a signal, for an original signal with a sampling frequency of the following conditions are satisfied: The frequency band range corresponding to the low-frequency signal of the th layer is: The frequency band range corresponding to the high-frequency signal of the th layer is:

8. A method for detecting arc faults based on a digital phase-locked loop according to claim 1, characterized in that In the device during the current arc detection process in step S5, it is composed of a current transformer, a DC power supply, a wide-band differential amplifier, and a composite signal integrated circuit.

9. The arc fault detection method based on a digital phase-locked loop according to claim 8, characterized in that, The arc current signal is converted into a voltage signal by the current transformer and transmitted to the wide-band differential amplifier, and the processed voltage signal is input into the composite signal integrated circuit for processing and operation.

10. A method for detecting arc faults based on a digital phase-locked loop according to claim 1, characterized in that, In step S1, signal conditioning includes attenuation, amplification, filtering, and isolation; conversion means converting the analog signal into a digital signal through an analog-to-digital converter for easy processing by the microprocessor.