Method and device for loading multi-chip logic in embedded operating system

Abstract

The invention discloses a method and device for loading multiple pieces of logic by an embedded operating system, comprising a logic file conversion module, the logic file conversion module is unidirectionally connected with a logic file storage module, the logic file storage module is unidirectionally connected with a logic file loading module, and the logic file loading module is connected with a logic file loading module. And the logic file loading module is in one-way connection with a logic file verification module. The method has the advantages that the problem of various loading files of the multi-chip logic is reduced, normal loading of the multi-chip logic is ensured, the logic loading speed is increased, the inconvenience of independently loading the multi-chip logic is solved, meanwhile, the version matching problem is well solved according to the label information, the process is automatic loading, and the loading efficiency is improved. According to the method, logic debugging, logic file loading and logic file curing are facilitated, it can be seen from the above that three times of file verification are conducted on the logic file in the whole process, the integrity of the file is stored, the reliability of logic file loading is improved, the automation degree is high, and the used method can be widely applied to an embedded system.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a method and device for loading multiple pieces of logic in an embedded operating system. Background Art

[0002] Currently, the embedded operating system has an increasing demand for logic. Currently, the mainstream logic is divided into FPGAs. FPGAs are developed based on CPLDs, with higher integration and better performance improvement. However, general FPGAs do not have a memory function and will be lost when powered off. Therefore, it is necessary to store them in Flash and load them through specific methods. At the same time, an embedded system can have multiple logic devices. As the core hardware device, the FPGA requires a better loading method to ensure its normal operation in the embedded operating system.

[0003] The mainstream methods for loading logic in embedded systems can generally be divided into two types. One is to store the logic file in Flash and load it into the embedded operating system by reading the file of the Flash device every time. The disadvantage of this method is that the stored address must be accurate. If the address is incorrect, the logic file cannot be loaded normally. When loading multiple pieces of logic, multiple addresses are required, which may cause problems in the matching of the logic file and the embedded system. The other method is to place the logic file on an external storage medium, such as an SD card, a server, etc. The embedded operating system downloads the logic file from the external and then loads it. The defects of this method are that the problems of the previous method still exist, and it will also increase the configuration of the embedded operating system. When there are multiple logic file configurations, it is very complicated, and there may be file loss and incompleteness during the transmission process, which may lead to the failure of loading the wrong logic file. Summary of the Invention

[0004] (1) Technical Problems to be Solved

[0005] Aiming at the deficiencies of the prior art, the present invention provides a method and device for loading multiple pieces of logic in an embedded operating system. The present invention aims to solve the problems of inability to load logic separately, matching of multiple pieces of logic loading, low automation level, verification of logic files, and low reliability in the prior art.

[0006] (2) Technical Solutions

[0007] To solve the problems of the existing ones that cannot load logic alone, multi-chip logic loading matching, low automation level, logic file verification, and low reliability, the present invention provides the following technical solutions: An apparatus for an embedded operating system to load multi-chip logic, including a logic file conversion module, which is unidirectionally connected to a logic file storage module, the logic file storage module is unidirectionally connected to a logic file loading module, the logic file loading module is unidirectionally connected to a logic file verification module, and the logic file verification module is unidirectionally connected to the logic file storage module.

[0008] Preferably, the logic file conversion module converts multiple logic files into binary files in bin format, which mainly includes three steps. First, each logic file is converted into a bin format file, and a logic file type flag is added to the head. Second, on the basis of the previous step, a file start flag, file length, chip manufacturer, product type, single-board name, build time, and logic version number data are added to the head of the bin file, and a data check tail and a file end flag are added to the tail. Third, multiple bin files are spliced together and packaged into a single bin file, and the number of bin files and file length information are added to the head. The head and tail information are used as logic file tags for easy loading and identification, recording the relevant information of the files to distinguish multi-chip logic files. The bin file format is a common binary format file for the operating system and can be widely promoted and used.

[0009] Preferably, the logic file storage module plans a fixed Flash address segment in the embedded system, makes the read and write API functions of the Flash device into a character device driver, and burns the converted logic file into the Flash through the read and write character device. The embedded system can directly access the character device to obtain file data, solidify the Flash address, avoid directly reading the address, reduce the error probability due to the address, and facilitate the use of developers.

[0010] Preferably, the logic file loading module reads the bin file from the file system or the Flash character device, performs file verification. After accurate verification, it distinguishes multi-chip FPGA files according to the label information, removes the added label information, and automatically matches according to the start bit, file length, chip manufacturer, product type, single-board name, and logic version number of the label, and uses multi-threads to perform parallel loading of the corresponding FPGA respectively.

[0011] Preferably, the logic file verification module: after loading multi-chip logic, it will perform a read-back verification of the multi-chip logic files. After confirming the loading is completed, it can choose to save the logic file to the Flash for convenient debugging and solidifying the logic file.

[0012] Through the design of the above several modules, the problem of numerous logic loading files for multiple chips is reduced, ensuring the normal loading of multiple-chip logic, improving the logic loading speed, solving the inconvenience of loading multiple-chip logic separately, and at the same time, well solving the version matching problem according to the tag information. The process of the present invention is automated loading, facilitating the debugging, loading, and solidifying of logic files. As can be seen from the above, the entire process performs three file validations on the logic files, preserving the integrity of the files, greatly improving the reliability of logic file loading. The method used can be widely applied to embedded systems.

[0013] A method for loading multiple-chip logic in an embedded operating system, comprising the following steps:

[0014] 1). Perform file conversion on the logic file. The logic file itself is also a binary file, but the formats are different among different chip manufacturers. While ensuring the original logic file remains unchanged, use a tool to convert the logic file into the bin file format. The bin file format is fixed, so this method is still applicable even when multiple FPGAs are from different manufacturers. The conversion file can be performed externally to the embedded system.

[0015] 2). The bin file contains the logic file, and the data of the logic file remains unchanged. Add the tag information of the logic file to the head and tail of the bin file. The information mainly includes the start flag, file length, chip manufacturer, product type, single-board name, build time, logic version number data, and check data.

[0016] 3). In the embedded system, according to the size of the FPGA logic file, divide a fixed Flash address segment. The length of the address segment must be greater than the total size of the logic file, and at the same time, the start address and end address are fixed and unchanged. This Flash is used to store the logic file.

[0017] 4). In the embedded system, according to the read / write API of the Flash device, make a driver interface for a character device, which can operate the character device to read and write data to / from the Flash without involving address operations.

[0018] 5). Write the converted logic file into the Flash through the embedded character device, or perform Flash burning through the JTAG method.

[0019] 6). Start the program or application, read the logic file, verify the logic file, match multiple FPGAs according to the tag information, and at the same time remove the added tag information.

[0020] 7). Automatically match the logic files and use multi-threading to parallel load the FPGAs.

[0021] 8) After the loading process ends, read and verify multiple FPGAs respectively. If the read fails, reload them.

[0022] 9) After verifying that the read is correct, select whether to save it to the storage module.

[0023] According to the technical solution, multiple logic files are converted into bin files. The embedded system can load multiple logic files by reading the bin files, and perform verification and readback after loading. As Figure 1 shown, in the embedded system, the CPU manages multiple FPGAs, not limited to Figure 1 the three FPGAs in

[0024] (III) Advantageous Effects

[0025] Compared with the prior art, the present invention provides a method and device for an embedded operating system to load multiple logics, having the following advantageous effects:

[0026] 1. The method and device for the embedded operating system to load multiple logics are composed of a logic file storage module, a logic file conversion module, a logic file loading module, and a logic file verification module. Through the design of the above several modules, the problem of numerous loading files for multiple logics is reduced, ensuring the normal loading of multiple logics, improving the logic loading speed, solving the inconvenience of loading multiple logics separately, and at the same time, well solving the version matching problem according to the tag information. The process of the present invention is an automated loading, facilitating the debugging, loading, and solidifying of logic files. As can be seen from the above, the entire process performs three file verifications on the logic files, preserving the integrity of the files, greatly improving the reliability of logic file loading, with a high degree of automation. The method used can be widely applied to embedded systems.

[0027] 2. The method and device for the embedded operating system to load multiple logics, according to the technical solution, convert multiple logic files into bin files. The embedded system can load multiple logic files by reading the bin files, and perform verification and readback after loading. As Figure 1 shown, in the embedded system, the CPU manages multiple FPGAs, not limited to Figure 1 the three FPGAs in Description of the Drawings

[0028] Figure 1Schematic diagram of a device structure for loading multiple pieces of logic by an embedded operating system proposed by the present invention;

[0029] Figure 2 Schematic diagram of the design framework of multiple FPGAs in the embedded system of the present invention;

[0030] Figure 3 Schematic diagram of the structure for converting a logic file into a bin file in the present invention. Specific implementation manners

[0031] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0032] Please refer to Figures 1-3 , a device for loading multiple pieces of logic by an embedded operating system, including a logic file conversion module, which is unidirectionally connected to a logic file storage module, the logic file storage module is unidirectionally connected to a logic file loading module, the logic file loading module is unidirectionally connected to a logic file verification module, and the logic file verification module is unidirectionally connected to the logic file storage module.

[0033] Embodiment 1: The logic file conversion module converts multiple logic files into binary files in bin format, which is mainly divided into three steps. First, each logic file is converted into a bin format file, and a logic file type flag is added to the head. Second, on the basis of the previous step, a file start flag, file length, chip manufacturer, product type, single-board name, build time, and logic version number data are added to the head of the bin file, and a data check tail and a file end flag are added to the tail. Third, multiple bin files are spliced together and packaged into a single bin file, and the number of bin files and file length information are added to the head. The head and tail information are used as logic file tags for easy loading and identification, recording the relevant information of the file to distinguish multiple logic files. The bin file format is a common binary format file for the operating system and can be widely promoted and used.

[0034] Embodiment 2: The logic file storage module plans a fixed Flash address segment in the embedded system, makes the read and write API functions of the Flash device into a character device driver, and burns the converted logic file into the Flash through the read and write character device. The embedded system can directly access the character device to obtain file data, solidify the Flash address, avoid directly reading the address, reduce the error probability due to the address, and facilitate the use of developers.

[0035] Embodiment 3: The logic file loading module reads the bin file from the file system or the Flash character device, performs file verification. After accurate verification, it distinguishes multiple FPGA files according to the label information, removes the added label information, and automatically matches according to the start bit, file length, chip manufacturer, product type, single-board name, and logic version number of the label, and uses multi-threading to perform parallel loading of the corresponding FPGA respectively.

[0036] Embodiment 4: Logic file verification module: After loading multiple pieces of logic, it will perform read-back verification of multiple logic files. After confirming the loading is complete, it can choose to save the logic file to the Flash, which is convenient for debugging and solidifying the logic file. Through the design of the above several modules, the problem of numerous loaded files for multiple pieces of logic is reduced, the normal loading of multiple pieces of logic is ensured, the logic loading speed is improved, the inconvenience of loading multiple pieces of logic separately is solved, and at the same time, the version matching problem is well solved according to the label information. The process of the present invention is an automated loading, which is convenient for debugging, loading, and solidifying the logic file. As can be seen from the above, the entire process performs file verification on the logic file three times, preserves the integrity of the file, and greatly improves the reliability of the logic file loading. The method used can be widely applied to embedded systems.

[0037] A method for an embedded operating system to load multiple pieces of logic, including the following steps:

[0038] 1). Perform file conversion on the logic file. The logic file itself is also a binary file, but the formats are different among different chip manufacturers. Without changing the original logic file, use a tool to convert the logic file into the bin file format. The bin file format is fixed, so this method is still applicable even when multiple FPGAs are from different manufacturers. The conversion file can be performed externally to the embedded system;

[0039] 2). The bin file contains the logic file, and the data of the logic file remains unchanged. Add the label information of the logic file to the head and tail of the bin file. The information mainly includes the start flag, file length, chip manufacturer, product type, single-board name, build time, logic version number data, and verification data;

[0040] 3). In the embedded system, according to the size of the logic file of the FPGA, divide a fixed Flash address segment. The length of the address segment must be greater than the total size of the logic file, and at the same time, the start address and the end address are fixed and unchanged. This Flash is used to store the logic file;

[0041] 4). In the embedded system, according to the read-write API of the Flash device, make a driver interface for a character device, which can operate the character device to read and write data to the Flash without involving address operations;

[0042] 5), Write the converted logic file into Flash through the embedded character device, or perform Flash programming through the JTAG method;

[0043] 6), Start the program or application, read the logic file, verify the logic file, match multiple FPGAs according to the tag information, and at the same time remove the added tag information;

[0044] 7), Automatically match the logic file and use multi-threading to parallel load the FPGAs;

[0045] 8), After the loading process ends, perform read-back verification on multiple FPGAs respectively. If the read-back fails, perform reloading;

[0046] 9), After the read-back is confirmed to be correct, select whether to save it to the storage module.

[0047] According to the technical solution, multiple logic files are converted into bin files. The embedded system can load multiple logic files by reading the bin files, and perform verification and read-back after loading. As Figure 1 shown, in the embedded system, the CPU manages multiple FPGAs, not limited to Figure 1 the three FPGAs in, the CPU communicates with the FPGAs through the on-chip bus, and the FPGAs also communicate with each other through the on-chip bus, running independently. During loading, parallel loading or serial loading can be performed.

[0048] In summary, the method and device for loading multiple logics in this embedded operating system are composed of a logic file storage module, a logic file conversion module, a logic file loading module, and a logic file verification module. Through the design of the above several modules, the problem of numerous loading files for multiple logics is reduced, the normal loading of multiple logics is ensured, the logic loading speed is improved, the inconvenience of loading multiple logics separately is solved, and at the same time the version matching problem is well solved according to the tag information. The process of the present invention is automatically loaded, which is convenient for logic debugging, loading and solidifying logic files. As can be seen from the above, the entire process performs three file verifications on the logic file to preserve the integrity of the file, greatly improving the reliability of logic file loading, with a high degree of automation. The method used can be widely applied to embedded systems; according to the technical solution, multiple logic files are converted into bin files. The embedded system can load multiple logic files by reading the bin files, and perform verification and read-back after loading. As Figure 1 shown, in the embedded system, the CPU manages multiple FPGAs, not limited to Figure 1 the three FPGAs in, the CPU communicates with the FPGAs through the on-chip bus, and the FPGAs also communicate with each other through the on-chip bus, running independently. During loading, parallel loading or serial loading can be performed.

[0049] It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising one" does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.

[0050] Although the embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An apparatus for loading multiple chips of logic in an embedded operating system, characterized in that, It includes a logic file conversion module, which is unidirectionally connected to a logic file storage module. The logic file storage module is unidirectionally connected to a logic file loading module. The logic file loading module is unidirectionally connected to a logic file verification module. The logic file verification module is unidirectionally connected to the logic file storage module.

2. The device for loading multiple chips of logic in an embedded operating system according to claim 1, characterized in that: The logic file conversion module converts multiple logic files into binary files in bin format, which mainly includes three steps. First, each logic file is converted into a bin format file, and a logic file type flag is added to the header. Second, on the basis of the previous step, a file start flag, file length, chip manufacturer, product type, single board name, build time, and logic version number data are added to the bin file header, and a data check tail and a file end flag are added to the tail. Third, multiple bin files are concatenated and packaged into a single bin file, and the number of bin files and file length information are added to the header.

3. The device for loading multiple chips of logic in an embedded operating system according to claim 1, characterized in that: The logic file storage module plans a fixed Flash address segment in the embedded system, makes the read and write API functions of the Flash device into a character device driver, and burns the converted logic file into the Flash through the character device read and write. The embedded system can directly access the character device to obtain file data and solidify the Flash address.

4. The device for loading multiple chips of logic in an embedded operating system according to claim 1, characterized in that: The logic file loading module reads the bin file from the file system or the Flash character device, performs file verification. After accurate verification, it distinguishes multiple FPGA files according to the tag information, removes the added tag information, and automatically matches according to the start bit, file length, chip manufacturer, product type, single board name, and logic version number of the tag, and uses multiple threads to parallel load the corresponding FPGA respectively.

5. An apparatus for loading multiple chips of logic in an embedded operating system according to claim 1, wherein: The logic file verification module: After loading multiple logics, it will perform a read-back verification of multiple logic files.

6. A method for an embedded operating system to load multiple chips of logic, characterized in that: It includes the following steps: 1). Convert the logic file. The logic file itself is also a kind of binary file, but the formats are different among different chip manufacturers. Without changing the original logic file, use a tool to convert the logic file into bin file format. The bin file format is fixed, so this method is still applicable even if multiple FPGAs are from different manufacturers. The conversion file can be performed outside the embedded system. 2). The bin file contains the logic file, and the data of the logic file has not changed. Tag information of the logic file is added to the header and tail of the bin file. The information mainly includes the start flag, file length, chip manufacturer, product type, single board name, build time, logic version number data, and verification data. 3). In the embedded system, according to the size of the FPGA logic file, a fixed Flash address segment is divided. The length of the address segment must be greater than the total size of the logic file, and the start address and end address are fixed and unchanged. This Flash is used to store the logic file. 4) In the embedded system, according to the read and write API of the Flash device, a driver interface of a character device is made, which can operate the character device to read and write data in Flash without involving address operation; 5) Write the converted logic file into Flash through the embedded character device, or burn Flash through JTAG; 6) Start the program or application, read the logic file, verify the logic file, match multiple FPGAs according to the tag information, and remove the added tag information; 7) Automatically match logic files and load FPGA in parallel using multi-threading; 8) After the loading process is completed, multiple FPGAs are read back for verification, and reload if the read back fails; 9) After reading back and confirming that it is correct, choose whether to save it to the storage module.

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