Embedded system logic full-function self-detection method

Abstract

The invention relates to the technical field of communication, in particular to an embedded system logic full-function self-detection method, software configures programmable function detection items as required, and shields certain function self-detection result information in feedback for configuration. The method has the advantages that logic full-function detection and software decoupling are achieved, professional persons can do professional things, unnecessary work communication is reduced, starting self-checking IO, alarming IO and self-checking finishing IO are designed, logic and software interaction is simplified, the self-checking software development difficulty of a logic function module is lowered, meanwhile, the system overhead performance is optimized, and the system performance is improved. A configuration module and a global reset module are designed, flexibility is achieved, some function detection which does not affect core services and logic self-checking system recovery can be shielded, the whole set of design result feedback is simple, the logic function problem can be visually seen by adding lamp panel output, high-cohesion and low-coupling software logic division is achieved, and the reliability is high. And the operation performance of the embedded system is improved.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a method for self-detecting all functions of an embedded system logic. Background Art

[0002] A programmable logic device is a device whose functions are implemented based on programming and is widely used in embedded devices. To ensure the reliability of device functions, the industry often implements the function of self-checking logic modules. The traditional method for detecting the functions of logic modules is to implement testable modules inside the logic, and software engineers develop test tasks and corresponding test algorithms to test the testable modules inside the logic. There are several efficiency issues with this approach:

[0003] First, the coupling degree between software and logic work is too tight. Software personnel need to understand the details of logic function implementation and test methods, which increases the workload of software personnel and the communication time overhead of personnel cooperation. Moreover, when problems occur in the logic test module, it increases the complexity of problem location;

[0004] Second, implementing test tasks and test algorithms in software will bring certain software system overheads and reduce the performance of embedded products.

[0005] Therefore, the present invention aims to propose a method for self-detecting the functions of an embedded system logic, achieving low coupling between software and logic work, optimizing the efficiency of logic function detection and problem location means. Summary of the Invention

[0006] (1) Technical Problems to be Solved

[0007] Aiming at the deficiencies of the prior art, the present invention provides a method for self-detecting all functions of an embedded system logic, which has the advantages of decoupling all-function detection of logic from software, allowing professionals to do professional things, reducing unnecessary work communication, etc., and solves the problems that software personnel need to understand the details of logic function implementation and test methods, increasing the workload of software personnel and the communication time overhead of personnel cooperation.

[0008] (2) Technical Solutions

[0009] To achieve the above-mentioned purpose of decoupling all-function detection of logic from software, allowing professionals to do professional things, reducing unnecessary work communication, etc., the present invention provides the following technical solution: A method for self-detecting all functions of an embedded system logic, comprising the following steps:

[0010] Step 1: The software configures programmable function detection items as needed and configures to mask certain function self-check result information in the feedback;

[0011] Step 2: The CPU outputs a low level to the scheduling control module through the GPIO pin for starting the self-check to initiate a logical full-resource detection;

[0012] Step 3: The scheduling control module sequentially issues instructions to the self-test module according to the function detection item information of the configuration module;

[0013] Step 4: The self-test module calls the test algorithm of the corresponding function module according to the instruction, and records the result in the test result recording module after the test;

[0014] Step 5: When all items of the configuration module are tested or a test failure occurs, the scheduling control module modifies the feedback enable in the configuration module to initiate the feedback result;

[0015] After the feedback is enabled, the feedback module starts to work, outputs a test completion signal to the CPU through the feedback GPIO pin, reads the test item completion information from the test result recording module, and outputs it to the lamp board for indication. If there is an abnormal result, a low level signal will be output to the software processing of the CPU through the GPIO alarm interface.

[0016] Preferably, the scheduling control module is connected to the CPU through the GPIO pin. The scheduling control module is started by receiving a low-level IO signal sent by the CPU and schedules according to the function items in the configuration module according to the detection period. The feedback module is connected to the CPU through the GPIO pin. The feedback module configures according to the feedback information of the configuration module and the test result recording module, and feeds back to the user through the lamp board and the GPIO alarm interface. The GPIO alarm interface is connected to the CPU through the GPIO pin. The GPIO alarm interface is a programmable logic GPIO interface used to feedback the logical full-resource self-test result.

[0017] Preferably, the configuration module is connected to the CPU through the AXI pin, and detects function item configuration, test item counter, feedback enable, and feedback mask information configuration through the configuration module.

[0018] Preferably, the number of function modules is several.

[0019] Preferably, the configuration module is electrically connected to the scheduling control module, and the scheduling control module is electrically connected to the self-detection test module. The self-checking algorithms of each functional block are implemented through the self-detection test module. The self-detection test module is electrically connected to the test result recording module. The test result recording module includes exception recording registers corresponding to each functional item and a group of error code registers. After the self-detection test module completes the test, the results are recorded here. The test result recording module is electrically connected to the feedback module, the feedback module is electrically connected to the configuration module, and the feedback module is electrically connected to the GPIO alarm interface.

[0020] Preferably, a lamp board interface is provided on the lamp board. The lamp board is connected to the feedback module through the lamp board interface. The lamp board interface is a programmable logic and GPIO interface of the lamp board, and the lamp board is lit through the GPIO level signal.

[0021] (III) Beneficial Effects

[0022] Compared with the prior art, the present invention provides a method for full-functional self-detection of the logic of an embedded system, which has the following beneficial effects:

[0023] 1. In the method for full-functional self-detection of the logic of the embedded system, the full-functional detection of the logic is decoupled from the software, allowing professionals to do professional things and reducing unnecessary work communication.

[0024] 2. In the method for full-functional self-detection of the logic of the embedded system, start-up self-checking I / O, alarm I / O, and self-checking completion I / O are designed, simplifying the interaction between the logic and the software, reducing the software development difficulty of the self-detection of the logic function module, and simultaneously optimizing the system overhead performance.

[0025] 3. In the method for full-functional self-detection of the logic of the embedded system, a configuration module and a global reset module are designed, which have flexibility and can mask the function detections that do not affect the core business and the recovery of the logic self-checking system.

[0026] 4. In the method for full-functional self-detection of the logic of the embedded system, the feedback of the entire design result is simple. With the lamp board output, the problems of the logic function can be seen intuitively, realizing a high cohesion and low coupling software logic division of labor and improving the operating performance of the embedded system. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a schematic flow chart of the present invention;

[0028] Figure 2 is a schematic operation flow chart of the present invention;

[0029] Figure 3 is a schematic self-detection test work flow chart of the present invention;

[0030] Figure 4 Schematic diagram of the self - test result feedback workflow of the present invention;

[0031] Figure 5 Schematic diagram of the global reset workflow of the present invention;

[0032] Figure 6 Schematic diagram of the workflow for the self - test module to record results of the present invention;

[0033] Figure 7 Schematic diagram of the feedback module workflow of the present invention. Detailed implementation manners

[0034] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0035] As Figure 1-7 shown, an embedded system logic full - function self - test method includes the following steps:

[0036] Step 1: The software configures the programmable function test items as needed and configures to mask the self - test result information of a certain function in the feedback;

[0037] Step 2: The CPU outputs a low level to the scheduling control module through the GPIO pin for starting the self - test to initiate the logic full - resource detection;

[0038] Step 3: The scheduling control module sequentially issues instructions to the self - test module according to the function test item information of the configuration module;

[0039] Step 4: The self - test module calls the test algorithm of the corresponding function module according to the instruction. After the test is completed, the result is recorded in the test result recording module. The schematic diagram of the workflow for the self - test module to record results is as Figure 6 ;

[0040] Step 5: When all items in the configuration module are tested or a failure occurs during the test, the scheduling control module will modify the feedback enable in the configuration module to start the feedback result. The self - test result feedback workflow diagram is as Figure 4 ;

[0041] Step 6: After feedback is enabled, the feedback module starts to work, outputs a test completion signal to the CPU through the feedback GPIO pin, reads the test item completion information from the test result recording module, and outputs it to the lamp board for indication. If there is an abnormal result, a low-level signal will be output to the software processing of the CPU through the GPIO alarm interface. The schematic diagram of the working process of the feedback module is as Figure 7 .

[0042] The present invention proposes a method for full-functional self-detection of the logic of an embedded system. After the programmable logic implements each functional module of the embedded system, it is also necessary to implement the functional structure for full-functional self-detection of the system logic, which includes a scheduling control module, a configuration module, a self-detection global reset, a self-detection test module, a test result recording module, a feedback module, a GPIO alarm interface, and a lamp board interface. The lamp board interface is externally connected to the lamp board. The function of the self-detection global reset is to provide a configuration register for the software. As long as a magic word is written into it, the self-detection function can be stopped, and the rest of the modules can be restored to their initial states. The working flowchart of the global reset is as Figure 5 .

[0043] The scheduling control module is connected to the CPU through the GPIO pin. The scheduling control module is started when it receives a low-level IO signal sent by the CPU, and schedules according to the detection period based on the function items in the configuration module. The feedback module is connected to the CPU through the GPIO pin. The feedback module configures according to the feedback information of the configuration module and the test result recording module, and feeds back to the user through the lamp board and the GPIO alarm interface. The GPIO alarm interface is connected to the CPU through the GPIO pin. The GPIO alarm interface is the GPIO interface of the programmable logic, which is used to feedback the test results of the full-resource self-detection of the logic.

[0044] The configuration module is connected to the CPU through the AXI pin, and detects the configuration of function items, the test item counter, the feedback enable, and the feedback mask information configuration through the configuration module.

[0045] The number of functional modules is several.

[0046] The configuration module is electrically connected to the scheduling control module, and the scheduling control module is electrically connected to the self-detection test module. The self-detection algorithms of each functional block are implemented through the self-detection test module. The self-detection test module is electrically connected to the test result recording module. The test result recording module contains abnormal record registers corresponding to each function item and a group of error code registers. After the self-detection test module finishes the test, the results are recorded here. The test result recording module is electrically connected to the feedback module, the feedback module is electrically connected to the configuration module, and the feedback module is electrically connected to the GPIO alarm interface.

[0047] A lamp board interface is provided on the lamp board. The lamp board is connected to the feedback module through the lamp board interface. The lamp board interface is a GPIO interface of the programmable logic and the lamp board, and the lamp board is lit through the GPIO level signal.

[0048] The working process of the present invention is as follows: Step 1: The software configures the programmable function detection items as needed, and configures to shield the self-test result information of a certain function in the feedback;

[0049] Step 2: The CPU outputs a low level to the scheduling control module through the GPIO pin for starting the self-test to start the logical full-resource detection;

[0050] Step 3: The scheduling control module sequentially issues instructions to the self-test module according to the function detection item information of the configuration module;

[0051] Step 4: The self-test module calls the test algorithm of the corresponding function module according to the instruction, and records the result into the test result recording module after the test;

[0052] Step 5: When all items of the configuration module are tested or the test fails, the scheduling control module will modify the feedback enable in the configuration module and start the feedback result;

[0053] Step 6: After the feedback is enabled, the feedback module starts to work, outputs a test completion signal to the CPU through the feedback GPIO pin, reads the test item completion information from the test result recording module, and outputs it to the lamp board for indication. If there is an abnormal result, a low level signal will be output to the software processing of the CPU through the GPIO alarm interface.

[0054] In summary, for the method of logical full-function self-test of this embedded system, the logical full-function detection is decoupled from the software, allowing professionals to do professional things, reducing unnecessary work communication, designing the start self-test IO, alarm IO, and self-test completion IO, simplifying the interaction between the logic and the software, reducing the software development difficulty of the self-test of the logical function module, optimizing the system overhead performance at the same time, designing the configuration module and the global reset module, which has flexibility, can shield some function detections that do not affect the core business, and the logical self-test system recovery. The feedback of the whole set of design results is simple, and the problem of the logical function can be intuitively seen through the lamp board output, realizing high cohesion and low coupling of software logic division of labor, and improving the operation performance of the embedded system.

[0055] It should be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising one" does not exclude the presence of additional identical elements in the process, method, article or device comprising said element.

[0056] Although the embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An embedded system logic full-function self-detection method, characterized in that, It includes the following steps: Step 1: The software configures the programmable function detection items as required and masks the self - test result information of a certain function in the feedback for configuration; Step 2: The CPU outputs a low level to the scheduling control module through the GPIO pin for starting the self - test to initiate the logical full - resource detection; Step 3: The scheduling control module sequentially issues instructions to the self - test module according to the function detection item information of the configuration module; Step 4: The self - test module calls the test algorithm of the corresponding function module according to the instruction, and records the result into the test result recording module after the test; Step 5: When all items of the configuration module are tested or a test fails, the scheduling control module modifies the feedback enable in the configuration module to start the feedback result; Step 6: After the feedback is enabled, the feedback module starts to work, outputs a test completion signal to the CPU through the feedback GPIO pin, reads the test item completion information from the test result recording module, and outputs it to the lamp board for indication. If there is an abnormal result, it will output a low - level signal to the software processing of the CPU through the GPIO alarm interface.

2. The logic full-function self-detection method for an embedded system according to claim 1, wherein: The scheduling control module is connected to the CPU through the GPIO pin, the feedback module is connected to the CPU through the GPIO pin, and the GPIO alarm interface is connected to the CPU through the GPIO pin.

3. An embedded system logic full-function self-detection method according to claim 2, characterized in that: The configuration module is connected to the CPU through the AXI pin.

4. An embedded system logic full-function self-detection method according to claim 3, characterized in that: The number of the function modules is several.

5. An embedded system logic full-function self-detection method according to claim 4, characterized in that: The configuration module is electrically connected to the scheduling control module, the scheduling control module is electrically connected to the self - test module, the self - test module is electrically connected to the test result recording module, the test result recording module is electrically connected to the feedback module, the feedback module is electrically connected to the configuration module, and the feedback module is electrically connected to the GPIO alarm interface.

6. An embedded system logic full-function self-detection method according to claim 5, characterized in that: A lamp board interface is provided on the lamp board, and the lamp board is connected to the feedback module through the lamp board interface.

Images