Electronic equipment, control method and control device thereof and storage medium
By using the communication bus between the PMIC and the SOC in electronic devices to transmit early warning and prompt information, effective protection of the power supply module is achieved, overload and overtemperature problems are solved, the abnormal handling efficiency of the SOC is improved and chip damage is reduced.
Patent Information
- Application Number
- CN202410148772.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-01
- Publication Date
- 2025-07-25
AI Technical Summary
How to effectively protect the power modules in electronic devices to prevent overload and overtemperature events from causing damage to the chip, especially when SOC performance is improved and battery capacity increases.
By setting up multiple power management integrated circuits PMICs in the electronic device, the warning information and prompt information are transmitted to the system-on-chip SOC using the existing communication bus. The SOC protects and restores the process based on the received information, including reducing or increasing the load frequency and load amount.
It improves the efficiency of abnormal handling of power modules, reduces the physical damage to the chip, and prevents the damage to the chip by overload and overtemperature events.
Smart Images

Figure CN120371768A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of electronic devices, and in particular, to an electronic device, a control method, a control device, and a storage medium thereof. Background Art
[0002] In an electronic device (such as a mobile device like a mobile phone, a tablet computer, an e-book reader, an MP3 player, etc.), a System on a Chip (SOC) is a highly integrated chip that includes multiple core components such as a graphics processor and a memory. With the progress of technology, the performance of the SOC is getting higher and higher, which means it requires more electrical energy to maintain high-performance operation. At the same time, in order to meet the user's demand for long-term use of the electronic device, the capacity of the battery is also increasing continuously, and more power modules are required. In order to ensure the robustness of the power system, it is necessary to protect the power modules in the electronic device.
[0003] Therefore, how to achieve the protection of the power modules in the electronic device is an urgent problem to be solved at present. Summary of the Invention
[0004] To overcome the problems existing in the related art, the present disclosure provides an electronic device, a control method, a control system, and a storage medium thereof.
[0005] According to a first aspect of an embodiment of the present disclosure, a control method for an electronic device is provided. The electronic device includes a plurality of Power Management Integrated Circuits (PMICs), a communication bus, and a System on a Chip (SOC). The communication interfaces of each PMIC and the communication interface of the SOC are both connected to the communication bus. The method is applied to the SOC and includes:
[0006] Receiving a warning message sent by a target PMIC among the plurality of PMICs through the communication bus; wherein, the warning message is generated by the target PMIC when it obtains that the operating state of the corresponding power module is abnormal;
[0007] Protecting the corresponding power module in the electronic device according to the warning message.
[0008] In an embodiment of the present disclosure, the protecting the corresponding power module in the electronic device according to the warning message includes:
[0009] Sending a first control signal to a frequency controller in the electronic device to instruct the frequency controller to reduce the operating frequency of the load;
[0010] And / or
[0011] Send a first interrupt signal to the load processor in the electronic device to instruct the load processor to reduce the allowed working load.
[0012] In one embodiment of the present disclosure, the method further includes:
[0013] Receive the prompt information sent by the target PMIC through the communication bus; wherein, the prompt information is generated by the target PMIC when the working state of the corresponding power module returns from abnormal to normal;
[0014] According to the prompt information, perform a recovery process on the load capacity of the corresponding power module in the electronic device.
[0015] In one embodiment of the present disclosure, the performing a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt information includes:
[0016] Send a second control signal to the frequency controller in the electronic device to instruct the frequency controller to increase the working frequency of the load;
[0017] And / or,
[0018] Send a second interrupt signal to the load processor in the electronic device to instruct the load processor to increase the allowed working load.
[0019] In one embodiment of the present disclosure, the receiving the warning information sent by the target PMIC among the multiple PMICs through the communication bus includes:
[0020] Receive the encoded warning information sent by the target PMIC among the multiple PMICs through the communication bus;
[0021] Correspondingly, before protecting the corresponding power module in the electronic device according to the warning information, it further includes:
[0022] Decode the encoded warning information to obtain the warning information.
[0023] According to a second aspect of the embodiments of the present disclosure, a control system for an electronic device is provided, including: a plurality of power management integrated circuits (PMICs), a communication bus, and a system on chip (SOC). The communication interfaces of each PMIC and the communication interface of the SOC are both connected to the communication bus; wherein,
[0024] Each PMIC is configured to detect the working state of the corresponding power module and generate a warning information when the working state of the corresponding power module is abnormal;
[0025] The communication bus is used to send the warning information generated by the target PMIC among the multiple PMICs to the SOC;
[0026] The SOC is used to receive the warning information sent by the target PMIC, and protect the corresponding power module in the electronic device according to the warning information.
[0027] In an embodiment of the present disclosure, when the SOC is used to protect the corresponding power module in the electronic device according to the warning information, it includes:
[0028] Sending a first control signal to a frequency controller in the electronic device to instruct the frequency controller to reduce the operating frequency of the load;
[0029] And / or,
[0030] Sending a first interrupt signal to a load processor in the electronic device to instruct the load processor to reduce the allowed operating load.
[0031] In an embodiment of the present disclosure, each PMIC is further used to generate a prompt message when it obtains that the operating state of the corresponding power module has recovered from abnormal to normal;
[0032] The communication bus is also used to send the prompt message generated by the target PMIC to the SOC;
[0033] The SOC is also used to perform a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt message.
[0034] In an embodiment of the present disclosure, when the SOC is used to perform a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt message, it includes:
[0035] Sending a second control signal to a frequency controller in the electronic device to instruct the frequency controller to increase the operating frequency of the load;
[0036] And / or,
[0037] Sending a second interrupt signal to a load processor in the electronic device to instruct the load processor to increase the allowed operating load.
[0038] In an embodiment of the present disclosure, the system further includes:
[0039] Encoders with the same number as the PMICs, each encoder is used to encode the warning information generated by each PMIC, and send the encoded warning information through the communication bus;
[0040] A decoder, which is configured to receive the encoded warning information sent by the target PMIC via the communication bus and decode the encoded warning information to obtain the warning information.
[0041] According to a third aspect of the embodiments of the present disclosure, an electronic device is provided, including:
[0042] At least one processor; and
[0043] A memory communicatively connected to the at least one processor; wherein,
[0044] The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the control method of the above-mentioned electronic device.
[0045] According to a fourth aspect of the embodiments of the present disclosure, a computer-readable storage medium is provided, on which computer program instructions are stored, and when the program instructions are executed by a processor, the control method of the above-mentioned electronic device is implemented.
[0046] According to a fifth aspect of the embodiments of the present disclosure, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the control method of the above-mentioned electronic device is implemented.
[0047] The technical solutions provided by the embodiments of the present disclosure may include the following beneficial effects:
[0048] In the embodiments of the present disclosure, the electronic device includes multiple power management integrated circuits (PMICs), a communication bus, and a system on chip (SOC). The communication interfaces of each PMIC and the communication interface of the SOC are all connected to the communication bus. The control method of the electronic device is applied to the SOC. When receiving the warning information sent by the target PMIC among the multiple PMICs via the communication bus, the corresponding power module in the electronic device is protected according to the warning information. Among them, the warning information is generated by the target PMIC when it obtains that the operating state of the corresponding power module is abnormal. Thus, the present disclosure does not require additional communication bus or input / output port resources, nor does the SOC need to query again. Instead, the PMIC uses the existing communication bus to transmit the warning information to the SOC, and the SOC protects the power module in the electronic device according to the warning information, thereby strengthening the abnormal control of the power module, improving the efficiency of the SOC in handling power module abnormalities, reducing the permanent physical damage to the chip, and effectively defending against the damage of overloading and overheating events to the chip.
[0049] It should be understood that the above general description and subsequent detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] The accompanying drawings here are incorporated into the specification and form a part of this specification, showing embodiments consistent with the present disclosure, and are used together with the specification to explain the principles of the present disclosure.
[0051] Figure 1 is a schematic diagram of a control system of an electronic device according to an embodiment of the present disclosure;
[0052] Figure 2 is a schematic diagram of a control system of an electronic device according to an embodiment of the present disclosure;
[0053] Figure 3 is a signal schematic diagram of an electronic device according to an embodiment of the present disclosure;
[0054] Figure 4 is a flowchart of a control method of an electronic device according to an embodiment of the present disclosure;
[0055] Figure 5 is a flowchart of a control method of an electronic device according to an embodiment of the present disclosure. Detailed Embodiments
[0056] Some embodiments of the present disclosure will be described in detail herein, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. Various changes, modifications, and equivalents of the methods, apparatuses, and / or systems described herein will become apparent after understanding the present disclosure. For example, the order of operations described herein is merely an example and is not limited to those set forth herein, but may be changed as will be apparent after understanding the present disclosure, except for operations that must be performed in a specific order. Additionally, descriptions of features known in the art may be omitted for increased clarity and brevity.
[0057] The embodiments described in some embodiments of the present disclosure below do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of apparatuses and methods consistent with some aspects of the present disclosure as detailed in the appended claims.
[0058] The electronic device, its control method, control system, and storage medium proposed in the embodiments of the present disclosure are introduced below with reference to the accompanying drawings.
[0059] Figure 1 is a schematic diagram of a control system of an electronic device according to an embodiment of the present disclosure.
[0060] As Figure 1As shown, the control system 100 of the electronic device according to an embodiment of the present disclosure includes: a plurality of power management integrated circuits PMIC 102, a communication bus 111, and a system on chip SOC 101.
[0061] Among them, the plurality of PMICs 102 include a first PMIC 102, a second PMIC 102,..., an nth PMIC 102. As Figure 2 shown, an overtemperature monitor 103 and an overcurrent monitor 104 are provided in each PMIC 102. The overtemperature monitor 103 is used to monitor whether the corresponding power module has an overtemperature, and the overcurrent monitor 104 is used to monitor whether the corresponding power module has an overcurrent. The communication interfaces of each PMIC 102 and the communication interface of the SOC 101 are both connected to the communication bus 111. Each PMIC 102 is used to detect the working state (such as temperature and current information) of the corresponding power module, and generate a warning message when the working state of the corresponding power module is abnormal. The communication bus 111 is used to send the warning message generated by the target PMIC 102 among the plurality of PMICs 102 to the SOC 101. The SOC 101 is used to receive the warning message sent by the target PMIC 102, and protect the corresponding power module in the electronic device according to the warning message.
[0062] For example, when the first PMIC 102 detects that the first power module is overloaded or overheated, it actively sends a warning message to the SOC 101 through the communication bus 111. After receiving the warning message, the SOC 101 protects the first power module in the electronic device. Among them, when the SOC 101 protects the corresponding power module in the electronic device according to the warning message, it can adopt at least one of the following protection strategies: sending a first control signal to the frequency controller 108 in the electronic device to instruct the frequency controller 108 to reduce the working frequency of the load; sending a first interrupt signal to the load processor 109 in the electronic device to instruct the load processor 109 to reduce the allowed working load.
[0063] In an embodiment of the present disclosure, each PMIC 102 is further used to generate a prompt message when it obtains that the working state of the corresponding power module has recovered from abnormal to normal; the communication bus 111 is further used to send the prompt message generated by the target PMIC 102 to the SOC 101; the SOC 101 is further used to perform a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt message. Among them, when the SOC 101 performs a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt message, it can adopt at least one of the following control strategies: sending a second control signal to the frequency controller 108 in the electronic device to instruct the frequency controller 108 to increase the working frequency of the load; sending a second interrupt signal to the load processor 109 in the electronic device to instruct the load processor 109 to increase the allowed working load.
[0064] As Figure 2 shown, the control system 100 of the above-mentioned electronic device further includes: an encoder 105 and a decoder 106 having the same number as the PMIC 102. Among them, each encoder 105 is used to encode the warning information generated by each PMIC 102, and send the encoded warning information through the communication bus 111. The decoder 106 is used to receive the encoded warning information sent by the target PMIC 102 through the communication bus 111, and decode the encoded warning information to obtain the warning information.
[0065] It should be noted that the serial communication protocol of the communication bus 111 in the present disclosure needs to support the PMIC 102 to initiate communication with the SOC 101 actively. At the same time, the hardware logic on the PMIC 102 side needs to support automatically encoding the warning information of the overtemperature monitor 103 and the overcurrent monitor 104, and sending the encoded warning information to the SOC 101 through the communication bus 111 interface on the PMIC 102 side. After the communication bus 111 interface on the SOC 101 side receives the encoded warning information, the hardware logic on the SOC 101 side also needs to support automatically decoding the relevant overcurrent and / or overtemperature warning information and providing it to the protection controller 107. In addition, the hardware logic on the PMIC 102 side also needs to support automatically encoding the prompt information and sending the encoded prompt information to the SOC 101 through the communication bus 111 interface on the PMIC 102 side. After the communication bus 111 interface on the SOC 101 side receives the encoded prompt information, the hardware logic on the SOC 101 side also needs to support automatically decoding the relevant prompt information and providing it to the protection controller 107. The protection controller 107 needs to support initiating corresponding frequency reduction or frequency restoration to the frequency controller 108 through a control signal, or notifying the load processor 109 to perform corresponding load reduction or load restoration through an interrupt signal.
[0066] Next, in combination with Figure 3 the working principle of the control system of the electronic device of the present disclosure will be described:
[0067] After the overtemperature monitor 103 and overcurrent monitor 104 inside the PMIC102 detect an overtemperature or overcurrent behavior in the corresponding power module, warning messages 201, 202, …, 203 are sent out. The hardware logic on the PMIC102 side encodes the warning messages through the encoder 106 and sends the encoded warning messages to the SOC101 through the serial communication protocol of the communication bus 111. After the communication bus interface of the SOC101 receives the encoded warning messages, it decodes the relevant overcurrent and overtemperature warning messages through the decoder 106 and provides them to the protection controller 107. The protection controller 107 initiates a frequency reduction process 206 for the frequency controller 108 through a control signal, and / or notifies the load processor 109 to reduce the load through an interrupt signal 205. After the PMIC102 detects that the abnormal conditions of overtemperature and overcurrent disappear, it sends out prompt messages 201, 202, …, 203, which are sent to the SOC101 through the same transmission path. After the SOC101 receives the prompt messages, they are passed to the protection controller 107, and a normal frequency is restored for the frequency controller 108 through a control signal 206, and / or the load processor 109 is notified to restore the normal load through an interrupt signal 205. Exemplarily, the serial communication bus of the present disclosure may include an SPI (Serial Peripheral Interface) bus.
[0068] The present disclosure is compared with the related art as follows: In the related art, the SOC communicates with other chips by adding separate functional lines (such as interrupt lines) to transmit some specific information (such as interrupt information), or by setting up specific interfaces to transmit specific information. This will occupy hardware resources such as the pins of the SOC, which is not conducive to chip miniaturization, and the encoding and decoding of the specific information transmitted by the separate functional lines are relatively complex. However, in the present disclosure, the connection between the PMIC and the SOC is close, and warning messages and prompt messages are transmitted through a serial bus, without the need to separately set functional lines. In addition, the encoding and decoding of the warning messages and prompt messages transmitted through the communication bus are easier.
[0069] To enable those skilled in the art to understand the present disclosure more clearly, the working process of the control system of the electronic device of the present disclosure is described below in conjunction with Figure 4 As shown in Figure 4 the working process of the control system of the electronic device of the present disclosure includes the following steps:
[0070] S401, After the PMIC side detects an overtemperature or overcurrent behavior, warning messages are sent out.
[0071] S402, The PMIC side encodes the warning messages and sends the encoded warning messages to the SOC through the communication bus.
[0072] S403, The communication bus on the SOC side receives the encoded warning information, decodes the encoded warning information to obtain the warning information, and sends the warning information to the protection controller.
[0073] It should be noted that after step S403, at least one of steps S404 and S405 can be executed.
[0074] S404, The protection controller notifies the software to perform a load reduction behavior through an interrupt signal.
[0075] S405, The protection controller directly reduces the load frequency through a control signal.
[0076] S406, The PMIC side monitors that the over-temperature or over-current situation disappears and issues a prompt message.
[0077] S407, The PMIC side encodes the prompt message and sends the encoded prompt message to the SOC through the communication bus.
[0078] S408, After the communication bus on the SOC side receives the encoded prompt message, it decodes the message to obtain the prompt message and sends the prompt message to the protection controller.
[0079] It should be noted that after step S408, step S409 or S410 is selectively executed according to the steps executed after step S403 above. Among them, if the step executed after step S403 above is S404, then step S409 is executed after step S408; if the step executed after step S403 above is S405, then step S410 is executed after step S408.
[0080] S409, The protection controller notifies the software to resume normal load through an interrupt signal.
[0081] S410, The protection controller restores the normal load frequency through a control signal.
[0082] In summary, the control system of the electronic device according to the embodiments of the present disclosure includes multiple power management integrated circuits (PMICs), a communication bus, and a system on chip (SOC). The communication interfaces of each PMIC and the communication interface of the SOC are both connected to the communication bus. Among them, each PMIC is used to detect the working state of the corresponding power module and generate a warning message when the working state of the corresponding power module is abnormal. The communication bus is used to send the warning message generated by the target PMIC among the multiple PMICs to the SOC. The SOC is used to receive the warning message sent by the target PMIC and protect the corresponding power module in the electronic device according to the warning message. Thus, the present disclosure does not require additional communication buses or input / output port resources, nor does it require the SOC to query again. Instead, the PMIC uses the existing communication bus to transmit the warning message to the SOC, and the SOC protects the power module in the electronic device according to the warning message, thereby strengthening the abnormal control of the power module, improving the efficiency of the SOC in handling power module abnormalities, reducing permanent physical damage to the chip, and effectively defending against damage to the chip caused by overload and over-temperature events.
[0083] Figure 5 is a flowchart of a control method for an electronic device according to an embodiment of the present disclosure.
[0084] As Figure 1 and Figure 2 shown, the electronic device of the present disclosure includes multiple power management integrated circuits PMIC102, a communication bus 111, and a system on chip SOC101. The communication interfaces of each PMIC102 and the communication interface of SOC101 are both connected to the communication bus 111. The control method of the electronic device is applied to SOC101.
[0085] As Figure 5 shown, the control method of the electronic device according to the embodiment of the present disclosure includes the following steps:
[0086] S1, receiving a warning message sent by a target PMIC among multiple PMICs through the communication bus; wherein, the warning message is generated by the target PMIC when it obtains that the working state of the corresponding power module is abnormal.
[0087] S2, protecting the corresponding power module in the electronic device according to the warning message.
[0088] In an embodiment of the present disclosure, protecting the corresponding power module in the electronic device according to the warning message includes:
[0089] Sending a first control signal to a frequency controller in the electronic device to instruct the frequency controller to reduce the working frequency of the load;
[0090] and / or,
[0091] Send a first interrupt signal to a load processor in an electronic device to instruct the load processor to reduce the amount of load allowed to operate.
[0092] In one embodiment of the present disclosure, the above method further includes:
[0093] Receive a prompt message sent by a target PMIC via a communication bus; wherein, the prompt message is generated by the target PMIC when the operating state of the corresponding power module is restored from abnormal to normal;
[0094] According to the prompt message, perform a recovery process on the load capacity of the corresponding power module in the electronic device.
[0095] In one embodiment of the present disclosure, performing a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt message includes:
[0096] Send a second control signal to a frequency controller in the electronic device to instruct the frequency controller to increase the operating frequency of the load;
[0097] And / or,
[0098] Send a second interrupt signal to a load processor in the electronic device to instruct the load processor to increase the amount of load allowed to operate.
[0099] In one embodiment of the present disclosure, receiving a warning message sent by a target PMIC among multiple PMICs via a communication bus includes:
[0100] Receive an encoded warning message sent by a target PMIC among multiple PMICs via a communication bus;
[0101] Correspondingly, before protecting the corresponding power module in the electronic device according to the warning message, it further includes:
[0102] Decode the encoded warning message to obtain the warning message.
[0103] It should be noted that for the details disclosed in the control method of the electronic device in the embodiments of the present disclosure, please refer to the details disclosed in the control system of the electronic device in the embodiments of the present disclosure, and will not be elaborated here specifically.
[0104] In an embodiment of the present disclosure, an electronic device includes a plurality of power management integrated circuits (PMICs), a communication bus, and a system on chip (SOC). The communication interfaces of each PMIC and the communication interface of the SOC are both connected to the communication bus. The control method of the electronic device is applied to the SOC. When receiving a warning message sent by a target PMIC among the plurality of PMICs through the communication bus, the corresponding power module in the electronic device is protected according to the warning message. The warning message is generated by the target PMIC when it obtains that the operating state of the corresponding power module is abnormal. Thus, the present disclosure does not require additional communication buses or input / output port resources, nor does the SOC need to query again. Instead, the PMIC uses the existing communication bus to transmit the warning message to the SOC, and the SOC protects the power module in the electronic device according to the warning message, thereby strengthening the abnormal control of the power module, improving the efficiency of the SOC in handling power module abnormalities, reducing permanent physical damage to the chip, and effectively defending against damage to the chip caused by overloading and overheating events.
[0105] The present disclosure also provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and when the instructions are executed by the at least one processor, the at least one processor is enabled to execute the control method of the electronic device as described above.
[0106] The present disclosure also provides a computer-readable storage medium, on which computer program instructions are stored, and when the program instructions are executed by a processor, the control method of the electronic device provided by the present disclosure is implemented.
[0107] The present disclosure also provides a computer program product, including a computer program, and when the computer program is executed by a processor, the control method of the electronic device provided by the present disclosure is implemented.
[0108] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.
[0109] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise specifically defined.
[0110] Any process or method description represented in a flowchart or otherwise described herein can be understood to represent a module, segment, or portion of code including one or more executable instructions for implementing a customized logical function or process. The scope of the preferred embodiments of the present disclosure includes additional implementations, where functions may be performed in a substantially simultaneous manner or in a reverse order according to the functions involved, rather than in the order shown or discussed, which should be understood by those skilled in the art to which the embodiments of the present disclosure pertain.
[0111] The logic and / or steps represented in a flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing a logical function, and can be specifically implemented in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, a system including a processor, or other systems that can fetch and execute instructions from the instruction execution system, apparatus, or device. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium include the following: an electrical connection portion having one or more wirings (electronic device), a portable computer diskette (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which the program can be printed, as the program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or otherwise appropriate processing if necessary, and then stored in a computer memory.
[0112] It should be understood that various parts of the present disclosure can be implemented by hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits with logic gate circuits for implementing logical functions on data signals, application specific integrated circuits with appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), etc.
[0113] Those of ordinary skill in the art can understand that all or part of the steps carried by the methods of the above embodiments can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiments.
[0114] In addition, in each of the various embodiments of the present disclosure, the functional units can be integrated into a processing module, or each unit can exist physically alone, or two or more units can be integrated into one module. The above integrated module can be implemented in the form of hardware or in the form of a software functional module. When the above integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.
[0115] The above-mentioned storage medium can be a read-only memory, a magnetic disk, an optical disc, etc. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present disclosure.
Claims
1. A control method for an electronic device, characterized in that, The electronic device includes a plurality of power management integrated circuits (PMICs), a communication bus, and a system on chip (SOC). The communication interfaces of each PMIC and the communication interface of the SOC are both connected to the communication bus. The method is applied to the SOC and includes: Receiving warning information sent by a target PMIC among the plurality of PMICs through the communication bus; wherein, the warning information is generated by the target PMIC when the operating state of the corresponding power module is abnormal; Protecting the corresponding power module in the electronic device according to the warning information.
2. The method according to claim 1, wherein The protecting the corresponding power module in the electronic device according to the warning information includes: Sending a first control signal to a frequency controller in the electronic device to instruct the frequency controller to reduce the operating frequency of the load; and / or Sending a first interrupt signal to a load processor in the electronic device to instruct the load processor to reduce the allowable operating load.
3. The method according to claim 1, characterized in that, The method further includes: Receiving prompt information sent by the target PMIC through the communication bus; wherein, the prompt information is generated by the target PMIC when the operating state of the corresponding power module returns to normal from abnormal; Performing a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt information.
4. The method according to claim 3, characterized in that The performing a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt information includes: Sending a second control signal to a frequency controller in the electronic device to instruct the frequency controller to increase the operating frequency of the load; and / or Sending a second interrupt signal to a load processor in the electronic device to instruct the load processor to increase the allowable operating load.
5. The method according to claim 1, wherein The receiving warning information sent by a target PMIC among the plurality of PMICs through the communication bus includes: Receiving the encoded warning information sent by a target PMIC among the plurality of PMICs through the communication bus; Correspondingly, before protecting the corresponding power module in the electronic device according to the warning information, it further includes: Decoding the encoded warning information to obtain the warning information.
6. A control system for an electronic device, characterized in that, It includes: A plurality of power management integrated circuits (PMICs), a communication bus, and a system on chip (SOC). The communication interfaces of each PMIC and the communication interface of the SOC are both connected to the communication bus; wherein, Each PMIC is configured to detect the operating state of the corresponding power module and generate warning information when the operating state of the corresponding power module is abnormal; The communication bus is configured to send the warning information generated by a target PMIC among the plurality of PMICs to the SOC; The SOC is configured to receive the warning information sent by the target PMIC and protect the corresponding power module in the electronic device according to the warning information.
7. The system according to claim 6, wherein When the SOC is configured to protect the corresponding power module in the electronic device according to the warning information, it includes: Send a first control signal to the frequency controller in the electronic device to instruct the frequency controller to reduce the operating frequency of the load; and / or, Send a first interrupt signal to the load processor in the electronic device to instruct the load processor to reduce the amount of load allowed to operate.
8. The system according to claim 6, wherein, Wherein, Each of the PMICs is further configured to generate a prompt message when it obtains that the operating state of the corresponding power module has recovered from an abnormal state to a normal state; The communication bus is further configured to send the prompt message generated by the target PMIC to the SOC; The SOC is further configured to perform a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt message.
9. The system according to claim 8, wherein When the SOC is configured to perform a recovery process on the load capacity of the corresponding power module in the electronic device according to the prompt message, it includes: Send a second control signal to the frequency controller in the electronic device to instruct the frequency controller to increase the operating frequency of the load; and / or, Send a second interrupt signal to the load processor in the electronic device to instruct the load processor to increase the amount of load allowed to operate.
10. The system according to claim 6, wherein The system further includes: Encoders with the same number as the PMICs, each encoder is configured to encode the warning information generated by each PMIC and send the encoded warning information through the communication bus; A decoder, the decoder is configured to receive the encoded warning information sent by the target PMIC through the communication bus and decode the encoded warning information to obtain the warning information.
11. An electronic device, characterized in that, Comprising: At least one processor; And A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and when the instructions are executed by the at least one processor, the at least one processor is enabled to execute the control method of the electronic device according to any one of claims 1-5.
12. A computer-readable storage medium having computer program instructions stored thereon, characterized in that, When the program instructions are executed by the processor, the control method of the electronic device according to any one of claims 1-5 is implemented.