High-gain low-stress DC-DC converter and control method

Abstract

The invention discloses a high-gain low-stress DC-DC converter which comprises an input unit, a quasi-Z source converter, a voltage boosting unit, an output unit and a switch control unit. The input power supply is used for receiving direct-current power supply input and forming an initial energy transfer path with the quasi-Z-source converter; the quasi-Z-source converter is used for realizing an initial boosting function and energy storage; the voltage boosting unit is used for boosting voltage gain through series discharging or parallel charging of capacitors; the output unit is used for stabilizing the output voltage and reducing ripples; and the switch control unit is used for coordinating the working mode switching of the quasi-Z-source converter and the voltage boosting unit through duty ratio regulation and control of a power switch tube.

Description

Technical Field

[0001] The present invention belongs to the field of power electronics, and particularly relates to a high-gain and low-stress DC-DC converter and a control method thereof. Background Art

[0002] A DC-DC converter is a circuit device widely evaluated in the field of power electronics, which is used to convert DC electrical energy into DC electrical energy of different voltage levels. It adjusts the input voltage by controlling the switching devices (such as transistors) in the circuit and generates the required voltage at the output terminal. In modern electronic devices and systems, the DC-DC converter plays a crucial role. With the popularization of portable electronic devices, electric vehicles, renewable energy systems, etc., the demand for high-efficiency, high-performance, and miniaturized power management systems is increasing continuously. As a key link in power conversion, the technology of the DC-DC converter is constantly developing, including topology optimization, control improvement strategies, etc., to improve efficiency and stability. With the improvement of energy efficiency and environmental protection requirements, the research on DC-DC converters has been widely examined in various fields to improve energy utilization efficiency and reduce energy losses. The research on DC-DC converters helps to improve energy conversion efficiency and reduce energy waste, thus promoting the development of sustainable energy. The improvement of DC-DC converters can help to design more miniaturized and high-performance electronic devices, thus promoting the innovation and development of electronic products. In order to realize the association of different voltage levels in the microgrid model, such converters usually need to meet high efficiency, high voltage gain, and continuous input current. In addition, the number of components and device stress are also within the scope of consideration.

[0003] In the research of DC-DC converters, improving the boost ratio is an important research direction. However, considering the number of components used, some improvements use many additional components, but the improvement is very limited. There are also some that have a very high boost ratio, but the slope is extremely large and cannot be achieved in actual use, and the voltage gain adjustable within the duty cycle range cannot be realized. For this reason, the present invention proposes a novel quasi-Z-source high-gain DC-DC converter, which innovates in the switching inductor, switching capacitor, and quasi-Z-source structure, replaces the diode in the quasi-Z-source structure with a switching tube, and realizes the mutual charging of the capacitor and inductor in different modes, stably realizing the voltage gain. The converter has a novel structure, high voltage gain, low stress of the main switching components, etc., and the slope of the boost ratio increases gently, and a stable voltage gain within the duty cycle range can be realized, and it is widely used in fields such as photovoltaic cells and fuel cells in the DC microgrid network model. Summary of the Invention

[0004] In view of this, the main object of the present invention is to provide a high-gain and low-stress DC-DC converter and a control method thereof.

[0005] To achieve the above object, the technical solution of the present invention is implemented as follows:

[0006] A high-gain low-stress DC-DC converter includes an input unit, a quasi-Z-source converter, a voltage boosting unit, an output unit, and a switching control unit;

[0007] An input power supply is used to receive DC power input and form an initial energy transfer path with the quasi-Z-source converter;

[0008] The quasi-Z-source converter is used to achieve the initial boost function and energy storage;

[0009] The voltage boosting unit is used to boost the voltage gain by series discharging or parallel charging of capacitors;

[0010] The output unit is used to stabilize the output voltage and reduce the ripple;

[0011] The switching control unit is used to coordinate the working mode switching of the quasi-Z-source converter and the voltage boosting unit through the duty cycle control of the power switching tube.

[0012] Preferably, the positive pole of the input power supply U in is sequentially connected to one end of the load resistor R0 after series connection of the first diode D1 and the diode D0, and the negative pole is sequentially connected to the negative pole of the first capacitor C1 and grounded.

[0013] Preferably, the quasi-Z-source converter includes a first inductor L1, a second inductor L2, a third inductor L3, a main switching tube S1, and an auxiliary switching tube S2;

[0014] One end of the first inductor L1 is connected to the common node of the positive pole of the input power supply U in and the positive pole of the first capacitor C1, and the other end is connected to the common node of the main switching tube S1 and the auxiliary switching tube S2;

[0015] One end of the second inductor L2 is connected to the positive pole of the third capacitor C3 and the drain of the auxiliary switching tube S2, and the other end is connected to the common node of the first diode D1 and the diode D0;

[0016] One end of the third inductor L3 is connected to the positive pole of the third capacitor C3 and the drain of the auxiliary switching tube S2, and the other end is connected to the anode of the second diode D2;

[0017] The drain of the main switching tube S1 is connected to the first inductor L1, and the source is connected to the voltage boosting unit;

[0018] The drain of the auxiliary switching tube S2 is connected to the voltage boosting unit, and the source is grounded;

[0019] The second inductor L2, the third inductor L3, the second capacitor C2, and the third capacitor C3 form a symmetric circuit.

[0020] Preferably, the voltage boosting unit includes a first capacitor C1, a second capacitor C2, and a third capacitor C3;

[0021] The positive electrode of the first capacitor C1 is connected to the source electrode of the main switch tube S1;

[0022] The positive electrode of the second capacitor C2 and the drain electrode of the auxiliary switch tube S2 are connected to one end of the second inductor L2;

[0023] The negative electrode of the third capacitor C3 and the drain electrode of the auxiliary switch tube S2 are connected to one end of the third inductor L3;

[0024] Preferably, the output unit includes an output capacitor C0;

[0025] The positive electrode of the output capacitor C0 is connected to the positive electrode of the load resistor R0 through a diode D0, and the negative electrode is grounded.

[0026] Preferably, the switch control unit is connected to the gate electrodes of the main switch tube S1 and the auxiliary switch tube S2.

[0027] A control method applied to a high-gain low-stress DC-DC converter, the method comprising:

[0028] The switch control unit obtains a corresponding drive signal by adjusting the duty cycle;

[0029] When the quasi-Z-source converter is in the on state according to the drive signal, the diode D0 is on, the first diode D1 and the second diode D2 are off, and the input power supply U in charges the first inductor L1, the second capacitor C2 charges the third inductor L3, and the third capacitor C3 charges the second inductor L2;

[0030] The input power supply U in , the first capacitor C1, the second capacitor C2, and the third capacitor C3 are connected in series and jointly supply power to the capacitor C0 and the load.

[0031] Preferably, the method includes: when the quasi-Z-source converter is in the off state according to the drive signal, the first diode D1 and the second diode D2 are on, the diode D0 is off, the first inductor L1 charges the capacitor C1, the second inductor L2 charges the second capacitor C2, the third inductor L3 charges the third capacitor C3, and the capacitor C0 supplies power to the load.

[0032] Compared with the prior art, the beneficial effects of the present invention:

[0033] The present invention performs modal control through a quasi-Z-source converter, which is turned on or off according to the duty cycle by a driving signal, and cooperates with a diode to jointly form two working modes, realizing the high-gain output of the circuit. Description of the Drawings

[0034] The drawings described herein are used to disclose a further understanding of the present invention and constitute a part of the present invention. The schematic embodiments and descriptions of the present invention are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0035] Figure 1 is a circuit diagram of a high-gain and low-stress DC-DC converter provided by an embodiment of the present invention;

[0036] Figure 2 is a circuit diagram of a high-gain and low-stress DC-DC converter in the first mode provided by an embodiment of the present invention;

[0037] FIG. 3 is a circuit diagram of a high-gain and low-stress DC-DC converter in the second mode provided by an embodiment of the present invention;

[0038] Figure 4 is a voltage gain curve diagram in the control method of a high-gain and low-stress DC-DC converter provided by an embodiment of the present invention;

[0039] Figure 5 is a component voltage stress diagram in the control method of a high-gain and low-stress DC-DC converter provided by an embodiment of the present invention;

[0040] Figure 6 is a component current stress diagram in the control method of a high-gain and low-stress DC-DC converter provided by an embodiment of the present invention;

[0041] Figure 7 is a converter performance comparison curve diagram in the control method of a high-gain and low-stress DC-DC converter provided by an embodiment of the present invention;

[0042] Figure 8 is a converter performance comparison curve diagram in the control method of a high-gain and low-stress DC-DC converter provided by an embodiment of the present invention;

[0043] Figure 9 is a converter performance comparison curve diagram in the control method of a high-gain and low-stress DC-DC converter provided by an embodiment of the present invention. Detailed Embodiments

[0044] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0045] In the accompanying drawings of this embodiment, the same or similar reference numerals correspond to the same or similar components; in the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "upper", "lower", "left", "right", "inner", "outer", etc. are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the terms describing the positional relationships in the accompanying drawings are only for illustrative purposes and cannot be construed as a limitation of this patent. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific circumstances.

[0046] It should be noted that in this text, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or elements inherent to such process, article or device. Without further limitation, an element defined by the phrase "comprising a..." does not exclude the presence of additional identical elements in the process, article or device comprising that element.

[0047] An embodiment of the present invention provides a high-gain and low-stress DC-DC converter, which includes an input unit, a quasi-Z-source converter, a voltage boost unit, an output unit, and a switch control unit;

[0048] An input power supply, which is used to receive the input of a DC power supply and form an initial energy transfer path with the quasi-Z-source converter;

[0049] The quasi-Z-source converter is used to achieve the initial boost function and energy storage;

[0050] The voltage boost unit is used to boost the voltage gain by series discharge or parallel charging of capacitors;

[0051] The output unit is used to stabilize the output voltage and reduce the ripple;

[0052] The switch control unit is used to coordinate the working mode switching of the quasi-Z-source converter and the voltage boost unit through the duty cycle control of the power switch tube.

[0053] The present invention performs modal control through the quasi-Z-source converter, and is controlled to conduct or disconnect according to the duty cycle by the drive signal, and cooperates with the diode to jointly form two working modes to achieve the high-gain output of the circuit.

[0054] The said input power supply U inThe positive electrode of [device] is connected in series with the first diode D1 and the diode D0 in sequence, and then connected to one end of the load resistor R0, and the negative electrode is connected to the negative electrode of the first capacitor C1 and grounded in sequence.

[0055] The quasi-Z-source converter includes a first inductor L1, a second inductor L2, a third inductor L3, a main switch tube S1, and an auxiliary switch tube S2;

[0056] One end of the first inductor L1 is connected to the input power supply U in The common node of the positive electrode of [device] and the positive electrode of the first capacitor C1, and the other end is connected to the common node of the main switch tube S1 and the auxiliary switch tube S2;

[0057] One end of the second inductor L2 is connected to the positive electrode of the third capacitor C3 and the drain of the auxiliary switch tube S2, and the other end is connected to the common node of the first diode D1 and the diode D0;

[0058] One end of the third inductor L3 is connected to the positive electrode of the third capacitor C3 and the drain of the auxiliary switch tube S2, and the other end is connected to the anode of the second diode D2;

[0059] The drain of the main switch tube S1 is connected to the first inductor L1, and the source is connected to the voltage boosting unit;

[0060] The drain of the auxiliary switch tube S2 is connected to the voltage boosting unit, and the source is grounded;

[0061] The second inductor L2, the third inductor L3, the second capacitor C2, and the third capacitor C3 form a symmetric circuit.

[0062] The voltage boosting unit includes a first capacitor C1, a second capacitor C2, and a third capacitor C3;

[0063] The positive electrode of the first capacitor C1 is connected to the source of the main switch tube S1;

[0064] The positive electrode of the second capacitor C2 and the drain of the auxiliary switch tube S2 are connected to one end of the second inductor L2;

[0065] The negative electrode of the third capacitor C3 and the drain of the auxiliary switch tube S2 are connected to one end of the third inductor L3;

[0066] The output unit includes an output capacitor C0;

[0067] The positive electrode of the output capacitor C0 is connected to the positive electrode of the load resistor R0 through the diode D0, and the negative electrode is grounded.

[0068] The switch control unit is connected to the gates of the main switch tube S1 and the auxiliary switch tube S2.

[0069] An embodiment of the present invention also provides a control method applied to the above high-gain low-stress DC-DC converter, and the method includes:

[0070] Step 101: The switch control unit obtains a corresponding drive signal by adjusting the duty cycle;

[0071] Step 102: When the quasi-Z-source converter is in the on state according to the drive signal, the diode D0 is turned on, the first diode D1 and the second diode D2 are turned off, and the input power supply U in charges the first inductor L1, the second capacitor C2 charges the third inductor L3, and the third capacitor C3 charges the second inductor L2;

[0072] Specifically, when the quasi-Z-source converter is in the on state according to the drive signal, the circuit is in the first mode, as Figure 2 shown. At this time, the switching tubes S1 and S2 are turned on, the diode D0 is turned on, and D1 and D2 are turned off. Among them, the power supply U in charges the inductor L1, the capacitor C2 charges the inductor L3, and the capacitor C3 charges the inductor L2. At this time, the capacitor voltage drops and the inductor current linearly rises. The power supply U in , the capacitor C1, C2, and C3 are connected in series and jointly supply power to the capacitor C0 and the load.

[0073] The input power supply U in , the first capacitor C1, the second capacitor C2, and the third capacitor C3 are connected in series and jointly supply power to the capacitor C0 and the load.

[0074] Step 103: When the quasi-Z-source converter is in the off state according to the drive signal, the first diode D1 and the second diode D2 are turned on, the diode D0 is turned off, the first inductor L1 charges the capacitor C1, the second inductor L2 charges the second capacitor C2, the third inductor L3 charges the third capacitor C3, and the capacitor C0 supplies power to the load.

[0075] Specifically, when the quasi-Z-source converter is in the off state according to the drive signal, the circuit is in the second mode, as shown in Figure 3. At this time, the switching tubes S1 and S2 are turned off, the diodes D1 and D2 are turned on, and the diode D0 is turned off. Among them, the inductor L1 jointly charges the capacitor C1, the inductor L2 charges the capacitor C2, and the inductor L3 charges the capacitor C3. At this time, the inductor current linearly drops and the capacitor voltage rises. The capacitor C0 supplies power to the load.

[0076] When performing calculation and analysis, the forward voltage drop, on-resistance, and parasitic parameters of all power semiconductors are ignored, and it is assumed that the capacitors and inductors in the topology are large enough.

[0077] Analyze two working modes, and according to the KVL theorem and the branch voltage relationship, the inductor L1 satisfies the following equation:

[0078]

[0079] Similarly, analyze the inductors L2 and L3, and the inductors L2 and L3 and the capacitors C2 and C3 form a symmetric circuit and satisfy:

[0080]

[0081] In the equation, U in is the input voltage of the converter, U0 is the output voltage of the converter, U C0 , U C1 , U C2 and U C3 correspond to the voltages of the capacitors C0, C1, C2, and C3 respectively, and U L1_m1 , U L1_m2 and U L2_m1 , U L2_m2 correspond to the voltages of the inductors L1 and L2 in the first mode and the second mode respectively.

[0082] The volt-second balance formula of the inductor in one cycle is:

[0083]

[0084] Substitute formulas (1) and (2) into formula (3) to obtain the voltage relationship of the capacitors as follows:

[0085]

[0086] Solve formula (4) to obtain the capacitor voltage as:

[0087]

[0088] Also, according to the KVL theorem, formula (6) is obtained. Finally, the voltage gain of the converter of the present invention is shown in formula (7):

[0089] U0 = U in + U C1 + U C2 + U C3 (6)

[0090]

[0091] As Figure 4 shown is the curve of the voltage gain Q of formula (7) with respect to the duty cycle D. The present invention mainly realizes the high-gain output of the circuit when the duty cycle D is between 0 and 0.5.

[0092] During the process of solving the voltage gain, the voltage stress of the capacitor has been calculated as shown in Equation (5). Further, according to the KVL theorem, the voltage stresses of the switching transistors and diodes are calculated as follows:

[0093]

[0094] In the formula, U S1_m2 , U S2_m2 and U D0_m2 , U D1_m1 , U D2_m1 represent the voltages across the switching transistors S1, S2 and the diodes D0, D1, D2 at both ends during their off modes respectively.

[0095] To more intuitively observe the voltage stresses of the capacitor, switching transistors and diodes, normalized curves are plotted according to Equation (4) and Equation (7) as shown in Figure 5 (a), (b). It can be seen from the figure that the voltage stresses of the capacitor, switching transistors and diodes all increase with the increase of the duty cycle. When D ≤ 0.35, the voltage stress is relatively small.

[0096] When the circuit is in the first mode, according to Kirchhoff's current law (where the inductors L2, L3 and the capacitors C2, C3 form a symmetric circuit), the following can be calculated:

[0097]

[0098] Similarly, when the circuit is in the second mode, the following can be calculated:

[0099]

[0100] In the equation, I in is the input current of the converter, I R0 is the output current of the converter, I L1 , I L2 and I L3 correspond to the currents flowing through the inductors L1, L2 and L3 respectively, I C1_m1 , I C2_m1 , I C3_m1 , I C0_m1 and I C1_m2 , I C2_m2 , I C3_m2 , I C0_m2 correspond to the currents of the capacitors C1, C2, C3, C0 in the first mode and the second mode respectively, I S1_m1 , I S2_m1 and I D1_m2 , I D2_m2 , I D0_m1 represent the currents of the switching transistors S1, S2 and the diodes D1, D2, D0 during their on modes respectively.

[0101] The ampere - second balance and power conservation formulas of the capacitor under steady - state conditions are as follows:

[0102]

[0103] Combining formulas (9) and (10) according to formula (11), the average current flowing through the inductor is calculated. The specific results are as follows:

[0104]

[0105] According to formula (12) and combined with KCL for further derivation, the current stresses of the switch and diode are calculated as follows:

[0106]

[0107] The current results on the capacitor when the circuit is in the first mode are as follows:

[0108]

[0109] The current results on the capacitor when the circuit is in the second mode are as follows:

[0110]

[0111] Similarly, from formulas (13), (14), (15) and (16), the normalized curves of the current stresses of the switch, diode and capacitor are as shown in Figure 6 (a), (b) and (c). It can be seen from Figure 6 that the capacitor current stress is at a relatively low level when 0.2 ≤ D ≤ 0.35, and the switch and diode current stresses are at a relatively low level when 0.15 ≤ D ≤ 0.35.

[0112] Figure 7 (a)(b) shows the comparison between the converter of the present invention (black) and the quasi - Z - source converter (QZS, yellow) in terms of voltage gain and switch voltage stress. It can be seen from the figure that in the range of duty cycle D from 0 to 0.5, the proposed converter has obvious advantages in voltage gain compared with the quasi - Z - source converter, and the switch voltage stress is significantly reduced. Therefore, the proposed converter has great comprehensive advantages.

[0113] To verify the feasibility and effectiveness of the proposed converter, a 120W experimental prototype is built. The key parameters used to make the experimental prototype are given in Table 1. This experiment uses CYCLONEII and the chip HCPL3120 for control to step up the input voltage of 30V. The experimental waveforms are as shown in Figure 8 (a)-(b). It can be seen from the figure that when the input power is 120W, the efficiency of the circuit is 93.2%, and the voltage gain of the converter is basically consistent with the theoretical analysis.

[0114] Table 1 Parameters of the experimental prototype

[0115]

[0116] In order to verify whether the output voltage is stable, the load is changed while the input voltage remains unchanged. Figure 9 (a) The load is switched from 200 Ω to 300 Ω; Figure 9 (b) The load is switched back from 300 Ω to 200 Ω. During this process, the output voltage changes numerically under the influence of the load change, but the voltage stability response is rapid.

[0117] The above is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention.

Claims

1. A high-gain and low-stress DC-DC converter, characterized in that it includes an input unit, a quasi-Z-source converter, a voltage boosting unit, an output unit, and a switching control unit; an input power supply, which is used to receive the input of the DC power supply and form an initial energy transfer path with the quasi-Z-source converter; the quasi-Z-source converter, which is used to achieve the initial boosting function and energy storage; the voltage boosting unit, which is used to boost the voltage gain by series discharging or parallel charging of capacitors; the output unit, which is used to stabilize the output voltage and reduce the ripple; the switching control unit, which is used to coordinate the working mode switching of the quasi-Z-source converter and the voltage boosting unit through the duty cycle regulation of the power switching tube.

2. The high-gain low-stress DC-DC converter according to claim 1, wherein The input power supply U in has its positive pole connected to one end of the load resistor R0 after being successively connected in series with the first diode D1 and the diode D0, and its negative pole is successively connected to the negative pole of the first capacitor C1 and grounded.

3. The high-gain low-stress DC-DC converter according to claim 2, wherein, The quasi-Z-source converter includes a first inductor L1, a second inductor L2, a third inductor L3, a main switching tube S1, and an auxiliary switching tube S2; One end of the first inductor L1 is connected to the positive electrode of the input power supply U in and the common node of the positive electrodes of the first capacitor C1, and the other end is connected to the common node of the main switching transistor S1 and the auxiliary switching transistor S2; One end of the second inductor L2 is connected to the positive electrode of the third capacitor C3 and the drain of the auxiliary switching tube S2, and the other end is connected to the common node of the first diode D1 and the diode D0; One end of the third inductor L3 is connected to the positive electrode of the third capacitor C3 and the drain of the auxiliary switching tube S2, and the other end is connected to the anode of the second diode D2; The drain of the main switching tube S1 is connected to the first inductor L1, and the source is connected to the voltage boosting unit; The drain of the auxiliary switching tube S2 is connected to the voltage boosting unit, and the source is grounded; The second inductor L2, the third inductor L3, the second capacitor C2, and the third capacitor C3 form a symmetric circuit.

4. The high-gain low-stress DC-DC converter according to claim 3, characterized in that, The voltage boosting unit includes a first capacitor C1, a second capacitor C2, and a third capacitor C3; The positive electrode of the first capacitor C1 is connected to the source of the main switching tube S1; The positive electrode of the second capacitor C2 and the drain of the auxiliary switching tube S2 are connected to one end of the second inductor L2; The negative electrode of the third capacitor C3 and the drain of the auxiliary switching tube S2 are connected to one end of the third inductor L3.

5. The high-gain low-stress DC-DC converter according to claim 4, wherein The output unit includes an output capacitor C0; The positive electrode of the output capacitor C0 is connected to the positive electrode of the load resistor R0 through the diode D0, and the negative electrode is grounded.

6. The high-gain low-stress DC-DC converter according to claim 5, wherein The switching control unit is connected to the gates of the main switching tube S1 and the auxiliary switching tube S2.

7. A control method applied to the high-gain low-stress DC-DC converter according to any one of claims 1-6, characterized in that, The method includes: The switching control unit obtains the corresponding drive signal by adjusting the duty cycle; When the quasi-Z-source converter is in the conducting state according to the drive signal, the diode D0 conducts, the first diode D1 and the second diode D2 are cut off, and the input power supply U in charges the first inductor L1, the second capacitor C2 charges the third inductor L3, and the third capacitor C3 charges the second inductor L2; The input power supply U in , the first capacitor C1, the second capacitor C2, and the third capacitor C3 are connected in series and jointly supply power to the capacitor C0 and the load.

8. The control method according to claim 7, characterized in that, The method includes: when the quasi-Z-source converter is in the off state according to the drive signal, the first diode D1 and the second diode D2 are turned on, the diode D0 is turned off, the first inductor L1 charges the capacitor C1, the second inductor L2 charges the second capacitor C2, the third inductor L3 charges the third capacitor C3, and the capacitor C0 supplies power to the load.

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