Charge modulation method and circuit applied to buck conversion circuit, and electronic device

Abstract

The application discloses a charge modulation method and circuit applied to a step-down conversion circuit, and an electronic device. The charge modulation method comprises the following steps: obtaining a conduction current instantaneous value in an upper switch subcircuit and / or a lower switch subcircuit; performing integral processing on the conduction current instantaneous value to obtain a charge integral quantity; generating a driving control signal by using a charge error value between the charge integral quantity and a target charge quantity; detecting whether the step-down conversion circuit is in a first load state; if the step-down conversion circuit is in the first load state, adjusting a duty cycle of the driving control signal to a set multiple of the previous one; and sending the adjusted driving control signal to one of the upper switch subcircuit and the lower switch subcircuit to trigger the one to change a switching state. In this way, the charge modulation method can quickly adjust the power supply output to a suitable range when a load changes greatly, can effectively suppress the ripple that may occur when the load changes suddenly, and has good dynamic response characteristics.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit control, in particular to a charge modulation method and circuit applied to a step-down conversion circuit and an electronic device. BACKGROUND

[0002] Nowadays, with the increasing richness of electronic devices, the performance requirements of the driving power supply of the electronic devices are increasingly stringent, especially when the load device adopts a complex architecture such as multi-stage parallel operation or distributed connection. The demand for the power supply output of the driving power supply is a relatively wide voltage range, that is, there is an application scenario in which the load changes in a large range, so that the load current suddenly changes, and the power supply output voltage will also fluctuate sharply. This trend poses higher challenges to the voltage withstand capability, dynamic response characteristics and power density of the driving power supply.

[0003] However, in the related art, in order to obtain a wide range of output voltages, a linear power supply is usually used, that is, a power device works in a linear region to control the output current. However, this scheme is limited by the voltage stress limit of the power device, and the single-tube voltage is insufficient, and the device is in series. There are problems in voltage sharing, which makes it difficult to directly adapt to high-voltage scenarios, and the larger parasitic capacitance and internal resistance of high-voltage devices will limit the current build-up speed, thereby affecting the current rise time and dynamic response performance and other key indicators of the driving power supply. SUMMARY

[0004] The technical problem solved by the present application is to provide a charge modulation method and circuit applied to a step-down conversion circuit and an electronic device, which can solve the problem that the linear power supply in the related art cannot directly adapt to high-voltage scenarios and affect the current rise time and dynamic response performance and other key indicators of the driving power supply.

[0005] To solve the above technical problems, one technical solution adopted by the present application is to provide a charge modulation method applied to a step-down conversion circuit, the step-down conversion circuit comprising a top switch sub-circuit and a bottom switch sub-circuit coupled to each other, wherein the charge modulation method comprises: obtaining a conduction current instantaneous value in the top switch sub-circuit and / or the bottom switch sub-circuit; performing integral processing on the conduction current instantaneous value to obtain a charge integral quantity; generating a driving control signal using a charge error value between the charge integral quantity and a target charge quantity; detecting whether the step-down conversion circuit is in a first load state; if the step-down conversion circuit is in the first load state, adjusting a duty cycle of the driving control signal to a set multiple of the previous one; and sending the adjusted driving control signal to one of the top switch sub-circuit and the bottom switch sub-circuit to trigger a change in the switching state thereof.

[0006] The step of integrating the conduction current instantaneous value to obtain the charge integration quantity comprises: obtaining a rising edge of the driving control signal; integrating the conduction current instantaneous value to obtain the charge integration quantity in response to the rising edge; resetting the charge integration quantity for a preset time length; and wherein the preset time length is greater than or equal to a current high level duration of the driving control signal and less than a current switching cycle of the driving control signal.

[0007] The step of integrating the conduction current instantaneous value to obtain the charge integration quantity comprises: obtaining a rising edge and a falling edge of the driving control signal; integrating the conduction current instantaneous value to obtain the charge integration quantity in response to the rising edge; and resetting the charge integration quantity in response to the falling edge.

[0008] The step of generating the driving control signal by using the charge error value between the charge integration quantity and the target charge quantity comprises: obtaining an output current of the regulating output sub-circuit; obtaining a current error value by subtracting the target reference current from the output current; and generating the driving control signal by using the charge error value between the charge integration quantity and the target charge quantity and the current error value.

[0009] The step of detecting whether the buck conversion circuit is in the first load state comprises: obtaining a target reference current sent by the host computer; and determining whether the target reference current is less than a first mode switching threshold value; and the step of adjusting the duty cycle of the driving control signal to a preset multiple of the previous one if the buck conversion circuit is in the first load state comprises: adjusting the duty cycle of the driving control signal to a preset multiple of the previous one if the target reference current is less than the first mode switching threshold value.

[0010] The step of detecting whether the buck conversion circuit is in the first load state comprises: obtaining an output current of the regulating output sub-circuit; integrating the output current to obtain a feedback charge integration quantity; determining whether the feedback charge integration quantity is less than a second mode switching threshold value; and the step of adjusting the duty cycle of the driving control signal to a preset multiple of the previous one if the buck conversion circuit is in the first load state comprises: adjusting the duty cycle of the driving control signal to a preset multiple of the previous one if the feedback charge integration quantity is less than the second mode switching threshold value.

[0011] The step of integrating the output current to obtain the feedback charge integration quantity comprises: obtaining a rising edge and a falling edge of the driving control signal; integrating the output current to obtain the feedback charge integration quantity in response to the rising edge; and resetting the feedback charge integration quantity in response to the falling edge.

[0012] The driving control signal includes a first pulse width modulation signal and a second pulse width modulation signal, and the charge modulation method further includes: if the buck conversion circuit is not in the first load state, sending the first pulse width modulation signal and the second pulse width modulation signal to the upper switch subcircuit and the lower switch subcircuit respectively to trigger the upper switch subcircuit and the lower switch subcircuit to change the switching state respectively.

[0013] To solve the above technical problems, another technical solution adopted by the present application is to provide a charge modulation circuit, wherein the charge modulation circuit is coupled to a buck conversion circuit; wherein the charge modulation circuit uses the charge modulation method as claimed in any one of the above to regulate the current of the buck conversion circuit.

[0014] To solve the above technical problems, another technical solution adopted by the present application is to provide an electronic device, wherein the electronic device includes a housing and a charge modulation circuit connected to the housing; wherein the charge modulation circuit is the charge modulation circuit as claimed in the above.

[0015] The beneficial effects of the present application are: different from the prior art, the charge modulation method provided by the present application obtains the conduction current instantaneous value in the upper switch subcircuit and / or the lower switch subcircuit, integrates the conduction current instantaneous value to obtain a charge integral, and generates a driving control signal using the charge error value between the charge integral and a target charge amount, so as to adjust the duty cycle of the driving control signal to a set multiple when it is detected that the buck conversion circuit is in the first load state, and send the adjusted driving control signal to one of the upper switch subcircuit and the lower switch subcircuit to trigger it to change the switching state, so as to quickly adjust the output current and output voltage of the buck conversion circuit to a suitable range by reasonable adjustment of the duty cycle of the driving control signal and blocking of part of the switch subcircuit when the load changes greatly, so as to adapt to the demand of the load for a wide range of output voltage, effectively suppress the ripple that may occur when the load changes suddenly, and have good dynamic response characteristics, which can effectively meet the demand for power transient recovery capability, without the need to configure high-voltage devices and complex compensation networks, and the hardware cost is also low. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0017] Figure 1 is a flowchart of the first embodiment of the charge modulation method of the present application;

[0018] Figure 2 This is a schematic structural diagram of a first embodiment of a charge modulation circuit of the present application;

[0019] Figure 3 yes Figure 1 A schematic diagram of a flow chart of an embodiment of S12;

[0020] Figure 4 yes Figure 1 A schematic diagram of a flow chart of another embodiment of S12;

[0021] Figure 5 yes Figure 1 A schematic diagram of a flow chart of an embodiment of S13;

[0022] Figure 6 2 is a schematic structural diagram of a second embodiment of the charge modulation circuit of the present application;

[0023] Figure 7 is a structural diagram of a third embodiment of the charge modulation circuit of the present application;

[0024] Figure 8 2 is a flow chart of a second embodiment of the charge modulation method of the present application;

[0025] Figure 9 2 is a flow chart of a third embodiment of the charge modulation method of the present application;

[0026] Figure 10 yes Figure 9 A schematic diagram of a flow chart of an embodiment of S75;

[0027] Figure 11 It is a structural diagram of an embodiment of the electronic device of the present application. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0029] The terms "first", "second", "third", etc. are used only for descriptive purposes and are not to be construed as indicating or implying relative importance or a specific number of technical features indicated. Thus, features defined with "first", "second", "third" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is at least two, such as two, three, etc., unless otherwise explicitly and specifically limited. All directional indications (such as upper, lower, left, right, front, back, etc.) in the present embodiments are only used to explain the relative position relationship, movement condition, etc. between the components in a certain posture (as shown in the drawings), and if the certain posture changes, the directional indications also change accordingly. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or units inherent to the process, method, product or device.

[0030] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment can be included in at least one embodiment of the application. The appearance of the phrase in various places in the specification does not necessarily all refer to the same embodiment, nor does it necessarily refer to a separate or alternative embodiment. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0031] The present application will be described in detail below in conjunction with the drawings and embodiments.

[0032] Reference is made to Figure 1 and Figure 2 , wherein, Figure 1 is a flow diagram of the first embodiment of the charge modulation method of the present application, Figure 2 is a structural diagram of the first embodiment of the charge modulation circuit of the present application. Specifically, it can include the following steps:

[0033] S11: Obtain the conduction current instantaneous value in the upper switch subcircuit and / or the lower switch subcircuit.

[0034] It can be understood that the charge modulation method in the present embodiment is specifically applied to the current regulation of the first buck conversion circuit 30 as shown in Figure 2 The first buck conversion circuit 30 includes a first upper switch subcircuit 31 and a first lower switch subcircuit 32 coupled to each other; wherein the first charge modulation circuit 20 implements charge modulation on the first buck conversion circuit 30 using any of the charge modulation methods described herein.

[0035] It is worth mentioning that the first step-down conversion circuit 30 can be a single-phase BUCK circuit (step-down conversion circuit), a multi-phase BUCK circuit, or a BOOST circuit (step-up conversion circuit), or any other reasonable circuit topology, and the present embodiment does not limit the same.

[0036] In some embodiments, the first charge modulation circuit 20 can include one of any reasonable circuit unit with signal processing function, such as a control chip, a DSP (Digital Signal Processing) chip, an MCU (Micro Controller Unit) circuit, a CPU (Central Processing Unit), a single-chip microcomputer, a field programmable gate array, a programmable logic device, a discrete gate or transistor logic device, and discrete hardware, and the present application does not limit the same.

[0037] In addition, "coupling" in this article refers to any direct and indirect connection means. Therefore, if the first circuit is described as being coupled to the second circuit, it means that the first circuit can be directly connected to the second circuit through electrical connection or wireless transmission, optical transmission, or other signal connection methods, or indirectly connected to the second circuit through other circuits or connection means.

[0038] Specifically, the first charge modulation circuit 20 monitors the conduction current instantaneous value in the first upper switch sub-circuit 31 and / or the first lower switch sub-circuit 32 in real time, that is, the instantaneous current amplitude of the switch element inside the first upper switch sub-circuit 31 and / or the first lower switch sub-circuit 32 when triggered to conduct.

[0039] The conduction current instantaneous value can be obtained by any reasonable sampling method, such as a high-precision current sensor or a circuit model estimation, and the present application does not limit the same.

[0040] S12: The conduction current instantaneous value is integrated to obtain a charge integral quantity.

[0041] The conduction current instantaneous value is integrated to calculate the charge integral quantity.

[0042] S13: A driving control signal is generated using the charge error value between the charge integral quantity and a target charge quantity.

[0043] A target charge quantity is set, which is usually determined based on the desired output voltage and load requirements.

[0044] The charge error value is calculated by subtracting the target charge quantity from the charge integral quantity.

[0045] The charge error value is processed by a PID (Proportional Integral Derivative) controller, a PI controller, or any other reasonable feedback control algorithm to obtain a drive control signal, and the duty cycle of the drive control signal is dynamically adjusted. The application does not limit this.

[0046] The drive control signal is used to trigger the switching elements in each switching subcircuit to control their on and off states.

[0047] In some embodiments, the drive control signal can be one or more of a PWM (Pulse Width Modulation) signal or a PFM (Pulse Frequency Modulation) signal, or any other reasonable control signal. The application does not limit this.

[0048] S14: Detect whether the step-down conversion circuit is in a first load state.

[0049] The current load rate of the first step-down conversion circuit 30 is detected, i.e., the ratio of the actual load power to the rated load power, to determine whether the current load rate is greater than a set proportion threshold, and further determine whether the first step-down conversion circuit 30 is currently in the first load state.

[0050] It is worth noting that the load capacity of an electronic circuit usually includes no load, light load, full load, and overload. Among them, no load refers to the running state of a device or system without any load connected; the load is significantly lower than the rated capacity, and the specific proportion varies depending on the field, usually referring to a load rate of 30% or less (or 50% or less in some scenarios) of the rated power; full load refers to a load close to or equal to the rated capacity, such as a generator output power consistent with the nameplate nominal value; overload refers to a load exceeding the rated capacity.

[0051] In addition, the load rate is a core parameter for measuring the relationship between the actual running load of a device or system and the rated capacity, and its definition and calculation method vary depending on the application field.

[0052] ‌General definition: Load rate = actual load / rated load * 100%, applicable to transformer, motor and power system scenarios. For example: The load rate of a transformer is the ratio of the output apparent power to the rated capacity.

[0053] The load rate of the first load state is not greater than a set proportion threshold.

[0054] In some embodiments, the set proportion threshold value can correspond to a load rate in a light load state, such as 30% or 50%; or a load rate at which the load changes greatly so that there is a great risk of ripple; or a critical load rate set reasonably for distinguishing different working scenarios, such as supplying power to different load devices or different numbers of load devices, such as 20%, 40%, or 60%, or any reasonable proportion threshold value, which is not limited in the present application.

[0055] If the first step-down conversion circuit 30 is in the first load state, S15 is performed, and if the first step-down conversion circuit 30 is in the second load state, S17 is performed.

[0056] S15: Adjust the duty cycle of the drive control signal to a set multiple of the previous one.

[0057] If the first step-down conversion circuit 30 is currently detected to be in the first load state, the duty cycle of the drive control signal is adjusted to a set multiple of the previous one, that is, the duty cycle of the previously obtained drive control signal is multiplied by the set multiple.

[0058] In some embodiments, the set multiple is greater than 1, and can be 1.5-2.5, such as 1.9, 2, or 2.1, or any reasonable multiple, and is preferably 2, which is not limited in the present application.

[0059] S16: Send the adjusted drive control signal to one of the upper and lower switch sub-circuits to trigger it to change the switching state.

[0060] When the first step-down conversion circuit 30 is determined to be in the first load state, the adjusted drive control signal is selectively sent to one of the first upper and lower switch sub-circuits 31 and 32 to drive only one of the switch sub-circuits.

[0061] If the first charge modulation circuit 20 currently obtains the actual on-current instantaneous value of the first upper switch sub-circuit 31, the adjusted drive control signal is sent to the first lower switch sub-circuit 32, and the first upper switch sub-circuit 31 is in the blocking state; if the first lower switch sub-circuit 32 is currently obtained, the adjusted drive control signal is sent to the first upper switch sub-circuit 31, and the first lower switch sub-circuit 32 is in the blocking state; if the on-current instantaneous values in the first upper and lower switch sub-circuits 31 and 32 are currently obtained synchronously, the adjusted drive control signal is sent to any one of the first upper and lower switch sub-circuits 31 and 32, which is not limited in the present application.

[0062] In a specific embodiment, the first load state can correspond to light load, the set ratio threshold value can be 30% or 50%, and the set multiple can correspond to 2, so that when one of the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32 is blocked, the duty cycle of the driving control signal can be adjusted to be twice the previous one, so that the output current and the output voltage of the first step-down conversion circuit 30 are adjusted to the appropriate interval, so as to meet the current power supply demand while effectively suppressing the ripple that may occur when the load suddenly changes.

[0063] It is worth noting that when the first step-down conversion circuit 30 is in the first load state, adjusting the duty cycle of the driving control signal to the set multiple of the previous one corresponds to sending the adjusted driving control signal to one of the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32. For example, when the load is light, one of the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32 will be in the blocked state, and the other will be in the working state. In order to ensure that the output current and the output voltage of the first step-down conversion circuit 30 are adjusted to the appropriate interval, i.e. under the premise that only one switch sub-circuit is working, to meet the output power stability as much as possible, to adapt to the demand of the load for a wider range of output voltage, and effectively suppress the ripple that may occur when the load suddenly changes, compared with the case where both the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32 are in the working state, the conduction time of the input-to-output path corresponding to only the first upper switch sub-circuit 31 or the first lower switch sub-circuit 32 working is actually half of the previous one. In order to ensure that the output voltage does not change suddenly, so as to be as close as possible to the output voltage when both the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32 are in the working state, it is necessary to increase the duty cycle of the driving control signal at this time, i.e. adjust the duty cycle to the set multiple of the previous one, and the set multiple is greater than 1, and is preferably 2.

[0064] For the convenience of understanding, taking the output power of the first buck conversion circuit 30 as an example, the output power of the first upper switch sub-circuit 31 or the first lower switch sub-circuit 32 is 50W when the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32 work simultaneously. When the duty cycle of each drive control signal is 70%, if the first buck conversion circuit 30 switches to half load (the load rate is 50%), that is, the output power is 50W, then the output power of the first upper switch sub-circuit 31 or the first lower switch sub-circuit 32 is 25W, and the duty cycle of each drive control signal is 35% at this time. If the first buck conversion circuit 30 switches to half load at the same time, one drive is turned off, that is, the output power of the first upper switch sub-circuit 31 or the first lower switch sub-circuit 32 needs to meet 50W, and then the duty cycle of the drive control signal of the working drive, that is, the first upper switch sub-circuit 31 or the first lower switch sub-circuit 32, needs to be adjusted from 35% to twice, that is, the duty cycle is adjusted to 70% to meet the current output power requirement, and under this premise, the ripple that may occur when the load suddenly changes is suppressed.

[0065] S17: The first pulse width modulation signal and the second pulse width modulation signal are sent to the upper switch sub-circuit and the lower switch sub-circuit, respectively, to trigger the upper switch sub-circuit and the lower switch sub-circuit to change the switching state.

[0066] The drive control signal includes a first pulse width modulation signal and a second pulse width modulation signal, and the first buck conversion circuit 30 further includes a first regulation output sub-circuit 33, and the first regulation output sub-circuit 33 is coupled to the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32.

[0067] The first charge modulation circuit 20 determines that the first buck conversion circuit 30 is in a second load state, and sends the first pulse width modulation signal and the second pulse width modulation signal to the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32, respectively, to trigger the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32 to change the switching state, so as to adjust the output current of the first regulation output sub-circuit 33.

[0068] In addition, the load rate of the second load state is greater than a set proportion threshold, and can be understood as heavy load, full load, or another load power supply scene different from the number of load devices or load devices corresponding to the first load state, which is not limited in the present application.

[0069] In some embodiments, the first charge modulation circuit 20 can synchronously control the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32, i.e. the first pulse width modulation signal and the second pulse width modulation signal have the same phase, to ensure the optimal current variation slope, or can asynchronously control the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32, i.e. the first pulse width modulation signal and the second pulse width modulation signal have staggered phases, and in particular can have a phase deviation of 180 degrees or 120 degrees or any other reasonable degree, to optimize the bus capacitor voltage sharing effect.

[0070] The above scheme quickly adjusts the output current and output voltage of the first step-down conversion circuit 30 to a suitable range by reasonably adjusting the duty cycle of the drive control signal and blocking some switch sub-circuits when a large change in load occurs, to adapt to the demand of the load for a wide range of output voltages, and effectively suppress the ripple that may occur when the load suddenly changes, and has good dynamic response characteristics, which can effectively meet the demand for power transient recovery capability, without the need to configure high-voltage devices and complex compensation networks, and the hardware cost is also low. In addition, this method not only improves the control accuracy, efficiency and response speed of the first step-down conversion circuit 30 under different load conditions, but also enhances the flexibility and adaptability of the system, and is suitable for various power electronic application fields.

[0071] Please continue to refer to Figure 3 , Figure 3 is Figure 1 a flowchart of an embodiment of S12 in In an embodiment, the charge modulation method of the present application further includes some more specific steps in addition to S11-S17. Specifically, S12 can further include the following steps:

[0072] S1211: Obtain the rising edge of the drive control signal.

[0073] It can be understood that the drive control signal is actually a pulse signal, which has a transition from low to high, i.e. the rising edge, and a transition from high to low, i.e. the falling edge.

[0074] Specifically, the first current regulation circuit identifies and detects the rising edge of the drive control signal, which can be achieved by any reasonable means such as hardware circuit (e.g. edge trigger), software algorithm (e.g. writing corresponding code in embedded system) or controller counter, and the present application does not limit this.

[0075] S1212: Integrate the on-current instantaneous value in response to the rising edge to obtain a charge integral.

[0076] When the rising edge of the drive control signal is detected, the on-current instantaneous value obtained at present is integrated to obtain a charge integral.

[0077] S1213: resetting the charge integration quantity after a preset time delay.

[0078] In the above, the rising edge is the starting moment, and the charge integration quantity is reset after a preset time delay. That is, the on-current instantaneous value is integrated from the rising edge, and the charge integration quantity is cleared after the preset time delay, so as to wait for the next rising edge to re-integrate the on-current instantaneous value.

[0079] The preset time delay is greater than or equal to the current high-level duration of the driving control signal and less than the current switching period of the driving control signal, and can be understood as the falling edge of the driving control signal or any moment between the falling edge and the rising edge, so as to ensure the dynamic response of the first upper switch sub-circuit 31 and / or the first lower switch sub-circuit 32 to the change of the switching state, and to detect whether the time delay reaches the preset time delay in real time by any reasonable way such as a timer, a pulse counter or a software algorithm.

[0080] Please continue to refer to Figure 4 , Figure 4 is Figure 1 the flowchart of another embodiment of S12 in FIG. 11. In an embodiment, the charge modulation method of the present application further includes some more specific steps in addition to S11-S17. Specifically, S12 can further include the following steps:

[0081] S1221: obtaining the rising edge and the falling edge of the driving control signal.

[0082] Specifically, the rising edge and the falling edge of the driving control signal are identified and detected, which can be achieved by any reasonable way such as a hardware circuit (e.g., an edge trigger), a software algorithm (e.g., writing a corresponding code in an embedded system) or a controller counter, and the present application does not limit this.

[0083] S1222: integrating the on-current instantaneous value to obtain the charge integration quantity in response to the rising edge.

[0084] When the rising edge of the driving control signal is detected, the current obtained on-current instantaneous value is integrated to obtain the charge integration quantity.

[0085] S1223: resetting the charge integration quantity in response to the falling edge.

[0086] When the falling edge of the driving control signal is detected, the charge integration quantity is reset and cleared, so as to wait for the next rising edge to re-integrate the on-current instantaneous value.

[0087] Please refer to Figure 5 , Figure 5 isFigure 1 Flowchart of an embodiment of S13. In an embodiment, the charge modulation method of the present application further comprises some more specific steps in addition to S11-S17. Specifically, S13 can further comprise the following steps:

[0088] S131: Obtain the output current of the regulation output sub-circuit.

[0089] Please continue to refer to Figure 6 , Figure 6 is a structural schematic diagram of a second embodiment of the charge modulation circuit of the present application.

[0090] It can be understood that the charge modulation method in this embodiment can be current regulation implemented by the second charge modulation circuit 40 on the second step-down conversion circuit 50 as shown in Figure 6 . The second step-down conversion circuit 50 comprises a second upper switch sub-circuit 51, a second lower switch sub-circuit 52, and a second regulation output sub-circuit 53. The second upper switch sub-circuit 51 comprises a first upper switch Q H 1, the second lower switch sub-circuit 52 comprises a first lower switch Q L 1, and the second regulation output sub-circuit 53 comprises a first capacitor C1, a second capacitor C2, a first upper diode D H 1, a first lower diode D L 1, a first inductor L1, and an output capacitor Co, corresponding to a single-phase BUCK circuit.

[0091] The first end of the first capacitor C1 is coupled to the first end of the first upper switch Q H 1, and is coupled to the first end of the DC power supply DC. The second end of the first capacitor C1 is coupled to the first end of the second capacitor C2, the first end of the first upper diode Q H 1, and the second end of the first lower diode Q L 1. The second end of the second capacitor C2 is coupled to the first end of the first lower switch Q L 1, and is coupled to the second end of the DC power supply DC and grounded. The second end of the first upper switch Q H 1 is coupled to the second end of the first upper diode D H 1 and the first end of the first inductor L1. The second end of the first inductor L1 is coupled to the first end of the output capacitor Co, and is coupled to the first end of the equivalent series diode Do in the load circuit 101. The second end of the first lower switch Q L 1 is coupled to the first end of the first upper diode D H 1 and the second end of the output capacitor Co, and is coupled to the second end of the equivalent series diode Do in the load circuit 101.

[0092] In other embodiments, the load circuit 101 can further include one or more of any reasonable circuit element, such as an equivalent resistor, an equivalent capacitor, an equivalent series diode, etc., without limitation.

[0093] The second charge modulation circuit 40 further includes a charge sampling and integrating circuit 41 and a current sampling and regulating circuit 42. The charge sampling and integrating circuit 41 further includes a first sampling circuit 411, a charge integrating circuit 412, and a charge feedback control circuit 413. The current sampling and regulating circuit 42 includes a second sampling circuit 421 and an error processing circuit 422. The first sampling circuit 411 is coupled to the first upper switch Q H 1 and / or the first lower switch Q L 1, and is coupled to the charge integrating circuit 412. The second sampling circuit 421 is coupled to the first end of the output capacitor Co and the error processing circuit 422. The charge integrating circuit 412 is coupled to the charge feedback control circuit 413. The charge feedback control circuit 413 is coupled to the error processing circuit 422, the third end of the first upper diode D H 1, and the third end of the first lower diode D L 1.

[0094] In some embodiments, the first upper switch Q H 1, the first lower switch Q L 1 can be any reasonable switch, such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a transistor, a thin film transistor, a field effect transistor, or the like, without limitation.

[0095] Please continue to refer to Figure 7 , Figure 7 is a structural schematic diagram of a third embodiment of the first charge modulation circuit 20.

[0096] In other embodiments, the second step-down conversion circuit 50 can further be a multiphase BUCK circuit, i.e., the second upper switch sub-circuit 51 can further include a first upper switch Q H 1, a second upper switch Q H 2,..., an nth upper switch Q H n (n is an integer greater than 1). The second lower switch sub-circuit 52 includes a first lower switch Q L 1, a second lower switch Q L 2,..., an nth lower switch Q Ln; the second regulating output sub-circuit 53 comprises a first capacitor C1, a second capacitor C2, a first upper diode D H 1, a second upper diode D H 2,..., an nth upper diode D H n, a first lower diode D L 1, a second lower diode D L 2,..., an nth lower diode D L n, a first inductor L1, a second inductor L2,..., an nth inductor Ln, and an output capacitor Co.

[0097] The first end of the first capacitor C1 is coupled to the first end of a first upper switch tube Q H 1, the first end of a second upper switch tube Q H 2,..., the first end of an nth upper switch tube Q H n, and is used for being coupled to the first end of a direct current power supply DC, the second end of the first capacitor C1 is coupled to the first end of a second capacitor C2, the first end of a first upper diode D H 1, the first end of a second upper diode D H 2,..., the first end of an nth upper diode D H n, and the second end of a first lower diode D L 1, the second end of a second lower diode D L 2,..., the second end of an nth lower diode D L n, the second end of the second capacitor C2 is coupled to the first end of a first lower switch tube Q L 1, the first end of a second lower switch tube Q L 2,..., the first end of an nth lower switch tube Q L n, and is used for being coupled to the second end of the direct current power supply DC and being grounded, the second end of the first upper switch tube Q H 1, the second end of a second upper switch tube Q H 2,..., the second end of an nth upper switch tube Q H n, respectively coupled to the second end of a first upper diode D H 1, the second end of a second upper diode D H 2,..., the second end of an nth upper diode D H n, and the first end of a first inductor L1, the first end of a second inductor L2,..., the first end of an nth inductor Ln, the second end of the first inductor L1 is coupled to the second end of the second inductor L2,..., the second end of the nth inductor Ln and the first end of an output capacitor Co, and is used for being coupled to the first end of an equivalent series diode Do in a load circuit 101, the second end of the first lower switch tube Q L 1, the second end of a second lower switch tube Q Lthe second end of the n-th lower switch tube Q L the second end of the n-th lower switch tube Q H the first end of the 1st upper diode D H the first end of the n-th upper diode D H the first end of the n-th upper diode D and the second end of the output capacitor Co, and is used for coupling with the second end of the equivalent series diode Do in the load circuit 101.

[0098] Specifically, for the convenience of understanding, the second sampling circuit 421 obtains the output current Io output to the equivalent series diode Do, taking the second step-down conversion circuit 50 as a single-phase BUCK circuit as an example.

[0099] S132: subtract the target reference current from the output current to obtain a current error value.

[0100] The error processing circuit 422 receives the output current Io sent by the second sampling circuit 421, and sets a target reference current Iref, or receives the target reference current Iref sent by the upper computer, to subtract the target reference current Iref from the output current Io to obtain a current error value.

[0101] It is worth noting that the upper computer generally refers to a computer system with strong computing and data processing capabilities. It is responsible for monitoring, issuing instructions, data acquisition, processing analysis, and user interaction of the entire control system. As the "brain" of the system, it can handle complex algorithms, store long-term data, and provide a graphical interface for user operation.

[0102] The lower computer refers to a device or controller in the control system that is directly connected to sensors, actuators, and other hardware. It is responsible for executing specific control instructions issued by the upper computer, such as outputting switching signals, adjusting analog quantities, and collecting data. The lower computer usually performs simple logic judgment and real-time control tasks.

[0103] S133: generate a driving control signal using the charge error value between the charge integral and the target charge quantity and the current error value.

[0104] The first sampling circuit 411 samples and obtains the conduction current instantaneous value Iphase of the 1st upper diode Q H 1 and / or the 1st lower diode Q L 1.

[0105] The charge integration circuit 412 receives the conduction current instantaneous value Iphase sent by the first sampling circuit 411 to integrate the conduction current instantaneous value Iphase to obtain the charge integral Qphase, i.e. Qphase=∫Iphase dt.

[0106] The charge feedback control circuit 413 subtracts the target charge amount from the charge integration amount Qphase to obtain a charge error value, and receives a current error value sent by the error processing circuit 422, to generate a drive control signal using the currently obtained charge error value and current error value.

[0107] Further, in an embodiment, S16 can further include sending the adjusted drive control signal to one of a first upper diode Q H 1 and a first lower diode Q L 1.

[0108] Further, in an embodiment, S16 can further include sending the adjusted drive control signal to one of a first upper diode Q H 1 and a first lower diode Q L 1, a second upper diode Q H 2 and a second lower diode Q L 2,..., and an nth upper diode Q H n and an nth lower diode Q L n.

[0109] In some embodiments, the second step-down conversion circuit 50 can be a driving power supply for a laser pumping source. In order to improve the energy conversion efficiency and output power density, laser systems generally use a multi-stage pumping or distributed pumping architecture, which results in the supply voltage of the pumping source being increased from the traditional hundreds of volts to above one thousand volts. Accordingly, the supply voltage of the pumping source will also fluctuate sharply when the load current changes, which poses higher challenges to the voltage withstand capability, dynamic response speed characteristics, and power density of the power supply topology.

[0110] Since the output voltage of the laser power supply, i.e., the second step-down conversion circuit 50, changes under different load currents, for a high-voltage laser pumping source with a large range of load variation, in order to solve the problem that when the load current, i.e., the output current Io, jumps to light load, the output voltage decreases, causing the duty cycle of the step-down circuit to decrease and deviate from the optimal working interval, affecting the dynamic response speed of the power supply and the quality of the laser pumping pulse waveform.

[0111] Therefore, by closing the upper diode or the lower diode, and increasing the small duty ratio in the second load state to a moderate duty ratio in the first load state, i.e., a set multiple of the previous small duty ratio, the switch tube voltage stress can be reduced to half of the input voltage, greatly reducing the voltage withstand requirement, which is conducive to expanding the high-voltage application range. At the same time, when selecting a device, a low-voltage switch tube with smaller parasitic capacitance and lower internal resistance can be selected, which is conducive to speeding up the response speed of the power supply and further developing the laser power supply towards high frequency. It is also conducive to meeting the requirements of laser pumping with high-voltage input, high pulse repetition frequency and large load variation range.

[0112] Please refer to Figure 8 , Figure 8 is a flowchart of the second embodiment of the charge modulation method of the present application. The charge modulation method of the present embodiment is a detailed embodiment of the charge modulation method in Figure 1 , and specifically includes the following steps:

[0113] S61: Obtain the conduction current instantaneous value in the upper switch subcircuit and / or the lower switch subcircuit.

[0114] S62: Integrate the conduction current instantaneous value to obtain a charge integration quantity.

[0115] S63: Generate a drive control signal using the charge error value between the charge integration quantity and a target charge quantity.

[0116] Wherein, S61, S62 and S63 are the same as S11, S12 and S13 in Figure 1 , and specifically please refer to S11, S12 and S13 and the related text description, which will not be repeated here.

[0117] S64: Obtain the target reference current sent by the upper computer.

[0118] It is worth noting that the upper computer can be understood as a system processor for monitoring and controlling the working state and application scenario of the load circuit to determine the current power supply demand of the load circuit, such as the demand for output power of the load circuit, and then set the current target reference current.

[0119] Specifically, the first charge modulation circuit 20 is in communication connection with the upper computer to receive the target reference current sent by the upper computer.

[0120] S65: Determine whether the target reference current is less than the first mode switching threshold.

[0121] It can be understood that the first charge modulation circuit 20 can also determine whether the first step-down conversion circuit 30 is in the first load state by detecting whether the target reference current is less than the first mode switching threshold.

[0122] If the target reference current is less than the first mode switching threshold, S66 is performed, and if the target reference current is not less than the first mode switching threshold, S68 is performed.

[0123] S66: Adjust the duty cycle of the driving control signal to a preset multiple of the previous setting.

[0124] S67: Send the adjusted driving control signal to one of the upper switch sub-circuit and the lower switch sub-circuit to trigger it to change the switching state.

[0125] S68: Send the first pulse width modulation signal and the second pulse width modulation signal to the upper switch sub-circuit and the lower switch sub-circuit, respectively, to trigger the upper switch sub-circuit and the lower switch sub-circuit, respectively, to change the switching state.

[0126] S66, S67, and S68 are the same as S15, S16, and S17 in Figure 1 , respectively, and details are described in S15, S16, and S17 and their related text descriptions, which will not be repeated here.

[0127] Please refer to Figure 9 , Figure 9 is a flowchart of the third embodiment of the charge modulation method of the present application. The charge modulation method of the present embodiment is a detailed implementation of the charge modulation method in Figure 1 , and specifically includes the following steps:

[0128] S71: Obtain the conduction current instantaneous value in the upper switch sub-circuit and / or the lower switch sub-circuit.

[0129] S72: Integrate the conduction current instantaneous value to obtain a charge integration quantity.

[0130] S73: Generate a driving control signal using the charge error value between the charge integration quantity and the target charge quantity.

[0131] S71, S72, and S73 are the same as S11, S12, and S13 in Figure 1 , respectively, and details are described in S11, S12, and S13 and their related text descriptions, which will not be repeated here.

[0132] S74: Obtain the output current of the regulation output sub-circuit.

[0133] It can be understood that the first step-down conversion circuit 30 further includes a first regulation output sub-circuit 33, which is coupled to the first upper switch sub-circuit 31 and the first lower switch sub-circuit 32.

[0134] The first charge modulation circuit 20 is also configured to sample an output current of the first regulation output sub-circuit 33.

[0135] S75: integrating the output current to obtain a feedback charge integration.

[0136] The current output is integrated to calculate the feedback charge integration.

[0137] S76: determining whether the feedback charge integration is less than a second mode switching threshold.

[0138] It can be understood that the first charge modulation circuit 20 can further determine whether the first buck conversion circuit 30 is in the first load state by detecting whether the feedback charge integration is less than the second mode switching threshold.

[0139] If the feedback charge integration is less than the second mode switching threshold, S77 is performed, and if the feedback charge integration is not less than the second mode switching threshold, S79 is performed.

[0140] S77: adjusting a duty cycle of the drive control signal to a set multiple of the previous duty cycle.

[0141] S78: sending the adjusted drive control signal to one of the upper switch sub-circuit and the lower switch sub-circuit to trigger the one to change the switching state.

[0142] S79: sending the first pulse width modulation signal and the second pulse width modulation signal to the upper switch sub-circuit and the lower switch sub-circuit, respectively, to trigger the upper switch sub-circuit and the lower switch sub-circuit to change the switching state, respectively.

[0143] S77, S78, and S79 are the same as S15, S16, and S17 in Figure 1 , respectively, and details are described in S15, S16, and S17 and related descriptions, which are not repeated here.

[0144] Please refer to Figure 10 , Figure 10 is Figure 9 a flowchart of an embodiment of S75 in

[0145] S751: obtaining a rising edge and a falling edge of the drive control signal.

[0146] Specifically, the falling edge and the rising edge of the driving control signal are identified and detected, which can be achieved by any reasonable manner such as a hardware circuit (e.g., an edge trigger), a software algorithm (e.g., writing a corresponding code in an embedded system), a controller counter, or the like, and the present application does not limit the same.

[0147] S752: In response to the rising edge, the output current is integrated to obtain a feedback charge integration.

[0148] In response to the rising edge of the driving control signal, the current output is integrated to obtain a feedback charge integration.

[0149] S753: In response to the falling edge, the feedback charge integration is reset.

[0150] In response to the falling edge of the driving control signal, the feedback charge integration is reset to zero to wait for the next rising edge to integrate the output current again.

[0151] The present application also provides an electronic device, please refer to Figure 11 , Figure 11 is a structural schematic diagram of an embodiment of the electronic device of the present application. In the embodiment, the electronic device 80 includes a housing 81 and a third charge modulation circuit 82 connected to the housing 81.

[0152] It should be noted that the third charge modulation circuit 82 described in the embodiment is the first charge modulation circuit 20 or the second charge modulation circuit 40 described in any of the above embodiments, and the specific details are described in the Figures 1-10 and related text, which will not be repeated here.

[0153] The beneficial effects of the present application are: unlike the prior art, the charge modulation method provided by the present application obtains the conduction current instantaneous value in the upper switch subcircuit and / or the lower switch subcircuit, integrates the conduction current instantaneous value to obtain a charge integration, and generates a driving control signal using the charge error value between the charge integration and a target charge amount, so as to adjust the duty cycle of the driving control signal to a set multiple when the buck conversion circuit is in the first load state, and send the adjusted driving control signal to one of the upper switch subcircuit and the lower switch subcircuit to trigger the change of the switch state, so as to quickly adjust the output current and the output voltage of the buck conversion circuit to a suitable range by reasonably adjusting the duty cycle of the driving control signal and blocking part of the switch subcircuit when the load changes greatly, so as to adapt to the demand of the load for a wide range of output voltage, effectively suppress the ripple that may occur when the load changes suddenly, and have good dynamic response characteristics, which can effectively meet the demand for power transient recovery capability, without the need to configure high-voltage devices and complex compensation networks, and the hardware cost is also low.

[0154] The above merely provides the implementation of the present application, and does not limit the patent scope of the present application, and any equivalent structure or equivalent process transformation made by using the content of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A charge modulation method applied to a buck converter circuit, wherein the buck converter circuit comprises an upper switch subcircuit and a lower switch subcircuit coupled to each other, characterized in that: The charge modulation method comprises: Acquiring an instantaneous value of an on-state current in the upper switch subcircuit and / or the lower switch subcircuit; Integrating the instantaneous value of the on-state current to obtain an integral charge; generating a drive control signal using a charge error value between the charge integrated amount and a target charge amount; detecting whether the step-down converter circuit is in a first load state; wherein the load rate of the first load state is not greater than a set ratio threshold; If the step-down converter circuit is in the first load state, adjusting the duty cycle of the drive control signal to a previously set multiple; wherein the set multiple is greater than 1; The adjusted driving control signal is sent to one of the upper switch sub-circuit and the lower switch sub-circuit to trigger it to change the switch state.

2. The charge modulation method according to claim 1, wherein: The step of integrating the instantaneous value of the on-state current to obtain the charge integral comprises: Obtaining a rising edge of the drive control signal; In response to the rising edge, integrating the instantaneous value of the on-current to obtain the charge integral; The charge integral is reset by delaying for a preset time period; wherein the preset time period is greater than or equal to the current high level duration of the drive control signal and less than the current switching period of the drive control signal.

3. The charge modulation method according to claim 1, wherein: The step of integrating the instantaneous value of the on-state current to obtain the charge integral comprises: Obtaining the rising edge and falling edge of the drive control signal; In response to the rising edge, integrating the instantaneous value of the on-current to obtain the charge integral; The charge integrated amount is reset in response to the falling edge.

4. The charge modulation method according to claim 1, wherein: The step-down converter circuit further includes a regulating output subcircuit coupled to the upper switch subcircuit and the lower switch subcircuit. The step of generating a driving control signal using a charge error value between the charge integral amount and a target charge amount includes: Obtaining an output current of the regulated output subcircuit; Subtracting the target reference current from the output current to obtain a current error value; The drive control signal is generated using the charge error value and the current error value between the charge integrated amount and a target charge amount.

5. The charge modulation method according to claim 1, wherein: The step of detecting whether the buck converter circuit is in the first load state comprises: Get the target reference current sent by the host computer; determining whether the target reference current is less than a first mode switching threshold; If the buck converter circuit is in the first load state, the step of adjusting the duty cycle of the drive control signal to a previously set multiple includes: If the target reference current is less than the first mode switching threshold, the duty cycle of the driving control signal is adjusted to a previously set multiple.

6. The charge modulation method according to claim 1, wherein: The buck converter circuit further includes a regulating output subcircuit coupled to the upper switch subcircuit and the lower switch subcircuit. The step of detecting whether the buck converter circuit is in the first load state includes: Obtaining an output current of the regulated output subcircuit; Integrating the output current to obtain an integrated amount of feedback charge; determining whether the feedback charge integral is less than a second mode switching threshold; If the buck converter circuit is in the first load state, the step of adjusting the duty cycle of the drive control signal to a previously set multiple includes: If the integrated amount of the feedback charge is less than the second mode switching threshold, the duty cycle of the drive control signal is adjusted to a previously set multiple.

7. The charge modulation method according to claim 6, wherein: The step of integrating the output current to obtain the feedback charge integral comprises: Obtaining the rising edge and falling edge of the drive control signal; In response to the rising edge, integrating the output current to obtain the feedback charge integral; The feedback charge integrated amount is reset in response to the falling edge.

8. The charge modulation method according to any one of claims 1 to 7, characterized in that: The driving control signal includes a first pulse width modulation signal and a second pulse width modulation signal, and the charge modulation method further includes: If the step-down converter circuit is in a second load state, the first pulse-width modulation signal and the second pulse-width modulation signal are sent to the upper switch sub-circuit and the lower switch sub-circuit, respectively, to trigger the upper switch sub-circuit and the lower switch sub-circuit to change their switch states, respectively; wherein the load rate of the second load state is greater than the set ratio threshold.

9. A charge modulation circuit, characterized in that: The charge modulation circuit is coupled to the buck conversion circuit; The charge modulation circuit performs charge modulation on the buck conversion circuit using the charge modulation method according to any one of claims 1 to 8.

10. An electronic device, characterized in that: The electronic device includes a housing and a charge modulation circuit connected to the housing; Wherein, the charge modulation circuit is the charge modulation circuit according to claim 9.

Images